xf.li | bfc6e71 | 2025-02-07 01:54:34 -0800 | [diff] [blame] | 1 | /* |
| 2 | * linux/arch/arm/mach-zx297520v3/reset.c |
| 3 | * |
| 4 | * Copyright (C) 2015 ZTE-TSP |
| 5 | * |
| 6 | * This program is free software; you can redistribute it and/or modify |
| 7 | * it under the terms of the GNU General Public License as published by |
| 8 | * the Free Software Foundation; either version 2 of the License, or |
| 9 | * (at your option) any later version. |
| 10 | * |
| 11 | * This program is distributed in the hope that it will be useful, |
| 12 | * but WITHOUT ANY WARRANTY; without even the implied warranty of |
| 13 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the |
| 14 | * GNU General Public License for more details. |
| 15 | */ |
| 16 | |
| 17 | #include <linux/kernel.h> |
| 18 | #include <linux/interrupt.h> |
| 19 | #include <linux/irq.h> |
| 20 | #include <linux/clockchips.h> |
| 21 | #include <linux/clk.h> |
| 22 | #include <linux/module.h> |
| 23 | #include <linux/err.h> |
| 24 | #include <linux/syscore_ops.h> |
| 25 | #include <linux/gpio.h> |
| 26 | #include <linux/miscdevice.h> /* For handling misc devices */ |
| 27 | #include <linux/fs.h> /* For file operations */ |
| 28 | #include <mach/board.h> |
| 29 | #include <mach/iomap.h> |
| 30 | #include <mach/spinlock.h> |
| 31 | #include <linux/mfd/zx234290.h> |
| 32 | #include <linux/delay.h> |
| 33 | #include <linux/reboot.h> |
xf.li | 771eb06 | 2025-02-09 23:05:11 -0800 | [diff] [blame^] | 34 | #include <linux/sched.h> |
xf.li | bfc6e71 | 2025-02-07 01:54:34 -0800 | [diff] [blame] | 35 | |
| 36 | #define ZX_RESET_DEV "/dev/zx_reset" |
| 37 | |
| 38 | #define ZX_RESET_IOC_MAGIC 'W' |
| 39 | /*ioctl cmd usd by device*/ |
| 40 | #define ZX_RESET_FAST_REBOOT _IOW(ZX_RESET_IOC_MAGIC, 1, char *) |
| 41 | |
| 42 | |
| 43 | #define GLOBAL_RESET_REG (ZX_TOP_CRM_BASE) |
| 44 | |
| 45 | #define USER_RST_UNDEFINE 0 |
| 46 | #define USER_RST_TO_NORMAL 1 |
| 47 | #define USER_RST_TO_CHARGER 2 |
| 48 | #define USER_RST_TO_ALARM 3 |
| 49 | #define USER_RST_TO_EXCEPT 4 |
| 50 | #ifdef CONFIG_DWC_DEVICE_ONLY |
| 51 | typedef enum |
| 52 | { |
| 53 | GSM_RAM_PWR = 0, |
| 54 | GSM_DSP_PWR = 1, |
| 55 | EDCP_PWR = 4, |
| 56 | USB_CTRL_PWR = 8, |
| 57 | USB_HSIC_PWR = 9, |
| 58 | |
| 59 | PARTITION_ALL = 10 |
| 60 | |
| 61 | } T_ZDrvPow_Partition; |
| 62 | |
| 63 | typedef enum |
| 64 | { |
| 65 | POW_MDL_1 = 0, |
| 66 | POW_MDL_ALL = 1 |
| 67 | } T_ZDrvPow_PowerModule; |
| 68 | |
| 69 | typedef enum |
| 70 | { |
| 71 | POW_ENABLE = 0, |
| 72 | POW_DISABLE = 1, |
| 73 | |
| 74 | POW_ENABLE_ALL |
| 75 | } T_ZDrvPow_PowerEnable; |
| 76 | |
| 77 | extern int pow_partition_powerswitch(T_ZDrvPow_Partition part, T_ZDrvPow_PowerEnable ena); |
| 78 | extern int zx234290_setusb_v0v9_sleepmode(T_ZDrvPmic_SlpMode mode); |
| 79 | extern int zx234290_setusb_v3v3_sleepmode(T_ZDrvPmic_SlpMode mode); |
| 80 | #endif |
| 81 | static bool debug_stop_reboot = false; |
| 82 | module_param(debug_stop_reboot, bool, 0644); |
| 83 | |
| 84 | #ifdef CONFIG_WATCHDOG_RESTART |
| 85 | extern void wdt_restart(void); |
| 86 | #endif |
| 87 | |
| 88 | extern void zx_denali_nand_lock(void); |
| 89 | extern void zx_denali_nand_unlock(void); |
xf.li | 771eb06 | 2025-02-09 23:05:11 -0800 | [diff] [blame^] | 90 | extern void zxic_reset_reason(int reason, const char *cpu, const char *app); |
xf.li | bfc6e71 | 2025-02-07 01:54:34 -0800 | [diff] [blame] | 91 | |
| 92 | |
| 93 | void zx29_restart(char mode, const char *cmd) |
| 94 | { |
| 95 | /* change to "#ifdef CONFIG_MFD_ZX234290/CONFIG_MFD_ZX234290_I2C" later! */ |
| 96 | #ifndef CONFIG_ARCH_ZX297520V3_CAP |
| 97 | /* reset */ |
| 98 | unsigned char reg = 0; |
| 99 | int ret = 0; |
| 100 | u8 restart_flag = 0; |
| 101 | unsigned char status = USER_RST_UNDEFINE; |
| 102 | |
xf.li | 771eb06 | 2025-02-09 23:05:11 -0800 | [diff] [blame^] | 103 | zxic_reset_reason(2, "ap", current->comm); |
| 104 | |
xf.li | bfc6e71 | 2025-02-07 01:54:34 -0800 | [diff] [blame] | 105 | if (cmd == NULL) { |
| 106 | printk(KERN_INFO"restart:enter reboot :reset to normal\n"); |
| 107 | |
| 108 | /*set the vale = 1*/ |
| 109 | status = USER_RST_TO_NORMAL; |
| 110 | } else if (strcmp(cmd,"drv_key reboot") == 0) { |
| 111 | printk(KERN_INFO"restart:enter drv_key reboot :reset to charger\n"); |
| 112 | |
| 113 | /*set the vale = 2*/ |
| 114 | status = USER_RST_TO_CHARGER; |
| 115 | } else if (strcmp(cmd,"drv_except reboot") == 0) { |
| 116 | printk(KERN_INFO"restart:enter drv_except reboot :reset to normal\n"); |
| 117 | |
| 118 | /* set the vale = 4 */ |
| 119 | status = USER_RST_TO_EXCEPT; |
| 120 | } else if (strcmp(cmd,"mmi_key reboot") == 0) { |
| 121 | printk(KERN_INFO"restart:enter mmi_key reboot :reset to charger\n"); |
| 122 | |
| 123 | /*set the vale = 2*/ |
| 124 | status = USER_RST_TO_CHARGER; |
| 125 | } else if (strcmp(cmd,"mmi_rtc reboot") == 0) { |
| 126 | printk(KERN_INFO"restart: enter mmi_rtc reboot: reset to alarm\n"); |
| 127 | |
| 128 | status = USER_RST_TO_ALARM; |
| 129 | } else { |
| 130 | printk(KERN_INFO"restart: reboot with cmd %s\n", cmd); |
| 131 | |
| 132 | /*set the vale = 1*/ |
| 133 | status = USER_RST_TO_NORMAL; |
| 134 | } |
| 135 | if(debug_stop_reboot ) |
| 136 | { |
| 137 | printk(KERN_INFO"debug_stop_reboot= 0x%x, for debug, bug_on!!!!\n", debug_stop_reboot); |
| 138 | panic("reboot"); |
| 139 | } |
| 140 | /*reset spifc cs*/ |
| 141 | soft_spin_lock_nand_psm(NAND_SFLOCK); |
| 142 | zx29_gpio_config(ZX29_GPIO_93, GPIO93_SPIFC_CS); |
| 143 | gpio_set_value(ZX29_GPIO_86,GPIO_HIGH); |
| 144 | |
| 145 | #ifdef CONFIG_XR_WLAN |
| 146 | gpio_set_value(ZX29_GPIO_121,GPIO_LOW); |
| 147 | if (gpio_get_value(ZX29_GPIO_123) == 1) |
| 148 | mdelay(4000); |
| 149 | #endif |
| 150 | |
| 151 | if (status != USER_RST_TO_EXCEPT) { |
| 152 | #ifdef CONFIG_DWC_DEVICE_ONLY |
| 153 | //add by gsn,for user mode |
| 154 | zDrvPmic_SetNormal_Onoff(VUSB_0V9,PM_ENABLE); |
| 155 | zDrvPmic_SetNormal_Onoff(VUSB_3V3,PM_ENABLE); |
| 156 | pow_partition_powerswitch(USB_CTRL_PWR, POW_ENABLE); |
| 157 | |
| 158 | zx234290_setusb_v0v9_sleepmode(PM_SLPMODE_ECO_SLPV); |
| 159 | zx234290_setusb_v3v3_sleepmode(PM_SLPMODE_ECO_SLPV); |
| 160 | #endif |
| 161 | local_irq_disable(); |
| 162 | soft_spin_lock_psm(I2C2_SFLOCK); |
| 163 | |
| 164 | ret = Zx234290_SetUserReg_PSM(status); |
| 165 | if(0!= ret){ |
| 166 | panic("restart:set restar flag error!\n"); |
| 167 | } |
| 168 | |
| 169 | #ifdef CONFIG_WATCHDOG_RESTART //delete 32k |
| 170 | wdt_restart(); |
| 171 | #else |
| 172 | zx_write_reg(GLOBAL_RESET_REG, 1); |
| 173 | #endif |
| 174 | |
| 175 | soft_spin_unlock_psm(I2C2_SFLOCK); |
| 176 | local_irq_enable(); |
| 177 | } else { |
xf.li | 771eb06 | 2025-02-09 23:05:11 -0800 | [diff] [blame^] | 178 | ret = Zx234290_SetUserReg_PSM(USER_RST_TO_EXCEPT); |
xf.li | bfc6e71 | 2025-02-07 01:54:34 -0800 | [diff] [blame] | 179 | if (ret) { |
| 180 | panic("restart:set restar flag error!\n"); |
| 181 | } |
| 182 | |
| 183 | #ifdef CONFIG_WATCHDOG_RESTART //delete 32k |
| 184 | local_irq_disable(); |
| 185 | wdt_restart(); |
| 186 | #else |
| 187 | zx_write_reg(GLOBAL_RESET_REG, 1); |
| 188 | #endif |
| 189 | } |
| 190 | #endif |
| 191 | } |
| 192 | EXPORT_SYMBOL(zx29_restart); |
| 193 | |
| 194 | |
| 195 | /******************************************************************************** |
| 196 | * Function: |
| 197 | * Description: |
| 198 | * Parameters: |
| 199 | * Returns: |
| 200 | * Others: |
| 201 | ********************************************************************************/ |
| 202 | |
| 203 | static int zx_reset_open(struct inode *inode, struct file *file) |
| 204 | { |
| 205 | return 0; |
| 206 | } |
| 207 | |
| 208 | static int zx_reset_close(struct inode *inode, struct file *file) |
| 209 | { |
| 210 | return 0; |
| 211 | } |
| 212 | static long zx_reset_ioctl(struct file *file, unsigned int cmd, unsigned long arg) |
| 213 | { |
| 214 | switch(cmd) |
| 215 | { |
| 216 | case ZX_RESET_FAST_REBOOT: |
| 217 | //zx29_restart (NULL, "at set fast reboot!\n\n"); |
| 218 | #ifndef CONFIG_MTD_SPI_NOR |
| 219 | zx_denali_nand_lock(); |
| 220 | #endif |
| 221 | kernel_restart("at set fast reboot!\n\n"); |
| 222 | #ifndef CONFIG_MTD_SPI_NOR |
| 223 | zx_denali_nand_unlock(); |
| 224 | #endif |
| 225 | break; |
| 226 | |
| 227 | default: |
| 228 | break; |
| 229 | } |
| 230 | |
| 231 | return 0; |
| 232 | } |
| 233 | |
| 234 | |
| 235 | static const struct file_operations zx_reset_fops = { |
| 236 | .owner = THIS_MODULE, |
| 237 | .unlocked_ioctl = zx_reset_ioctl, |
| 238 | .open = zx_reset_open, |
| 239 | .release = zx_reset_close, |
| 240 | }; |
| 241 | |
| 242 | static struct miscdevice zx_reset_miscdev = { |
| 243 | .minor = MISC_DYNAMIC_MINOR, |
| 244 | .name = "zx_reset", |
| 245 | .fops = &zx_reset_fops, |
| 246 | }; |
| 247 | |
| 248 | static int __init zx_reset_init(void) |
| 249 | { |
| 250 | int ret=0; |
| 251 | ret = misc_register(&zx_reset_miscdev); |
| 252 | if (ret != 0) { |
| 253 | printk(KERN_ERR"reset cannot register miscdev on(err=%d)\n", ret); |
| 254 | return ret; |
| 255 | } |
| 256 | return 0; |
| 257 | } |
| 258 | |
| 259 | late_initcall_sync(zx_reset_init); |
| 260 | |
| 261 | |