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192.168.1.100 / 7520V3V / 771eb063e6c7ae000275d5bb864b5d42eb3962ab / . / boot / common / src / uboot / drivers / gpio / hal_gpio.c
blob: 82d1e829ef85b65d0dd5aa4b73f8da4a2011a82a [file] [log] [blame]
xf.libfc6e712025-02-07 01:54:34 -0800[diff] [blame]1/***********************************************************************
2* Copyright (C) 2016, ZIXC Corporation.
3*
4* File Name: hal_gpio.c
5* File Mark:
6* Description:
7* Others:
8* Version: v1.0
9* Author: zhangdongdong
10* Date: 2015-07-31
11*
12* History 1:
13* Date:
14* Version:
15* Author:
16* Modification:
17*
18* History 2:
19**********************************************************************/
20/*************************************************************************
21* Include files *
22*************************************************************************/
23#include <config.h>
24#include "hal_gpio_v3.h"
25#include <drvs_gpio.h>
26
27/*GPIO*/
28#define GPIO0_REG_BASE 0x0013D000
29#define GPIO1_REG_BASE 0x0013E000
30
31#define PINMUX_REG_BASE 0x01303000
32#define PADCTRL_REG_BASE 0x0013c000
33#define IO_CFG_REG_BASE (PADCTRL_REG_BASE+0x800)
34
35#define EX_GPIO_INT_TOP_AP_CLEAR_REG (0x13a000+0x128)
36#define EX_GPIO_INT_TOP_CP_CLEAR_REG (0x13a000+0x118)
37#define EX_8INT1_CLEAR_REG (0x13a000+0x064)
38/*************************************************************************
39* Macro *
40*************************************************************************/
41#define GPIO0_MODULE_NUM 128
42#define GPIO1_MODULE_NUM 28
43
44#define GPIOPDD_REG0(gpio) (GPIO0_REG_BASE + ((gpio>>4) * 16) * 4)
45#define RECV_REG0(gpio) (GPIO0_REG_BASE + ((gpio>>4) * 16 + 5) * 4)
46#define SET1_SEND_REG0(gpio) (GPIO0_REG_BASE + ((gpio>>4) * 16 + 6) * 4)
47#define SET0_SEND_REG0(gpio) (GPIO0_REG_BASE + ((gpio>>4) * 16 + 7) * 4)
48#define SEND_REG0(gpio) (GPIO0_REG_BASE + ((gpio>>4) * 16 + 8) * 4)
49
50#define GPIOPDD_REG1(gpio) (GPIO1_REG_BASE + (((gpio)>>4) * 16) * 4)
51#define RECV_REG1(gpio) (GPIO1_REG_BASE + (((gpio)>>4) * 16 + 5) * 4)
52#define SET1_SEND_REG1(gpio) (GPIO1_REG_BASE + (((gpio)>>4) * 16 + 6) * 4)
53#define SET0_SEND_REG1(gpio) (GPIO1_REG_BASE + (((gpio)>>4) * 16 + 7) * 4)
54#define SEND_REG1(gpio) (GPIO1_REG_BASE + (((gpio)>>4) * 16 + 8) * 4)
55
56#define TOP_SEL_AON 0
57#define TOP_SEL_PD 1
58
59
60/**************************************************************************
61* Types *
62
63
64**************************************************************************/
65
66
67/**************************************************************************
68* Global Variable *
69**************************************************************************/
70extern UINT32 gGpioNumMax;
71extern T_Gpio gGpioInfoTable[];
72
73/**************************************************************************
74* Function Prototypes *
75**************************************************************************/
76
77
78/**************************************************************************
79* Function Defines *
80**************************************************************************/
81
82
83/**************************************************************************
84* Functin: zDrvGpio_SetFunc
85* Description: set the pin use ,used as GPIO or other module,when use for GPIO
86* Parameters:
87* Input:
88* gpio_id: gpio id
89* func_sel: sel pd or aon func
90* val: pd or aon func val
91* Output:
92* NONE
93* Returns:
94* success or parameter fault
95* Others:
96* None.
97**************************************************************************/
98SINT32 zDrvGpio_SetFunc(UINT32 gpio_id, T_ZDrvGpio_FuncSel func_sel)
99{
100#if 1//ndef _FPGA_TEST
101 UINT32 i = 0;
102 UINT32 topFunc = (func_sel>>12)&0x1;
103 UINT32 l2Func = func_sel&0x3ff;
104
105 if((gpio_id != (func_sel>>24))||(MAX_GPIO_NUM < gpio_id)){
106 return -1;
107 }
108
109 for(i=0; i<gGpioNumMax; i++)
110 {
111 if(gpio_id == gGpioInfoTable[i].gpio)
112 break;
113 }
114
115 if(INVLID_ADDR != gGpioInfoTable[i].topFuncSel.regBase)
116 {
117
118 set_reg_bits(gGpioInfoTable[i].topFuncSel.regBase,
119 gGpioInfoTable[i].topFuncSel.offset,
120 gGpioInfoTable[i].topFuncSel.size,
121 topFunc);
122
123 }
124
125 if(TOP_SEL_AON == topFunc)
126 {
127 if(INVLID_ADDR != gGpioInfoTable[i].aonFuncSel.regBase)
128 {
129
130 set_reg_bits(gGpioInfoTable[i].aonFuncSel.regBase,
131 gGpioInfoTable[i].aonFuncSel.offset,
132 gGpioInfoTable[i].aonFuncSel.size,
133 l2Func);
134
135 }
136 }
137 else
138 {
139 if(INVLID_ADDR != gGpioInfoTable[i].pdFuncSel.regBase)
140 {
141
142 set_reg_bits(gGpioInfoTable[i].pdFuncSel.regBase,
143 gGpioInfoTable[i].pdFuncSel.offset,
144 gGpioInfoTable[i].pdFuncSel.size,
145 l2Func);
146
147 }
148 }
149#endif
150 return 0;
151}
152
153/**************************************************************************
154* Functin: zDrvGpio_PullUpDown
155* Description: internal pull up or pull down
156* Parameters:
157* Input:
158* gpio_id: gpio id
159* value: pull up or down val
160* Output:
161* NONE
162* Returns:
163* success or parameter fault
164* Others:
165* None.
166**************************************************************************/
167SINT32 zDrvGpio_PullUpDown(UINT32 gpio_id, UINT32 val)
168{
169 UINT32 i = 0;
170
171 if(MAX_GPIO_NUM < gpio_id){
172 return -1;
173 }
174
175 for(i=0; i<gGpioNumMax; i++)
176 {
177 if(gpio_id == gGpioInfoTable[i].gpio)
178 break;
179 }
180
181 if(INVLID_ADDR != gGpioInfoTable[i].ioCfg.regBase)
182 {
183
184 set_reg_bits(gGpioInfoTable[i].ioCfg.regBase,
185 gGpioInfoTable[i].ioCfg.offset,
186 gGpioInfoTable[i].ioCfg.size,
187 val);
188
189 }
190 else
191 return -1;
192
193
194 return 0;
195}
196
197/**************************************************************************
198* Functin: zDrvGpio_SetDirection
199* Description: set direction of gpio, in or out
200* Parameters:
201* Input:
202* gpio_id: gpio id
203* value: in or out.
204* Output:
205* NONE
206* Returns:
207* NONE
208* Others:
209* None.
210**************************************************************************/
211void zDrvGpio_SetDirection(UINT32 gpio_id, T_ZDrvGpio_IoDirection value)
212{
213 UINT32 gpio_addr = 0;
214 UINT32 tmp = 0;
215
216 if(GPIO0_MODULE_NUM > gpio_id)
217 gpio_addr = GPIOPDD_REG0(gpio_id);
218 else
219 gpio_addr = GPIOPDD_REG1(gpio_id-GPIO0_MODULE_NUM);
220
221 tmp = get_reg_val(gpio_addr);
222
223 if(GPIO_IN == value)
224 tmp &= ~(0x1<<(gpio_id % 16));
225 else
226 tmp |= (0x1<<(gpio_id % 16));
227
228
229 set_reg_val(gpio_addr, tmp);
230;
231}
232
233/**************************************************************************
234* Functin: zDrvGpio_GetDirection
235* Description: get direction
236* Parameters:
237* Input:
238* gpio_id: gpio id
239* Output:
240* gpio input or output
241* Returns:
242*
243* Others:
244* None.
245**************************************************************************/
246T_ZDrvGpio_IoDirection zDrvGpio_GetDirection(UINT32 gpio_id)
247{
248 UINT32 gpio_addr = 0;
249 UINT32 tmp = 0;
250
251 if(GPIO0_MODULE_NUM > gpio_id)
252 gpio_addr = GPIOPDD_REG0(gpio_id);
253 else
254 gpio_addr = GPIOPDD_REG1(gpio_id-GPIO0_MODULE_NUM);
255
256 tmp = get_reg_val(gpio_addr);
257
258 if((tmp >> (gpio_id % 16)) & 0x1)
259 return GPIO_OUT;
260 else
261 return GPIO_IN;
262}
263
264/**************************************************************************
265* Functin: zDrvGpio_SetOutputValue
266* Description: set output value
267* Parameters:
268* Input:
269* gpio_id: gpio id
270* value: high or low.
271* Output:
272* NONE
273* Returns:
274* success or parameter fault
275* Others:
276* None.
277**************************************************************************/
278void zDrvGpio_SetOutputValue(UINT32 gpio_id, T_ZDrvGpio_IoVal value)
279{
280 UINT32 gpio_addr = 0;
281 UINT32 tmp = 0;
282
283 if(GPIO_LOW == value)
284 {
285 if(GPIO0_MODULE_NUM > gpio_id)
286 gpio_addr = SET0_SEND_REG0(gpio_id);
287 else
288 gpio_addr = SET0_SEND_REG1(gpio_id-GPIO0_MODULE_NUM);
289
290 tmp = (0x1<<(gpio_id % 16));
291
292
293 set_reg_val(gpio_addr, tmp);
294
295 }
296
297 if(GPIO_HIGH == value)
298 {
299 if(GPIO0_MODULE_NUM > gpio_id)
300 gpio_addr = SET1_SEND_REG0(gpio_id);
301 else
302 gpio_addr = SET1_SEND_REG1(gpio_id-GPIO0_MODULE_NUM);
303
304 tmp = (0x1<<(gpio_id % 16));
305
306
307 set_reg_val(gpio_addr, tmp);
308
309 }
310}
311
312/**************************************************************************
313* Functin: zDrvGpio_GetOutputValue
314* Description: get output value
315* Parameters:
316* Input:
317* gpio_id: gpio id
318* Output:
319* output high or low
320* Returns:
321* NONE
322* Others:
323* None.
324**************************************************************************/
325T_ZDrvGpio_IoVal zDrvGpio_GetOutputValue(UINT32 gpio_id)
326{
327 UINT32 gpio_addr = 0;
328 UINT32 tmp = 0;
329
330 if(GPIO0_MODULE_NUM > gpio_id)
331 gpio_addr = SEND_REG0(gpio_id);
332 else
333 gpio_addr = SEND_REG1(gpio_id-GPIO0_MODULE_NUM);
334
335 tmp = get_reg_val(gpio_addr);
336
337 if((tmp >> (gpio_id % 16)) & 0x1)
338 return GPIO_HIGH;
339 else
340 return GPIO_LOW;
341
342}
343
344/**************************************************************************
345* Functin: zDrvGpio_GetInputValue
346* Description: get input value
347* Parameters:
348* Input:
349* gpio_id: gpio id
350* Output:
351* input high or low
352* Returns:
353* NONE
354* Others:
355* None.
356**************************************************************************/
357T_ZDrvGpio_IoVal zDrvGpio_GetInputValue(UINT32 gpio_id)
358{
359 UINT32 gpio_addr = 0;
360 UINT32 tmp = 0;
361
362 if(GPIO0_MODULE_NUM > gpio_id)
363 gpio_addr = RECV_REG0(gpio_id);
364 else
365 gpio_addr = RECV_REG1(gpio_id-GPIO0_MODULE_NUM);
366
367 tmp = get_reg_val(gpio_addr);
368
369 if((tmp >> (gpio_id % 16)) & 0x1)
370 return GPIO_HIGH;
371 else
372 return GPIO_LOW;
373
374}
375
376
377void gpio_reset(void)
378{
379 unsigned int i=0;
380
381 //gpio0~1
382 for(i=0;i<8;i++)
383 {
384 if(i == 1) { //v3 pshold1: gpio24
385
386 reg32(GPIO0_REG_BASE + 0x40 *i + 0x00) &=0x0100;
387 reg32(GPIO0_REG_BASE + 0x40 *i + 0x18) &=0x0100;
388 reg32(GPIO0_REG_BASE + 0x40 *i + 0x1c) &=0x0100;
389 reg32(GPIO0_REG_BASE + 0x40 *i + 0x20) &=0x0100;
390 reg32(GPIO0_REG_BASE + 0x40 *i + 0x24) &=0x0100;
391
392 reg32(GPIO1_REG_BASE + 0x40 *i + 0x00)=0;
393 reg32(GPIO1_REG_BASE + 0x40 *i + 0x18)=0;
394 reg32(GPIO1_REG_BASE + 0x40 *i + 0x1c)=0;
395 reg32(GPIO1_REG_BASE + 0x40 *i + 0x20)=0;
396 reg32(GPIO1_REG_BASE + 0x40 *i + 0x24)=0;
397 }
398 else {
399 reg32(GPIO0_REG_BASE + 0x40 *i + 0x00)=0;
400 reg32(GPIO0_REG_BASE + 0x40 *i + 0x18)=0;
401 reg32(GPIO0_REG_BASE + 0x40 *i + 0x1c)=0;
402 reg32(GPIO0_REG_BASE + 0x40 *i + 0x20)=0;
403 reg32(GPIO0_REG_BASE + 0x40 *i + 0x24)=0;
404
405 reg32(GPIO1_REG_BASE + 0x40 *i + 0x00)=0;
406 reg32(GPIO1_REG_BASE + 0x40 *i + 0x18)=0;
407 reg32(GPIO1_REG_BASE + 0x40 *i + 0x1c)=0;
408 reg32(GPIO1_REG_BASE + 0x40 *i + 0x20)=0;
409 reg32(GPIO1_REG_BASE + 0x40 *i + 0x24)=0;
410 }
411 }
412
413}
414
415
416void pinmux_reset(void)
417{
418 unsigned int i=0;
419 unsigned int tmp=0;
420
421 //pinmux
422 reg32(PINMUX_REG_BASE + 0x00)=0;
423 reg32(PINMUX_REG_BASE + 0x04)=0;
424 reg32(PINMUX_REG_BASE + 0x08)=0;
425 reg32(PINMUX_REG_BASE + 0x0c)=0x7ff;
426 for(i=4;i<14;i++) {
427 reg32(PINMUX_REG_BASE + 0x4* i)=0;
428 }
429
430 //padctrl fun_sel
431 reg32(PADCTRL_REG_BASE + 0x00)=0x00000500;
432 reg32(PADCTRL_REG_BASE + 0x04)=0x00000000;
433 reg32(PADCTRL_REG_BASE + 0x08)=0x00000000;
434 reg32(PADCTRL_REG_BASE + 0x0c)=0x00015400;
435 reg32(PADCTRL_REG_BASE + 0x10)=0x00000000;
436 reg32(PADCTRL_REG_BASE + 0x14)=0x00000000;
437 reg32(PADCTRL_REG_BASE + 0x18)=0x00000000;
438 reg32(PADCTRL_REG_BASE + 0x1c)=0x00007fff;
439 reg32(PADCTRL_REG_BASE + 0x20)=0x0000c030;
440 reg32(PADCTRL_REG_BASE + 0x24)=0x000003ff;
441 reg32(PADCTRL_REG_BASE + 0x28)=0x00007fc0;
442 reg32(PADCTRL_REG_BASE + 0x2c)=0x00000000;
443 reg32(PADCTRL_REG_BASE + 0x30)=0x00000000;
444
445 //padctrl io_cfg
446 tmp=reg32(IO_CFG_REG_BASE + 0x04); //pshold1-gpio24:bit[29:28]
447 tmp &= 0x30000000;
448 tmp |= 0x00d40000;
449 reg32(IO_CFG_REG_BASE + 0x04)=tmp;
450
451 reg32(IO_CFG_REG_BASE + 0x00)=0x00fffd4f;
452 //reg32(IO_CFG_REG_BASE+0x04)=0x10d40000;
453 reg32(IO_CFG_REG_BASE + 0x08)=0x557fff57;
454 reg32(IO_CFG_REG_BASE + 0x0c)=0x15554015;
455 reg32(IO_CFG_REG_BASE + 0x10)=0x38383858;
456 reg32(IO_CFG_REG_BASE + 0x14)=0x38583838;
457 reg32(IO_CFG_REG_BASE + 0x18)=0x38383838;
458 reg32(IO_CFG_REG_BASE + 0x1c)=0x155fd5ff;
459 reg32(IO_CFG_REG_BASE + 0x20)=0x00154ff7;
460 reg32(IO_CFG_REG_BASE + 0x24)=0x00555555;
461 reg32(IO_CFG_REG_BASE + 0x28)=0x00003858;
462 reg32(IO_CFG_REG_BASE + 0x2c)=0x05555555;
463 reg32(IO_CFG_REG_BASE + 0x30)=0x000000ad;
464 reg32(IO_CFG_REG_BASE + 0x34)=0x00000048;
465 reg32(IO_CFG_REG_BASE + 0x38)=0x00000001;
466 reg32(IO_CFG_REG_BASE + 0x3c)=0x00000058;
467 reg32(IO_CFG_REG_BASE + 0x40)=0x00585858;
468}
469void pcu_clear_8in1_Int(void)
470{
471 reg32(EX_8INT1_CLEAR_REG) = 0xff<<8;//clear External_Gpio_Int_Top_Clear_Reg
472 reg32(EX_GPIO_INT_TOP_AP_CLEAR_REG) = 0x1;//clear External_Gpio_Int_Top_Clear_Reg
473 reg32(EX_GPIO_INT_TOP_CP_CLEAR_REG) = 0x1;//clear External_Gpio_Int_Top_Clear_Reg
474}
475
476int gpio_pad_init2rst(void)
477{
478 gpio_reset();
479 pinmux_reset();
480 pcu_clear_8in1_Int();
481
482 return 0;
483}
484