blob: fbd0f9a91689ce0109ee9738c33f3ae718d1a046 [file] [log] [blame]
xf.libfc6e712025-02-07 01:54:34 -08001/*********************************************************************
2 Copyright 2016 by ZIXC Corporation.
3*
4* FileName:: zx234290.c
5* File Mark:
6* Description:
7* Others:
8* Version:
9* Author:
10* Date:
11
12* History 1:
13* Date:
14* Version:
15* Author:
16* Modification:
17* History 2:
18**********************************************************************/
19
20#include <common.h>
21#include <errno.h>
22#include <command.h>
23#include <malloc.h>
24#include <asm/io.h>
25#include <boot_mode.h>
26#include <i2c.h>
27#include <drvs_gpio.h>
28#include <power.h>
29#include <zx234290.h>
30#include <zx234502.h>
31#include <watchdog.h>
32
33int zx234290_write_flag(UINT8 val);
34
35#define PIN_PSHOLD_NUM GPIO24
36#define GPIO_PSHOLD_FUNC_SEL GPIO24_GPIO24
37
38static boot_reason_t s_boot_reason = UNKNOWN_BOOT_REASON;
39unsigned int g_pmu_type = PMU_TYPE_MAX;
40
41/*******************************************************************************
42 * Function: zx234290_i2c_read_reg
43 * Description:
44 * Parameters:
45 * Input:
46 *
47 * Output:
48 *
49 * Returns:
50 *
51 *
52 * Others:
53 ********************************************************************************/
54int zx234290_i2c_read_reg(ushort reg, uchar *val)
55{
56 return i2c_read(0, ZX234290_I2C_SLAVE_ADDR, reg, 8, val, 1);
57}
58
59/*******************************************************************************
60 * Function: zx234290_i2c_write_reg
61 * Description:
62 * Parameters:
63 * Input:
64 *
65 * Output:
66 *
67 * Returns:
68 *
69 *
70 * Others:
71 ********************************************************************************/
72int zx234290_i2c_write_reg(ushort reg, uchar *val)
73{
74 return i2c_write(0, ZX234290_I2C_SLAVE_ADDR, reg, 8, val, 1);
75}
76
77int zx234290_reset_flag(void)
78{
79#if 0
80 int ret = 0;
81 int val = 0;
82
83 /*
84 int val = 0xff;
85 ret = zx234290_i2c_write_reg(0x0f,&val);
86 */
87 ret = zx234290_i2c_read_reg(BUCK_MODE_CONTROL0, &val);
88 val &= (~0x30);
89 ret += zx234290_i2c_write_reg(BUCK_MODE_CONTROL0, &val);
90
91 return ret;
92#else
93 return zx234290_write_flag(ZX234290_USER_RST_UNDEFINE);
94#endif
95}
96
97int zx234290_write_flag(UINT8 val)
98{
99#if 0
100 int ret = 0;
101 int tmp = 0;
102
103 if(val > 3)
104 {
105 return -1;
106 }
107 ret = zx234290_i2c_read_reg(BUCK_MODE_CONTROL0, &tmp);
108 tmp &= (~0x30);
109 tmp |= (val<<4);
110 ret += zx234290_i2c_write_reg(BUCK_MODE_CONTROL0, &tmp);
111
112 return ret;
113#else
114 int ret = 0;
115 uchar tmp = 0;
116
117 /*
118 ret = zx234290_i2c_read_reg(ZX234290_REG_ADDR_USER_RESERVED, &tmp);
119 tmp &= ~(0x03<<2);
120 tmp |= (val<<2);
121 */
122 tmp = val;
123 ret |= zx234290_i2c_write_reg(ZX234290_REG_USER, &tmp);
124
125 return ret;
126#endif
127}
128
129
130void zx234290_set_rtc_alarm_off(void)
131{
132 int ret = 0;
133 uchar tmp = 0;
134
135 //set alarm active bit 1 disable
136 ret = zx234290_i2c_read_reg(ZX234290_REG_ADDR_ALARM_MINUTE, &tmp);
137 tmp |= (1<<ZX234290_RTC_AlARM_ACTIVATED_LSH);
138 ret |= zx234290_i2c_write_reg(ZX234290_REG_ADDR_ALARM_MINUTE, &tmp);
139
140 ret |= zx234290_i2c_read_reg(ZX234290_REG_ADDR_ALARM_HOUR, &tmp);
141 tmp |= (1<<ZX234290_RTC_AlARM_ACTIVATED_LSH);
142 ret |= zx234290_i2c_write_reg(ZX234290_REG_ADDR_ALARM_HOUR, &tmp);
143
144 ret |= zx234290_i2c_read_reg(ZX234290_REG_ADDR_ALARM_DAY, &tmp);
145 tmp |= (1<<ZX234290_RTC_AlARM_ACTIVATED_LSH);
146 ret |= zx234290_i2c_write_reg(ZX234290_REG_ADDR_ALARM_DAY, &tmp);
147
148 ret = zx234290_i2c_read_reg(ZX234290_REG_ADDR_ALARM_WEEK, &tmp);
149 tmp |= (1<<ZX234290_RTC_AlARM_ACTIVATED_LSH);
150 ret |= zx234290_i2c_write_reg(ZX234290_REG_ADDR_ALARM_WEEK, &tmp);
151
152
153 ret |= zx234290_i2c_read_reg(ZX234290_REG_ADDR_ALARM_SECOND, &tmp);
154 tmp |= (1<<ZX234290_RTC_AlARM_ACTIVATED_LSH);
155 ret |= zx234290_i2c_write_reg(ZX234290_REG_ADDR_ALARM_SECOND, &tmp);
156
157 /*disable AIE bit && AF*/
158 ret |= zx234290_i2c_read_reg(ZX234290_REG_RTC_CONTROL2, &tmp);
159 tmp &= ~(RTC_CONTROL2_AIE|RTC_CONTROL2_AF);
160 ret |= zx234290_i2c_write_reg(ZX234290_REG_RTC_CONTROL2, &tmp);
161
162 if(ret)
163 printf( "[%s] fail ret=%d...\n", __FUNCTION__, ret);
164
165}
166/*******************************************************************************
167 * Function: zx234290_get_boot_reason
168 * Description:
169 * Parameters:
170 * Input:
171 *
172 * Output:
173 *
174 * Returns:
175 *
176 *
177 * Others:
178 ********************************************************************************/
179int zx234290_get_boot_reason(boot_reason_t *boot_reason)
180{
181 if (boot_reason == NULL)
182 {
183 return -1;
184 }
185
186 if(s_boot_reason == UNKNOWN_BOOT_REASON)
187 {
188 return -EIO;
189 }
190 *boot_reason = s_boot_reason;
191
192 return 0;
193}
194
195/*******************************************************************************
196 * Function: zx234290_get_boot_reason
197 * Description:
198 * Parameters:
199 * Input:
200 *
201 * Output:
202 *
203 * Returns:
204 *
205 *
206 * Others:
207 ********************************************************************************/
208static int zx234290_get_boot_reason_prev(void)
209{
210 int ret = 0;
211 uchar reg_user = ZX234290_USER_RST_UNDEFINE;
212 uchar reg_start = 0;
213 uchar reg_write = 0;
214
215 /* ¶Á²¢ÇåSTART_UP_STATUS */
216 ret = zx234290_i2c_read_reg(START_UP_STATUS, &reg_start);
217 if( ret != 0 )
218 {
219 return -EIO;
220 }
221 printf( " [%s][START_UP_STATUS = 0x%X] ...\n", __FUNCTION__, reg_start);
222 (*(volatile unsigned long *)(START_UP_STATUS_BASE))=reg_start;
223
224 /* ¶Á²¢ÇåZX234290_REG_USER */
225 ret = zx234290_i2c_read_reg(ZX234290_REG_USER, &reg_user);
226 if(reg_user != ZX234290_USER_RST_UNDEFINE)
227 {
228 reg_write = ZX234290_USER_RST_UNDEFINE; /* write back the reset value */
229
230 ret |= zx234290_i2c_write_reg(ZX234290_REG_USER, &reg_write);
231 }
232 if ( ret != 0 )
233 {
234 return -EIO;
235 }
236 printf( " [%s][USER_RESERVED = 0x%X] ...\n", __FUNCTION__, reg_user);
237 (*(volatile unsigned long *)(USER_RESERVED_BASE)) =reg_user;
238
239 /* 1. Õý³£¿ª»ú¼ì²â */
240 if( reg_start & PWR_ON_START_UP )
241 /* ÏµÍ³ÖØÆô,Èç¹ûZX234290_REG_USER²»Îª³õÖµ£¬ÔòÎªÖØÆô */
242 {
243 s_boot_reason = RB_POWER_KEY;
244 return 0;
245 }
246 else if( reg_start & PS_HOLD_START_UP )
247 {
248 s_boot_reason = RB_USB_INSERT;
249
250 /* ZX234290_REG_USERΪÉϵ縴λֵ»ò·Ç·¨Öµ */
251 return 0;
252 }
253 else if( reg_start & RTC_ALARM_START_UP )
254 /* 2. Õý³£¿ª»ú¼ì²â */
255 {
256 uchar rtc_ctrl2 = 0xF0;
257
258 ret = zx234290_i2c_read_reg(ZX234290_REG_RTC_CONTROL2, &rtc_ctrl2);
259 printf( " [%s][RTC_CONTROL2 = 0x%X]\n", __FUNCTION__, rtc_ctrl2);
260
261 if (rtc_ctrl2 & RTC_CONTROL2_AF) {
262 s_boot_reason = RB_RTC;
263 zx234290_set_rtc_alarm_off();
264 } else if (rtc_ctrl2 & RTC_CONTROL2_TF) {
265 s_boot_reason = RB_RESET_NOMAL;
266 }
267
268 return ret;
269 }
270 else if( reg_start & LLP_RESTART_UP )
271 {
272 s_boot_reason = RB_POWER_KEY_LONG;
273 return 0;
274 }
275 /* reg_startΪ0£¬¼´reg_start¶ÁÇåÖ®ºóδµôµç£¬¼´ÏµÍ³ÖØÆô */
276
277 /* 2. ÖØÆô¼ì²â */
278
279 /* ÏµÍ³ÖØÆô,Èç¹ûZX234290_REG_USER²»Îª³õÖµ£¬ÔòÎªÖØÆô */
280 switch (reg_user)
281 {
282 case ZX234290_USER_RST_TO_NORMAL:
xf.li771eb062025-02-09 23:05:11 -0800283 case ZX234290_USER_RST_TO_EXCEPT:
xf.libfc6e712025-02-07 01:54:34 -0800284 {
285 s_boot_reason = RB_RESET_NOMAL;
286 return 0;
287 }
288
289 case ZX234290_USER_RST_TO_CHARGER:
290 {
291 s_boot_reason = RB_RESET_USB_OFF;
292 return 0;
xf.li771eb062025-02-09 23:05:11 -0800293 }
xf.libfc6e712025-02-07 01:54:34 -0800294
295 case ZX234290_USER_RST_TO_ALARM:
xf.li771eb062025-02-09 23:05:11 -0800296 {
xf.libfc6e712025-02-07 01:54:34 -0800297 s_boot_reason = RB_RESET_ALARM;
298 return 0;
xf.li771eb062025-02-09 23:05:11 -0800299 }
xf.libfc6e712025-02-07 01:54:34 -0800300
301 /* ZX234290_REG_USERΪÉϵ縴λֵ»ò·Ç·¨Öµ */
302 default:
303 {
304 if ((reg_user & 0xF0) == ZX234290_WDT_RST_FLAG) {
305 s_boot_reason = reg_user;
306 return 0;
307 }
308 break;
309 }
310 }
311
312 s_boot_reason = RB_USB_INSERT;
313
314 return 0;
315}
316
317/*******************************************************************************
318 * Function: zx234290_ps_hold_pull_on
319 * Description:
320 * Parameters:
321 * Input:
322 *
323 * Output:
324 *
325 * Returns:
326 *
327 *
328 * Others:
329 ********************************************************************************/
330int zx234290_ps_hold_pull_on(void)
331{
332 zDrvGpio_PullUpDown(PIN_PSHOLD_NUM, 0);
333 //gpio_set_reuse(PS_HOLD_PIN, 0);
334 zDrvGpio_SetFunc(PIN_PSHOLD_NUM,GPIO_PSHOLD_FUNC_SEL);
335 zDrvGpio_SetDirection(PIN_PSHOLD_NUM,GPIO_IN); //set output;v3 gpio24(pshold) direction is reverse
336 zDrvGpio_SetOutputValue(PIN_PSHOLD_NUM,GPIO_HIGH);
337 return 0;
338}
339
340/*******************************************************************************
341 * Function: zx234290_ps_hold_pull_off
342 * Description:
343 * Parameters:
344 * Input:
345 *
346 * Output:
347 *
348 * Returns:
349 *
350 *
351 * Others:
352 ********************************************************************************/
353int zx234290_ps_hold_pull_off(void)
354{
355 zDrvGpio_PullUpDown(PIN_PSHOLD_NUM, 0);
356 //gpio_set_reuse(PS_HOLD_PIN, 0);
357 //gpio_direction_output(PS_HOLD_PIN, GPIO_LOW);
358 zDrvGpio_SetFunc(PIN_PSHOLD_NUM,GPIO_PSHOLD_FUNC_SEL);
359 zDrvGpio_SetDirection(PIN_PSHOLD_NUM,GPIO_IN); //set output;v3 gpio24(pshold) direction is reverse
360 zDrvGpio_SetOutputValue(PIN_PSHOLD_NUM,GPIO_LOW);
361 return 0;
362}
363
364/*******************************************************************************
365 * Function: zx234290_power_off
366 * Description:
367 * Parameters:
368 * Input:
369 *
370 * Output:
371 *
372 * Returns:
373 *
374 *
375 * Others:
376 ********************************************************************************/
377int zx234290_power_off(void)
378{
379 return zx234290_ps_hold_pull_off();
380}
381
382/*******************************************************************************
383 * Function:
384 * Description:
385 * Parameters:
386 * Input:
387 *
388 * Output:
389 *
390 * Returns:
391 *
392 *
393 * Others:
394 ********************************************************************************/
395int pmu_init(void)
396{
397 int ret = 0;
398 uchar reg_val = 0;
399 uchar reg_val1 = 0;
400 struct pmu_opt pmu = {NULL};
401
402 /* GPIO init */
403 //gpio_set_reuse(PS_HOLD_PIN, 0x0);
404 //gpio_direction_output(PS_HOLD_PIN,GPIO_LOW);
405
406 // gpio_set_reuse(POWER_KEY_PIN,0x0);
407 // gpio_direction_input(POWER_KEY_PIN);
408
409 // gpio_noaction(POWER_KEY_PIN);
410
411 /* register pmu opt */
412 pmu.read_reg = zx234290_i2c_read_reg;
413 pmu.write_reg = zx234290_i2c_write_reg;
414 pmu.get_boot_reason = zx234290_get_boot_reason;
415 pmu.ps_hold_pull_on = pmu_pull_on_ps_hold;
416 pmu.ps_hold_pull_off = pmu_pull_off_ps_hold;
417 pmu.power_off = zx234290_power_off;
418 ret = register_pmu_opt(&pmu);
419 if( ret != 0 )
420 {
421 return -EIO;
422 }
423
424 ret = zx234290_get_boot_reason_prev();
425 ret +=zx234290_i2c_read_reg(ZX234297_REG_ADDR_SINK_CONTROL,&reg_val);
426 ret +=zx234290_i2c_read_reg(ZX234290_REG_ADDR_TYPE,&reg_val1);
427 if(reg_val==0x7f){//means 296G C
428 reg_val = 0xff;//define to 296
429 ret+=zx234290_i2c_write_reg(ZX234297_REG_ADDR_SINK_CONTROL,&reg_val);
430 }
431
432 if (ret != SUCCESS)
433 {
434 printf( "[%s]set 0x29 error ret=0x%x!\n", __FUNCTION__,ret);
435 return ret;
436 }
437
438 if(0xff == reg_val)//296&296G
439 {
440 if(0==reg_val1)
441 g_pmu_type = PMU_TYPE_296G;
442 else
443 g_pmu_type = PMU_TYPE_296;
444 }
445 else//297
446 {
447 if(0==reg_val1)
448 g_pmu_type = PMU_TYPE_296H;
449 else
450 g_pmu_type = PMU_TYPE_297;
451 }
452 return ret;
453}
454
455/* ================================================================================
456 * pmu_init:
457 */
458int pmu_pull_off_ps_hold(void)
459{
460 return zx234290_ps_hold_pull_off();
461}
462
463/* ================================================================================
464 * pmu_init:
465 */
466int pmu_pull_on_ps_hold(void)
467{
468 return zx234290_ps_hold_pull_on();
469}
470
471/* ================================================================================
472 * system_power_off:
473 */
474void system_power_off(void)
475{
476 zx234290_power_off();
477}
478
479int zx234290_get_adc2_voltage(void)
480{
481 int nTempAdc = 0, ret = -1;
482 int adcReadInt = -1;
483 int msb=0, lsb=0;
484 int num;
485 uchar status_a=0;
486 uchar adcEnable = 0x28;
487 uchar sys_ctrl;
488
489 ret = zx234290_i2c_read_reg(ZX234290_REG_SYS_CTRL, &sys_ctrl);
490 if (ret != SUCCESS)
491 {
492 return -EIO;
493 }
494 sys_ctrl = (sys_ctrl & (1 << 7)) | adcEnable;
495
496 /*enable adc*/
497#if 0
498 ret = zx234290_i2c_write_reg(ZX234290_REG_SYS_CTRL,&sys_ctrl);
499 if (ret != SUCCESS)
500 {
501 return -EIO;
502 }
503#else
504 for(num=1; num <= 50; num++)
505 {
506 ret = zx234290_i2c_write_reg(ZX234290_REG_SYS_CTRL, &sys_ctrl);
507 if (ret != SUCCESS)
508 {
509 return -EIO;
510 }
511 udelay((100000/3000)*5); /* delay 5ms */
512 ret = zx234290_i2c_read_reg(ZX234290_REG_ADDR_STSA, &status_a);
513 if (ret != SUCCESS)
514 {
515 return -EIO;
516 }
517
518 if(status_a & 0x04)
519 {
520 printf( "adc2 get adc,break num =%d ...\n", num);
521 break;
522 }
523 }
524#endif
525 udelay((100000/3000)*20); /* delay 20ms */
526
527 /*read adc*/
528 ret = zx234290_i2c_read_reg(ZX234290_REG_ADC_ADC2MSB, &msb);
529 if (ret != SUCCESS)
530 {
531 return -EIO;
532 }
533 ret = zx234290_i2c_read_reg(ZX234290_REG_ADC_ADC2LSB, &lsb);
534 if (ret != SUCCESS)
535 {
536 return -EIO;
537 }
538
539 /*clear int*/
540 ret = zx234290_i2c_read_reg(ZX234290_REG_INTA, &adcReadInt);
541 if (ret != SUCCESS)
542 {
543 return -EIO;
544 }
545 ret =zx234290_i2c_read_reg(ZX234290_REG_INTB, &adcReadInt);
546 if (ret != SUCCESS)
547 {
548 return -EIO;
549 }
550
551 nTempAdc = ((msb<<4)|(lsb>>4));
552
553 nTempAdc = (int)((double)(5000-0)*(nTempAdc)/4096);
554
555 return nTempAdc;
556}
557
558int zx234290_get_adc1_voltage(void) /*read adc1*/
559{
560 int nTempAdc = 0,adcEnable = 0,ret = -1;
561 int adcReadInt = -1;
562 int msb=0, lsb=0;
563 int num;
564 uchar status_a=0;
565 adcEnable = 0x30; /*read adc1*/
566 uchar sys_ctrl;
567
568 ret = zx234290_i2c_read_reg(ZX234290_REG_SYS_CTRL, &sys_ctrl);
569 if (ret != SUCCESS)
570 {
571 return -EIO;
572 }
573 sys_ctrl = (sys_ctrl & (1 << 7)) | adcEnable;
574
575 /*enable adc*/
576#if 0
577 ret = zx234290_i2c_write_reg(ZX234290_REG_SYS_CTRL,&sys_ctrl);
578 if (ret != SUCCESS)
579 {
580 return -EIO;
581 }
582#else
583 for(num=1; num <= 50; num++)
584 {
585 ret = zx234290_i2c_write_reg(ZX234290_REG_SYS_CTRL, &sys_ctrl);
586 if (ret != SUCCESS)
587 {
588 return -EIO;
589 }
590 udelay((100000/3000)*5); /* delay 5ms */
591 ret = zx234290_i2c_read_reg(ZX234290_REG_ADDR_STSA, &status_a);
592 if (ret != SUCCESS)
593 {
594 return -EIO;
595 }
596 if(status_a & 0x04)
597 {
598 printf( "adc1 get adc,break num =%d ...\n", num);
599 break;
600 }
601 }
602#endif
603
604 udelay((100000/3000)*20); /* delay 20ms */
605
606 /*read adc*/
607 ret = zx234290_i2c_read_reg(ZX234290_REG_ADC_ADC1MSB, &msb);
608 if (ret != SUCCESS)
609 {
610 return -EIO;
611 }
612 ret = zx234290_i2c_read_reg(ZX234290_REG_ADC_ADC1LSB, &lsb);
613 if (ret != SUCCESS)
614 {
615 return -EIO;
616 }
617
618 /*clear int*/
619 ret = zx234290_i2c_read_reg(ZX234290_REG_INTA, &adcReadInt);
620 if (ret != SUCCESS)
621 {
622 return -EIO;
623 }
624 ret =zx234290_i2c_read_reg(ZX234290_REG_INTB, &adcReadInt);
625 if (ret != SUCCESS)
626 {
627 return -EIO;
628 }
629
630 nTempAdc = ((msb<<4)|(lsb>>4));
631
632 nTempAdc = (int)((double)(5000-0)*(nTempAdc)/4096);
633
634 return nTempAdc;
635}
636
637int zx234290_get_vbat_voltage(void)
638{
639 int nTempAdc = 0,adcEnable = 0,ret = -1;
640 int adcReadInt = -1;
641 int msb=0, lsb=0;
642 int num;
643 uchar status_a=0;
644 //adcEnable = 0x30;
645 adcEnable = 0x20;
646 uchar sys_ctrl;
647
648 ret = zx234290_i2c_read_reg(ZX234290_REG_SYS_CTRL, &sys_ctrl);
649 if (ret != SUCCESS)
650 {
651 return -EIO;
652 }
653 sys_ctrl = (sys_ctrl & (1 << 7)) | adcEnable;
654
655#if 0
656 ret = zx234290_i2c_write_reg(ZX234290_REG_SYS_CTRL,&sys_ctrl);
657 if (ret != SUCCESS)
658 {
659 return -EIO;
660 }
661#else
662 for(num=1; num <= 50; num++)
663 {
664 ret = zx234290_i2c_write_reg(ZX234290_REG_SYS_CTRL, &sys_ctrl);
665 if (ret != SUCCESS)
666 {
667 return -EIO;
668 }
669 udelay((100000/3000)*5); /* delay 5ms */
670 ret = zx234290_i2c_read_reg(ZX234290_REG_ADDR_STSA, &status_a);
671 if (ret != SUCCESS)
672 {
673 return -EIO;
674 }
675 if(status_a & 0x04)
676 {
677 printf( "vbat get adc,break num =%d ...\n", num);
678 break;
679 }
680 }
681#endif
682 //ret = zx234290_i2c_read_reg(ZX234290_REG_ADC_ADC1MSB, &msb);
683 ret = zx234290_i2c_read_reg(ZX234290_REG_ADC_VBATMSB, &msb);
684 if (ret != SUCCESS)
685 {
686 return -EIO;
687 }
688 //ret = zx234290_i2c_read_reg(ZX234290_REG_ADC_ADC1LSB, &lsb);
689 ret = zx234290_i2c_read_reg(ZX234290_REG_ADC_VBATLSB, &lsb);
690 if (ret != SUCCESS)
691 {
692 return -EIO;
693 }
694 ret = zx234290_i2c_read_reg(ZX234290_REG_INTA, &adcReadInt);
695 if (ret != SUCCESS)
696 {
697 return -EIO;
698 }
699 ret =zx234290_i2c_read_reg(ZX234290_REG_INTB, &adcReadInt);
700 if (ret != SUCCESS)
701 {
702 return -EIO;
703 }
704 nTempAdc = ((msb<<4)|(lsb>>4));
705 nTempAdc = (int)((double)(5000-0)*(nTempAdc)/4096);
706 return nTempAdc;
707}
708
709int zx234290_set_llp_enable(void)
710{
711 int ret = -1;
712 ushort reg=ZX234290_REG_ADDR_PWRON;
713 uchar val=0x05;
714
715 ret = zx234290_i2c_write_reg(reg, &val);
716 if (ret != SUCCESS)
717 {
718 return -EIO;
719 }
720 return ret;
721}
722
723/*get the poweron key state 0x1<<5: poweron press 0:poweron up*/
724int zx234290_get_poweron_state(void)
725{
726 int val = 0,ret = -1;
727 uchar reg = 0;
728
729 ret = zx234290_i2c_read_reg(STATUS_A,&reg);
730 if (ret != SUCCESS)
731 {
732 return -EIO;
733 }
734 val = reg&STATUS_PWR_ON;
735 return val;
736}
737
738/* get the rtc_alarm status: bit0 in reg 0x05 */
739int zx234290_get_rtc_state(void)
740{
741 int val = 0,ret = -1;
742 uchar reg = 0;
743
744 ret = zx234290_i2c_read_reg(STATUS_B, &reg);
745 if (ret != SUCCESS)
746 {
747 return -EIO;
748 }
749 val = reg & STATUS_RTC_ALARM;
750 return val;
751}
752
753/* Set or clear SoftOn bit in ZX234290_REG_SYS_CTRL */
754int zx234290_set_softon(int on)
755{
756 uchar reg = 0;
757 int ret;
758
759 ret = zx234290_i2c_read_reg(ZX234290_REG_SYS_CTRL, &reg);
760 if (ret != SUCCESS)
761 {
762 return -EIO;
763 }
764
765 if ((reg >> 7) != on) {
766 reg ^= (0x01<<7);
767 ret = zx234290_i2c_write_reg(ZX234290_REG_SYS_CTRL, &reg);
768 if (ret != SUCCESS)
769 {
770 return -EIO;
771 }
772 }
773 return 0;
774}
775
776/*set ldo8 SD VOL*/
777int zx234290_set_ldo8_voltage(T_ZDrvZx234290_VldoD vol)
778{
779 int ret = 0;
780 unsigned char reg_addr=0, reg_val=0;
781
782 if(vol > VLDOD_MAX)
783 {
784 return -EINVAL;
785 }
786 reg_addr = ZX234290_REG_ADDR_LDO78_VOL;
787 ret = zx234290_i2c_read_reg(reg_addr,&reg_val);
788 if (ret != SUCCESS)
789 {
790 return -EIO;
791 }
792 reg_val &= ~(0xf<<ZX234290_LDO8_VSEL_LSH);
793 reg_val |= (vol<<ZX234290_LDO8_VSEL_LSH);
794
795 ret = zx234290_i2c_write_reg(reg_addr, &reg_val);
796 if (ret != SUCCESS)
797 {
798 return -EIO;
799 }
800
801 return 0;
802}
803
804int zx234290_set_ldo8_sleep_voltage(T_ZDrvZx234290_VldoD vol)
805{
806 int ret = 0;
807 unsigned char reg_addr=0, reg_val=0;
808
809 if(vol > VLDOD_MAX)
810 {
811 return -EINVAL;
812 }
813 reg_addr = ZX234290_REG_ADDR_LDO78_VOL;
814 ret = zx234290_i2c_read_reg(reg_addr,&reg_val);
815 if (ret != SUCCESS)
816 {
817 return -EIO;
818 }
819 reg_val &= ~(0xf<<ZX234290_LDO8_SLP_VSEL_LSH);
820 reg_val |= (vol<<ZX234290_LDO8_SLP_VSEL_LSH);
821
822 ret = zx234290_i2c_write_reg(reg_addr, &reg_val);
823 if (ret != SUCCESS)
824 {
825 return -EIO;
826 }
827
828 return 0;
829}
830
831
832/* clear SoftOn bit in ZX234290_REG_SYS_CTRL bit7 */
833int zx234290_ldo8_enable(int enable)
834{
835 int ret = -1;
836 uchar reg = 0;
837
838 ret = zx234290_i2c_read_reg(ZX234290_REG_LDO_EN1, &reg);
839 if (ret != SUCCESS)
840 {
841 return -EIO;
842 }
843 reg &= ~(0x01<<7);
844 reg |= (enable<<7);
845 ret = zx234290_i2c_write_reg(ZX234290_REG_LDO_EN1, &reg);
846 if (ret != SUCCESS)
847 {
848 return -EIO;
849 }
850 return 0;
851}
852int zx234290_set_sink(T_ZX234290_SINK sink_num, int is_on, T_ZX234297_SINK_CURRENT sink_current)
853{
854 int ret = 0;
855 unsigned char lsh_on, lsh_current;
856 uchar reg = 0;
857
858 ret = zx234290_i2c_read_reg(ZX234297_REG_ADDR_SINK_CONTROL, &reg);
859 if (ret != SUCCESS)
860 {
861 return -EIO;
862 }
863 if(0xff==reg){
864 printf("pmu zx234296 no sink\n");
865 return SUCCESS;
866 }
867 if (sink_num == SINK_1) {
868 lsh_on = ZX234297_SINK1_ON_LSH;
869 lsh_current = ZX234297_SINK1_CURRENT_LSH;
870 } else if (sink_num == SINK_2) {
871 lsh_on = ZX234297_SINK2_ON_LSH;
872 lsh_current = ZX234297_SINK2_CURRENT_LSH;
873 } else
874 return -EINVAL;
875
876 if (is_on) {
877 if (sink_current >= SINK_CURRENT_MAX)
878 sink_current = SINK_CURRENT_120MA;
879
880 ret = zx234290_i2c_read_reg(ZX234297_REG_ADDR_SINK_CONTROL, &reg);
881 if (ret != SUCCESS)
882 {
883 return -EIO;
884 }
885 reg &= ~(0xf<<lsh_current);
886 reg |= (sink_current<<lsh_current);
887 ret = zx234290_i2c_write_reg(ZX234297_REG_ADDR_SINK_CONTROL, &reg);
888 if (ret != SUCCESS)
889 {
890 return -EIO;
891 }
892 }
893
894 is_on = !!is_on;
895 ret = zx234290_i2c_read_reg(ZX234290_REG_ADDR_LDO_EN2, &reg);
896 if (ret != SUCCESS)
897 {
898 return -EIO;
899 }
900 reg &= ~(0x1<<lsh_on);
901 reg |= (is_on<<lsh_on);
902 ret = zx234290_i2c_write_reg(ZX234290_REG_ADDR_LDO_EN2, &reg);
903 if (ret != SUCCESS)
904 {
905 return -EIO;
906 }
907
908 return 0;
909}
910
911#if 0
912int zx234290_SetVldo8(Zx234290_VldoD vol)
913{
914 int reg = 0,val = 0,ret = -1;
915 ret = zx234290_i2c_read_reg(ZX234290_REG_LD78_VOL, &reg);
916 if (ret != SUCCESS)
917 {
918 return -EIO;
919 }
920 BOOT_PRINTF(UBOOT_ERR, "********First REG0x15=0x%x!!!\n",reg);
921 reg &= 0xf;/*00001111*/
922 reg |= (vol<<4);
923 ret = zx234290_i2c_write_reg(ZX234290_REG_LD78_VOL, &reg);
924 if (ret != SUCCESS)
925 {
926 return -EIO;
927 }
928 ret = zx234290_i2c_read_reg(ZX234290_REG_LD78_VOL, &reg);
929 if (ret != SUCCESS)
930 {
931 return -EIO;
932 }
933 BOOT_PRINTF(UBOOT_ERR, "********Last REG0x15=0x%x!!!\n",reg);
934 return 0;
935}
936
937#endif
938
939