commit 95c7cd8f9a46636f1693db7054dd988fa29f6597
author xy.he <xy.he@mobiletek.cn> Thu Sep 12 10:00:36 2024 +0800
committer xy.he@mobiletek.cn <xy.he@mobiletek.cn> Thu Sep 12 02:07:27 2024 +0000
tree a3aa89945306051e48576aef4bc3368485b91411
parent fba20813a53948ff541198b6fb13380a0de91de5

[Bugfix][bug-view-191]Optimize lynq_set_default_sim repeated switching the same card, ret sometimes returns 8004

Only Configure: No
Affected branch: DSDS
Affected module: sim
Is it affected on both ZXIC and MTK: only MTK
Self-test: Yes
Doc Update: No

Change-Id: If25a5e81aff93e6af05ead7bc5a22f710ac6cf4c

common_src/framework/lynq-ril-service/src/common.cpp

diff --git a/common_src/framework/lynq-ril-service/src/common.cpp b/common_src/framework/lynq-ril-service/src/common.cpp
index 149c842..09d773c 100755
--- a/common_src/framework/lynq-ril-service/src/common.cpp
+++ b/common_src/framework/lynq-ril-service/src/common.cpp
@@ -428,6 +428,7 @@
         //xy.he modified for bug-view-162/bug-view-156 @20240902 started
         RLOGD("[%s][%d]Already in required sim%d",__FUNCTION__,__LINE__,slot);
         //xy.he modified for bug-view-162/bug-view-156 @20240902 end
+        usleep(500*1000);
         android::Parcel allow_data_p;
         allow_data_p.writeInt32 (1);
         allow_data_p.writeInt32 (LYNQ_URC_ALLOW_DATA);