Merge "[Feature][S300][task-view-1333][PB]To save memory, remove the phonebook thread"
diff --git a/lynq/CPE_COMMON/HKM/allbins/zx297520v3/prj_mifi/nv_min_R306_dcxo/Ref_nvrw_0x26C00.bin b/lynq/CPE_COMMON/HKM/allbins/zx297520v3/prj_mifi/nv_min_R306_dcxo/Ref_nvrw_0x26C00.bin
index 1a7dd9d..fd3a92d 100755
--- a/lynq/CPE_COMMON/HKM/allbins/zx297520v3/prj_mifi/nv_min_R306_dcxo/Ref_nvrw_0x26C00.bin
+++ b/lynq/CPE_COMMON/HKM/allbins/zx297520v3/prj_mifi/nv_min_R306_dcxo/Ref_nvrw_0x26C00.bin
Binary files differ
diff --git a/lynq/CPE_COMMON/HKM/ap/project/zx297520v3/prj_mifi_min/fs/normal/rootfs/etc_ro/default/default_parameter_user b/lynq/CPE_COMMON/HKM/ap/project/zx297520v3/prj_mifi_min/fs/normal/rootfs/etc_ro/default/default_parameter_user
index 50411ea..aa98d2f 100755
--- a/lynq/CPE_COMMON/HKM/ap/project/zx297520v3/prj_mifi_min/fs/normal/rootfs/etc_ro/default/default_parameter_user
+++ b/lynq/CPE_COMMON/HKM/ap/project/zx297520v3/prj_mifi_min/fs/normal/rootfs/etc_ro/default/default_parameter_user
@@ -336,7 +336,7 @@
Channel=0
closeEnable=0
closeTime=
-CountryCode=CN
+CountryCode=ID
wifi_cc_control=default
DefaultKeyID=0
DtimPeriod=1
diff --git a/lynq/CPE_COMMON/MTN/ap/project/zx297520v3/prj_mifi_min/fs/normal/rootfs/etc_ro/default/default_parameter_user b/lynq/CPE_COMMON/MTN/ap/project/zx297520v3/prj_mifi_min/fs/normal/rootfs/etc_ro/default/default_parameter_user
index 973aa6d..e9f92db 100755
--- a/lynq/CPE_COMMON/MTN/ap/project/zx297520v3/prj_mifi_min/fs/normal/rootfs/etc_ro/default/default_parameter_user
+++ b/lynq/CPE_COMMON/MTN/ap/project/zx297520v3/prj_mifi_min/fs/normal/rootfs/etc_ro/default/default_parameter_user
@@ -336,7 +336,7 @@
Channel=0
closeEnable=0
closeTime=
-CountryCode=CN
+CountryCode=ZM
wifi_cc_control=default
DefaultKeyID=0
DtimPeriod=1
diff --git a/lynq/CPE_COMMON/ap/app/zte_webui/js/set.js b/lynq/CPE_COMMON/ap/app/zte_webui/js/set.js
index 6675bef..2d6b5f5 100755
--- a/lynq/CPE_COMMON/ap/app/zte_webui/js/set.js
+++ b/lynq/CPE_COMMON/ap/app/zte_webui/js/set.js
@@ -671,7 +671,8 @@
TW: "台灣",
US: "UNITED STATES",
UZ: "O’zbekiston",
- MG: "MADAGASCAR"
+ MG: "MADAGASCAR",
+ ZM: "ZAMBIA"
},
//国家码与类型匹配表
countryCode_5g: {
@@ -723,7 +724,7 @@
"NL", "AN", "NO", "OM", "PK", "PE", "PH", "PL", "PT", "QA",
"RO", "RU", "SA", "SG", "SK", "SI", "ZA", "ES", "LK",
"SE", "CH", "SY", "TH", "TT", "TN", "TR", "UA", "AE", "GB",
- "UY", "VN", "YE", "ZW", "BD", "MG"],
+ "UY", "VN", "YE", "ZW", "BD", "MG", "ZM"],
mkkc: ["JP"],
apld: [],
etsic: ["BZ", "BO", "NZ", "VE"],
diff --git a/lynq/MD310/HIFI/allbins/zx297520v3/prj_cpe/nv_min/Ref_nvrw_0x26C00.bin b/lynq/MD310/HIFI/allbins/zx297520v3/prj_cpe/nv_min/Ref_nvrw_0x26C00.bin
new file mode 100755
index 0000000..4a8efb4
--- /dev/null
+++ b/lynq/MD310/HIFI/allbins/zx297520v3/prj_cpe/nv_min/Ref_nvrw_0x26C00.bin
Binary files differ
diff --git a/lynq/MD310/HIFI/ap/project/zx297520v3/prj_cpe_min/fs/normal/rootfs/etc_ro/default/default_parameter_user b/lynq/MD310/HIFI/ap/project/zx297520v3/prj_cpe_min/fs/normal/rootfs/etc_ro/default/default_parameter_user
new file mode 100755
index 0000000..57a85f3
--- /dev/null
+++ b/lynq/MD310/HIFI/ap/project/zx297520v3/prj_cpe_min/fs/normal/rootfs/etc_ro/default/default_parameter_user
@@ -0,0 +1,498 @@
+apn_auto_config=CMCC($)cmnet($)manual($)*99#($)pap($)($)($)IP($)auto($)($)auto($)($)
+APN_config0=Default($)Default($)manual($)($)($)($)($)IP($)auto($)($)auto($)($)
+APN_config1=
+APN_config2=
+APN_config3=
+APN_config4=
+APN_config5=
+APN_config6=
+APN_config7=
+APN_config8=
+APN_config9=
+apn_index=0
+apn_mode=auto
+at_snap_flag=3
+at_wifi_mac=0
+auto_apn_index=0
+cid_reserved=0
+clear_pb_when_restore=no
+clear_sms_when_restore=yes
+default_apn=3gnet
+ipv6_APN_config1=
+ipv6_APN_config2=
+ipv6_APN_config3=
+ipv6_APN_config4=
+ipv6_APN_config5=
+ipv6_APN_config6=
+ipv6_APN_config7=
+ipv6_APN_config8=
+ipv6_APN_config9=
+m_profile_name=Internux
+need_init_modem=yes
+net_select=NETWORK_auto
+pdp_type=IPv4v6
+ppp_apn=
+max_reconnect_time=3000000
+pppd_auth=noauth
+ppp_auth_mode=none
+ppp_passwd=
+ppp_pdp_type=
+ppp_username=
+ipv6_ppp_auth_mode=none
+ipv6_ppp_passwd=
+ipv6_ppp_username=
+pre_mode=
+prefer_dns_manual=0.0.0.0
+standby_dns_manual=0.0.0.0
+wan_apn=internet
+wan_dial=
+cta_test=0
+safecare_enbale=0
+safecare_hostname=mob.3gcare.cn
+safecare_registed_imei=
+safecare_registed_iccid=
+safecare_contimestart1=
+safecare_contimestart2=
+safecare_contimestart3=
+safecare_contimestop1=
+safecare_contimestop2=
+safecare_contimestop3=
+safecare_contimeinterval=
+safecare_mobsite=http://mob.3gcare.cn
+safecare_chatsite=
+safecare_platno=
+safecare_mobilenumber=
+safecare_version=
+ethwan_dns_mode=auto
+pswan_dns_mode=auto
+wifiwan_dns_mode=auto
+ethwan_ipv6_dns_mode=auto
+wifiwan_ipv6_dns_mode=auto
+pswan_ipv6_dns_mode=auto
+admin_Password=admin
+psw_changed=1
+alg_ftp_enable=0
+alg_sip_enable=0
+blc_wan_auto_mode=AUTO_PPP
+blc_wan_mode=AUTO
+br_ipchange_flag=
+br_node=usblan0
+clat_fake_subnet=192.0.168.0
+clat_frag_collect_timeout=300
+clat_local_mapping_timeout=300
+clat_mapping_record_timeout=3000
+clat_query_server_port=1464
+DefaultFirewallPolicy=0
+dev_coexist=0
+dhcpDns=192.168.0.1
+dhcpEnabled=1
+dhcpEnd=192.168.0.200
+dhcpLease_hour=24
+dhcpStart=192.168.0.100
+dhcpv6stateEnabled=0
+dhcpv6statelessEnabled=1
+dhcpv6statePdEnabled=0
+dial_mode=auto_dial
+DMZEnable=0
+DMZIPAddress=
+dns_extern=
+ipv6_dns_extern=
+eth_act_type=
+eth_type=wan
+ethlan=
+ethwan=
+ethwan_dialmode=auto
+ethwan_mode=auto
+ethwan_priority=3
+fast_usb=usblan0
+fastnat_level=2
+IPPortFilterEnable=0
+IPPortFilterRules_0=
+IPPortFilterRules_1=
+IPPortFilterRules_2=
+IPPortFilterRules_3=
+IPPortFilterRules_4=
+IPPortFilterRules_5=
+IPPortFilterRules_6=
+IPPortFilterRules_7=
+IPPortFilterRules_8=
+IPPortFilterRules_9=
+IPPortFilterRulesv6_0=
+IPPortFilterRulesv6_1=
+IPPortFilterRulesv6_2=
+IPPortFilterRulesv6_3=
+IPPortFilterRulesv6_4=
+IPPortFilterRulesv6_5=
+IPPortFilterRulesv6_6=
+IPPortFilterRulesv6_7=
+IPPortFilterRulesv6_8=
+IPPortFilterRulesv6_9=
+ipv4_fake_subnet=192.0.0.0
+ipv6_fake_subnet=2016::1
+lan_ipaddr=192.168.0.1
+lan_name=br0
+lan_netmask=255.255.255.0
+LanEnable=1
+mac_ip_list=
+mgmt_quicken_power_on=0
+mtu=1400
+natenable=
+dosenable=0
+need_jilian=1
+nofast_port=21+22+23+25+53+67+68+69+110+115+123+443+500+1352+1723+1990+1991+1992+1993+1994+1995+1996+1997+1998+4500+5060
+nv_save_interval=300
+path_conf=/etc_rw
+path_ro=/etc_ro
+path_log=/var/log/
+path_sh=/sbin
+path_tmp=/tmp
+permit_gw=
+permit_ip6=
+permit_nm=255.255.255.0
+PortForwardEnable=0
+PortForwardRules_0=
+PortForwardRules_1=
+PortForwardRules_2=
+PortForwardRules_3=
+PortForwardRules_4=
+PortForwardRules_5=
+PortForwardRules_6=
+PortForwardRules_7=
+PortForwardRules_8=
+PortForwardRules_9=
+PortMapEnable=0
+PortMapRules_0=
+PortMapRules_1=
+PortMapRules_2=
+PortMapRules_3=
+PortMapRules_4=
+PortMapRules_5=
+PortMapRules_6=
+PortMapRules_7=
+PortMapRules_8=
+PortMapRules_9=
+ppp_name=ppp0
+pppoe_password=
+pppoe_username=
+ps_ext1=usblan0
+ps_ext2=usblan0
+ps_ext3=usblan0
+ps_ext4=usblan0
+ps_ext5=usblan0
+ps_ext6=usblan0
+ps_ext7=usblan0
+ps_ext8=usblan0
+pswan=wan
+pswan_mode=pdp
+pswan_priority=1
+RemoteManagement=0
+rj45_plugstate_path=/sys/kernel/eth_debug/eth_state
+rootdev_friendlyname=MBB-UPnP
+rootdev_manufacturer=LYNQ
+rootdev_modeldes=MBB
+rootdev_modelname=MBB
+os_url=http://m.home
+serialnumber=See-IMEI
+static_dhcp_enable=1
+static_ethwan_gw=
+static_ethwan_ip=
+static_ethwan_nm=
+static_ethwan_pridns=
+static_ethwan_secdns=
+static_wifiwan_ipaddr=
+static_wifiwan_netmask=
+static_wifiwan_gateway=
+wifiwan_pridns_manual=
+wifiwan_secdns_manual=
+static_wan_gateway=0.0.0.0
+static_wan_ipaddr=0.0.0.0
+static_wan_netmask=0.0.0.0
+static_wan_primary_dns=0.0.0.0
+static_wan_secondary_dns=0.0.0.0
+swlanstr=sw0_lan
+swvlan=sw0
+swwanstr=sw0_wan
+tc_downlink=
+tc_uplink=
+tc_local=1310720
+tc_enable=0
+time_limited=
+time_to_2000_when_restore=yes
+upnpEnabled=0
+usblan=usblan0
+WANPingFilter=0
+websURLFilters=
+wifiwan_priority=2
+DDNS=
+DDNS_Enable=0
+DDNSAccount=
+DDNSPassword=
+DDNSProvider=
+iccidPrevious=
+imeiPrevious=
+registerFlag=0
+registeredRound=
+secsEveryRound=1
+secsEveryTime=1
+regver=4.0
+meid=
+uetype=1
+LocalDomain=m.home
+data_volume_alert_percent=
+data_volume_limit_size=
+data_volume_limit_switch=0
+data_volume_limit_unit=0
+flux_day_total=0
+flux_last_day=
+flux_last_month=
+flux_last_year=
+flux_month_total=0
+flux_set_day=
+flux_set_month=
+flux_set_year=
+monthly_rx_bytes=0
+monthly_time=0
+monthly_tx_bytes=0
+MonthlyConTime_Last=
+dm_nextpollingtime=
+fota_allowRoamingUpdate=0
+fota_dl_pkg_size=0
+fota_update_flag=
+fota_updateIntervalDay=15
+fota_upgrade_result=
+fota_version_delta_id=
+fota_version_delta_url=
+fota_pkg_total_size=0
+fota_version_file_size=
+fota_version_md5sum=
+fota_version_name=
+fota_need_user_confirm_update=0
+fota_need_user_confirm_download=1
+fota_version_force_install=0
+polling_nexttime=0
+pwron_auto_check=1
+fota_updateMode=1
+fota_test_mode=0
+fota_pkg_downloaded=0
+fota_upgrade_result_internal=
+mmi_battery_voltage_line=3460+3670+3684+3719+3740+3760+3770+3782+3795+3810+3837+3874+3921+3954+3992+4042+4083+4141+4193+4264+4320
+mmi_fast_poweron=
+mmi_led_mode=
+mmi_new_sms_blink_flag=0
+mmi_show_pagetab=page1+page2+page3
+mmi_showmode=lcd
+mmi_task_tab=net_task+wifi_task+key_task+battery_task+tip_task+ssid_task+wificode_task+version_logo_task+ctrl_task+sms_task
+mmi_temp_voltage_line=948+1199+1694+1736
+mmi_use_protect=
+mmi_use_wifi_usernum=1
+leak_full_panic=
+leak_list_max=
+leak_set_flag=
+monitor_period=300
+netinf_flag=
+skb_all_max=
+skb_data_max=
+skb_fromcp_max=
+skb_max_fail=
+skb_max_panic=
+skb_size_max=
+skb_tocp_max=
+sntp_default_ip=134.170.185.211;131.107.13.100;202.112.31.197;202.112.29.82;202.112.10.36;ntp.gwadar.cn;ntp-sz.chl.la;dns.sjtu.edu.cn;news.neu.edu.cn;dns1.synet.edu.cn;time-nw.nist.gov;pool.ntp.org;europe.pool.ntp.org
+sntp_dst_enable=0
+sntp_other_server0=
+sntp_other_server1=
+sntp_other_server2=
+sntp_server0=time-nw.nist.gov
+sntp_server1=pool.ntp.org
+sntp_server2=europe.pool.ntp.org
+sntp_sync_select_interval_time=30
+sntp_time_set_mode=auto
+sntp_timezone=CST-8
+sntp_timezone_index=0
+assert_errno=
+comm_logsize=16384
+cr_inner_version=V1.0.0B08
+cr_version=V1.0.0B01
+hw_version=PCBMF29S2V1.0.0
+TURNOFF_CHR_NUM=
+watchdog_app=0
+HTTP_SHARE_FILE=
+HTTP_SHARE_STATUS=
+HTTP_SHARE_WR_AUTH=readWrite
+ipv6_pdp_type=
+ipv6_wan_apn=
+Language=en
+manual_time_day=
+manual_time_hour=
+manual_time_minute=
+manual_time_month=
+manual_time_second=
+manual_time_year=
+sdcard_mode_option=0
+AccessControlList0=
+AccessPolicy0=0
+ACL_mode=0
+AuthMode=WPA2PSK
+Channel=0
+wifi_acs_num=8
+closeEnable=0
+closeTime=
+CountryCode=ID
+DefaultKeyID=0
+DtimPeriod=1
+EncrypType=AES
+EX_APLIST=
+EX_APLIST1=
+EX_AuthMode=
+EX_DefaultKeyID=
+EX_EncrypType=
+EX_mac=
+EX_SSID1=M23_Pro-
+EX_WEPKEY=
+EX_wifi_profile=
+EX_WPAPSK1=
+FragThreshold=2346
+HideSSID=0
+HT_GI=1
+Key1Str1=12345
+Key2Str1=
+Key3Str1=
+Key4Str1=
+Key1Type=1
+Key2Type=
+Key3Type=
+Key4Type=
+m_AuthMode=WPA2PSK
+m_DefaultKeyID=
+m_EncrypType=AES
+m_HideSSID=0
+m_Key1Str1=1234
+m_Key2Str1=
+m_Key3Str1=
+m_Key4Str1=
+m_Key1Type=1
+m_Key2Type=
+m_Key3Type=
+m_Key4Type=
+m_MAX_Access_num=0
+m_NoForwarding=
+m_show_qrcode_flag=0
+m_SSID=M23_Pro-
+m_ssid_enable=0
+m_wapiType=
+m_wifi_mac=901D45692A5C
+m_WPAPSK1_aes=
+m_WPAPSK1_encode=MTIzNDU2Nzg=
+MAX_Access_num=10
+MAX_Access_num_bak=10
+NoForwarding=0
+openEnable=0
+openTime=
+operater_ap=
+RekeyInterval=3600
+RTSThreshold=2347
+show_qrcode_flag=0
+Sleep_interval=10
+ssid_write_flag=0
+SSID1=M23_Pro-
+tsw_sleep_time_hour=
+tsw_sleep_time_min=
+tsw_wake_time_hour=
+tsw_wake_time_min=
+wapiType=
+wifi_force_40m=1
+wifi_11n_cap=1
+wifi_band=b
+wifi_coverage=long_mode
+wifi_hostname_black_list=
+wifi_hostname_white_list=
+wifi_mac=901D45692A5B
+wifi_mac_black_list=
+wifi_mac_white_list=
+wifi_profile=
+wifi_profile1=
+wifi_profile2=
+wifi_profile3=
+wifi_profile4=
+wifi_profile5=
+wifi_profile6=
+wifi_profile7=
+wifi_profile8=
+wifi_profile9=
+wifi_profile_num=0
+wifi_root_dir=
+wifi_sta_connection=0
+wifi_wps_index=1
+wifiEnabled=1
+wifilan=wlan0-va0
+wifilan2=wlan0-va1
+mac_wlan0=
+wifi_ft=
+wifi_coupling=
+WirelessMode=6
+WPAPSK1_aes=
+WPAPSK1_encode=MTIzNDU2Nzg=
+wps_mode=PBC
+WPS_SSID=
+WscModeOption=0
+monitor_apps=
+at_netdog=
+autorspchannel_list=all
+soctime_switch=0
+uart_control=0
+uart_ctstrs_enable=
+special_cmd_list=$MYNETREAD
+##为入网入库芯片认证版本添加 begin
+atcmd_stream1=AT+ZSET="w_instrument",1
+atcmd_stream2=AT^SYSCONFIG=24,0,1,2
+atcmd_stream3=AT+ZSET="csiiot",2
+atcmd_stream4=AT+ZSET="dlparaflg",0
+atcmd_stream5=AT+ZSET="MTNET_TEST",1;AT+ZGAAT=0;AT+ZSET="CMCC_TEST",1;AT+ZSET="LTE_INFO",6348;AT+ZSET="VOICE_SUPPORT",1;AT+ZSET="FDD_RELEASE",7;AT+ZSET="LTE_RELEASE",1;AT+ZSET="UE_PS_RELEASE",5;AT+ZSET="QOS_RELEASE",4;AT+ZSET="TEBS_THRESHOLD",0
+atcmd_stream6=AT+ZSET="MTNET_TEST",1;AT+ZGAAT=0;AT+ZSET="LTE_INFO",6348;AT+ZSET="VOICE_SUPPORT",1;AT+ZSET="FDD_RELEASE",7;AT+ZSET="LTE_RELEASE",1;AT+ZSET="UE_PS_RELEASE",5;AT+ZSET="QOS_RELEASE",4;AT+ZSET="TEBS_THRESHOLD",0;AT+ZSET="IGNORE_SECURITY_SUPPORT",0;AT+ZSET="csifilter",0;AT+ZSET="csrhobandflg",0;AT+ZSET="dlparaflg",1;AT+ZSET="csiup",1;AT+ZSET="rfparaflag",0,0,1,0;AT+ZSET="csiiot",1;AT+ZSET="EXCEPT_RESET",0;AT+ZSET="ISIM_SUPPORT",1;AT+ZIMSTEST="MTNET_TEST",1;AT+ZSET="MANUAL_SEARCH",0
+##为入网入库芯片认证版本添加 end
+#for audio ctrl
+audio_priority=0123
+customer_type=sdk_min
+debug_mode=
+cpIndCmdList=+ZMMI+ZURDY+ZUSLOT+ZICCID^MODE+ZPBIC+ZMSRI+CREG+CEREG+CGREG+CGEV
+zephyr_filter_ip=
+wait_timeout=2
+sntp_sync_time=1
+sntp_static_server0=time-nw.nist.gov
+sntp_static_server1=pool.ntp.org
+sntp_static_server2=europe.pool.ntp.org
+vsim_bin_path=/mnt/userdata/vSim.bin
+webv6_enable=
+lan_ipv6addr=fe80::1
+sms_vp=
+at_select_timeout=
+mtnet_test_mcc=
+at_atv=
+at_atq=
+at_at_d=
+base_ip_on_mac=0
+quick_dial=1
+xlat_enable=0
+#for schedule_restart start
+schedule_restart_enable=0
+schedule_restart_option=everyday
+schedule_restart_day=0
+schedule_restart_hour=0
+schedule_restart_minute=0
+schedule_restart_weekday=Mon
+#for schedule_restart end
+wifi_sleep_mode=0
+ping_repetition_count=4
+ping_diag_addr=
+ping_result=
+#for wefota start
+wefota_server1_ip=18.216.104.147
+wefota_server1_port=45000
+wefota_last_work_time=0
+wefota_last_work_interval=0
+wefota_product_id=10310
+wefota_current_upgrade_state=
+wefota_new_version_state=
+#for wefota end
+use_network_adb=usb
+web_channel=0
diff --git a/lynq/MD310/HKM/ap/project/zx297520v3/prj_cpe_min/fs/normal/rootfs/etc_ro/default/default_parameter_user b/lynq/MD310/HKM/ap/project/zx297520v3/prj_cpe_min/fs/normal/rootfs/etc_ro/default/default_parameter_user
new file mode 100755
index 0000000..57a85f3
--- /dev/null
+++ b/lynq/MD310/HKM/ap/project/zx297520v3/prj_cpe_min/fs/normal/rootfs/etc_ro/default/default_parameter_user
@@ -0,0 +1,498 @@
+apn_auto_config=CMCC($)cmnet($)manual($)*99#($)pap($)($)($)IP($)auto($)($)auto($)($)
+APN_config0=Default($)Default($)manual($)($)($)($)($)IP($)auto($)($)auto($)($)
+APN_config1=
+APN_config2=
+APN_config3=
+APN_config4=
+APN_config5=
+APN_config6=
+APN_config7=
+APN_config8=
+APN_config9=
+apn_index=0
+apn_mode=auto
+at_snap_flag=3
+at_wifi_mac=0
+auto_apn_index=0
+cid_reserved=0
+clear_pb_when_restore=no
+clear_sms_when_restore=yes
+default_apn=3gnet
+ipv6_APN_config1=
+ipv6_APN_config2=
+ipv6_APN_config3=
+ipv6_APN_config4=
+ipv6_APN_config5=
+ipv6_APN_config6=
+ipv6_APN_config7=
+ipv6_APN_config8=
+ipv6_APN_config9=
+m_profile_name=Internux
+need_init_modem=yes
+net_select=NETWORK_auto
+pdp_type=IPv4v6
+ppp_apn=
+max_reconnect_time=3000000
+pppd_auth=noauth
+ppp_auth_mode=none
+ppp_passwd=
+ppp_pdp_type=
+ppp_username=
+ipv6_ppp_auth_mode=none
+ipv6_ppp_passwd=
+ipv6_ppp_username=
+pre_mode=
+prefer_dns_manual=0.0.0.0
+standby_dns_manual=0.0.0.0
+wan_apn=internet
+wan_dial=
+cta_test=0
+safecare_enbale=0
+safecare_hostname=mob.3gcare.cn
+safecare_registed_imei=
+safecare_registed_iccid=
+safecare_contimestart1=
+safecare_contimestart2=
+safecare_contimestart3=
+safecare_contimestop1=
+safecare_contimestop2=
+safecare_contimestop3=
+safecare_contimeinterval=
+safecare_mobsite=http://mob.3gcare.cn
+safecare_chatsite=
+safecare_platno=
+safecare_mobilenumber=
+safecare_version=
+ethwan_dns_mode=auto
+pswan_dns_mode=auto
+wifiwan_dns_mode=auto
+ethwan_ipv6_dns_mode=auto
+wifiwan_ipv6_dns_mode=auto
+pswan_ipv6_dns_mode=auto
+admin_Password=admin
+psw_changed=1
+alg_ftp_enable=0
+alg_sip_enable=0
+blc_wan_auto_mode=AUTO_PPP
+blc_wan_mode=AUTO
+br_ipchange_flag=
+br_node=usblan0
+clat_fake_subnet=192.0.168.0
+clat_frag_collect_timeout=300
+clat_local_mapping_timeout=300
+clat_mapping_record_timeout=3000
+clat_query_server_port=1464
+DefaultFirewallPolicy=0
+dev_coexist=0
+dhcpDns=192.168.0.1
+dhcpEnabled=1
+dhcpEnd=192.168.0.200
+dhcpLease_hour=24
+dhcpStart=192.168.0.100
+dhcpv6stateEnabled=0
+dhcpv6statelessEnabled=1
+dhcpv6statePdEnabled=0
+dial_mode=auto_dial
+DMZEnable=0
+DMZIPAddress=
+dns_extern=
+ipv6_dns_extern=
+eth_act_type=
+eth_type=wan
+ethlan=
+ethwan=
+ethwan_dialmode=auto
+ethwan_mode=auto
+ethwan_priority=3
+fast_usb=usblan0
+fastnat_level=2
+IPPortFilterEnable=0
+IPPortFilterRules_0=
+IPPortFilterRules_1=
+IPPortFilterRules_2=
+IPPortFilterRules_3=
+IPPortFilterRules_4=
+IPPortFilterRules_5=
+IPPortFilterRules_6=
+IPPortFilterRules_7=
+IPPortFilterRules_8=
+IPPortFilterRules_9=
+IPPortFilterRulesv6_0=
+IPPortFilterRulesv6_1=
+IPPortFilterRulesv6_2=
+IPPortFilterRulesv6_3=
+IPPortFilterRulesv6_4=
+IPPortFilterRulesv6_5=
+IPPortFilterRulesv6_6=
+IPPortFilterRulesv6_7=
+IPPortFilterRulesv6_8=
+IPPortFilterRulesv6_9=
+ipv4_fake_subnet=192.0.0.0
+ipv6_fake_subnet=2016::1
+lan_ipaddr=192.168.0.1
+lan_name=br0
+lan_netmask=255.255.255.0
+LanEnable=1
+mac_ip_list=
+mgmt_quicken_power_on=0
+mtu=1400
+natenable=
+dosenable=0
+need_jilian=1
+nofast_port=21+22+23+25+53+67+68+69+110+115+123+443+500+1352+1723+1990+1991+1992+1993+1994+1995+1996+1997+1998+4500+5060
+nv_save_interval=300
+path_conf=/etc_rw
+path_ro=/etc_ro
+path_log=/var/log/
+path_sh=/sbin
+path_tmp=/tmp
+permit_gw=
+permit_ip6=
+permit_nm=255.255.255.0
+PortForwardEnable=0
+PortForwardRules_0=
+PortForwardRules_1=
+PortForwardRules_2=
+PortForwardRules_3=
+PortForwardRules_4=
+PortForwardRules_5=
+PortForwardRules_6=
+PortForwardRules_7=
+PortForwardRules_8=
+PortForwardRules_9=
+PortMapEnable=0
+PortMapRules_0=
+PortMapRules_1=
+PortMapRules_2=
+PortMapRules_3=
+PortMapRules_4=
+PortMapRules_5=
+PortMapRules_6=
+PortMapRules_7=
+PortMapRules_8=
+PortMapRules_9=
+ppp_name=ppp0
+pppoe_password=
+pppoe_username=
+ps_ext1=usblan0
+ps_ext2=usblan0
+ps_ext3=usblan0
+ps_ext4=usblan0
+ps_ext5=usblan0
+ps_ext6=usblan0
+ps_ext7=usblan0
+ps_ext8=usblan0
+pswan=wan
+pswan_mode=pdp
+pswan_priority=1
+RemoteManagement=0
+rj45_plugstate_path=/sys/kernel/eth_debug/eth_state
+rootdev_friendlyname=MBB-UPnP
+rootdev_manufacturer=LYNQ
+rootdev_modeldes=MBB
+rootdev_modelname=MBB
+os_url=http://m.home
+serialnumber=See-IMEI
+static_dhcp_enable=1
+static_ethwan_gw=
+static_ethwan_ip=
+static_ethwan_nm=
+static_ethwan_pridns=
+static_ethwan_secdns=
+static_wifiwan_ipaddr=
+static_wifiwan_netmask=
+static_wifiwan_gateway=
+wifiwan_pridns_manual=
+wifiwan_secdns_manual=
+static_wan_gateway=0.0.0.0
+static_wan_ipaddr=0.0.0.0
+static_wan_netmask=0.0.0.0
+static_wan_primary_dns=0.0.0.0
+static_wan_secondary_dns=0.0.0.0
+swlanstr=sw0_lan
+swvlan=sw0
+swwanstr=sw0_wan
+tc_downlink=
+tc_uplink=
+tc_local=1310720
+tc_enable=0
+time_limited=
+time_to_2000_when_restore=yes
+upnpEnabled=0
+usblan=usblan0
+WANPingFilter=0
+websURLFilters=
+wifiwan_priority=2
+DDNS=
+DDNS_Enable=0
+DDNSAccount=
+DDNSPassword=
+DDNSProvider=
+iccidPrevious=
+imeiPrevious=
+registerFlag=0
+registeredRound=
+secsEveryRound=1
+secsEveryTime=1
+regver=4.0
+meid=
+uetype=1
+LocalDomain=m.home
+data_volume_alert_percent=
+data_volume_limit_size=
+data_volume_limit_switch=0
+data_volume_limit_unit=0
+flux_day_total=0
+flux_last_day=
+flux_last_month=
+flux_last_year=
+flux_month_total=0
+flux_set_day=
+flux_set_month=
+flux_set_year=
+monthly_rx_bytes=0
+monthly_time=0
+monthly_tx_bytes=0
+MonthlyConTime_Last=
+dm_nextpollingtime=
+fota_allowRoamingUpdate=0
+fota_dl_pkg_size=0
+fota_update_flag=
+fota_updateIntervalDay=15
+fota_upgrade_result=
+fota_version_delta_id=
+fota_version_delta_url=
+fota_pkg_total_size=0
+fota_version_file_size=
+fota_version_md5sum=
+fota_version_name=
+fota_need_user_confirm_update=0
+fota_need_user_confirm_download=1
+fota_version_force_install=0
+polling_nexttime=0
+pwron_auto_check=1
+fota_updateMode=1
+fota_test_mode=0
+fota_pkg_downloaded=0
+fota_upgrade_result_internal=
+mmi_battery_voltage_line=3460+3670+3684+3719+3740+3760+3770+3782+3795+3810+3837+3874+3921+3954+3992+4042+4083+4141+4193+4264+4320
+mmi_fast_poweron=
+mmi_led_mode=
+mmi_new_sms_blink_flag=0
+mmi_show_pagetab=page1+page2+page3
+mmi_showmode=lcd
+mmi_task_tab=net_task+wifi_task+key_task+battery_task+tip_task+ssid_task+wificode_task+version_logo_task+ctrl_task+sms_task
+mmi_temp_voltage_line=948+1199+1694+1736
+mmi_use_protect=
+mmi_use_wifi_usernum=1
+leak_full_panic=
+leak_list_max=
+leak_set_flag=
+monitor_period=300
+netinf_flag=
+skb_all_max=
+skb_data_max=
+skb_fromcp_max=
+skb_max_fail=
+skb_max_panic=
+skb_size_max=
+skb_tocp_max=
+sntp_default_ip=134.170.185.211;131.107.13.100;202.112.31.197;202.112.29.82;202.112.10.36;ntp.gwadar.cn;ntp-sz.chl.la;dns.sjtu.edu.cn;news.neu.edu.cn;dns1.synet.edu.cn;time-nw.nist.gov;pool.ntp.org;europe.pool.ntp.org
+sntp_dst_enable=0
+sntp_other_server0=
+sntp_other_server1=
+sntp_other_server2=
+sntp_server0=time-nw.nist.gov
+sntp_server1=pool.ntp.org
+sntp_server2=europe.pool.ntp.org
+sntp_sync_select_interval_time=30
+sntp_time_set_mode=auto
+sntp_timezone=CST-8
+sntp_timezone_index=0
+assert_errno=
+comm_logsize=16384
+cr_inner_version=V1.0.0B08
+cr_version=V1.0.0B01
+hw_version=PCBMF29S2V1.0.0
+TURNOFF_CHR_NUM=
+watchdog_app=0
+HTTP_SHARE_FILE=
+HTTP_SHARE_STATUS=
+HTTP_SHARE_WR_AUTH=readWrite
+ipv6_pdp_type=
+ipv6_wan_apn=
+Language=en
+manual_time_day=
+manual_time_hour=
+manual_time_minute=
+manual_time_month=
+manual_time_second=
+manual_time_year=
+sdcard_mode_option=0
+AccessControlList0=
+AccessPolicy0=0
+ACL_mode=0
+AuthMode=WPA2PSK
+Channel=0
+wifi_acs_num=8
+closeEnable=0
+closeTime=
+CountryCode=ID
+DefaultKeyID=0
+DtimPeriod=1
+EncrypType=AES
+EX_APLIST=
+EX_APLIST1=
+EX_AuthMode=
+EX_DefaultKeyID=
+EX_EncrypType=
+EX_mac=
+EX_SSID1=M23_Pro-
+EX_WEPKEY=
+EX_wifi_profile=
+EX_WPAPSK1=
+FragThreshold=2346
+HideSSID=0
+HT_GI=1
+Key1Str1=12345
+Key2Str1=
+Key3Str1=
+Key4Str1=
+Key1Type=1
+Key2Type=
+Key3Type=
+Key4Type=
+m_AuthMode=WPA2PSK
+m_DefaultKeyID=
+m_EncrypType=AES
+m_HideSSID=0
+m_Key1Str1=1234
+m_Key2Str1=
+m_Key3Str1=
+m_Key4Str1=
+m_Key1Type=1
+m_Key2Type=
+m_Key3Type=
+m_Key4Type=
+m_MAX_Access_num=0
+m_NoForwarding=
+m_show_qrcode_flag=0
+m_SSID=M23_Pro-
+m_ssid_enable=0
+m_wapiType=
+m_wifi_mac=901D45692A5C
+m_WPAPSK1_aes=
+m_WPAPSK1_encode=MTIzNDU2Nzg=
+MAX_Access_num=10
+MAX_Access_num_bak=10
+NoForwarding=0
+openEnable=0
+openTime=
+operater_ap=
+RekeyInterval=3600
+RTSThreshold=2347
+show_qrcode_flag=0
+Sleep_interval=10
+ssid_write_flag=0
+SSID1=M23_Pro-
+tsw_sleep_time_hour=
+tsw_sleep_time_min=
+tsw_wake_time_hour=
+tsw_wake_time_min=
+wapiType=
+wifi_force_40m=1
+wifi_11n_cap=1
+wifi_band=b
+wifi_coverage=long_mode
+wifi_hostname_black_list=
+wifi_hostname_white_list=
+wifi_mac=901D45692A5B
+wifi_mac_black_list=
+wifi_mac_white_list=
+wifi_profile=
+wifi_profile1=
+wifi_profile2=
+wifi_profile3=
+wifi_profile4=
+wifi_profile5=
+wifi_profile6=
+wifi_profile7=
+wifi_profile8=
+wifi_profile9=
+wifi_profile_num=0
+wifi_root_dir=
+wifi_sta_connection=0
+wifi_wps_index=1
+wifiEnabled=1
+wifilan=wlan0-va0
+wifilan2=wlan0-va1
+mac_wlan0=
+wifi_ft=
+wifi_coupling=
+WirelessMode=6
+WPAPSK1_aes=
+WPAPSK1_encode=MTIzNDU2Nzg=
+wps_mode=PBC
+WPS_SSID=
+WscModeOption=0
+monitor_apps=
+at_netdog=
+autorspchannel_list=all
+soctime_switch=0
+uart_control=0
+uart_ctstrs_enable=
+special_cmd_list=$MYNETREAD
+##为入网入库芯片认证版本添加 begin
+atcmd_stream1=AT+ZSET="w_instrument",1
+atcmd_stream2=AT^SYSCONFIG=24,0,1,2
+atcmd_stream3=AT+ZSET="csiiot",2
+atcmd_stream4=AT+ZSET="dlparaflg",0
+atcmd_stream5=AT+ZSET="MTNET_TEST",1;AT+ZGAAT=0;AT+ZSET="CMCC_TEST",1;AT+ZSET="LTE_INFO",6348;AT+ZSET="VOICE_SUPPORT",1;AT+ZSET="FDD_RELEASE",7;AT+ZSET="LTE_RELEASE",1;AT+ZSET="UE_PS_RELEASE",5;AT+ZSET="QOS_RELEASE",4;AT+ZSET="TEBS_THRESHOLD",0
+atcmd_stream6=AT+ZSET="MTNET_TEST",1;AT+ZGAAT=0;AT+ZSET="LTE_INFO",6348;AT+ZSET="VOICE_SUPPORT",1;AT+ZSET="FDD_RELEASE",7;AT+ZSET="LTE_RELEASE",1;AT+ZSET="UE_PS_RELEASE",5;AT+ZSET="QOS_RELEASE",4;AT+ZSET="TEBS_THRESHOLD",0;AT+ZSET="IGNORE_SECURITY_SUPPORT",0;AT+ZSET="csifilter",0;AT+ZSET="csrhobandflg",0;AT+ZSET="dlparaflg",1;AT+ZSET="csiup",1;AT+ZSET="rfparaflag",0,0,1,0;AT+ZSET="csiiot",1;AT+ZSET="EXCEPT_RESET",0;AT+ZSET="ISIM_SUPPORT",1;AT+ZIMSTEST="MTNET_TEST",1;AT+ZSET="MANUAL_SEARCH",0
+##为入网入库芯片认证版本添加 end
+#for audio ctrl
+audio_priority=0123
+customer_type=sdk_min
+debug_mode=
+cpIndCmdList=+ZMMI+ZURDY+ZUSLOT+ZICCID^MODE+ZPBIC+ZMSRI+CREG+CEREG+CGREG+CGEV
+zephyr_filter_ip=
+wait_timeout=2
+sntp_sync_time=1
+sntp_static_server0=time-nw.nist.gov
+sntp_static_server1=pool.ntp.org
+sntp_static_server2=europe.pool.ntp.org
+vsim_bin_path=/mnt/userdata/vSim.bin
+webv6_enable=
+lan_ipv6addr=fe80::1
+sms_vp=
+at_select_timeout=
+mtnet_test_mcc=
+at_atv=
+at_atq=
+at_at_d=
+base_ip_on_mac=0
+quick_dial=1
+xlat_enable=0
+#for schedule_restart start
+schedule_restart_enable=0
+schedule_restart_option=everyday
+schedule_restart_day=0
+schedule_restart_hour=0
+schedule_restart_minute=0
+schedule_restart_weekday=Mon
+#for schedule_restart end
+wifi_sleep_mode=0
+ping_repetition_count=4
+ping_diag_addr=
+ping_result=
+#for wefota start
+wefota_server1_ip=18.216.104.147
+wefota_server1_port=45000
+wefota_last_work_time=0
+wefota_last_work_interval=0
+wefota_product_id=10310
+wefota_current_upgrade_state=
+wefota_new_version_state=
+#for wefota end
+use_network_adb=usb
+web_channel=0
diff --git a/lynq/MD310/TSEL/ap/project/zx297520v3/prj_cpe_min/fs/normal/rootfs/etc_ro/default/default_parameter_user b/lynq/MD310/TSEL/ap/project/zx297520v3/prj_cpe_min/fs/normal/rootfs/etc_ro/default/default_parameter_user
new file mode 100755
index 0000000..57a85f3
--- /dev/null
+++ b/lynq/MD310/TSEL/ap/project/zx297520v3/prj_cpe_min/fs/normal/rootfs/etc_ro/default/default_parameter_user
@@ -0,0 +1,498 @@
+apn_auto_config=CMCC($)cmnet($)manual($)*99#($)pap($)($)($)IP($)auto($)($)auto($)($)
+APN_config0=Default($)Default($)manual($)($)($)($)($)IP($)auto($)($)auto($)($)
+APN_config1=
+APN_config2=
+APN_config3=
+APN_config4=
+APN_config5=
+APN_config6=
+APN_config7=
+APN_config8=
+APN_config9=
+apn_index=0
+apn_mode=auto
+at_snap_flag=3
+at_wifi_mac=0
+auto_apn_index=0
+cid_reserved=0
+clear_pb_when_restore=no
+clear_sms_when_restore=yes
+default_apn=3gnet
+ipv6_APN_config1=
+ipv6_APN_config2=
+ipv6_APN_config3=
+ipv6_APN_config4=
+ipv6_APN_config5=
+ipv6_APN_config6=
+ipv6_APN_config7=
+ipv6_APN_config8=
+ipv6_APN_config9=
+m_profile_name=Internux
+need_init_modem=yes
+net_select=NETWORK_auto
+pdp_type=IPv4v6
+ppp_apn=
+max_reconnect_time=3000000
+pppd_auth=noauth
+ppp_auth_mode=none
+ppp_passwd=
+ppp_pdp_type=
+ppp_username=
+ipv6_ppp_auth_mode=none
+ipv6_ppp_passwd=
+ipv6_ppp_username=
+pre_mode=
+prefer_dns_manual=0.0.0.0
+standby_dns_manual=0.0.0.0
+wan_apn=internet
+wan_dial=
+cta_test=0
+safecare_enbale=0
+safecare_hostname=mob.3gcare.cn
+safecare_registed_imei=
+safecare_registed_iccid=
+safecare_contimestart1=
+safecare_contimestart2=
+safecare_contimestart3=
+safecare_contimestop1=
+safecare_contimestop2=
+safecare_contimestop3=
+safecare_contimeinterval=
+safecare_mobsite=http://mob.3gcare.cn
+safecare_chatsite=
+safecare_platno=
+safecare_mobilenumber=
+safecare_version=
+ethwan_dns_mode=auto
+pswan_dns_mode=auto
+wifiwan_dns_mode=auto
+ethwan_ipv6_dns_mode=auto
+wifiwan_ipv6_dns_mode=auto
+pswan_ipv6_dns_mode=auto
+admin_Password=admin
+psw_changed=1
+alg_ftp_enable=0
+alg_sip_enable=0
+blc_wan_auto_mode=AUTO_PPP
+blc_wan_mode=AUTO
+br_ipchange_flag=
+br_node=usblan0
+clat_fake_subnet=192.0.168.0
+clat_frag_collect_timeout=300
+clat_local_mapping_timeout=300
+clat_mapping_record_timeout=3000
+clat_query_server_port=1464
+DefaultFirewallPolicy=0
+dev_coexist=0
+dhcpDns=192.168.0.1
+dhcpEnabled=1
+dhcpEnd=192.168.0.200
+dhcpLease_hour=24
+dhcpStart=192.168.0.100
+dhcpv6stateEnabled=0
+dhcpv6statelessEnabled=1
+dhcpv6statePdEnabled=0
+dial_mode=auto_dial
+DMZEnable=0
+DMZIPAddress=
+dns_extern=
+ipv6_dns_extern=
+eth_act_type=
+eth_type=wan
+ethlan=
+ethwan=
+ethwan_dialmode=auto
+ethwan_mode=auto
+ethwan_priority=3
+fast_usb=usblan0
+fastnat_level=2
+IPPortFilterEnable=0
+IPPortFilterRules_0=
+IPPortFilterRules_1=
+IPPortFilterRules_2=
+IPPortFilterRules_3=
+IPPortFilterRules_4=
+IPPortFilterRules_5=
+IPPortFilterRules_6=
+IPPortFilterRules_7=
+IPPortFilterRules_8=
+IPPortFilterRules_9=
+IPPortFilterRulesv6_0=
+IPPortFilterRulesv6_1=
+IPPortFilterRulesv6_2=
+IPPortFilterRulesv6_3=
+IPPortFilterRulesv6_4=
+IPPortFilterRulesv6_5=
+IPPortFilterRulesv6_6=
+IPPortFilterRulesv6_7=
+IPPortFilterRulesv6_8=
+IPPortFilterRulesv6_9=
+ipv4_fake_subnet=192.0.0.0
+ipv6_fake_subnet=2016::1
+lan_ipaddr=192.168.0.1
+lan_name=br0
+lan_netmask=255.255.255.0
+LanEnable=1
+mac_ip_list=
+mgmt_quicken_power_on=0
+mtu=1400
+natenable=
+dosenable=0
+need_jilian=1
+nofast_port=21+22+23+25+53+67+68+69+110+115+123+443+500+1352+1723+1990+1991+1992+1993+1994+1995+1996+1997+1998+4500+5060
+nv_save_interval=300
+path_conf=/etc_rw
+path_ro=/etc_ro
+path_log=/var/log/
+path_sh=/sbin
+path_tmp=/tmp
+permit_gw=
+permit_ip6=
+permit_nm=255.255.255.0
+PortForwardEnable=0
+PortForwardRules_0=
+PortForwardRules_1=
+PortForwardRules_2=
+PortForwardRules_3=
+PortForwardRules_4=
+PortForwardRules_5=
+PortForwardRules_6=
+PortForwardRules_7=
+PortForwardRules_8=
+PortForwardRules_9=
+PortMapEnable=0
+PortMapRules_0=
+PortMapRules_1=
+PortMapRules_2=
+PortMapRules_3=
+PortMapRules_4=
+PortMapRules_5=
+PortMapRules_6=
+PortMapRules_7=
+PortMapRules_8=
+PortMapRules_9=
+ppp_name=ppp0
+pppoe_password=
+pppoe_username=
+ps_ext1=usblan0
+ps_ext2=usblan0
+ps_ext3=usblan0
+ps_ext4=usblan0
+ps_ext5=usblan0
+ps_ext6=usblan0
+ps_ext7=usblan0
+ps_ext8=usblan0
+pswan=wan
+pswan_mode=pdp
+pswan_priority=1
+RemoteManagement=0
+rj45_plugstate_path=/sys/kernel/eth_debug/eth_state
+rootdev_friendlyname=MBB-UPnP
+rootdev_manufacturer=LYNQ
+rootdev_modeldes=MBB
+rootdev_modelname=MBB
+os_url=http://m.home
+serialnumber=See-IMEI
+static_dhcp_enable=1
+static_ethwan_gw=
+static_ethwan_ip=
+static_ethwan_nm=
+static_ethwan_pridns=
+static_ethwan_secdns=
+static_wifiwan_ipaddr=
+static_wifiwan_netmask=
+static_wifiwan_gateway=
+wifiwan_pridns_manual=
+wifiwan_secdns_manual=
+static_wan_gateway=0.0.0.0
+static_wan_ipaddr=0.0.0.0
+static_wan_netmask=0.0.0.0
+static_wan_primary_dns=0.0.0.0
+static_wan_secondary_dns=0.0.0.0
+swlanstr=sw0_lan
+swvlan=sw0
+swwanstr=sw0_wan
+tc_downlink=
+tc_uplink=
+tc_local=1310720
+tc_enable=0
+time_limited=
+time_to_2000_when_restore=yes
+upnpEnabled=0
+usblan=usblan0
+WANPingFilter=0
+websURLFilters=
+wifiwan_priority=2
+DDNS=
+DDNS_Enable=0
+DDNSAccount=
+DDNSPassword=
+DDNSProvider=
+iccidPrevious=
+imeiPrevious=
+registerFlag=0
+registeredRound=
+secsEveryRound=1
+secsEveryTime=1
+regver=4.0
+meid=
+uetype=1
+LocalDomain=m.home
+data_volume_alert_percent=
+data_volume_limit_size=
+data_volume_limit_switch=0
+data_volume_limit_unit=0
+flux_day_total=0
+flux_last_day=
+flux_last_month=
+flux_last_year=
+flux_month_total=0
+flux_set_day=
+flux_set_month=
+flux_set_year=
+monthly_rx_bytes=0
+monthly_time=0
+monthly_tx_bytes=0
+MonthlyConTime_Last=
+dm_nextpollingtime=
+fota_allowRoamingUpdate=0
+fota_dl_pkg_size=0
+fota_update_flag=
+fota_updateIntervalDay=15
+fota_upgrade_result=
+fota_version_delta_id=
+fota_version_delta_url=
+fota_pkg_total_size=0
+fota_version_file_size=
+fota_version_md5sum=
+fota_version_name=
+fota_need_user_confirm_update=0
+fota_need_user_confirm_download=1
+fota_version_force_install=0
+polling_nexttime=0
+pwron_auto_check=1
+fota_updateMode=1
+fota_test_mode=0
+fota_pkg_downloaded=0
+fota_upgrade_result_internal=
+mmi_battery_voltage_line=3460+3670+3684+3719+3740+3760+3770+3782+3795+3810+3837+3874+3921+3954+3992+4042+4083+4141+4193+4264+4320
+mmi_fast_poweron=
+mmi_led_mode=
+mmi_new_sms_blink_flag=0
+mmi_show_pagetab=page1+page2+page3
+mmi_showmode=lcd
+mmi_task_tab=net_task+wifi_task+key_task+battery_task+tip_task+ssid_task+wificode_task+version_logo_task+ctrl_task+sms_task
+mmi_temp_voltage_line=948+1199+1694+1736
+mmi_use_protect=
+mmi_use_wifi_usernum=1
+leak_full_panic=
+leak_list_max=
+leak_set_flag=
+monitor_period=300
+netinf_flag=
+skb_all_max=
+skb_data_max=
+skb_fromcp_max=
+skb_max_fail=
+skb_max_panic=
+skb_size_max=
+skb_tocp_max=
+sntp_default_ip=134.170.185.211;131.107.13.100;202.112.31.197;202.112.29.82;202.112.10.36;ntp.gwadar.cn;ntp-sz.chl.la;dns.sjtu.edu.cn;news.neu.edu.cn;dns1.synet.edu.cn;time-nw.nist.gov;pool.ntp.org;europe.pool.ntp.org
+sntp_dst_enable=0
+sntp_other_server0=
+sntp_other_server1=
+sntp_other_server2=
+sntp_server0=time-nw.nist.gov
+sntp_server1=pool.ntp.org
+sntp_server2=europe.pool.ntp.org
+sntp_sync_select_interval_time=30
+sntp_time_set_mode=auto
+sntp_timezone=CST-8
+sntp_timezone_index=0
+assert_errno=
+comm_logsize=16384
+cr_inner_version=V1.0.0B08
+cr_version=V1.0.0B01
+hw_version=PCBMF29S2V1.0.0
+TURNOFF_CHR_NUM=
+watchdog_app=0
+HTTP_SHARE_FILE=
+HTTP_SHARE_STATUS=
+HTTP_SHARE_WR_AUTH=readWrite
+ipv6_pdp_type=
+ipv6_wan_apn=
+Language=en
+manual_time_day=
+manual_time_hour=
+manual_time_minute=
+manual_time_month=
+manual_time_second=
+manual_time_year=
+sdcard_mode_option=0
+AccessControlList0=
+AccessPolicy0=0
+ACL_mode=0
+AuthMode=WPA2PSK
+Channel=0
+wifi_acs_num=8
+closeEnable=0
+closeTime=
+CountryCode=ID
+DefaultKeyID=0
+DtimPeriod=1
+EncrypType=AES
+EX_APLIST=
+EX_APLIST1=
+EX_AuthMode=
+EX_DefaultKeyID=
+EX_EncrypType=
+EX_mac=
+EX_SSID1=M23_Pro-
+EX_WEPKEY=
+EX_wifi_profile=
+EX_WPAPSK1=
+FragThreshold=2346
+HideSSID=0
+HT_GI=1
+Key1Str1=12345
+Key2Str1=
+Key3Str1=
+Key4Str1=
+Key1Type=1
+Key2Type=
+Key3Type=
+Key4Type=
+m_AuthMode=WPA2PSK
+m_DefaultKeyID=
+m_EncrypType=AES
+m_HideSSID=0
+m_Key1Str1=1234
+m_Key2Str1=
+m_Key3Str1=
+m_Key4Str1=
+m_Key1Type=1
+m_Key2Type=
+m_Key3Type=
+m_Key4Type=
+m_MAX_Access_num=0
+m_NoForwarding=
+m_show_qrcode_flag=0
+m_SSID=M23_Pro-
+m_ssid_enable=0
+m_wapiType=
+m_wifi_mac=901D45692A5C
+m_WPAPSK1_aes=
+m_WPAPSK1_encode=MTIzNDU2Nzg=
+MAX_Access_num=10
+MAX_Access_num_bak=10
+NoForwarding=0
+openEnable=0
+openTime=
+operater_ap=
+RekeyInterval=3600
+RTSThreshold=2347
+show_qrcode_flag=0
+Sleep_interval=10
+ssid_write_flag=0
+SSID1=M23_Pro-
+tsw_sleep_time_hour=
+tsw_sleep_time_min=
+tsw_wake_time_hour=
+tsw_wake_time_min=
+wapiType=
+wifi_force_40m=1
+wifi_11n_cap=1
+wifi_band=b
+wifi_coverage=long_mode
+wifi_hostname_black_list=
+wifi_hostname_white_list=
+wifi_mac=901D45692A5B
+wifi_mac_black_list=
+wifi_mac_white_list=
+wifi_profile=
+wifi_profile1=
+wifi_profile2=
+wifi_profile3=
+wifi_profile4=
+wifi_profile5=
+wifi_profile6=
+wifi_profile7=
+wifi_profile8=
+wifi_profile9=
+wifi_profile_num=0
+wifi_root_dir=
+wifi_sta_connection=0
+wifi_wps_index=1
+wifiEnabled=1
+wifilan=wlan0-va0
+wifilan2=wlan0-va1
+mac_wlan0=
+wifi_ft=
+wifi_coupling=
+WirelessMode=6
+WPAPSK1_aes=
+WPAPSK1_encode=MTIzNDU2Nzg=
+wps_mode=PBC
+WPS_SSID=
+WscModeOption=0
+monitor_apps=
+at_netdog=
+autorspchannel_list=all
+soctime_switch=0
+uart_control=0
+uart_ctstrs_enable=
+special_cmd_list=$MYNETREAD
+##为入网入库芯片认证版本添加 begin
+atcmd_stream1=AT+ZSET="w_instrument",1
+atcmd_stream2=AT^SYSCONFIG=24,0,1,2
+atcmd_stream3=AT+ZSET="csiiot",2
+atcmd_stream4=AT+ZSET="dlparaflg",0
+atcmd_stream5=AT+ZSET="MTNET_TEST",1;AT+ZGAAT=0;AT+ZSET="CMCC_TEST",1;AT+ZSET="LTE_INFO",6348;AT+ZSET="VOICE_SUPPORT",1;AT+ZSET="FDD_RELEASE",7;AT+ZSET="LTE_RELEASE",1;AT+ZSET="UE_PS_RELEASE",5;AT+ZSET="QOS_RELEASE",4;AT+ZSET="TEBS_THRESHOLD",0
+atcmd_stream6=AT+ZSET="MTNET_TEST",1;AT+ZGAAT=0;AT+ZSET="LTE_INFO",6348;AT+ZSET="VOICE_SUPPORT",1;AT+ZSET="FDD_RELEASE",7;AT+ZSET="LTE_RELEASE",1;AT+ZSET="UE_PS_RELEASE",5;AT+ZSET="QOS_RELEASE",4;AT+ZSET="TEBS_THRESHOLD",0;AT+ZSET="IGNORE_SECURITY_SUPPORT",0;AT+ZSET="csifilter",0;AT+ZSET="csrhobandflg",0;AT+ZSET="dlparaflg",1;AT+ZSET="csiup",1;AT+ZSET="rfparaflag",0,0,1,0;AT+ZSET="csiiot",1;AT+ZSET="EXCEPT_RESET",0;AT+ZSET="ISIM_SUPPORT",1;AT+ZIMSTEST="MTNET_TEST",1;AT+ZSET="MANUAL_SEARCH",0
+##为入网入库芯片认证版本添加 end
+#for audio ctrl
+audio_priority=0123
+customer_type=sdk_min
+debug_mode=
+cpIndCmdList=+ZMMI+ZURDY+ZUSLOT+ZICCID^MODE+ZPBIC+ZMSRI+CREG+CEREG+CGREG+CGEV
+zephyr_filter_ip=
+wait_timeout=2
+sntp_sync_time=1
+sntp_static_server0=time-nw.nist.gov
+sntp_static_server1=pool.ntp.org
+sntp_static_server2=europe.pool.ntp.org
+vsim_bin_path=/mnt/userdata/vSim.bin
+webv6_enable=
+lan_ipv6addr=fe80::1
+sms_vp=
+at_select_timeout=
+mtnet_test_mcc=
+at_atv=
+at_atq=
+at_at_d=
+base_ip_on_mac=0
+quick_dial=1
+xlat_enable=0
+#for schedule_restart start
+schedule_restart_enable=0
+schedule_restart_option=everyday
+schedule_restart_day=0
+schedule_restart_hour=0
+schedule_restart_minute=0
+schedule_restart_weekday=Mon
+#for schedule_restart end
+wifi_sleep_mode=0
+ping_repetition_count=4
+ping_diag_addr=
+ping_result=
+#for wefota start
+wefota_server1_ip=18.216.104.147
+wefota_server1_port=45000
+wefota_last_work_time=0
+wefota_last_work_interval=0
+wefota_product_id=10310
+wefota_current_upgrade_state=
+wefota_new_version_state=
+#for wefota end
+use_network_adb=usb
+web_channel=0
diff --git a/lynq/MD310/XL/ap/project/zx297520v3/prj_cpe_min/fs/normal/rootfs/etc_ro/default/default_parameter_user b/lynq/MD310/XL/ap/project/zx297520v3/prj_cpe_min/fs/normal/rootfs/etc_ro/default/default_parameter_user
new file mode 100755
index 0000000..57a85f3
--- /dev/null
+++ b/lynq/MD310/XL/ap/project/zx297520v3/prj_cpe_min/fs/normal/rootfs/etc_ro/default/default_parameter_user
@@ -0,0 +1,498 @@
+apn_auto_config=CMCC($)cmnet($)manual($)*99#($)pap($)($)($)IP($)auto($)($)auto($)($)
+APN_config0=Default($)Default($)manual($)($)($)($)($)IP($)auto($)($)auto($)($)
+APN_config1=
+APN_config2=
+APN_config3=
+APN_config4=
+APN_config5=
+APN_config6=
+APN_config7=
+APN_config8=
+APN_config9=
+apn_index=0
+apn_mode=auto
+at_snap_flag=3
+at_wifi_mac=0
+auto_apn_index=0
+cid_reserved=0
+clear_pb_when_restore=no
+clear_sms_when_restore=yes
+default_apn=3gnet
+ipv6_APN_config1=
+ipv6_APN_config2=
+ipv6_APN_config3=
+ipv6_APN_config4=
+ipv6_APN_config5=
+ipv6_APN_config6=
+ipv6_APN_config7=
+ipv6_APN_config8=
+ipv6_APN_config9=
+m_profile_name=Internux
+need_init_modem=yes
+net_select=NETWORK_auto
+pdp_type=IPv4v6
+ppp_apn=
+max_reconnect_time=3000000
+pppd_auth=noauth
+ppp_auth_mode=none
+ppp_passwd=
+ppp_pdp_type=
+ppp_username=
+ipv6_ppp_auth_mode=none
+ipv6_ppp_passwd=
+ipv6_ppp_username=
+pre_mode=
+prefer_dns_manual=0.0.0.0
+standby_dns_manual=0.0.0.0
+wan_apn=internet
+wan_dial=
+cta_test=0
+safecare_enbale=0
+safecare_hostname=mob.3gcare.cn
+safecare_registed_imei=
+safecare_registed_iccid=
+safecare_contimestart1=
+safecare_contimestart2=
+safecare_contimestart3=
+safecare_contimestop1=
+safecare_contimestop2=
+safecare_contimestop3=
+safecare_contimeinterval=
+safecare_mobsite=http://mob.3gcare.cn
+safecare_chatsite=
+safecare_platno=
+safecare_mobilenumber=
+safecare_version=
+ethwan_dns_mode=auto
+pswan_dns_mode=auto
+wifiwan_dns_mode=auto
+ethwan_ipv6_dns_mode=auto
+wifiwan_ipv6_dns_mode=auto
+pswan_ipv6_dns_mode=auto
+admin_Password=admin
+psw_changed=1
+alg_ftp_enable=0
+alg_sip_enable=0
+blc_wan_auto_mode=AUTO_PPP
+blc_wan_mode=AUTO
+br_ipchange_flag=
+br_node=usblan0
+clat_fake_subnet=192.0.168.0
+clat_frag_collect_timeout=300
+clat_local_mapping_timeout=300
+clat_mapping_record_timeout=3000
+clat_query_server_port=1464
+DefaultFirewallPolicy=0
+dev_coexist=0
+dhcpDns=192.168.0.1
+dhcpEnabled=1
+dhcpEnd=192.168.0.200
+dhcpLease_hour=24
+dhcpStart=192.168.0.100
+dhcpv6stateEnabled=0
+dhcpv6statelessEnabled=1
+dhcpv6statePdEnabled=0
+dial_mode=auto_dial
+DMZEnable=0
+DMZIPAddress=
+dns_extern=
+ipv6_dns_extern=
+eth_act_type=
+eth_type=wan
+ethlan=
+ethwan=
+ethwan_dialmode=auto
+ethwan_mode=auto
+ethwan_priority=3
+fast_usb=usblan0
+fastnat_level=2
+IPPortFilterEnable=0
+IPPortFilterRules_0=
+IPPortFilterRules_1=
+IPPortFilterRules_2=
+IPPortFilterRules_3=
+IPPortFilterRules_4=
+IPPortFilterRules_5=
+IPPortFilterRules_6=
+IPPortFilterRules_7=
+IPPortFilterRules_8=
+IPPortFilterRules_9=
+IPPortFilterRulesv6_0=
+IPPortFilterRulesv6_1=
+IPPortFilterRulesv6_2=
+IPPortFilterRulesv6_3=
+IPPortFilterRulesv6_4=
+IPPortFilterRulesv6_5=
+IPPortFilterRulesv6_6=
+IPPortFilterRulesv6_7=
+IPPortFilterRulesv6_8=
+IPPortFilterRulesv6_9=
+ipv4_fake_subnet=192.0.0.0
+ipv6_fake_subnet=2016::1
+lan_ipaddr=192.168.0.1
+lan_name=br0
+lan_netmask=255.255.255.0
+LanEnable=1
+mac_ip_list=
+mgmt_quicken_power_on=0
+mtu=1400
+natenable=
+dosenable=0
+need_jilian=1
+nofast_port=21+22+23+25+53+67+68+69+110+115+123+443+500+1352+1723+1990+1991+1992+1993+1994+1995+1996+1997+1998+4500+5060
+nv_save_interval=300
+path_conf=/etc_rw
+path_ro=/etc_ro
+path_log=/var/log/
+path_sh=/sbin
+path_tmp=/tmp
+permit_gw=
+permit_ip6=
+permit_nm=255.255.255.0
+PortForwardEnable=0
+PortForwardRules_0=
+PortForwardRules_1=
+PortForwardRules_2=
+PortForwardRules_3=
+PortForwardRules_4=
+PortForwardRules_5=
+PortForwardRules_6=
+PortForwardRules_7=
+PortForwardRules_8=
+PortForwardRules_9=
+PortMapEnable=0
+PortMapRules_0=
+PortMapRules_1=
+PortMapRules_2=
+PortMapRules_3=
+PortMapRules_4=
+PortMapRules_5=
+PortMapRules_6=
+PortMapRules_7=
+PortMapRules_8=
+PortMapRules_9=
+ppp_name=ppp0
+pppoe_password=
+pppoe_username=
+ps_ext1=usblan0
+ps_ext2=usblan0
+ps_ext3=usblan0
+ps_ext4=usblan0
+ps_ext5=usblan0
+ps_ext6=usblan0
+ps_ext7=usblan0
+ps_ext8=usblan0
+pswan=wan
+pswan_mode=pdp
+pswan_priority=1
+RemoteManagement=0
+rj45_plugstate_path=/sys/kernel/eth_debug/eth_state
+rootdev_friendlyname=MBB-UPnP
+rootdev_manufacturer=LYNQ
+rootdev_modeldes=MBB
+rootdev_modelname=MBB
+os_url=http://m.home
+serialnumber=See-IMEI
+static_dhcp_enable=1
+static_ethwan_gw=
+static_ethwan_ip=
+static_ethwan_nm=
+static_ethwan_pridns=
+static_ethwan_secdns=
+static_wifiwan_ipaddr=
+static_wifiwan_netmask=
+static_wifiwan_gateway=
+wifiwan_pridns_manual=
+wifiwan_secdns_manual=
+static_wan_gateway=0.0.0.0
+static_wan_ipaddr=0.0.0.0
+static_wan_netmask=0.0.0.0
+static_wan_primary_dns=0.0.0.0
+static_wan_secondary_dns=0.0.0.0
+swlanstr=sw0_lan
+swvlan=sw0
+swwanstr=sw0_wan
+tc_downlink=
+tc_uplink=
+tc_local=1310720
+tc_enable=0
+time_limited=
+time_to_2000_when_restore=yes
+upnpEnabled=0
+usblan=usblan0
+WANPingFilter=0
+websURLFilters=
+wifiwan_priority=2
+DDNS=
+DDNS_Enable=0
+DDNSAccount=
+DDNSPassword=
+DDNSProvider=
+iccidPrevious=
+imeiPrevious=
+registerFlag=0
+registeredRound=
+secsEveryRound=1
+secsEveryTime=1
+regver=4.0
+meid=
+uetype=1
+LocalDomain=m.home
+data_volume_alert_percent=
+data_volume_limit_size=
+data_volume_limit_switch=0
+data_volume_limit_unit=0
+flux_day_total=0
+flux_last_day=
+flux_last_month=
+flux_last_year=
+flux_month_total=0
+flux_set_day=
+flux_set_month=
+flux_set_year=
+monthly_rx_bytes=0
+monthly_time=0
+monthly_tx_bytes=0
+MonthlyConTime_Last=
+dm_nextpollingtime=
+fota_allowRoamingUpdate=0
+fota_dl_pkg_size=0
+fota_update_flag=
+fota_updateIntervalDay=15
+fota_upgrade_result=
+fota_version_delta_id=
+fota_version_delta_url=
+fota_pkg_total_size=0
+fota_version_file_size=
+fota_version_md5sum=
+fota_version_name=
+fota_need_user_confirm_update=0
+fota_need_user_confirm_download=1
+fota_version_force_install=0
+polling_nexttime=0
+pwron_auto_check=1
+fota_updateMode=1
+fota_test_mode=0
+fota_pkg_downloaded=0
+fota_upgrade_result_internal=
+mmi_battery_voltage_line=3460+3670+3684+3719+3740+3760+3770+3782+3795+3810+3837+3874+3921+3954+3992+4042+4083+4141+4193+4264+4320
+mmi_fast_poweron=
+mmi_led_mode=
+mmi_new_sms_blink_flag=0
+mmi_show_pagetab=page1+page2+page3
+mmi_showmode=lcd
+mmi_task_tab=net_task+wifi_task+key_task+battery_task+tip_task+ssid_task+wificode_task+version_logo_task+ctrl_task+sms_task
+mmi_temp_voltage_line=948+1199+1694+1736
+mmi_use_protect=
+mmi_use_wifi_usernum=1
+leak_full_panic=
+leak_list_max=
+leak_set_flag=
+monitor_period=300
+netinf_flag=
+skb_all_max=
+skb_data_max=
+skb_fromcp_max=
+skb_max_fail=
+skb_max_panic=
+skb_size_max=
+skb_tocp_max=
+sntp_default_ip=134.170.185.211;131.107.13.100;202.112.31.197;202.112.29.82;202.112.10.36;ntp.gwadar.cn;ntp-sz.chl.la;dns.sjtu.edu.cn;news.neu.edu.cn;dns1.synet.edu.cn;time-nw.nist.gov;pool.ntp.org;europe.pool.ntp.org
+sntp_dst_enable=0
+sntp_other_server0=
+sntp_other_server1=
+sntp_other_server2=
+sntp_server0=time-nw.nist.gov
+sntp_server1=pool.ntp.org
+sntp_server2=europe.pool.ntp.org
+sntp_sync_select_interval_time=30
+sntp_time_set_mode=auto
+sntp_timezone=CST-8
+sntp_timezone_index=0
+assert_errno=
+comm_logsize=16384
+cr_inner_version=V1.0.0B08
+cr_version=V1.0.0B01
+hw_version=PCBMF29S2V1.0.0
+TURNOFF_CHR_NUM=
+watchdog_app=0
+HTTP_SHARE_FILE=
+HTTP_SHARE_STATUS=
+HTTP_SHARE_WR_AUTH=readWrite
+ipv6_pdp_type=
+ipv6_wan_apn=
+Language=en
+manual_time_day=
+manual_time_hour=
+manual_time_minute=
+manual_time_month=
+manual_time_second=
+manual_time_year=
+sdcard_mode_option=0
+AccessControlList0=
+AccessPolicy0=0
+ACL_mode=0
+AuthMode=WPA2PSK
+Channel=0
+wifi_acs_num=8
+closeEnable=0
+closeTime=
+CountryCode=ID
+DefaultKeyID=0
+DtimPeriod=1
+EncrypType=AES
+EX_APLIST=
+EX_APLIST1=
+EX_AuthMode=
+EX_DefaultKeyID=
+EX_EncrypType=
+EX_mac=
+EX_SSID1=M23_Pro-
+EX_WEPKEY=
+EX_wifi_profile=
+EX_WPAPSK1=
+FragThreshold=2346
+HideSSID=0
+HT_GI=1
+Key1Str1=12345
+Key2Str1=
+Key3Str1=
+Key4Str1=
+Key1Type=1
+Key2Type=
+Key3Type=
+Key4Type=
+m_AuthMode=WPA2PSK
+m_DefaultKeyID=
+m_EncrypType=AES
+m_HideSSID=0
+m_Key1Str1=1234
+m_Key2Str1=
+m_Key3Str1=
+m_Key4Str1=
+m_Key1Type=1
+m_Key2Type=
+m_Key3Type=
+m_Key4Type=
+m_MAX_Access_num=0
+m_NoForwarding=
+m_show_qrcode_flag=0
+m_SSID=M23_Pro-
+m_ssid_enable=0
+m_wapiType=
+m_wifi_mac=901D45692A5C
+m_WPAPSK1_aes=
+m_WPAPSK1_encode=MTIzNDU2Nzg=
+MAX_Access_num=10
+MAX_Access_num_bak=10
+NoForwarding=0
+openEnable=0
+openTime=
+operater_ap=
+RekeyInterval=3600
+RTSThreshold=2347
+show_qrcode_flag=0
+Sleep_interval=10
+ssid_write_flag=0
+SSID1=M23_Pro-
+tsw_sleep_time_hour=
+tsw_sleep_time_min=
+tsw_wake_time_hour=
+tsw_wake_time_min=
+wapiType=
+wifi_force_40m=1
+wifi_11n_cap=1
+wifi_band=b
+wifi_coverage=long_mode
+wifi_hostname_black_list=
+wifi_hostname_white_list=
+wifi_mac=901D45692A5B
+wifi_mac_black_list=
+wifi_mac_white_list=
+wifi_profile=
+wifi_profile1=
+wifi_profile2=
+wifi_profile3=
+wifi_profile4=
+wifi_profile5=
+wifi_profile6=
+wifi_profile7=
+wifi_profile8=
+wifi_profile9=
+wifi_profile_num=0
+wifi_root_dir=
+wifi_sta_connection=0
+wifi_wps_index=1
+wifiEnabled=1
+wifilan=wlan0-va0
+wifilan2=wlan0-va1
+mac_wlan0=
+wifi_ft=
+wifi_coupling=
+WirelessMode=6
+WPAPSK1_aes=
+WPAPSK1_encode=MTIzNDU2Nzg=
+wps_mode=PBC
+WPS_SSID=
+WscModeOption=0
+monitor_apps=
+at_netdog=
+autorspchannel_list=all
+soctime_switch=0
+uart_control=0
+uart_ctstrs_enable=
+special_cmd_list=$MYNETREAD
+##为入网入库芯片认证版本添加 begin
+atcmd_stream1=AT+ZSET="w_instrument",1
+atcmd_stream2=AT^SYSCONFIG=24,0,1,2
+atcmd_stream3=AT+ZSET="csiiot",2
+atcmd_stream4=AT+ZSET="dlparaflg",0
+atcmd_stream5=AT+ZSET="MTNET_TEST",1;AT+ZGAAT=0;AT+ZSET="CMCC_TEST",1;AT+ZSET="LTE_INFO",6348;AT+ZSET="VOICE_SUPPORT",1;AT+ZSET="FDD_RELEASE",7;AT+ZSET="LTE_RELEASE",1;AT+ZSET="UE_PS_RELEASE",5;AT+ZSET="QOS_RELEASE",4;AT+ZSET="TEBS_THRESHOLD",0
+atcmd_stream6=AT+ZSET="MTNET_TEST",1;AT+ZGAAT=0;AT+ZSET="LTE_INFO",6348;AT+ZSET="VOICE_SUPPORT",1;AT+ZSET="FDD_RELEASE",7;AT+ZSET="LTE_RELEASE",1;AT+ZSET="UE_PS_RELEASE",5;AT+ZSET="QOS_RELEASE",4;AT+ZSET="TEBS_THRESHOLD",0;AT+ZSET="IGNORE_SECURITY_SUPPORT",0;AT+ZSET="csifilter",0;AT+ZSET="csrhobandflg",0;AT+ZSET="dlparaflg",1;AT+ZSET="csiup",1;AT+ZSET="rfparaflag",0,0,1,0;AT+ZSET="csiiot",1;AT+ZSET="EXCEPT_RESET",0;AT+ZSET="ISIM_SUPPORT",1;AT+ZIMSTEST="MTNET_TEST",1;AT+ZSET="MANUAL_SEARCH",0
+##为入网入库芯片认证版本添加 end
+#for audio ctrl
+audio_priority=0123
+customer_type=sdk_min
+debug_mode=
+cpIndCmdList=+ZMMI+ZURDY+ZUSLOT+ZICCID^MODE+ZPBIC+ZMSRI+CREG+CEREG+CGREG+CGEV
+zephyr_filter_ip=
+wait_timeout=2
+sntp_sync_time=1
+sntp_static_server0=time-nw.nist.gov
+sntp_static_server1=pool.ntp.org
+sntp_static_server2=europe.pool.ntp.org
+vsim_bin_path=/mnt/userdata/vSim.bin
+webv6_enable=
+lan_ipv6addr=fe80::1
+sms_vp=
+at_select_timeout=
+mtnet_test_mcc=
+at_atv=
+at_atq=
+at_at_d=
+base_ip_on_mac=0
+quick_dial=1
+xlat_enable=0
+#for schedule_restart start
+schedule_restart_enable=0
+schedule_restart_option=everyday
+schedule_restart_day=0
+schedule_restart_hour=0
+schedule_restart_minute=0
+schedule_restart_weekday=Mon
+#for schedule_restart end
+wifi_sleep_mode=0
+ping_repetition_count=4
+ping_diag_addr=
+ping_result=
+#for wefota start
+wefota_server1_ip=18.216.104.147
+wefota_server1_port=45000
+wefota_last_work_time=0
+wefota_last_work_interval=0
+wefota_product_id=10310
+wefota_current_upgrade_state=
+wefota_new_version_state=
+#for wefota end
+use_network_adb=usb
+web_channel=0
diff --git a/lynq/MD310/ap/os/linux/linux-3.4.x/drivers/net/wireless/aic8800/regdb.c b/lynq/MD310/ap/os/linux/linux-3.4.x/drivers/net/wireless/aic8800/regdb.c
new file mode 100644
index 0000000..47bb3dc
--- /dev/null
+++ b/lynq/MD310/ap/os/linux/linux-3.4.x/drivers/net/wireless/aic8800/regdb.c
@@ -0,0 +1,2882 @@
+#include <linux/nl80211.h>
+#include <net/cfg80211.h>
+#include <linux/version.h>
+
+//#include "regdb.h"
+
+#if LINUX_VERSION_CODE < KERNEL_VERSION(3, 15, 0)
+#define REG_RULE_EXT(start, end, bw, gain, eirp, dfs_cac, reg_flags) \
+{ \
+ .freq_range.start_freq_khz = MHZ_TO_KHZ(start), \
+ .freq_range.end_freq_khz = MHZ_TO_KHZ(end), \
+ .freq_range.max_bandwidth_khz = MHZ_TO_KHZ(bw), \
+ .power_rule.max_antenna_gain = DBI_TO_MBI(gain),\
+ .power_rule.max_eirp = DBM_TO_MBM(eirp), \
+ .flags = reg_flags, \
+}
+#define NL80211_RRF_AUTO_BW 0
+#endif
+
+static const struct ieee80211_regdomain regdom_00 = {
+ .n_reg_rules = 2,
+ .alpha2 = "00",
+ .reg_rules = {
+ // 1...14
+ REG_RULE(2390 - 10, 2510 + 10, 40, 0, 20, 0),
+ // 36...165
+ REG_RULE(5150 - 10, 5970 + 10, 80, 0, 20, 0),
+ }
+};
+
+static const struct ieee80211_regdomain regdom_AD = {
+ .alpha2 = "AD",
+ .reg_rules = {
+ REG_RULE_EXT(2402, 2482, 40, 0, 20, 0, 0),
+ REG_RULE_EXT(5170, 5250, 80, 0, 20, 0, 0),
+ REG_RULE_EXT(5250, 5330, 80, 0, 20, 0,
+ NL80211_RRF_DFS | 0),
+ REG_RULE_EXT(5490, 5710, 80, 0, 27, 0,
+ NL80211_RRF_DFS | 0),
+ REG_RULE_EXT(57000, 66000, 2160, 0, 40, 0, 0),
+ },
+ .n_reg_rules = 5
+};
+
+static const struct ieee80211_regdomain regdom_AE = {
+ .alpha2 = "AE",
+ .dfs_region = NL80211_DFS_FCC,
+ .reg_rules = {
+ REG_RULE_EXT(2402, 2482, 40, 0, 20, 0, 0),
+ REG_RULE_EXT(5170, 5250, 80, 0, 17, 0,
+ NL80211_RRF_AUTO_BW | 0),
+ REG_RULE_EXT(5250, 5330, 80, 0, 24, 0,
+ NL80211_RRF_DFS |
+ NL80211_RRF_AUTO_BW | 0),
+ REG_RULE_EXT(5490, 5730, 160, 0, 24, 0,
+ NL80211_RRF_DFS | 0),
+ //REG_RULE_EXT(5735, 5835, 80, 0, 30, 0, 0),
+ },
+ .n_reg_rules = 4
+};
+
+static const struct ieee80211_regdomain regdom_AF = {
+ .alpha2 = "AF",
+ .dfs_region = NL80211_DFS_ETSI,
+ .reg_rules = {
+ REG_RULE_EXT(2402, 2482, 40, 0, 20, 0, 0),
+ REG_RULE_EXT(5170, 5250, 80, 0, 20, 0,
+ NL80211_RRF_AUTO_BW | 0),
+ REG_RULE_EXT(5250, 5330, 80, 0, 20, 0,
+ NL80211_RRF_DFS |
+ NL80211_RRF_AUTO_BW | 0),
+ REG_RULE_EXT(5490, 5710, 160, 0, 27, 0,
+ NL80211_RRF_DFS | 0),
+ },
+ .n_reg_rules = 4
+};
+
+static const struct ieee80211_regdomain regdom_AI = {
+ .alpha2 = "AI",
+ .dfs_region = NL80211_DFS_ETSI,
+ .reg_rules = {
+ REG_RULE_EXT(2402, 2482, 40, 0, 20, 0, 0),
+ REG_RULE_EXT(5170, 5250, 80, 0, 20, 0,
+ NL80211_RRF_AUTO_BW | 0),
+ REG_RULE_EXT(5250, 5330, 80, 0, 20, 0,
+ NL80211_RRF_DFS |
+ NL80211_RRF_AUTO_BW | 0),
+ REG_RULE_EXT(5490, 5710, 160, 0, 27, 0,
+ NL80211_RRF_DFS | 0),
+ },
+ .n_reg_rules = 4
+};
+
+static const struct ieee80211_regdomain regdom_AL = {
+ .alpha2 = "AL",
+ .dfs_region = NL80211_DFS_ETSI,
+ .reg_rules = {
+ REG_RULE_EXT(2402, 2482, 40, 0, 20, 0, 0),
+ REG_RULE_EXT(5170, 5250, 80, 0, 20, 0,
+ NL80211_RRF_AUTO_BW | 0),
+ REG_RULE_EXT(5250, 5330, 80, 0, 20, 0,
+ NL80211_RRF_DFS |
+ NL80211_RRF_AUTO_BW | 0),
+ REG_RULE_EXT(5490, 5710, 160, 0, 27, 0,
+ NL80211_RRF_DFS | 0),
+ },
+ .n_reg_rules = 4
+};
+
+static const struct ieee80211_regdomain regdom_AM = {
+ .alpha2 = "AM",
+ .dfs_region = NL80211_DFS_ETSI,
+ .reg_rules = {
+ REG_RULE_EXT(2402, 2482, 40, 0, 20, 0, 0),
+ REG_RULE_EXT(5170, 5250, 80, 0, 18, 0, 0),
+ REG_RULE_EXT(5250, 5330, 80, 0, 18, 0,
+ NL80211_RRF_DFS | 0),
+ },
+ .n_reg_rules = 3
+};
+
+static const struct ieee80211_regdomain regdom_AN = {
+ .alpha2 = "AN",
+ .dfs_region = NL80211_DFS_ETSI,
+ .reg_rules = {
+ REG_RULE_EXT(2402, 2482, 40, 0, 20, 0, 0),
+ REG_RULE_EXT(5170, 5250, 80, 0, 20, 0,
+ NL80211_RRF_AUTO_BW | 0),
+ REG_RULE_EXT(5250, 5330, 80, 0, 20, 0,
+ NL80211_RRF_DFS |
+ NL80211_RRF_AUTO_BW | 0),
+ REG_RULE_EXT(5490, 5710, 160, 0, 27, 0,
+ NL80211_RRF_DFS | 0),
+ },
+ .n_reg_rules = 4
+};
+
+static const struct ieee80211_regdomain regdom_AR = {
+ .alpha2 = "AR",
+ .dfs_region = NL80211_DFS_FCC,
+ .reg_rules = {
+ REG_RULE_EXT(2402, 2482, 40, 0, 20, 0, 0),
+ //REG_RULE_EXT(5170, 5250, 80, 0, 17, 0,
+ // NL80211_RRF_AUTO_BW | 0),
+ //REG_RULE_EXT(5250, 5330, 80, 0, 24, 0,
+ // NL80211_RRF_DFS |
+ // NL80211_RRF_AUTO_BW | 0),
+ REG_RULE_EXT(5270, 5330, 40, 0, 24, 0,
+ NL80211_RRF_DFS |
+ NL80211_RRF_AUTO_BW | 0),
+ //REG_RULE_EXT(5490, 5730, 160, 0, 24, 0,
+ // NL80211_RRF_DFS | 0),
+ REG_RULE_EXT(5735, 5815, 80, 0, 30, 0, 0),
+ },
+ .n_reg_rules = 3
+};
+
+static const struct ieee80211_regdomain regdom_AS = {
+ .alpha2 = "AS",
+ .dfs_region = NL80211_DFS_FCC,
+ .reg_rules = {
+ REG_RULE_EXT(2402, 2472, 40, 0, 30, 0, 0),
+ REG_RULE_EXT(5170, 5250, 80, 0, 24, 0,
+ NL80211_RRF_AUTO_BW | 0),
+ REG_RULE_EXT(5250, 5330, 80, 0, 24, 0,
+ NL80211_RRF_DFS |
+ NL80211_RRF_AUTO_BW | 0),
+ REG_RULE_EXT(5490, 5730, 160, 0, 24, 0,
+ NL80211_RRF_DFS | 0),
+ REG_RULE_EXT(5735, 5835, 80, 0, 30, 0, 0),
+ },
+ .n_reg_rules = 5
+};
+
+static const struct ieee80211_regdomain regdom_AT = {
+ .alpha2 = "AT",
+ .dfs_region = NL80211_DFS_ETSI,
+ .reg_rules = {
+ REG_RULE_EXT(2402, 2482, 40, 0, 20, 0, 0),
+ REG_RULE_EXT(5170, 5250, 80, 0, 20, 0,
+ NL80211_RRF_AUTO_BW | 0),
+ REG_RULE_EXT(5250, 5330, 80, 0, 20, 0,
+ NL80211_RRF_DFS |
+ NL80211_RRF_AUTO_BW | 0),
+ REG_RULE_EXT(5490, 5710, 160, 0, 27, 0,
+ NL80211_RRF_DFS | 0),
+ REG_RULE_EXT(57000, 66000, 2160, 0, 40, 0, 0),
+ },
+ .n_reg_rules = 5
+};
+
+static const struct ieee80211_regdomain regdom_AU = {
+ .alpha2 = "AU",
+ .reg_rules = {
+ REG_RULE_EXT(2402, 2482, 40, 0, 20, 0, 0),
+ REG_RULE_EXT(5170, 5250, 80, 0, 17, 0,
+ NL80211_RRF_AUTO_BW | 0),
+ REG_RULE_EXT(5250, 5330, 80, 0, 24, 0,
+ NL80211_RRF_DFS |
+ NL80211_RRF_AUTO_BW | 0),
+ REG_RULE_EXT(5490, 5710, 160, 0, 24, 0,
+ NL80211_RRF_DFS | 0),
+ REG_RULE_EXT(5735, 5835, 80, 0, 30, 0, 0),
+ },
+ .n_reg_rules = 5
+};
+
+static const struct ieee80211_regdomain regdom_AW = {
+ .alpha2 = "AW",
+ .dfs_region = NL80211_DFS_ETSI,
+ .reg_rules = {
+ REG_RULE_EXT(2402, 2482, 40, 0, 20, 0, 0),
+ REG_RULE_EXT(5170, 5250, 80, 0, 20, 0,
+ NL80211_RRF_AUTO_BW | 0),
+ REG_RULE_EXT(5250, 5330, 80, 0, 20, 0,
+ NL80211_RRF_DFS |
+ NL80211_RRF_AUTO_BW | 0),
+ REG_RULE_EXT(5490, 5710, 160, 0, 27, 0,
+ NL80211_RRF_DFS | 0),
+ },
+ .n_reg_rules = 4
+};
+
+static const struct ieee80211_regdomain regdom_AZ = {
+ .alpha2 = "AZ",
+ .dfs_region = NL80211_DFS_ETSI,
+ .reg_rules = {
+ REG_RULE_EXT(2402, 2482, 40, 0, 20, 0, 0),
+ REG_RULE_EXT(5170, 5250, 80, 0, 18, 0,
+ NL80211_RRF_AUTO_BW | 0),
+ REG_RULE_EXT(5250, 5330, 80, 0, 18, 0,
+ NL80211_RRF_DFS |
+ NL80211_RRF_AUTO_BW | 0),
+ },
+ .n_reg_rules = 3
+};
+
+static const struct ieee80211_regdomain regdom_BA = {
+ .alpha2 = "BA",
+ .dfs_region = NL80211_DFS_ETSI,
+ .reg_rules = {
+ REG_RULE_EXT(2402, 2482, 40, 0, 20, 0, 0),
+ REG_RULE_EXT(5170, 5250, 80, 0, 20, 0,
+ NL80211_RRF_AUTO_BW | 0),
+ REG_RULE_EXT(5250, 5330, 80, 0, 20, 0,
+ NL80211_RRF_DFS |
+ NL80211_RRF_AUTO_BW | 0),
+ REG_RULE_EXT(5490, 5710, 160, 0, 27, 0,
+ NL80211_RRF_DFS | 0),
+ REG_RULE_EXT(57000, 66000, 2160, 0, 40, 0, 0),
+ },
+ .n_reg_rules = 5
+};
+
+static const struct ieee80211_regdomain regdom_BB = {
+ .alpha2 = "BB",
+ .dfs_region = NL80211_DFS_FCC,
+ .reg_rules = {
+ REG_RULE_EXT(2402, 2482, 40, 0, 20, 0, 0),
+ REG_RULE_EXT(5170, 5250, 80, 0, 23, 0,
+ NL80211_RRF_AUTO_BW | 0),
+ REG_RULE_EXT(5250, 5330, 80, 0, 23, 0,
+ NL80211_RRF_DFS |
+ NL80211_RRF_AUTO_BW | 0),
+ REG_RULE_EXT(5735, 5835, 80, 0, 30, 0, 0),
+ },
+ .n_reg_rules = 4
+};
+
+static const struct ieee80211_regdomain regdom_BD = {
+ .alpha2 = "BD",
+ .dfs_region = NL80211_DFS_JP,
+ .reg_rules = {
+ REG_RULE_EXT(2402, 2482, 40, 0, 20, 0, 0),
+ REG_RULE_EXT(5735, 5835, 80, 0, 30, 0, 0),
+ },
+ .n_reg_rules = 2
+};
+
+static const struct ieee80211_regdomain regdom_BE = {
+ .alpha2 = "BE",
+ .dfs_region = NL80211_DFS_ETSI,
+ .reg_rules = {
+ REG_RULE_EXT(2402, 2482, 40, 0, 20, 0, 0),
+ REG_RULE_EXT(5170, 5250, 80, 0, 20, 0,
+ NL80211_RRF_AUTO_BW | 0),
+ REG_RULE_EXT(5250, 5330, 80, 0, 20, 0,
+ NL80211_RRF_DFS |
+ NL80211_RRF_AUTO_BW | 0),
+ REG_RULE_EXT(5490, 5710, 160, 0, 27, 0,
+ NL80211_RRF_DFS | 0),
+ REG_RULE_EXT(57000, 66000, 2160, 0, 40, 0, 0),
+ },
+ .n_reg_rules = 5
+};
+
+static const struct ieee80211_regdomain regdom_BF = {
+ .alpha2 = "BF",
+ .dfs_region = NL80211_DFS_FCC,
+ .reg_rules = {
+ REG_RULE_EXT(2402, 2482, 40, 0, 20, 0, 0),
+ REG_RULE_EXT(5170, 5250, 80, 0, 17, 0,
+ NL80211_RRF_AUTO_BW | 0),
+ REG_RULE_EXT(5250, 5330, 80, 0, 24, 0,
+ NL80211_RRF_DFS |
+ NL80211_RRF_AUTO_BW | 0),
+ REG_RULE_EXT(5490, 5730, 160, 0, 24, 0,
+ NL80211_RRF_DFS | 0),
+ REG_RULE_EXT(5735, 5835, 80, 0, 30, 0, 0),
+ },
+ .n_reg_rules = 5
+};
+
+static const struct ieee80211_regdomain regdom_BG = {
+ .alpha2 = "BG",
+ .dfs_region = NL80211_DFS_ETSI,
+ .reg_rules = {
+ REG_RULE_EXT(2402, 2482, 40, 0, 20, 0, 0),
+ REG_RULE_EXT(5170, 5250, 80, 0, 20, 0,
+ NL80211_RRF_AUTO_BW | 0),
+ REG_RULE_EXT(5250, 5330, 80, 0, 20, 0,
+ NL80211_RRF_DFS |
+ NL80211_RRF_AUTO_BW | 0),
+ REG_RULE_EXT(5490, 5710, 160, 0, 27, 0,
+ NL80211_RRF_DFS | 0),
+ REG_RULE_EXT(57000, 66000, 2160, 0, 40, 0, 0),
+ },
+ .n_reg_rules = 5
+};
+
+static const struct ieee80211_regdomain regdom_BH = {
+ .alpha2 = "BH",
+ .dfs_region = NL80211_DFS_JP,
+ .reg_rules = {
+ REG_RULE_EXT(2402, 2482, 40, 0, 20, 0, 0),
+ REG_RULE_EXT(5170, 5250, 80, 0, 20, 0, 0),
+ REG_RULE_EXT(5250, 5330, 80, 0, 20, 0,
+ NL80211_RRF_DFS | 0),
+ REG_RULE_EXT(5735, 5835, 80, 0, 20, 0, 0),
+ },
+ .n_reg_rules = 4
+};
+
+static const struct ieee80211_regdomain regdom_BL = {
+ .alpha2 = "BL",
+ .dfs_region = NL80211_DFS_ETSI,
+ .reg_rules = {
+ REG_RULE_EXT(2402, 2482, 40, 0, 20, 0, 0),
+ REG_RULE_EXT(5170, 5250, 80, 0, 20, 0,
+ NL80211_RRF_AUTO_BW | 0),
+ REG_RULE_EXT(5250, 5330, 80, 0, 20, 0,
+ NL80211_RRF_DFS |
+ NL80211_RRF_AUTO_BW | 0),
+ REG_RULE_EXT(5490, 5710, 160, 0, 27, 0,
+ NL80211_RRF_DFS | 0),
+ },
+ .n_reg_rules = 4
+};
+
+static const struct ieee80211_regdomain regdom_BM = {
+ .alpha2 = "BM",
+ .dfs_region = NL80211_DFS_FCC,
+ .reg_rules = {
+ REG_RULE_EXT(2402, 2472, 40, 0, 30, 0, 0),
+ REG_RULE_EXT(5170, 5250, 80, 0, 24, 0,
+ NL80211_RRF_AUTO_BW | 0),
+ REG_RULE_EXT(5250, 5330, 80, 0, 24, 0,
+ NL80211_RRF_DFS |
+ NL80211_RRF_AUTO_BW | 0),
+ REG_RULE_EXT(5490, 5730, 160, 0, 24, 0,
+ NL80211_RRF_DFS | 0),
+ REG_RULE_EXT(5735, 5835, 80, 0, 30, 0, 0),
+ },
+ .n_reg_rules = 5
+};
+
+static const struct ieee80211_regdomain regdom_BN = {
+ .alpha2 = "BN",
+ .dfs_region = NL80211_DFS_JP,
+ .reg_rules = {
+ REG_RULE_EXT(2402, 2482, 40, 0, 20, 0, 0),
+ REG_RULE_EXT(5170, 5250, 80, 0, 20, 0,
+ NL80211_RRF_AUTO_BW | 0),
+ REG_RULE_EXT(5250, 5330, 80, 0, 20, 0,
+ NL80211_RRF_DFS |
+ NL80211_RRF_AUTO_BW | 0),
+ REG_RULE_EXT(5735, 5835, 80, 0, 20, 0, 0),
+ },
+ .n_reg_rules = 4
+};
+
+static const struct ieee80211_regdomain regdom_BO = {
+ .alpha2 = "BO",
+ .dfs_region = NL80211_DFS_JP,
+ .reg_rules = {
+ REG_RULE_EXT(2402, 2482, 40, 0, 20, 0, 0),
+ REG_RULE_EXT(5250, 5330, 80, 0, 30, 0,
+ NL80211_RRF_DFS | 0),
+ REG_RULE_EXT(5735, 5835, 80, 0, 30, 0, 0),
+ },
+ .n_reg_rules = 3
+};
+
+static const struct ieee80211_regdomain regdom_BR = {
+ .alpha2 = "BR",
+ .dfs_region = NL80211_DFS_FCC,
+ .reg_rules = {
+ REG_RULE_EXT(2402, 2482, 40, 0, 20, 0, 0),
+ REG_RULE_EXT(5170, 5250, 80, 0, 17, 0,
+ NL80211_RRF_AUTO_BW | 0),
+ REG_RULE_EXT(5250, 5330, 80, 0, 24, 0,
+ NL80211_RRF_DFS |
+ NL80211_RRF_AUTO_BW | 0),
+ REG_RULE_EXT(5490, 5730, 160, 0, 24, 0,
+ NL80211_RRF_DFS | 0),
+ REG_RULE_EXT(5735, 5835, 80, 0, 30, 0, 0),
+ },
+ .n_reg_rules = 5
+};
+
+static const struct ieee80211_regdomain regdom_BS = {
+ .alpha2 = "BS",
+ .dfs_region = NL80211_DFS_FCC,
+ .reg_rules = {
+ REG_RULE_EXT(2402, 2482, 40, 0, 20, 0, 0),
+ REG_RULE_EXT(5170, 5250, 80, 0, 24, 0,
+ NL80211_RRF_AUTO_BW | 0),
+ REG_RULE_EXT(5250, 5330, 80, 0, 24, 0,
+ NL80211_RRF_DFS |
+ NL80211_RRF_AUTO_BW | 0),
+ REG_RULE_EXT(5490, 5730, 160, 0, 24, 0,
+ NL80211_RRF_DFS | 0),
+ REG_RULE_EXT(5735, 5835, 80, 0, 30, 0, 0),
+ },
+ .n_reg_rules = 5
+};
+
+static const struct ieee80211_regdomain regdom_BT = {
+ .alpha2 = "BT",
+ .dfs_region = NL80211_DFS_ETSI,
+ .reg_rules = {
+ REG_RULE_EXT(2402, 2482, 40, 0, 20, 0, 0),
+ REG_RULE_EXT(5170, 5250, 80, 0, 20, 0,
+ NL80211_RRF_AUTO_BW | 0),
+ REG_RULE_EXT(5250, 5330, 80, 0, 20, 0,
+ NL80211_RRF_DFS |
+ NL80211_RRF_AUTO_BW | 0),
+ REG_RULE_EXT(5490, 5710, 160, 0, 27, 0,
+ NL80211_RRF_DFS | 0),
+ },
+ .n_reg_rules = 4
+};
+
+static const struct ieee80211_regdomain regdom_BY = {
+ .alpha2 = "BY",
+ .dfs_region = NL80211_DFS_ETSI,
+ .reg_rules = {
+ REG_RULE_EXT(2402, 2482, 40, 0, 20, 0, 0),
+ REG_RULE_EXT(5170, 5250, 80, 0, 20, 0,
+ NL80211_RRF_AUTO_BW | 0),
+ REG_RULE_EXT(5250, 5330, 80, 0, 20, 0,
+ NL80211_RRF_DFS |
+ NL80211_RRF_AUTO_BW | 0),
+ REG_RULE_EXT(5490, 5710, 160, 0, 27, 0,
+ NL80211_RRF_DFS | 0),
+ },
+ .n_reg_rules = 4
+};
+
+static const struct ieee80211_regdomain regdom_BZ = {
+ .alpha2 = "BZ",
+ .dfs_region = NL80211_DFS_JP,
+ .reg_rules = {
+ REG_RULE_EXT(2402, 2482, 40, 0, 30, 0, 0),
+ REG_RULE_EXT(5735, 5835, 80, 0, 30, 0, 0),
+ },
+ .n_reg_rules = 2
+};
+
+static const struct ieee80211_regdomain regdom_CA = {
+ .alpha2 = "CA",
+ .dfs_region = NL80211_DFS_FCC,
+ .reg_rules = {
+ REG_RULE_EXT(2402, 2472, 40, 0, 30, 0, 0),
+ REG_RULE_EXT(5170, 5250, 80, 0, 17, 0,
+ NL80211_RRF_AUTO_BW | 0),
+ REG_RULE_EXT(5250, 5330, 80, 0, 24, 0,
+ NL80211_RRF_DFS |
+ NL80211_RRF_AUTO_BW | 0),
+ REG_RULE_EXT(5490, 5730, 160, 0, 24, 0,
+ NL80211_RRF_DFS | 0),
+ REG_RULE_EXT(5735, 5835, 80, 0, 30, 0, 0),
+ },
+ .n_reg_rules = 5
+};
+
+static const struct ieee80211_regdomain regdom_CF = {
+ .alpha2 = "CF",
+ .dfs_region = NL80211_DFS_FCC,
+ .reg_rules = {
+ REG_RULE_EXT(2402, 2482, 40, 0, 20, 0, 0),
+ REG_RULE_EXT(5170, 5250, 40, 0, 17, 0, 0),
+ REG_RULE_EXT(5250, 5330, 40, 0, 24, 0,
+ NL80211_RRF_DFS | 0),
+ REG_RULE_EXT(5490, 5730, 40, 0, 24, 0,
+ NL80211_RRF_DFS | 0),
+ REG_RULE_EXT(5735, 5835, 40, 0, 30, 0, 0),
+ },
+ .n_reg_rules = 5
+};
+
+static const struct ieee80211_regdomain regdom_CH = {
+ .alpha2 = "CH",
+ .dfs_region = NL80211_DFS_ETSI,
+ .reg_rules = {
+ REG_RULE_EXT(2402, 2482, 40, 0, 20, 0, 0),
+ REG_RULE_EXT(5170, 5250, 80, 0, 20, 0,
+ NL80211_RRF_AUTO_BW | 0),
+ REG_RULE_EXT(5250, 5330, 80, 0, 20, 0,
+ NL80211_RRF_DFS |
+ NL80211_RRF_AUTO_BW | 0),
+ REG_RULE_EXT(5490, 5710, 160, 0, 27, 0,
+ NL80211_RRF_DFS | 0),
+ REG_RULE_EXT(57000, 66000, 2160, 0, 40, 0, 0),
+ },
+ .n_reg_rules = 5
+};
+
+static const struct ieee80211_regdomain regdom_CI = {
+ .alpha2 = "CI",
+ .dfs_region = NL80211_DFS_FCC,
+ .reg_rules = {
+ REG_RULE_EXT(2402, 2482, 40, 0, 20, 0, 0),
+ REG_RULE_EXT(5170, 5250, 80, 0, 17, 0,
+ NL80211_RRF_AUTO_BW | 0),
+ REG_RULE_EXT(5250, 5330, 80, 0, 24, 0,
+ NL80211_RRF_DFS |
+ NL80211_RRF_AUTO_BW | 0),
+ REG_RULE_EXT(5490, 5730, 160, 0, 24, 0,
+ NL80211_RRF_DFS | 0),
+ REG_RULE_EXT(5735, 5835, 80, 0, 30, 0, 0),
+ },
+ .n_reg_rules = 5
+};
+
+static const struct ieee80211_regdomain regdom_CL = {
+ .alpha2 = "CL",
+ .dfs_region = NL80211_DFS_JP,
+ .reg_rules = {
+ REG_RULE_EXT(2402, 2482, 40, 0, 20, 0, 0),
+ REG_RULE_EXT(5170, 5250, 80, 0, 20, 0,
+ NL80211_RRF_AUTO_BW | 0),
+ REG_RULE_EXT(5250, 5330, 80, 0, 20, 0,
+ NL80211_RRF_DFS |
+ NL80211_RRF_AUTO_BW | 0),
+ REG_RULE_EXT(5735, 5835, 80, 0, 20, 0, 0),
+ },
+ .n_reg_rules = 4
+};
+
+static const struct ieee80211_regdomain regdom_CN = {
+ .alpha2 = "CN",
+ .dfs_region = NL80211_DFS_FCC,
+ .reg_rules = {
+ REG_RULE_EXT(2402, 2482, 40, 0, 20, 0, 0),
+ REG_RULE_EXT(5170, 5250, 80, 0, 23, 0,
+ NL80211_RRF_AUTO_BW | 0),
+ REG_RULE_EXT(5250, 5330, 80, 0, 23, 0,
+ NL80211_RRF_DFS |
+ NL80211_RRF_AUTO_BW | 0),
+ REG_RULE_EXT(5735, 5835, 80, 0, 30, 0, 0),
+ REG_RULE_EXT(57240, 59400, 2160, 0, 28, 0, 0),
+ REG_RULE_EXT(59400, 63720, 2160, 0, 44, 0, 0),
+ REG_RULE_EXT(63720, 65880, 2160, 0, 28, 0, 0),
+ },
+ .n_reg_rules = 7
+};
+
+static const struct ieee80211_regdomain regdom_CO = {
+ .alpha2 = "CO",
+ .dfs_region = NL80211_DFS_FCC,
+ .reg_rules = {
+ REG_RULE_EXT(2402, 2482, 40, 0, 20, 0, 0),
+ REG_RULE_EXT(5170, 5250, 80, 0, 17, 0,
+ NL80211_RRF_AUTO_BW | 0),
+ REG_RULE_EXT(5250, 5330, 80, 0, 24, 0,
+ NL80211_RRF_DFS |
+ NL80211_RRF_AUTO_BW | 0),
+ REG_RULE_EXT(5490, 5730, 160, 0, 24, 0,
+ NL80211_RRF_DFS | 0),
+ REG_RULE_EXT(5735, 5835, 80, 0, 30, 0, 0),
+ },
+ .n_reg_rules = 5
+};
+
+static const struct ieee80211_regdomain regdom_CR = {
+ .alpha2 = "CR",
+ .dfs_region = NL80211_DFS_FCC,
+ .reg_rules = {
+ REG_RULE_EXT(2402, 2482, 40, 0, 20, 0, 0),
+ REG_RULE_EXT(5170, 5250, 80, 0, 17, 0, 0),
+ REG_RULE_EXT(5250, 5330, 80, 0, 24, 0,
+ NL80211_RRF_DFS | 0),
+ REG_RULE_EXT(5490, 5730, 80, 0, 24, 0,
+ NL80211_RRF_DFS | 0),
+ REG_RULE_EXT(5735, 5835, 80, 0, 30, 0, 0),
+ },
+ .n_reg_rules = 5
+};
+
+static const struct ieee80211_regdomain regdom_CX = {
+ .alpha2 = "CX",
+ .dfs_region = NL80211_DFS_FCC,
+ .reg_rules = {
+ REG_RULE_EXT(2402, 2482, 40, 0, 20, 0, 0),
+ REG_RULE_EXT(5170, 5250, 80, 0, 24, 0,
+ NL80211_RRF_AUTO_BW | 0),
+ REG_RULE_EXT(5250, 5330, 80, 0, 24, 0,
+ NL80211_RRF_DFS |
+ NL80211_RRF_AUTO_BW | 0),
+ REG_RULE_EXT(5490, 5730, 160, 0, 24, 0,
+ NL80211_RRF_DFS | 0),
+ REG_RULE_EXT(5735, 5835, 80, 0, 30, 0, 0),
+ },
+ .n_reg_rules = 5
+};
+
+static const struct ieee80211_regdomain regdom_CY = {
+ .alpha2 = "CY",
+ .dfs_region = NL80211_DFS_ETSI,
+ .reg_rules = {
+ REG_RULE_EXT(2402, 2482, 40, 0, 20, 0, 0),
+ REG_RULE_EXT(5170, 5250, 80, 0, 20, 0,
+ NL80211_RRF_AUTO_BW | 0),
+ REG_RULE_EXT(5250, 5330, 80, 0, 20, 0,
+ NL80211_RRF_DFS |
+ NL80211_RRF_AUTO_BW | 0),
+ REG_RULE_EXT(5490, 5710, 160, 0, 27, 0,
+ NL80211_RRF_DFS | 0),
+ REG_RULE_EXT(57000, 66000, 2160, 0, 40, 0, 0),
+ },
+ .n_reg_rules = 5
+};
+
+static const struct ieee80211_regdomain regdom_CZ = {
+ .alpha2 = "CZ",
+ .dfs_region = NL80211_DFS_ETSI,
+ .reg_rules = {
+ REG_RULE_EXT(2400, 2483, 40, 0, 20, 0, 0),
+ REG_RULE_EXT(5150, 5250, 80, 0, 23, 0,
+ NL80211_RRF_NO_OUTDOOR |
+ NL80211_RRF_AUTO_BW | 0),
+ REG_RULE_EXT(5250, 5350, 80, 0, 20, 0,
+ NL80211_RRF_NO_OUTDOOR |
+ NL80211_RRF_DFS |
+ NL80211_RRF_AUTO_BW | 0),
+ REG_RULE_EXT(5470, 5725, 160, 0, 27, 0,
+ NL80211_RRF_DFS | 0),
+ REG_RULE_EXT(57000, 66000, 2160, 0, 40, 0, 0),
+ },
+ .n_reg_rules = 5
+};
+
+static const struct ieee80211_regdomain regdom_DE = {
+ .alpha2 = "DE",
+ .dfs_region = NL80211_DFS_ETSI,
+ .reg_rules = {
+ REG_RULE_EXT(2400, 2483, 40, 0, 20, 0, 0),
+ REG_RULE_EXT(5150, 5250, 80, 0, 20, 0,
+ NL80211_RRF_NO_OUTDOOR |
+ NL80211_RRF_AUTO_BW | 0),
+ REG_RULE_EXT(5250, 5350, 80, 0, 20, 0,
+ NL80211_RRF_NO_OUTDOOR |
+ NL80211_RRF_DFS |
+ NL80211_RRF_AUTO_BW | 0),
+ REG_RULE_EXT(5470, 5695, 160, 0, 27, 0,
+ NL80211_RRF_DFS | 0),
+ /*REG_RULE_EXT(5470, 5725, 160, 0, 27, 0,
+ NL80211_RRF_DFS | 0),*/
+ REG_RULE_EXT(57000, 66000, 2160, 0, 40, 0, 0),
+ },
+ .n_reg_rules = 5
+};
+
+static const struct ieee80211_regdomain regdom_DK = {
+ .alpha2 = "DK",
+ .dfs_region = NL80211_DFS_ETSI,
+ .reg_rules = {
+ REG_RULE_EXT(2402, 2482, 40, 0, 20, 0, 0),
+ REG_RULE_EXT(5170, 5250, 80, 0, 20, 0,
+ NL80211_RRF_AUTO_BW | 0),
+ REG_RULE_EXT(5250, 5330, 80, 0, 20, 0,
+ NL80211_RRF_DFS |
+ NL80211_RRF_AUTO_BW | 0),
+ REG_RULE_EXT(5490, 5710, 160, 0, 27, 0,
+ NL80211_RRF_DFS | 0),
+ REG_RULE_EXT(57000, 66000, 2160, 0, 40, 0, 0),
+ },
+ .n_reg_rules = 5
+};
+
+static const struct ieee80211_regdomain regdom_DM = {
+ .alpha2 = "DM",
+ .dfs_region = NL80211_DFS_FCC,
+ .reg_rules = {
+ REG_RULE_EXT(2402, 2472, 40, 0, 30, 0, 0),
+ REG_RULE_EXT(5170, 5250, 80, 0, 17, 0,
+ NL80211_RRF_AUTO_BW | 0),
+ REG_RULE_EXT(5250, 5330, 80, 0, 23, 0,
+ NL80211_RRF_DFS |
+ NL80211_RRF_AUTO_BW | 0),
+ REG_RULE_EXT(5735, 5835, 80, 0, 30, 0, 0),
+ },
+ .n_reg_rules = 4
+};
+
+static const struct ieee80211_regdomain regdom_DO = {
+ .alpha2 = "DO",
+ .dfs_region = NL80211_DFS_FCC,
+ .reg_rules = {
+ REG_RULE_EXT(2402, 2472, 40, 0, 30, 0, 0),
+ REG_RULE_EXT(5170, 5250, 80, 0, 17, 0,
+ NL80211_RRF_AUTO_BW | 0),
+ REG_RULE_EXT(5250, 5330, 80, 0, 23, 0,
+ NL80211_RRF_DFS |
+ NL80211_RRF_AUTO_BW | 0),
+ REG_RULE_EXT(5735, 5835, 80, 0, 30, 0, 0),
+ },
+ .n_reg_rules = 4
+};
+
+static const struct ieee80211_regdomain regdom_DZ = {
+ .alpha2 = "DZ",
+ .dfs_region = NL80211_DFS_JP,
+ .reg_rules = {
+ REG_RULE_EXT(2402, 2482, 40, 0, 20, 0, 0),
+ REG_RULE_EXT(5170, 5250, 80, 0, 23, 0,
+ NL80211_RRF_AUTO_BW | 0),
+ REG_RULE_EXT(5250, 5330, 80, 0, 23, 0,
+ NL80211_RRF_DFS |
+ NL80211_RRF_AUTO_BW | 0),
+ REG_RULE_EXT(5490, 5670, 160, 0, 23, 0,
+ NL80211_RRF_DFS | 0),
+ },
+ .n_reg_rules = 4
+};
+
+static const struct ieee80211_regdomain regdom_EC = {
+ .alpha2 = "EC",
+ .dfs_region = NL80211_DFS_FCC,
+ .reg_rules = {
+ REG_RULE_EXT(2402, 2482, 40, 0, 20, 0, 0),
+ REG_RULE_EXT(5170, 5250, 80, 0, 17, 0, 0),
+ REG_RULE_EXT(5250, 5330, 80, 0, 24, 0,
+ NL80211_RRF_DFS | 0),
+ REG_RULE_EXT(5490, 5730, 80, 0, 24, 0,
+ NL80211_RRF_DFS | 0),
+ REG_RULE_EXT(5735, 5835, 80, 0, 30, 0, 0),
+ },
+ .n_reg_rules = 5
+};
+
+static const struct ieee80211_regdomain regdom_EE = {
+ .alpha2 = "EE",
+ .dfs_region = NL80211_DFS_ETSI,
+ .reg_rules = {
+ REG_RULE_EXT(2402, 2482, 40, 0, 20, 0, 0),
+ REG_RULE_EXT(5170, 5250, 80, 0, 20, 0,
+ NL80211_RRF_AUTO_BW | 0),
+ REG_RULE_EXT(5250, 5330, 80, 0, 20, 0,
+ NL80211_RRF_DFS |
+ NL80211_RRF_AUTO_BW | 0),
+ REG_RULE_EXT(5490, 5710, 160, 0, 27, 0,
+ NL80211_RRF_DFS | 0),
+ REG_RULE_EXT(57000, 66000, 2160, 0, 40, 0, 0),
+ },
+ .n_reg_rules = 5
+};
+
+static const struct ieee80211_regdomain regdom_EG = {
+ .alpha2 = "EG",
+ .dfs_region = NL80211_DFS_ETSI,
+ .reg_rules = {
+ REG_RULE_EXT(2402, 2482, 40, 0, 20, 0, 0),
+ REG_RULE_EXT(5170, 5250, 80, 0, 20, 0, 0),
+ REG_RULE_EXT(5250, 5330, 80, 0, 20, 0,
+ NL80211_RRF_DFS | 0),
+ },
+ .n_reg_rules = 3
+};
+
+static const struct ieee80211_regdomain regdom_ES = {
+ .alpha2 = "ES",
+ .dfs_region = NL80211_DFS_ETSI,
+ .reg_rules = {
+ REG_RULE_EXT(2400, 2483, 40, 0, 20, 0, 0),
+ REG_RULE_EXT(5150, 5250, 80, 0, 23, 0,
+ NL80211_RRF_NO_OUTDOOR |
+ NL80211_RRF_AUTO_BW | 0),
+ REG_RULE_EXT(5250, 5350, 80, 0, 20, 0,
+ NL80211_RRF_NO_OUTDOOR |
+ NL80211_RRF_DFS |
+ NL80211_RRF_AUTO_BW | 0),
+ REG_RULE_EXT(5470, 5725, 160, 0, 27, 0,
+ NL80211_RRF_DFS | 0),
+ REG_RULE_EXT(57000, 66000, 2160, 0, 40, 0, 0),
+ },
+ .n_reg_rules = 5
+};
+
+static const struct ieee80211_regdomain regdom_ET = {
+ .alpha2 = "ET",
+ .dfs_region = NL80211_DFS_ETSI,
+ .reg_rules = {
+ REG_RULE_EXT(2402, 2482, 40, 0, 20, 0, 0),
+ REG_RULE_EXT(5170, 5250, 80, 0, 20, 0,
+ NL80211_RRF_AUTO_BW | 0),
+ REG_RULE_EXT(5250, 5330, 80, 0, 20, 0,
+ NL80211_RRF_DFS |
+ NL80211_RRF_AUTO_BW | 0),
+ REG_RULE_EXT(5490, 5710, 160, 0, 27, 0,
+ NL80211_RRF_DFS | 0),
+ },
+ .n_reg_rules = 4
+};
+
+static const struct ieee80211_regdomain regdom_FI = {
+ .alpha2 = "FI",
+ .dfs_region = NL80211_DFS_ETSI,
+ .reg_rules = {
+ REG_RULE_EXT(2402, 2482, 40, 0, 20, 0, 0),
+ REG_RULE_EXT(5170, 5250, 80, 0, 20, 0,
+ NL80211_RRF_AUTO_BW | 0),
+ REG_RULE_EXT(5250, 5330, 80, 0, 20, 0,
+ NL80211_RRF_DFS |
+ NL80211_RRF_AUTO_BW | 0),
+ REG_RULE_EXT(5490, 5710, 160, 0, 27, 0,
+ NL80211_RRF_DFS | 0),
+ REG_RULE_EXT(57000, 66000, 2160, 0, 40, 0, 0),
+ },
+ .n_reg_rules = 5
+};
+
+static const struct ieee80211_regdomain regdom_FM = {
+ .alpha2 = "FM",
+ .dfs_region = NL80211_DFS_FCC,
+ .reg_rules = {
+ REG_RULE_EXT(2402, 2472, 40, 0, 30, 0, 0),
+ REG_RULE_EXT(5170, 5250, 80, 0, 24, 0,
+ NL80211_RRF_AUTO_BW | 0),
+ REG_RULE_EXT(5250, 5330, 80, 0, 24, 0,
+ NL80211_RRF_DFS |
+ NL80211_RRF_AUTO_BW | 0),
+ REG_RULE_EXT(5490, 5730, 160, 0, 24, 0,
+ NL80211_RRF_DFS | 0),
+ REG_RULE_EXT(5735, 5835, 80, 0, 30, 0, 0),
+ },
+ .n_reg_rules = 5
+};
+
+static const struct ieee80211_regdomain regdom_FR = {
+ .alpha2 = "FR",
+ .dfs_region = NL80211_DFS_ETSI,
+ .reg_rules = {
+ REG_RULE_EXT(2402, 2482, 40, 0, 20, 0, 0),
+ REG_RULE_EXT(5170, 5250, 80, 0, 20, 0,
+ NL80211_RRF_AUTO_BW | 0),
+ REG_RULE_EXT(5250, 5330, 80, 0, 20, 0,
+ NL80211_RRF_DFS |
+ NL80211_RRF_AUTO_BW | 0),
+ REG_RULE_EXT(5490, 5695, 160, 0, 27, 0,
+ NL80211_RRF_DFS | 0),
+ REG_RULE_EXT(57000, 66000, 2160, 0, 40, 0, 0),
+ },
+ .n_reg_rules = 5
+};
+
+static const struct ieee80211_regdomain regdom_GB = {
+ .alpha2 = "GB",
+ .dfs_region = NL80211_DFS_ETSI,
+ .reg_rules = {
+ REG_RULE_EXT(2402, 2482, 40, 0, 20, 0, 0),
+ REG_RULE_EXT(5170, 5250, 80, 0, 20, 0,
+ NL80211_RRF_AUTO_BW | 0),
+ REG_RULE_EXT(5250, 5330, 80, 0, 20, 0,
+ NL80211_RRF_DFS |
+ NL80211_RRF_AUTO_BW | 0),
+ REG_RULE_EXT(5490, 5710, 160, 0, 27, 0,
+ NL80211_RRF_DFS | 0),
+ REG_RULE_EXT(57000, 66000, 2160, 0, 40, 0, 0),
+ },
+ .n_reg_rules = 5
+};
+
+static const struct ieee80211_regdomain regdom_GD = {
+ .alpha2 = "GD",
+ .dfs_region = NL80211_DFS_FCC,
+ .reg_rules = {
+ REG_RULE_EXT(2402, 2472, 40, 0, 30, 0, 0),
+ REG_RULE_EXT(5170, 5250, 80, 0, 17, 0,
+ NL80211_RRF_AUTO_BW | 0),
+ REG_RULE_EXT(5250, 5330, 80, 0, 24, 0,
+ NL80211_RRF_DFS |
+ NL80211_RRF_AUTO_BW | 0),
+ REG_RULE_EXT(5490, 5730, 160, 0, 24, 0,
+ NL80211_RRF_DFS | 0),
+ REG_RULE_EXT(5735, 5835, 80, 0, 30, 0, 0),
+ },
+ .n_reg_rules = 5
+};
+
+static const struct ieee80211_regdomain regdom_GE = {
+ .alpha2 = "GE",
+ .dfs_region = NL80211_DFS_ETSI,
+ .reg_rules = {
+ REG_RULE_EXT(2402, 2482, 40, 0, 20, 0, 0),
+ REG_RULE_EXT(5170, 5250, 80, 0, 18, 0,
+ NL80211_RRF_AUTO_BW | 0),
+ REG_RULE_EXT(5250, 5330, 80, 0, 18, 0,
+ NL80211_RRF_DFS |
+ NL80211_RRF_AUTO_BW | 0),
+ REG_RULE_EXT(57000, 66000, 2160, 0, 40, 0, 0),
+ },
+ .n_reg_rules = 4
+};
+
+static const struct ieee80211_regdomain regdom_GF = {
+ .alpha2 = "GF",
+ .dfs_region = NL80211_DFS_ETSI,
+ .reg_rules = {
+ REG_RULE_EXT(2402, 2482, 40, 0, 20, 0, 0),
+ REG_RULE_EXT(5170, 5250, 80, 0, 20, 0,
+ NL80211_RRF_AUTO_BW | 0),
+ REG_RULE_EXT(5250, 5330, 80, 0, 20, 0,
+ NL80211_RRF_DFS |
+ NL80211_RRF_AUTO_BW | 0),
+ REG_RULE_EXT(5490, 5710, 160, 0, 27, 0,
+ NL80211_RRF_DFS | 0),
+ },
+ .n_reg_rules = 4
+};
+
+static const struct ieee80211_regdomain regdom_GH = {
+ .alpha2 = "GH",
+ .dfs_region = NL80211_DFS_FCC,
+ .reg_rules = {
+ REG_RULE_EXT(2402, 2482, 40, 0, 20, 0, 0),
+ REG_RULE_EXT(5170, 5250, 80, 0, 17, 0,
+ NL80211_RRF_AUTO_BW | 0),
+ REG_RULE_EXT(5250, 5330, 80, 0, 24, 0,
+ NL80211_RRF_DFS |
+ NL80211_RRF_AUTO_BW | 0),
+ REG_RULE_EXT(5490, 5730, 160, 0, 24, 0,
+ NL80211_RRF_DFS | 0),
+ REG_RULE_EXT(5735, 5835, 80, 0, 30, 0, 0),
+ },
+ .n_reg_rules = 5
+};
+
+static const struct ieee80211_regdomain regdom_GL = {
+ .alpha2 = "GL",
+ .dfs_region = NL80211_DFS_ETSI,
+ .reg_rules = {
+ REG_RULE_EXT(2402, 2482, 40, 0, 20, 0, 0),
+ REG_RULE_EXT(5170, 5250, 80, 0, 20, 0, 0),
+ REG_RULE_EXT(5250, 5330, 80, 0, 20, 0,
+ NL80211_RRF_DFS | 0),
+ REG_RULE_EXT(5490, 5710, 80, 0, 27, 0,
+ NL80211_RRF_DFS | 0),
+ },
+ .n_reg_rules = 4
+};
+
+static const struct ieee80211_regdomain regdom_GP = {
+ .alpha2 = "GP",
+ .dfs_region = NL80211_DFS_ETSI,
+ .reg_rules = {
+ REG_RULE_EXT(2402, 2482, 40, 0, 20, 0, 0),
+ REG_RULE_EXT(5170, 5250, 80, 0, 20, 0,
+ NL80211_RRF_AUTO_BW | 0),
+ REG_RULE_EXT(5250, 5330, 80, 0, 20, 0,
+ NL80211_RRF_DFS |
+ NL80211_RRF_AUTO_BW | 0),
+ REG_RULE_EXT(5490, 5710, 160, 0, 27, 0,
+ NL80211_RRF_DFS | 0),
+ },
+ .n_reg_rules = 4
+};
+
+static const struct ieee80211_regdomain regdom_GR = {
+ .alpha2 = "GR",
+ .dfs_region = NL80211_DFS_ETSI,
+ .reg_rules = {
+ REG_RULE_EXT(2402, 2482, 40, 0, 20, 0, 0),
+ REG_RULE_EXT(5170, 5250, 80, 0, 20, 0,
+ NL80211_RRF_AUTO_BW | 0),
+ REG_RULE_EXT(5250, 5330, 80, 0, 20, 0,
+ NL80211_RRF_DFS |
+ NL80211_RRF_AUTO_BW | 0),
+ REG_RULE_EXT(5490, 5710, 160, 0, 27, 0,
+ NL80211_RRF_DFS | 0),
+ REG_RULE_EXT(57000, 66000, 2160, 0, 40, 0, 0),
+ },
+ .n_reg_rules = 5
+};
+
+static const struct ieee80211_regdomain regdom_GT = {
+ .alpha2 = "GT",
+ .dfs_region = NL80211_DFS_FCC,
+ .reg_rules = {
+ REG_RULE_EXT(2402, 2472, 40, 0, 30, 0, 0),
+ REG_RULE_EXT(5170, 5250, 80, 0, 17, 0,
+ NL80211_RRF_AUTO_BW | 0),
+ REG_RULE_EXT(5250, 5330, 80, 0, 23, 0,
+ NL80211_RRF_DFS |
+ NL80211_RRF_AUTO_BW | 0),
+ REG_RULE_EXT(5735, 5835, 80, 0, 30, 0, 0),
+ },
+ .n_reg_rules = 4
+};
+
+static const struct ieee80211_regdomain regdom_GU = {
+ .alpha2 = "GU",
+ .dfs_region = NL80211_DFS_FCC,
+ .reg_rules = {
+ REG_RULE_EXT(2402, 2472, 40, 0, 30, 0, 0),
+ REG_RULE_EXT(5170, 5250, 80, 0, 17, 0, 0),
+ REG_RULE_EXT(5250, 5330, 80, 0, 24, 0,
+ NL80211_RRF_DFS | 0),
+ REG_RULE_EXT(5490, 5730, 80, 0, 24, 0,
+ NL80211_RRF_DFS | 0),
+ REG_RULE_EXT(5735, 5835, 80, 0, 30, 0, 0),
+ },
+ .n_reg_rules = 5
+};
+
+static const struct ieee80211_regdomain regdom_GY = {
+ .alpha2 = "GY",
+ .reg_rules = {
+ REG_RULE_EXT(2402, 2482, 40, 0, 30, 0, 0),
+ REG_RULE_EXT(5735, 5835, 80, 0, 30, 0, 0),
+ },
+ .n_reg_rules = 2
+};
+
+static const struct ieee80211_regdomain regdom_HK = {
+ .alpha2 = "HK",
+ .reg_rules = {
+ REG_RULE_EXT(2402, 2482, 40, 0, 20, 0, 0),
+ REG_RULE_EXT(5170, 5250, 80, 0, 17, 0,
+ NL80211_RRF_AUTO_BW | 0),
+ REG_RULE_EXT(5250, 5330, 80, 0, 24, 0,
+ NL80211_RRF_DFS |
+ NL80211_RRF_AUTO_BW | 0),
+ REG_RULE_EXT(5490, 5710, 160, 0, 24, 0,
+ NL80211_RRF_DFS | 0),
+ REG_RULE_EXT(5735, 5835, 80, 0, 30, 0, 0),
+ },
+ .n_reg_rules = 5
+};
+
+static const struct ieee80211_regdomain regdom_HN = {
+ .alpha2 = "HN",
+ .dfs_region = NL80211_DFS_FCC,
+ .reg_rules = {
+ REG_RULE_EXT(2402, 2482, 40, 0, 20, 0, 0),
+ REG_RULE_EXT(5170, 5250, 80, 0, 17, 0,
+ NL80211_RRF_AUTO_BW | 0),
+ REG_RULE_EXT(5250, 5330, 80, 0, 24, 0,
+ NL80211_RRF_DFS |
+ NL80211_RRF_AUTO_BW | 0),
+ REG_RULE_EXT(5490, 5730, 160, 0, 24, 0,
+ NL80211_RRF_DFS | 0),
+ REG_RULE_EXT(5735, 5835, 80, 0, 30, 0, 0),
+ },
+ .n_reg_rules = 5
+};
+
+static const struct ieee80211_regdomain regdom_HR = {
+ .alpha2 = "HR",
+ .dfs_region = NL80211_DFS_ETSI,
+ .reg_rules = {
+ REG_RULE_EXT(2402, 2482, 40, 0, 20, 0, 0),
+ REG_RULE_EXT(5170, 5250, 80, 0, 20, 0,
+ NL80211_RRF_AUTO_BW | 0),
+ REG_RULE_EXT(5250, 5330, 80, 0, 20, 0,
+ NL80211_RRF_DFS |
+ NL80211_RRF_AUTO_BW | 0),
+ REG_RULE_EXT(5490, 5710, 160, 0, 27, 0,
+ NL80211_RRF_DFS | 0),
+ REG_RULE_EXT(57000, 66000, 2160, 0, 40, 0, 0),
+ },
+ .n_reg_rules = 5
+};
+
+static const struct ieee80211_regdomain regdom_HT = {
+ .alpha2 = "HT",
+ .dfs_region = NL80211_DFS_FCC,
+ .reg_rules = {
+ REG_RULE_EXT(2402, 2472, 40, 0, 30, 0, 0),
+ REG_RULE_EXT(5170, 5250, 80, 0, 24, 0,
+ NL80211_RRF_AUTO_BW | 0),
+ REG_RULE_EXT(5250, 5330, 80, 0, 24, 0,
+ NL80211_RRF_DFS |
+ NL80211_RRF_AUTO_BW | 0),
+ REG_RULE_EXT(5490, 5730, 160, 0, 24, 0,
+ NL80211_RRF_DFS | 0),
+ REG_RULE_EXT(5735, 5835, 80, 0, 30, 0, 0),
+ },
+ .n_reg_rules = 5
+};
+
+static const struct ieee80211_regdomain regdom_HU = {
+ .alpha2 = "HU",
+ .dfs_region = NL80211_DFS_ETSI,
+ .reg_rules = {
+ REG_RULE_EXT(2402, 2482, 40, 0, 20, 0, 0),
+ REG_RULE_EXT(5170, 5250, 80, 0, 20, 0,
+ NL80211_RRF_AUTO_BW | 0),
+ REG_RULE_EXT(5250, 5330, 80, 0, 20, 0,
+ NL80211_RRF_DFS |
+ NL80211_RRF_AUTO_BW | 0),
+ REG_RULE_EXT(5490, 5710, 160, 0, 27, 0,
+ NL80211_RRF_DFS | 0),
+ REG_RULE_EXT(57000, 66000, 2160, 0, 40, 0, 0),
+ },
+ .n_reg_rules = 5
+};
+
+static const struct ieee80211_regdomain regdom_ID = {
+ .alpha2 = "ID",
+ .dfs_region = NL80211_DFS_JP,
+ .reg_rules = {
+ REG_RULE_EXT(2402, 2482, 40, 0, 20, 0, 0),
+ REG_RULE_EXT(5735, 5815, 80, 0, 23, 0, 0),
+ },
+ .n_reg_rules = 2
+};
+
+static const struct ieee80211_regdomain regdom_IE = {
+ .alpha2 = "IE",
+ .dfs_region = NL80211_DFS_ETSI,
+ .reg_rules = {
+ REG_RULE_EXT(2402, 2482, 40, 0, 20, 0, 0),
+ REG_RULE_EXT(5170, 5250, 80, 0, 20, 0,
+ NL80211_RRF_AUTO_BW | 0),
+ REG_RULE_EXT(5250, 5330, 80, 0, 20, 0,
+ NL80211_RRF_DFS |
+ NL80211_RRF_AUTO_BW | 0),
+ REG_RULE_EXT(5490, 5710, 160, 0, 27, 0,
+ NL80211_RRF_DFS | 0),
+ REG_RULE_EXT(57000, 66000, 2160, 0, 40, 0, 0),
+ },
+ .n_reg_rules = 5
+};
+
+static const struct ieee80211_regdomain regdom_IL = {
+ .alpha2 = "IL",
+ .dfs_region = NL80211_DFS_ETSI,
+ .reg_rules = {
+ REG_RULE_EXT(2402, 2482, 40, 0, 20, 0, 0),
+ REG_RULE_EXT(5150, 5250, 80, 0, 23, 0,
+ NL80211_RRF_NO_OUTDOOR |
+ NL80211_RRF_AUTO_BW | 0),
+ REG_RULE_EXT(5250, 5350, 80, 0, 23, 0,
+ NL80211_RRF_NO_OUTDOOR |
+ NL80211_RRF_DFS |
+ NL80211_RRF_AUTO_BW | 0),
+ },
+ .n_reg_rules = 3
+};
+
+static const struct ieee80211_regdomain regdom_IN = {
+ .alpha2 = "IN",
+ .dfs_region = NL80211_DFS_JP,
+ .reg_rules = {
+ REG_RULE_EXT(2402, 2482, 40, 0, 20, 0, 0),
+ REG_RULE_EXT(5170, 5250, 80, 0, 20, 0,
+ NL80211_RRF_AUTO_BW | 0),
+ REG_RULE_EXT(5250, 5330, 80, 0, 20, 0,
+ NL80211_RRF_DFS |
+ NL80211_RRF_AUTO_BW | 0),
+ REG_RULE_EXT(5735, 5835, 80, 0, 20, 0, 0),
+ },
+ .n_reg_rules = 4
+};
+
+static const struct ieee80211_regdomain regdom_IR = {
+ .alpha2 = "IR",
+ .dfs_region = NL80211_DFS_JP,
+ .reg_rules = {
+ REG_RULE_EXT(2402, 2482, 40, 0, 20, 0, 0),
+ REG_RULE_EXT(5735, 5835, 80, 0, 30, 0, 0),
+ },
+ .n_reg_rules = 2
+};
+
+static const struct ieee80211_regdomain regdom_IS = {
+ .alpha2 = "IS",
+ .dfs_region = NL80211_DFS_ETSI,
+ .reg_rules = {
+ REG_RULE_EXT(2402, 2482, 40, 0, 20, 0, 0),
+ REG_RULE_EXT(5170, 5250, 80, 0, 20, 0,
+ NL80211_RRF_AUTO_BW | 0),
+ REG_RULE_EXT(5250, 5330, 80, 0, 20, 0,
+ NL80211_RRF_DFS |
+ NL80211_RRF_AUTO_BW | 0),
+ REG_RULE_EXT(5490, 5710, 160, 0, 27, 0,
+ NL80211_RRF_DFS | 0),
+ REG_RULE_EXT(57000, 66000, 2160, 0, 40, 0, 0),
+ },
+ .n_reg_rules = 5
+};
+
+static const struct ieee80211_regdomain regdom_IT = {
+ .alpha2 = "IT",
+ .dfs_region = NL80211_DFS_ETSI,
+ .reg_rules = {
+ REG_RULE_EXT(2402, 2482, 40, 0, 20, 0, 0),
+ REG_RULE_EXT(5170, 5250, 80, 0, 20, 0,
+ NL80211_RRF_AUTO_BW | 0),
+ REG_RULE_EXT(5250, 5330, 80, 0, 20, 0,
+ NL80211_RRF_DFS |
+ NL80211_RRF_AUTO_BW | 0),
+ REG_RULE_EXT(5490, 5710, 160, 0, 27, 0,
+ NL80211_RRF_DFS | 0),
+ REG_RULE_EXT(57000, 66000, 2160, 0, 40, 0, 0),
+ },
+ .n_reg_rules = 5
+};
+
+static const struct ieee80211_regdomain regdom_JM = {
+ .alpha2 = "JM",
+ .dfs_region = NL80211_DFS_FCC,
+ .reg_rules = {
+ REG_RULE_EXT(2402, 2482, 40, 0, 20, 0, 0),
+ REG_RULE_EXT(5170, 5250, 80, 0, 17, 0,
+ NL80211_RRF_AUTO_BW | 0),
+ REG_RULE_EXT(5250, 5330, 80, 0, 24, 0,
+ NL80211_RRF_DFS |
+ NL80211_RRF_AUTO_BW | 0),
+ REG_RULE_EXT(5490, 5730, 160, 0, 24, 0,
+ NL80211_RRF_DFS | 0),
+ REG_RULE_EXT(5735, 5835, 80, 0, 30, 0, 0),
+ },
+ .n_reg_rules = 5
+};
+
+static const struct ieee80211_regdomain regdom_JO = {
+ .alpha2 = "JO",
+ .dfs_region = NL80211_DFS_JP,
+ .reg_rules = {
+ REG_RULE_EXT(2402, 2482, 40, 0, 20, 0, 0),
+ REG_RULE_EXT(5170, 5250, 80, 0, 23, 0, 0),
+ REG_RULE_EXT(5735, 5835, 80, 0, 23, 0, 0),
+ },
+ .n_reg_rules = 3
+};
+
+static const struct ieee80211_regdomain regdom_JP = {
+ .alpha2 = "JP",
+ .dfs_region = NL80211_DFS_JP,
+ .reg_rules = {
+ REG_RULE_EXT(2402, 2482, 40, 0, 20, 0, 0),
+ REG_RULE_EXT(2474, 2494, 20, 0, 20, 0,
+ NL80211_RRF_NO_OFDM | 0),
+ REG_RULE_EXT(4910, 4990, 40, 0, 23, 0, 0),
+ REG_RULE_EXT(5030, 5090, 40, 0, 23, 0, 0),
+ REG_RULE_EXT(5170, 5250, 80, 0, 20, 0,
+ NL80211_RRF_AUTO_BW | 0),
+ REG_RULE_EXT(5250, 5330, 80, 0, 20, 0,
+ NL80211_RRF_DFS |
+ NL80211_RRF_AUTO_BW | 0),
+ REG_RULE_EXT(5490, 5710, 160, 0, 23, 0,
+ NL80211_RRF_DFS | 0),
+ },
+ .n_reg_rules = 7
+};
+
+static const struct ieee80211_regdomain regdom_KE = {
+ .alpha2 = "KE",
+ .dfs_region = NL80211_DFS_JP,
+ .reg_rules = {
+ REG_RULE_EXT(2402, 2482, 40, 0, 20, 0, 0),
+ REG_RULE_EXT(5170, 5250, 80, 0, 23, 0, 0),
+ REG_RULE_EXT(5490, 5570, 80, 0, 30, 0,
+ NL80211_RRF_DFS | 0),
+ REG_RULE_EXT(5735, 5775, 40, 0, 23, 0, 0),
+ },
+ .n_reg_rules = 4
+};
+
+static const struct ieee80211_regdomain regdom_KH = {
+ .alpha2 = "KH",
+ .dfs_region = NL80211_DFS_ETSI,
+ .reg_rules = {
+ REG_RULE_EXT(2402, 2482, 40, 0, 20, 0, 0),
+ REG_RULE_EXT(5170, 5250, 80, 0, 20, 0,
+ NL80211_RRF_AUTO_BW | 0),
+ REG_RULE_EXT(5250, 5330, 80, 0, 20, 0,
+ NL80211_RRF_DFS |
+ NL80211_RRF_AUTO_BW | 0),
+ REG_RULE_EXT(5490, 5710, 160, 0, 27, 0,
+ NL80211_RRF_DFS | 0),
+ },
+ .n_reg_rules = 4
+};
+
+static const struct ieee80211_regdomain regdom_KN = {
+ .alpha2 = "KN",
+ .dfs_region = NL80211_DFS_ETSI,
+ .reg_rules = {
+ REG_RULE_EXT(2402, 2482, 40, 0, 20, 0, 0),
+ REG_RULE_EXT(5170, 5250, 80, 0, 20, 0,
+ NL80211_RRF_AUTO_BW | 0),
+ REG_RULE_EXT(5250, 5330, 80, 0, 20, 0,
+ NL80211_RRF_DFS |
+ NL80211_RRF_AUTO_BW | 0),
+ REG_RULE_EXT(5490, 5710, 160, 0, 30, 0,
+ NL80211_RRF_DFS | 0),
+ REG_RULE_EXT(5735, 5815, 80, 0, 30, 0, 0),
+ },
+ .n_reg_rules = 5
+};
+
+static const struct ieee80211_regdomain regdom_KP = {
+ .alpha2 = "KP",
+ .dfs_region = NL80211_DFS_JP,
+ .reg_rules = {
+ REG_RULE_EXT(2402, 2482, 40, 0, 20, 0, 0),
+ REG_RULE_EXT(5170, 5250, 80, 0, 20, 0,
+ NL80211_RRF_AUTO_BW | 0),
+ REG_RULE_EXT(5250, 5330, 80, 0, 20, 0,
+ NL80211_RRF_DFS |
+ NL80211_RRF_AUTO_BW | 0),
+ REG_RULE_EXT(5490, 5630, 80, 0, 30, 0,
+ NL80211_RRF_DFS | 0),
+ REG_RULE_EXT(5735, 5815, 80, 0, 30, 0, 0),
+ },
+ .n_reg_rules = 5
+};
+
+static const struct ieee80211_regdomain regdom_KR = {
+ .alpha2 = "KR",
+ .dfs_region = NL80211_DFS_JP,
+ .reg_rules = {
+ REG_RULE_EXT(2402, 2482, 40, 0, 20, 0, 0),
+ REG_RULE_EXT(5170, 5250, 80, 0, 20, 0,
+ NL80211_RRF_AUTO_BW | 0),
+ REG_RULE_EXT(5250, 5330, 80, 0, 20, 0,
+ NL80211_RRF_DFS |
+ NL80211_RRF_AUTO_BW | 0),
+ REG_RULE_EXT(5490, 5710, 160, 0, 30, 0,
+ NL80211_RRF_DFS | 0),
+ REG_RULE_EXT(5735, 5835, 80, 0, 30, 0, 0),
+ },
+ .n_reg_rules = 5
+};
+
+static const struct ieee80211_regdomain regdom_KW = {
+ .alpha2 = "KW",
+ .dfs_region = NL80211_DFS_ETSI,
+ .reg_rules = {
+ REG_RULE_EXT(2402, 2482, 40, 0, 20, 0, 0),
+ REG_RULE_EXT(5170, 5250, 80, 0, 20, 0,
+ NL80211_RRF_AUTO_BW | 0),
+ REG_RULE_EXT(5250, 5330, 80, 0, 20, 0,
+ NL80211_RRF_DFS |
+ NL80211_RRF_AUTO_BW | 0),
+ },
+ .n_reg_rules = 3
+};
+
+static const struct ieee80211_regdomain regdom_KY = {
+ .alpha2 = "KY",
+ .dfs_region = NL80211_DFS_FCC,
+ .reg_rules = {
+ REG_RULE_EXT(2402, 2482, 40, 0, 20, 0, 0),
+ REG_RULE_EXT(5170, 5250, 80, 0, 24, 0,
+ NL80211_RRF_AUTO_BW | 0),
+ REG_RULE_EXT(5250, 5330, 80, 0, 24, 0,
+ NL80211_RRF_DFS |
+ NL80211_RRF_AUTO_BW | 0),
+ REG_RULE_EXT(5490, 5730, 160, 0, 24, 0,
+ NL80211_RRF_DFS | 0),
+ REG_RULE_EXT(5735, 5835, 80, 0, 30, 0, 0),
+ },
+ .n_reg_rules = 5
+};
+
+static const struct ieee80211_regdomain regdom_KZ = {
+ .alpha2 = "KZ",
+ .reg_rules = {
+ REG_RULE_EXT(2402, 2482, 40, 0, 20, 0, 0),
+ },
+ .n_reg_rules = 1
+};
+
+static const struct ieee80211_regdomain regdom_LB = {
+ .alpha2 = "LB",
+ .dfs_region = NL80211_DFS_FCC,
+ .reg_rules = {
+ REG_RULE_EXT(2402, 2482, 40, 0, 20, 0, 0),
+ REG_RULE_EXT(5170, 5250, 80, 0, 17, 0,
+ NL80211_RRF_AUTO_BW | 0),
+ REG_RULE_EXT(5250, 5330, 80, 0, 24, 0,
+ NL80211_RRF_DFS |
+ NL80211_RRF_AUTO_BW | 0),
+ REG_RULE_EXT(5490, 5730, 160, 0, 24, 0,
+ NL80211_RRF_DFS | 0),
+ REG_RULE_EXT(5735, 5835, 80, 0, 30, 0, 0),
+ },
+ .n_reg_rules = 5
+};
+
+static const struct ieee80211_regdomain regdom_LC = {
+ .alpha2 = "LC",
+ .dfs_region = NL80211_DFS_ETSI,
+ .reg_rules = {
+ REG_RULE_EXT(2402, 2482, 40, 0, 20, 0, 0),
+ REG_RULE_EXT(5170, 5250, 80, 0, 20, 0,
+ NL80211_RRF_AUTO_BW | 0),
+ REG_RULE_EXT(5250, 5330, 80, 0, 20, 0,
+ NL80211_RRF_DFS |
+ NL80211_RRF_AUTO_BW | 0),
+ REG_RULE_EXT(5490, 5710, 160, 0, 30, 0,
+ NL80211_RRF_DFS | 0),
+ REG_RULE_EXT(5735, 5815, 80, 0, 30, 0, 0),
+ },
+ .n_reg_rules = 5
+};
+
+static const struct ieee80211_regdomain regdom_LI = {
+ .alpha2 = "LI",
+ .dfs_region = NL80211_DFS_ETSI,
+ .reg_rules = {
+ REG_RULE_EXT(2402, 2482, 40, 0, 20, 0, 0),
+ REG_RULE_EXT(5170, 5250, 80, 0, 20, 0,
+ NL80211_RRF_AUTO_BW | 0),
+ REG_RULE_EXT(5250, 5330, 80, 0, 20, 0,
+ NL80211_RRF_DFS |
+ NL80211_RRF_AUTO_BW | 0),
+ REG_RULE_EXT(5490, 5710, 160, 0, 27, 0,
+ NL80211_RRF_DFS | 0),
+ },
+ .n_reg_rules = 4
+};
+
+static const struct ieee80211_regdomain regdom_LK = {
+ .alpha2 = "LK",
+ .dfs_region = NL80211_DFS_FCC,
+ .reg_rules = {
+ REG_RULE_EXT(2402, 2482, 40, 0, 20, 0, 0),
+ REG_RULE_EXT(5170, 5250, 80, 0, 17, 0, 0),
+ REG_RULE_EXT(5250, 5330, 80, 0, 24, 0,
+ NL80211_RRF_DFS | 0),
+ REG_RULE_EXT(5490, 5730, 80, 0, 24, 0,
+ NL80211_RRF_DFS | 0),
+ REG_RULE_EXT(5735, 5835, 80, 0, 30, 0, 0),
+ },
+ .n_reg_rules = 5
+};
+
+static const struct ieee80211_regdomain regdom_LS = {
+ .alpha2 = "LS",
+ .dfs_region = NL80211_DFS_ETSI,
+ .reg_rules = {
+ REG_RULE_EXT(2402, 2482, 40, 0, 20, 0, 0),
+ REG_RULE_EXT(5170, 5250, 80, 0, 20, 0,
+ NL80211_RRF_AUTO_BW | 0),
+ REG_RULE_EXT(5250, 5330, 80, 0, 20, 0,
+ NL80211_RRF_DFS |
+ NL80211_RRF_AUTO_BW | 0),
+ REG_RULE_EXT(5490, 5710, 160, 0, 27, 0,
+ NL80211_RRF_DFS | 0),
+ },
+ .n_reg_rules = 4
+};
+
+static const struct ieee80211_regdomain regdom_LT = {
+ .alpha2 = "LT",
+ .dfs_region = NL80211_DFS_ETSI,
+ .reg_rules = {
+ REG_RULE_EXT(2402, 2482, 40, 0, 20, 0, 0),
+ REG_RULE_EXT(5170, 5250, 80, 0, 20, 0,
+ NL80211_RRF_AUTO_BW | 0),
+ REG_RULE_EXT(5250, 5330, 80, 0, 20, 0,
+ NL80211_RRF_DFS |
+ NL80211_RRF_AUTO_BW | 0),
+ REG_RULE_EXT(5490, 5710, 160, 0, 27, 0,
+ NL80211_RRF_DFS | 0),
+ REG_RULE_EXT(57000, 66000, 2160, 0, 40, 0, 0),
+ },
+ .n_reg_rules = 5
+};
+
+static const struct ieee80211_regdomain regdom_LU = {
+ .alpha2 = "LU",
+ .dfs_region = NL80211_DFS_ETSI,
+ .reg_rules = {
+ REG_RULE_EXT(2402, 2482, 40, 0, 20, 0, 0),
+ REG_RULE_EXT(5170, 5250, 80, 0, 20, 0,
+ NL80211_RRF_AUTO_BW | 0),
+ REG_RULE_EXT(5250, 5330, 80, 0, 20, 0,
+ NL80211_RRF_DFS |
+ NL80211_RRF_AUTO_BW | 0),
+ REG_RULE_EXT(5490, 5710, 160, 0, 27, 0,
+ NL80211_RRF_DFS | 0),
+ REG_RULE_EXT(57000, 66000, 2160, 0, 40, 0, 0),
+ },
+ .n_reg_rules = 5
+};
+
+static const struct ieee80211_regdomain regdom_LV = {
+ .alpha2 = "LV",
+ .dfs_region = NL80211_DFS_ETSI,
+ .reg_rules = {
+ REG_RULE_EXT(2402, 2482, 40, 0, 20, 0, 0),
+ REG_RULE_EXT(5170, 5250, 80, 0, 20, 0,
+ NL80211_RRF_AUTO_BW | 0),
+ REG_RULE_EXT(5250, 5330, 80, 0, 20, 0,
+ NL80211_RRF_DFS |
+ NL80211_RRF_AUTO_BW | 0),
+ REG_RULE_EXT(5490, 5710, 160, 0, 27, 0,
+ NL80211_RRF_DFS | 0),
+ REG_RULE_EXT(57000, 66000, 2160, 0, 40, 0, 0),
+ },
+ .n_reg_rules = 5
+};
+
+static const struct ieee80211_regdomain regdom_MA = {
+ .alpha2 = "MA",
+ .dfs_region = NL80211_DFS_ETSI,
+ .reg_rules = {
+ REG_RULE_EXT(2402, 2482, 40, 0, 20, 0, 0),
+ REG_RULE_EXT(5170, 5250, 80, 0, 20, 0,
+ NL80211_RRF_AUTO_BW | 0),
+ REG_RULE_EXT(5250, 5330, 80, 0, 20, 0,
+ NL80211_RRF_DFS |
+ NL80211_RRF_AUTO_BW | 0),
+ },
+ .n_reg_rules = 3
+};
+
+static const struct ieee80211_regdomain regdom_MC = {
+ .alpha2 = "MC",
+ .dfs_region = NL80211_DFS_ETSI,
+ .reg_rules = {
+ REG_RULE_EXT(2402, 2482, 40, 0, 20, 0, 0),
+ REG_RULE_EXT(5170, 5250, 80, 0, 20, 0,
+ NL80211_RRF_AUTO_BW | 0),
+ REG_RULE_EXT(5250, 5330, 80, 0, 20, 0,
+ NL80211_RRF_DFS |
+ NL80211_RRF_AUTO_BW | 0),
+ REG_RULE_EXT(5490, 5710, 160, 0, 27, 0,
+ NL80211_RRF_DFS | 0),
+ },
+ .n_reg_rules = 4
+};
+
+static const struct ieee80211_regdomain regdom_MD = {
+ .alpha2 = "MD",
+ .dfs_region = NL80211_DFS_ETSI,
+ .reg_rules = {
+ REG_RULE_EXT(2402, 2482, 40, 0, 20, 0, 0),
+ REG_RULE_EXT(5170, 5250, 80, 0, 20, 0,
+ NL80211_RRF_AUTO_BW | 0),
+ REG_RULE_EXT(5250, 5330, 80, 0, 20, 0,
+ NL80211_RRF_DFS |
+ NL80211_RRF_AUTO_BW | 0),
+ REG_RULE_EXT(5490, 5710, 160, 0, 27, 0,
+ NL80211_RRF_DFS | 0),
+ },
+ .n_reg_rules = 4
+};
+
+static const struct ieee80211_regdomain regdom_ME = {
+ .alpha2 = "ME",
+ .dfs_region = NL80211_DFS_ETSI,
+ .reg_rules = {
+ REG_RULE_EXT(2402, 2482, 40, 0, 20, 0, 0),
+ REG_RULE_EXT(5170, 5250, 80, 0, 20, 0,
+ NL80211_RRF_AUTO_BW | 0),
+ REG_RULE_EXT(5250, 5330, 80, 0, 20, 0,
+ NL80211_RRF_DFS |
+ NL80211_RRF_AUTO_BW | 0),
+ REG_RULE_EXT(5490, 5710, 160, 0, 27, 0,
+ NL80211_RRF_DFS | 0),
+ },
+ .n_reg_rules = 4
+};
+
+static const struct ieee80211_regdomain regdom_MF = {
+ .alpha2 = "MF",
+ .dfs_region = NL80211_DFS_ETSI,
+ .reg_rules = {
+ REG_RULE_EXT(2402, 2482, 40, 0, 20, 0, 0),
+ REG_RULE_EXT(5170, 5250, 80, 0, 20, 0,
+ NL80211_RRF_AUTO_BW | 0),
+ REG_RULE_EXT(5250, 5330, 80, 0, 20, 0,
+ NL80211_RRF_DFS |
+ NL80211_RRF_AUTO_BW | 0),
+ REG_RULE_EXT(5490, 5710, 160, 0, 27, 0,
+ NL80211_RRF_DFS | 0),
+ },
+ .n_reg_rules = 4
+};
+
+static const struct ieee80211_regdomain regdom_MH = {
+ .alpha2 = "MH",
+ .dfs_region = NL80211_DFS_FCC,
+ .reg_rules = {
+ REG_RULE_EXT(2402, 2472, 40, 0, 30, 0, 0),
+ REG_RULE_EXT(5170, 5250, 80, 0, 24, 0,
+ NL80211_RRF_AUTO_BW | 0),
+ REG_RULE_EXT(5250, 5330, 80, 0, 24, 0,
+ NL80211_RRF_DFS |
+ NL80211_RRF_AUTO_BW | 0),
+ REG_RULE_EXT(5490, 5730, 160, 0, 24, 0,
+ NL80211_RRF_DFS | 0),
+ REG_RULE_EXT(5735, 5835, 80, 0, 30, 0, 0),
+ },
+ .n_reg_rules = 5
+};
+
+static const struct ieee80211_regdomain regdom_MK = {
+ .alpha2 = "MK",
+ .dfs_region = NL80211_DFS_ETSI,
+ .reg_rules = {
+ REG_RULE_EXT(2402, 2482, 40, 0, 20, 0, 0),
+ REG_RULE_EXT(5170, 5250, 80, 0, 20, 0,
+ NL80211_RRF_AUTO_BW | 0),
+ REG_RULE_EXT(5250, 5330, 80, 0, 20, 0,
+ NL80211_RRF_DFS |
+ NL80211_RRF_AUTO_BW | 0),
+ REG_RULE_EXT(5490, 5710, 160, 0, 27, 0,
+ NL80211_RRF_DFS | 0),
+ REG_RULE_EXT(57000, 66000, 2160, 0, 40, 0, 0),
+ },
+ .n_reg_rules = 5
+};
+
+static const struct ieee80211_regdomain regdom_MN = {
+ .alpha2 = "MN",
+ .dfs_region = NL80211_DFS_FCC,
+ .reg_rules = {
+ REG_RULE_EXT(2402, 2482, 40, 0, 20, 0, 0),
+ REG_RULE_EXT(5170, 5250, 80, 0, 24, 0,
+ NL80211_RRF_AUTO_BW | 0),
+ REG_RULE_EXT(5250, 5330, 80, 0, 24, 0,
+ NL80211_RRF_DFS |
+ NL80211_RRF_AUTO_BW | 0),
+ REG_RULE_EXT(5490, 5730, 160, 0, 24, 0,
+ NL80211_RRF_DFS | 0),
+ REG_RULE_EXT(5735, 5835, 80, 0, 30, 0, 0),
+ },
+ .n_reg_rules = 5
+};
+
+static const struct ieee80211_regdomain regdom_MO = {
+ .alpha2 = "MO",
+ .reg_rules = {
+ REG_RULE_EXT(2402, 2482, 40, 0, 20, 0, 0),
+ REG_RULE_EXT(5170, 5250, 40, 0, 23, 0, 0),
+ REG_RULE_EXT(5250, 5330, 40, 0, 23, 0,
+ NL80211_RRF_DFS | 0),
+ REG_RULE_EXT(5735, 5835, 40, 0, 30, 0, 0),
+ },
+ .n_reg_rules = 4
+};
+
+static const struct ieee80211_regdomain regdom_MP = {
+ .alpha2 = "MP",
+ .dfs_region = NL80211_DFS_FCC,
+ .reg_rules = {
+ REG_RULE_EXT(2402, 2472, 40, 0, 30, 0, 0),
+ REG_RULE_EXT(5170, 5250, 80, 0, 24, 0,
+ NL80211_RRF_AUTO_BW | 0),
+ REG_RULE_EXT(5250, 5330, 80, 0, 24, 0,
+ NL80211_RRF_DFS |
+ NL80211_RRF_AUTO_BW | 0),
+ REG_RULE_EXT(5490, 5730, 160, 0, 24, 0,
+ NL80211_RRF_DFS | 0),
+ REG_RULE_EXT(5735, 5835, 80, 0, 30, 0, 0),
+ },
+ .n_reg_rules = 5
+};
+
+static const struct ieee80211_regdomain regdom_MQ = {
+ .alpha2 = "MQ",
+ .dfs_region = NL80211_DFS_ETSI,
+ .reg_rules = {
+ REG_RULE_EXT(2402, 2482, 40, 0, 20, 0, 0),
+ REG_RULE_EXT(5170, 5250, 80, 0, 20, 0,
+ NL80211_RRF_AUTO_BW | 0),
+ REG_RULE_EXT(5250, 5330, 80, 0, 20, 0,
+ NL80211_RRF_DFS |
+ NL80211_RRF_AUTO_BW | 0),
+ REG_RULE_EXT(5490, 5710, 160, 0, 27, 0,
+ NL80211_RRF_DFS | 0),
+ },
+ .n_reg_rules = 4
+};
+
+static const struct ieee80211_regdomain regdom_MR = {
+ .alpha2 = "MR",
+ .dfs_region = NL80211_DFS_ETSI,
+ .reg_rules = {
+ REG_RULE_EXT(2402, 2482, 40, 0, 20, 0, 0),
+ REG_RULE_EXT(5170, 5250, 80, 0, 20, 0,
+ NL80211_RRF_AUTO_BW | 0),
+ REG_RULE_EXT(5250, 5330, 80, 0, 20, 0,
+ NL80211_RRF_DFS |
+ NL80211_RRF_AUTO_BW | 0),
+ REG_RULE_EXT(5490, 5710, 160, 0, 27, 0,
+ NL80211_RRF_DFS | 0),
+ },
+ .n_reg_rules = 4
+};
+
+static const struct ieee80211_regdomain regdom_MT = {
+ .alpha2 = "MT",
+ .dfs_region = NL80211_DFS_ETSI,
+ .reg_rules = {
+ REG_RULE_EXT(2402, 2482, 40, 0, 20, 0, 0),
+ REG_RULE_EXT(5170, 5250, 80, 0, 20, 0,
+ NL80211_RRF_AUTO_BW | 0),
+ REG_RULE_EXT(5250, 5330, 80, 0, 20, 0,
+ NL80211_RRF_DFS |
+ NL80211_RRF_AUTO_BW | 0),
+ REG_RULE_EXT(5490, 5710, 160, 0, 27, 0,
+ NL80211_RRF_DFS | 0),
+ REG_RULE_EXT(57000, 66000, 2160, 0, 40, 0, 0),
+ },
+ .n_reg_rules = 5
+};
+
+static const struct ieee80211_regdomain regdom_MU = {
+ .alpha2 = "MU",
+ .dfs_region = NL80211_DFS_FCC,
+ .reg_rules = {
+ REG_RULE_EXT(2402, 2482, 40, 0, 20, 0, 0),
+ REG_RULE_EXT(5170, 5250, 80, 0, 24, 0,
+ NL80211_RRF_AUTO_BW | 0),
+ REG_RULE_EXT(5250, 5330, 80, 0, 24, 0,
+ NL80211_RRF_DFS |
+ NL80211_RRF_AUTO_BW | 0),
+ REG_RULE_EXT(5490, 5730, 160, 0, 24, 0,
+ NL80211_RRF_DFS | 0),
+ REG_RULE_EXT(5735, 5835, 80, 0, 30, 0, 0),
+ },
+ .n_reg_rules = 5
+};
+
+static const struct ieee80211_regdomain regdom_MW = {
+ .alpha2 = "MW",
+ .dfs_region = NL80211_DFS_ETSI,
+ .reg_rules = {
+ REG_RULE_EXT(2402, 2482, 40, 0, 20, 0, 0),
+ REG_RULE_EXT(5170, 5250, 80, 0, 20, 0,
+ NL80211_RRF_AUTO_BW | 0),
+ REG_RULE_EXT(5250, 5330, 80, 0, 20, 0,
+ NL80211_RRF_DFS |
+ NL80211_RRF_AUTO_BW | 0),
+ REG_RULE_EXT(5490, 5710, 160, 0, 27, 0,
+ NL80211_RRF_DFS | 0),
+ },
+ .n_reg_rules = 4
+};
+
+static const struct ieee80211_regdomain regdom_MX = {
+ .alpha2 = "MX",
+ .dfs_region = NL80211_DFS_FCC,
+ .reg_rules = {
+ REG_RULE_EXT(2402, 2482, 40, 0, 20, 0, 0),
+ REG_RULE_EXT(5170, 5250, 80, 0, 17, 0,
+ NL80211_RRF_AUTO_BW | 0),
+ REG_RULE_EXT(5250, 5330, 80, 0, 24, 0,
+ NL80211_RRF_DFS |
+ NL80211_RRF_AUTO_BW | 0),
+ REG_RULE_EXT(5490, 5730, 160, 0, 24, 0,
+ NL80211_RRF_DFS | 0),
+ REG_RULE_EXT(5735, 5835, 80, 0, 30, 0, 0),
+ },
+ .n_reg_rules = 5
+};
+
+static const struct ieee80211_regdomain regdom_MY = {
+ .alpha2 = "MY",
+ .dfs_region = NL80211_DFS_FCC,
+ .reg_rules = {
+ REG_RULE_EXT(2402, 2482, 40, 0, 20, 0, 0),
+ REG_RULE_EXT(5170, 5250, 80, 0, 17, 0,
+ NL80211_RRF_AUTO_BW | 0),
+ REG_RULE_EXT(5250, 5330, 80, 0, 23, 0,
+ NL80211_RRF_DFS |
+ NL80211_RRF_AUTO_BW | 0),
+ REG_RULE_EXT(5735, 5835, 80, 0, 30, 0, 0),
+ },
+ .n_reg_rules = 4
+};
+
+static const struct ieee80211_regdomain regdom_NI = {
+ .alpha2 = "NI",
+ .dfs_region = NL80211_DFS_FCC,
+ .reg_rules = {
+ REG_RULE_EXT(2402, 2472, 40, 0, 30, 0, 0),
+ REG_RULE_EXT(5170, 5250, 80, 0, 24, 0,
+ NL80211_RRF_AUTO_BW | 0),
+ REG_RULE_EXT(5250, 5330, 80, 0, 24, 0,
+ NL80211_RRF_DFS |
+ NL80211_RRF_AUTO_BW | 0),
+ REG_RULE_EXT(5490, 5730, 160, 0, 24, 0,
+ NL80211_RRF_DFS | 0),
+ REG_RULE_EXT(5735, 5835, 80, 0, 30, 0, 0),
+ },
+ .n_reg_rules = 5
+};
+
+static const struct ieee80211_regdomain regdom_NL = {
+ .alpha2 = "NL",
+ .dfs_region = NL80211_DFS_ETSI,
+ .reg_rules = {
+ REG_RULE_EXT(2402, 2482, 40, 0, 20, 0, 0),
+ REG_RULE_EXT(5170, 5250, 80, 0, 20, 0,
+ NL80211_RRF_NO_OUTDOOR |
+ NL80211_RRF_AUTO_BW | 0),
+ REG_RULE_EXT(5250, 5330, 80, 0, 20, 0,
+ NL80211_RRF_NO_OUTDOOR |
+ NL80211_RRF_DFS |
+ NL80211_RRF_AUTO_BW | 0),
+ REG_RULE_EXT(5490, 5710, 160, 0, 27, 0,
+ NL80211_RRF_DFS | 0),
+ REG_RULE_EXT(57000, 66000, 2160, 0, 40, 0, 0),
+ },
+ .n_reg_rules = 5
+};
+
+static const struct ieee80211_regdomain regdom_NO = {
+ .alpha2 = "NO",
+ .dfs_region = NL80211_DFS_ETSI,
+ .reg_rules = {
+ REG_RULE_EXT(2400, 2483, 40, 0, 20, 0, 0),
+ REG_RULE_EXT(5150, 5250, 80, 0, 23, 0,
+ NL80211_RRF_AUTO_BW | 0),
+ REG_RULE_EXT(5250, 5350, 80, 0, 20, 0,
+ NL80211_RRF_DFS |
+ NL80211_RRF_AUTO_BW | 0),
+ REG_RULE_EXT(5470, 5795, 160, 0, 27, 0,
+ NL80211_RRF_DFS | 0),
+ REG_RULE_EXT(5815, 5850, 35, 0, 33, 0,
+ NL80211_RRF_DFS | 0),
+ REG_RULE_EXT(17100, 17300, 200, 0, 20, 0, 0),
+ REG_RULE_EXT(57000, 66000, 2160, 0, 40, 0, 0),
+ },
+ .n_reg_rules = 7
+};
+
+static const struct ieee80211_regdomain regdom_NP = {
+ .alpha2 = "NP",
+ .dfs_region = NL80211_DFS_JP,
+ .reg_rules = {
+ REG_RULE_EXT(2402, 2482, 40, 0, 20, 0, 0),
+ REG_RULE_EXT(5170, 5250, 80, 0, 20, 0,
+ NL80211_RRF_AUTO_BW | 0),
+ REG_RULE_EXT(5250, 5330, 80, 0, 20, 0,
+ NL80211_RRF_DFS |
+ NL80211_RRF_AUTO_BW | 0),
+ REG_RULE_EXT(5735, 5835, 80, 0, 20, 0, 0),
+ },
+ .n_reg_rules = 4
+};
+
+static const struct ieee80211_regdomain regdom_NZ = {
+ .alpha2 = "NZ",
+ .dfs_region = NL80211_DFS_FCC,
+ .reg_rules = {
+ REG_RULE_EXT(2402, 2482, 40, 0, 30, 0, 0),
+ REG_RULE_EXT(5170, 5250, 80, 0, 17, 0,
+ NL80211_RRF_AUTO_BW | 0),
+ REG_RULE_EXT(5250, 5330, 80, 0, 24, 0,
+ NL80211_RRF_DFS |
+ NL80211_RRF_AUTO_BW | 0),
+ REG_RULE_EXT(5490, 5730, 160, 0, 24, 0,
+ NL80211_RRF_DFS | 0),
+ REG_RULE_EXT(5735, 5835, 80, 0, 30, 0, 0),
+ },
+ .n_reg_rules = 5
+};
+
+static const struct ieee80211_regdomain regdom_OM = {
+ .alpha2 = "OM",
+ .dfs_region = NL80211_DFS_ETSI,
+ .reg_rules = {
+ REG_RULE_EXT(2402, 2482, 40, 0, 20, 0, 0),
+ REG_RULE_EXT(5170, 5250, 80, 0, 20, 0,
+ NL80211_RRF_AUTO_BW | 0),
+ REG_RULE_EXT(5250, 5330, 80, 0, 20, 0,
+ NL80211_RRF_DFS |
+ NL80211_RRF_AUTO_BW | 0),
+ REG_RULE_EXT(5490, 5710, 160, 0, 27, 0,
+ NL80211_RRF_DFS | 0),
+ },
+ .n_reg_rules = 4
+};
+
+static const struct ieee80211_regdomain regdom_PA = {
+ .alpha2 = "PA",
+ .dfs_region = NL80211_DFS_FCC,
+ .reg_rules = {
+ REG_RULE_EXT(2402, 2472, 40, 0, 30, 0, 0),
+ REG_RULE_EXT(5170, 5250, 80, 0, 17, 0,
+ NL80211_RRF_AUTO_BW | 0),
+ REG_RULE_EXT(5250, 5330, 80, 0, 23, 0,
+ NL80211_RRF_DFS |
+ NL80211_RRF_AUTO_BW | 0),
+ REG_RULE_EXT(5735, 5835, 80, 0, 30, 0, 0),
+ },
+ .n_reg_rules = 4
+};
+
+static const struct ieee80211_regdomain regdom_PE = {
+ .alpha2 = "PE",
+ .dfs_region = NL80211_DFS_FCC,
+ .reg_rules = {
+ REG_RULE_EXT(2402, 2482, 40, 0, 20, 0, 0),
+ REG_RULE_EXT(5170, 5250, 80, 0, 17, 0,
+ NL80211_RRF_AUTO_BW | 0),
+ REG_RULE_EXT(5250, 5330, 80, 0, 24, 0,
+ NL80211_RRF_DFS |
+ NL80211_RRF_AUTO_BW | 0),
+ REG_RULE_EXT(5490, 5730, 160, 0, 24, 0,
+ NL80211_RRF_DFS | 0),
+ REG_RULE_EXT(5735, 5835, 80, 0, 30, 0, 0),
+ },
+ .n_reg_rules = 5
+};
+
+static const struct ieee80211_regdomain regdom_PF = {
+ .alpha2 = "PF",
+ .dfs_region = NL80211_DFS_ETSI,
+ .reg_rules = {
+ REG_RULE_EXT(2402, 2482, 40, 0, 20, 0, 0),
+ REG_RULE_EXT(5170, 5250, 80, 0, 20, 0,
+ NL80211_RRF_AUTO_BW | 0),
+ REG_RULE_EXT(5250, 5330, 80, 0, 20, 0,
+ NL80211_RRF_DFS |
+ NL80211_RRF_AUTO_BW | 0),
+ REG_RULE_EXT(5490, 5710, 160, 0, 27, 0,
+ NL80211_RRF_DFS | 0),
+ },
+ .n_reg_rules = 4
+};
+
+static const struct ieee80211_regdomain regdom_PG = {
+ .alpha2 = "PG",
+ .dfs_region = NL80211_DFS_FCC,
+ .reg_rules = {
+ REG_RULE_EXT(2402, 2482, 40, 0, 20, 0, 0),
+ REG_RULE_EXT(5170, 5250, 80, 0, 17, 0,
+ NL80211_RRF_AUTO_BW | 0),
+ REG_RULE_EXT(5250, 5330, 80, 0, 24, 0,
+ NL80211_RRF_DFS |
+ NL80211_RRF_AUTO_BW | 0),
+ REG_RULE_EXT(5490, 5730, 160, 0, 24, 0,
+ NL80211_RRF_DFS | 0),
+ REG_RULE_EXT(5735, 5835, 80, 0, 30, 0, 0),
+ },
+ .n_reg_rules = 5
+};
+
+static const struct ieee80211_regdomain regdom_PH = {
+ .alpha2 = "PH",
+ .dfs_region = NL80211_DFS_FCC,
+ .reg_rules = {
+ REG_RULE_EXT(2402, 2482, 40, 0, 20, 0, 0),
+ REG_RULE_EXT(5170, 5250, 80, 0, 17, 0,
+ NL80211_RRF_AUTO_BW | 0),
+ REG_RULE_EXT(5250, 5330, 80, 0, 24, 0,
+ NL80211_RRF_DFS |
+ NL80211_RRF_AUTO_BW | 0),
+ REG_RULE_EXT(5490, 5730, 160, 0, 24, 0,
+ NL80211_RRF_DFS | 0),
+ REG_RULE_EXT(5735, 5835, 80, 0, 30, 0, 0),
+ },
+ .n_reg_rules = 5
+};
+
+static const struct ieee80211_regdomain regdom_PK = {
+ .alpha2 = "PK",
+ .dfs_region = NL80211_DFS_JP,
+ .reg_rules = {
+ REG_RULE_EXT(2402, 2482, 40, 0, 20, 0, 0),
+ REG_RULE_EXT(5735, 5835, 80, 0, 30, 0, 0),
+ },
+ .n_reg_rules = 2
+};
+
+static const struct ieee80211_regdomain regdom_PL = {
+ .alpha2 = "PL",
+ .dfs_region = NL80211_DFS_ETSI,
+ .reg_rules = {
+ REG_RULE_EXT(2402, 2482, 40, 0, 20, 0, 0),
+ REG_RULE_EXT(5170, 5250, 80, 0, 20, 0,
+ NL80211_RRF_AUTO_BW | 0),
+ REG_RULE_EXT(5250, 5330, 80, 0, 20, 0,
+ NL80211_RRF_DFS |
+ NL80211_RRF_AUTO_BW | 0),
+ REG_RULE_EXT(5490, 5710, 160, 0, 27, 0,
+ NL80211_RRF_DFS | 0),
+ REG_RULE_EXT(57000, 66000, 2160, 0, 40, 0, 0),
+ },
+ .n_reg_rules = 5
+};
+
+static const struct ieee80211_regdomain regdom_PM = {
+ .alpha2 = "PM",
+ .dfs_region = NL80211_DFS_ETSI,
+ .reg_rules = {
+ REG_RULE_EXT(2402, 2482, 40, 0, 20, 0, 0),
+ REG_RULE_EXT(5170, 5250, 80, 0, 20, 0,
+ NL80211_RRF_AUTO_BW | 0),
+ REG_RULE_EXT(5250, 5330, 80, 0, 20, 0,
+ NL80211_RRF_DFS |
+ NL80211_RRF_AUTO_BW | 0),
+ REG_RULE_EXT(5490, 5710, 160, 0, 27, 0,
+ NL80211_RRF_DFS | 0),
+ },
+ .n_reg_rules = 4
+};
+
+static const struct ieee80211_regdomain regdom_PR = {
+ .alpha2 = "PR",
+ .dfs_region = NL80211_DFS_FCC,
+ .reg_rules = {
+ REG_RULE_EXT(2402, 2472, 40, 0, 30, 0, 0),
+ REG_RULE_EXT(5170, 5250, 80, 0, 17, 0,
+ NL80211_RRF_AUTO_BW | 0),
+ REG_RULE_EXT(5250, 5330, 80, 0, 24, 0,
+ NL80211_RRF_DFS |
+ NL80211_RRF_AUTO_BW | 0),
+ REG_RULE_EXT(5490, 5730, 160, 0, 24, 0,
+ NL80211_RRF_DFS | 0),
+ REG_RULE_EXT(5735, 5835, 80, 0, 30, 0, 0),
+ },
+ .n_reg_rules = 5
+};
+
+static const struct ieee80211_regdomain regdom_PT = {
+ .alpha2 = "PT",
+ .dfs_region = NL80211_DFS_ETSI,
+ .reg_rules = {
+ REG_RULE_EXT(2402, 2482, 40, 0, 20, 0, 0),
+ REG_RULE_EXT(5170, 5250, 80, 0, 20, 0,
+ NL80211_RRF_AUTO_BW | 0),
+ REG_RULE_EXT(5250, 5330, 80, 0, 20, 0,
+ NL80211_RRF_DFS |
+ NL80211_RRF_AUTO_BW | 0),
+ REG_RULE_EXT(5490, 5710, 160, 0, 27, 0,
+ NL80211_RRF_DFS | 0),
+ REG_RULE_EXT(57000, 66000, 2160, 0, 40, 0, 0),
+ },
+ .n_reg_rules = 5
+};
+
+static const struct ieee80211_regdomain regdom_PW = {
+ .alpha2 = "PW",
+ .dfs_region = NL80211_DFS_FCC,
+ .reg_rules = {
+ REG_RULE_EXT(2402, 2472, 40, 0, 30, 0, 0),
+ REG_RULE_EXT(5170, 5250, 80, 0, 24, 0,
+ NL80211_RRF_AUTO_BW | 0),
+ REG_RULE_EXT(5250, 5330, 80, 0, 24, 0,
+ NL80211_RRF_DFS |
+ NL80211_RRF_AUTO_BW | 0),
+ REG_RULE_EXT(5490, 5730, 160, 0, 24, 0,
+ NL80211_RRF_DFS | 0),
+ REG_RULE_EXT(5735, 5835, 80, 0, 30, 0, 0),
+ },
+ .n_reg_rules = 5
+};
+
+static const struct ieee80211_regdomain regdom_PY = {
+ .alpha2 = "PY",
+ .dfs_region = NL80211_DFS_FCC,
+ .reg_rules = {
+ REG_RULE_EXT(2402, 2482, 40, 0, 20, 0, 0),
+ REG_RULE_EXT(5170, 5250, 80, 0, 24, 0,
+ NL80211_RRF_AUTO_BW | 0),
+ REG_RULE_EXT(5250, 5330, 80, 0, 24, 0,
+ NL80211_RRF_DFS |
+ NL80211_RRF_AUTO_BW | 0),
+ REG_RULE_EXT(5490, 5730, 160, 0, 24, 0,
+ NL80211_RRF_DFS | 0),
+ REG_RULE_EXT(5735, 5835, 80, 0, 30, 0, 0),
+ },
+ .n_reg_rules = 5
+};
+
+static const struct ieee80211_regdomain regdom_QA = {
+ .alpha2 = "QA",
+ .dfs_region = NL80211_DFS_JP,
+ .reg_rules = {
+ REG_RULE_EXT(2402, 2482, 40, 0, 20, 0, 0),
+ REG_RULE_EXT(5735, 5835, 80, 0, 30, 0, 0),
+ },
+ .n_reg_rules = 2
+};
+
+static const struct ieee80211_regdomain regdom_RE = {
+ .alpha2 = "RE",
+ .dfs_region = NL80211_DFS_ETSI,
+ .reg_rules = {
+ REG_RULE_EXT(2402, 2482, 40, 0, 20, 0, 0),
+ REG_RULE_EXT(5170, 5250, 80, 0, 20, 0,
+ NL80211_RRF_AUTO_BW | 0),
+ REG_RULE_EXT(5250, 5330, 80, 0, 20, 0,
+ NL80211_RRF_DFS |
+ NL80211_RRF_AUTO_BW | 0),
+ REG_RULE_EXT(5490, 5710, 160, 0, 27, 0,
+ NL80211_RRF_DFS | 0),
+ },
+ .n_reg_rules = 4
+};
+
+static const struct ieee80211_regdomain regdom_RO = {
+ .alpha2 = "RO",
+ .dfs_region = NL80211_DFS_ETSI,
+ .reg_rules = {
+ REG_RULE_EXT(2402, 2482, 40, 0, 20, 0, 0),
+ REG_RULE_EXT(5170, 5250, 80, 0, 20, 0,
+ NL80211_RRF_AUTO_BW | 0),
+ REG_RULE_EXT(5250, 5330, 80, 0, 20, 0,
+ NL80211_RRF_DFS |
+ NL80211_RRF_AUTO_BW | 0),
+ REG_RULE_EXT(5490, 5710, 160, 0, 27, 0,
+ NL80211_RRF_DFS | 0),
+ REG_RULE_EXT(57000, 66000, 2160, 0, 40, 0, 0),
+ },
+ .n_reg_rules = 5
+};
+
+static const struct ieee80211_regdomain regdom_RS = {
+ .alpha2 = "RS",
+ .dfs_region = NL80211_DFS_ETSI,
+ .reg_rules = {
+ REG_RULE_EXT(2400, 2483, 40, 0, 20, 0, 0),
+ REG_RULE_EXT(5150, 5350, 40, 0, 23, 0,
+ NL80211_RRF_NO_OUTDOOR | 0),
+ REG_RULE_EXT(5470, 5725, 20, 0, 30, 0,
+ NL80211_RRF_DFS | 0),
+ REG_RULE_EXT(57000, 66000, 2160, 0, 40, 0, 0),
+ },
+ .n_reg_rules = 4
+};
+
+static const struct ieee80211_regdomain regdom_RU = {
+ .alpha2 = "RU",
+ .dfs_region = NL80211_DFS_ETSI,
+ .reg_rules = {
+ REG_RULE_EXT(2402, 2482, 40, 0, 20, 0, 0),
+ REG_RULE_EXT(5170, 5250, 80, 0, 20, 0, 0),
+ REG_RULE_EXT(5250, 5330, 80, 0, 20, 0,
+ NL80211_RRF_DFS | 0),
+ REG_RULE_EXT(5650, 5730, 80, 0, 30, 0,
+ NL80211_RRF_DFS | 0),
+ REG_RULE_EXT(5735, 5835, 80, 0, 30, 0, 0),
+ },
+ .n_reg_rules = 5
+};
+
+static const struct ieee80211_regdomain regdom_RW = {
+ .alpha2 = "RW",
+ .dfs_region = NL80211_DFS_FCC,
+ .reg_rules = {
+ REG_RULE_EXT(2402, 2482, 40, 0, 20, 0, 0),
+ REG_RULE_EXT(5170, 5250, 80, 0, 17, 0,
+ NL80211_RRF_AUTO_BW | 0),
+ REG_RULE_EXT(5250, 5330, 80, 0, 24, 0,
+ NL80211_RRF_DFS |
+ NL80211_RRF_AUTO_BW | 0),
+ REG_RULE_EXT(5490, 5730, 160, 0, 24, 0,
+ NL80211_RRF_DFS | 0),
+ REG_RULE_EXT(5735, 5835, 80, 0, 30, 0, 0),
+ },
+ .n_reg_rules = 5
+};
+
+static const struct ieee80211_regdomain regdom_SA = {
+ .alpha2 = "SA",
+ .dfs_region = NL80211_DFS_ETSI,
+ .reg_rules = {
+ REG_RULE_EXT(2402, 2482, 40, 0, 20, 0, 0),
+ REG_RULE_EXT(5170, 5250, 80, 0, 20, 0,
+ NL80211_RRF_AUTO_BW | 0),
+ REG_RULE_EXT(5250, 5330, 80, 0, 20, 0,
+ NL80211_RRF_DFS |
+ NL80211_RRF_AUTO_BW | 0),
+ REG_RULE_EXT(5490, 5710, 160, 0, 27, 0,
+ NL80211_RRF_DFS | 0),
+ },
+ .n_reg_rules = 4
+};
+
+static const struct ieee80211_regdomain regdom_SE = {
+ .alpha2 = "SE",
+ .dfs_region = NL80211_DFS_ETSI,
+ .reg_rules = {
+ REG_RULE_EXT(2402, 2482, 40, 0, 20, 0, 0),
+ REG_RULE_EXT(5170, 5250, 80, 0, 20, 0,
+ NL80211_RRF_AUTO_BW | 0),
+ REG_RULE_EXT(5250, 5330, 80, 0, 20, 0,
+ NL80211_RRF_DFS |
+ NL80211_RRF_AUTO_BW | 0),
+ REG_RULE_EXT(5490, 5710, 160, 0, 27, 0,
+ NL80211_RRF_DFS | 0),
+ REG_RULE_EXT(57000, 66000, 2160, 0, 40, 0, 0),
+ },
+ .n_reg_rules = 5
+};
+
+static const struct ieee80211_regdomain regdom_SG = {
+ .alpha2 = "SG",
+ .dfs_region = NL80211_DFS_FCC,
+ .reg_rules = {
+ REG_RULE_EXT(2402, 2482, 40, 0, 20, 0, 0),
+ REG_RULE_EXT(5170, 5250, 80, 0, 17, 0,
+ NL80211_RRF_AUTO_BW | 0),
+ REG_RULE_EXT(5250, 5330, 80, 0, 24, 0,
+ NL80211_RRF_DFS |
+ NL80211_RRF_AUTO_BW | 0),
+ REG_RULE_EXT(5490, 5730, 160, 0, 24, 0,
+ NL80211_RRF_DFS | 0),
+ REG_RULE_EXT(5735, 5835, 80, 0, 30, 0, 0),
+ },
+ .n_reg_rules = 5
+};
+
+static const struct ieee80211_regdomain regdom_SI = {
+ .alpha2 = "SI",
+ .dfs_region = NL80211_DFS_ETSI,
+ .reg_rules = {
+ REG_RULE_EXT(2402, 2482, 40, 0, 20, 0, 0),
+ REG_RULE_EXT(5170, 5250, 80, 0, 20, 0,
+ NL80211_RRF_AUTO_BW | 0),
+ REG_RULE_EXT(5250, 5330, 80, 0, 20, 0,
+ NL80211_RRF_DFS |
+ NL80211_RRF_AUTO_BW | 0),
+ REG_RULE_EXT(5490, 5710, 160, 0, 27, 0,
+ NL80211_RRF_DFS | 0),
+ REG_RULE_EXT(57000, 66000, 2160, 0, 40, 0, 0),
+ },
+ .n_reg_rules = 5
+};
+
+static const struct ieee80211_regdomain regdom_SK = {
+ .alpha2 = "SK",
+ .dfs_region = NL80211_DFS_ETSI,
+ .reg_rules = {
+ REG_RULE_EXT(2402, 2482, 40, 0, 20, 0, 0),
+ REG_RULE_EXT(5170, 5250, 80, 0, 20, 0,
+ NL80211_RRF_AUTO_BW | 0),
+ REG_RULE_EXT(5250, 5330, 80, 0, 20, 0,
+ NL80211_RRF_DFS |
+ NL80211_RRF_AUTO_BW | 0),
+ REG_RULE_EXT(5490, 5710, 160, 0, 27, 0,
+ NL80211_RRF_DFS | 0),
+ REG_RULE_EXT(57000, 66000, 2160, 0, 40, 0, 0),
+ },
+ .n_reg_rules = 5
+};
+
+static const struct ieee80211_regdomain regdom_SN = {
+ .alpha2 = "SN",
+ .dfs_region = NL80211_DFS_FCC,
+ .reg_rules = {
+ REG_RULE_EXT(2402, 2482, 40, 0, 20, 0, 0),
+ REG_RULE_EXT(5170, 5250, 80, 0, 17, 0,
+ NL80211_RRF_AUTO_BW | 0),
+ REG_RULE_EXT(5250, 5330, 80, 0, 24, 0,
+ NL80211_RRF_DFS |
+ NL80211_RRF_AUTO_BW | 0),
+ REG_RULE_EXT(5490, 5730, 160, 0, 24, 0,
+ NL80211_RRF_DFS | 0),
+ REG_RULE_EXT(5735, 5835, 80, 0, 30, 0, 0),
+ },
+ .n_reg_rules = 5
+};
+
+static const struct ieee80211_regdomain regdom_SR = {
+ .alpha2 = "SR",
+ .dfs_region = NL80211_DFS_ETSI,
+ .reg_rules = {
+ REG_RULE_EXT(2402, 2482, 40, 0, 20, 0, 0),
+ REG_RULE_EXT(5170, 5250, 80, 0, 20, 0,
+ NL80211_RRF_AUTO_BW | 0),
+ REG_RULE_EXT(5250, 5330, 80, 0, 20, 0,
+ NL80211_RRF_DFS |
+ NL80211_RRF_AUTO_BW | 0),
+ REG_RULE_EXT(5490, 5710, 160, 0, 27, 0,
+ NL80211_RRF_DFS | 0),
+ },
+ .n_reg_rules = 4
+};
+
+static const struct ieee80211_regdomain regdom_SV = {
+ .alpha2 = "SV",
+ .dfs_region = NL80211_DFS_FCC,
+ .reg_rules = {
+ REG_RULE_EXT(2402, 2482, 40, 0, 20, 0, 0),
+ REG_RULE_EXT(5170, 5250, 80, 0, 17, 0, 0),
+ REG_RULE_EXT(5250, 5330, 80, 0, 23, 0,
+ NL80211_RRF_DFS | 0),
+ REG_RULE_EXT(5735, 5835, 80, 0, 30, 0, 0),
+ },
+ .n_reg_rules = 4
+};
+
+static const struct ieee80211_regdomain regdom_SY = {
+ .alpha2 = "SY",
+ .reg_rules = {
+ REG_RULE_EXT(2402, 2482, 40, 0, 20, 0, 0),
+ },
+ .n_reg_rules = 1
+};
+
+static const struct ieee80211_regdomain regdom_TC = {
+ .alpha2 = "TC",
+ .dfs_region = NL80211_DFS_FCC,
+ .reg_rules = {
+ REG_RULE_EXT(2402, 2482, 40, 0, 20, 0, 0),
+ REG_RULE_EXT(5170, 5250, 80, 0, 24, 0,
+ NL80211_RRF_AUTO_BW | 0),
+ REG_RULE_EXT(5250, 5330, 80, 0, 24, 0,
+ NL80211_RRF_DFS |
+ NL80211_RRF_AUTO_BW | 0),
+ REG_RULE_EXT(5490, 5730, 160, 0, 24, 0,
+ NL80211_RRF_DFS | 0),
+ REG_RULE_EXT(5735, 5835, 80, 0, 30, 0, 0),
+ },
+ .n_reg_rules = 5
+};
+
+static const struct ieee80211_regdomain regdom_TD = {
+ .alpha2 = "TD",
+ .dfs_region = NL80211_DFS_ETSI,
+ .reg_rules = {
+ REG_RULE_EXT(2402, 2482, 40, 0, 20, 0, 0),
+ REG_RULE_EXT(5170, 5250, 80, 0, 20, 0,
+ NL80211_RRF_AUTO_BW | 0),
+ REG_RULE_EXT(5250, 5330, 80, 0, 20, 0,
+ NL80211_RRF_DFS |
+ NL80211_RRF_AUTO_BW | 0),
+ REG_RULE_EXT(5490, 5710, 160, 0, 27, 0,
+ NL80211_RRF_DFS | 0),
+ },
+ .n_reg_rules = 4
+};
+
+static const struct ieee80211_regdomain regdom_TG = {
+ .alpha2 = "TG",
+ .dfs_region = NL80211_DFS_ETSI,
+ .reg_rules = {
+ REG_RULE_EXT(2402, 2482, 40, 0, 20, 0, 0),
+ REG_RULE_EXT(5170, 5250, 40, 0, 20, 0, 0),
+ REG_RULE_EXT(5250, 5330, 40, 0, 20, 0,
+ NL80211_RRF_DFS | 0),
+ REG_RULE_EXT(5490, 5710, 40, 0, 27, 0,
+ NL80211_RRF_DFS | 0),
+ },
+ .n_reg_rules = 4
+};
+
+static const struct ieee80211_regdomain regdom_TH = {
+ .alpha2 = "TH",
+ .dfs_region = NL80211_DFS_FCC,
+ .reg_rules = {
+ REG_RULE_EXT(2402, 2482, 40, 0, 20, 0, 0),
+ REG_RULE_EXT(5170, 5250, 80, 0, 17, 0,
+ NL80211_RRF_AUTO_BW | 0),
+ REG_RULE_EXT(5250, 5330, 80, 0, 24, 0,
+ NL80211_RRF_DFS |
+ NL80211_RRF_AUTO_BW | 0),
+ REG_RULE_EXT(5490, 5730, 160, 0, 24, 0,
+ NL80211_RRF_DFS | 0),
+ REG_RULE_EXT(5735, 5835, 80, 0, 30, 0, 0),
+ },
+ .n_reg_rules = 5
+};
+
+static const struct ieee80211_regdomain regdom_TN = {
+ .alpha2 = "TN",
+ .dfs_region = NL80211_DFS_ETSI,
+ .reg_rules = {
+ REG_RULE_EXT(2402, 2482, 40, 0, 20, 0, 0),
+ REG_RULE_EXT(5170, 5250, 80, 0, 20, 0,
+ NL80211_RRF_AUTO_BW | 0),
+ REG_RULE_EXT(5250, 5330, 80, 0, 20, 0,
+ NL80211_RRF_DFS |
+ NL80211_RRF_AUTO_BW | 0),
+ },
+ .n_reg_rules = 3
+};
+
+static const struct ieee80211_regdomain regdom_TR = {
+ .alpha2 = "TR",
+ .dfs_region = NL80211_DFS_ETSI,
+ .reg_rules = {
+ REG_RULE_EXT(2402, 2482, 40, 0, 20, 0, 0),
+ REG_RULE_EXT(5170, 5250, 80, 0, 20, 0,
+ NL80211_RRF_AUTO_BW | 0),
+ REG_RULE_EXT(5250, 5330, 80, 0, 20, 0,
+ NL80211_RRF_DFS |
+ NL80211_RRF_AUTO_BW | 0),
+ REG_RULE_EXT(5490, 5710, 160, 0, 27, 0,
+ NL80211_RRF_DFS | 0),
+ REG_RULE_EXT(57000, 66000, 2160, 0, 40, 0, 0),
+ },
+ .n_reg_rules = 5
+};
+
+static const struct ieee80211_regdomain regdom_TT = {
+ .alpha2 = "TT",
+ .dfs_region = NL80211_DFS_FCC,
+ .reg_rules = {
+ REG_RULE_EXT(2402, 2482, 40, 0, 20, 0, 0),
+ REG_RULE_EXT(5170, 5250, 80, 0, 17, 0,
+ NL80211_RRF_AUTO_BW | 0),
+ REG_RULE_EXT(5250, 5330, 80, 0, 24, 0,
+ NL80211_RRF_DFS |
+ NL80211_RRF_AUTO_BW | 0),
+ REG_RULE_EXT(5490, 5730, 160, 0, 24, 0,
+ NL80211_RRF_DFS | 0),
+ REG_RULE_EXT(5735, 5835, 80, 0, 30, 0, 0),
+ },
+ .n_reg_rules = 5
+};
+
+static const struct ieee80211_regdomain regdom_TW = {
+ .alpha2 = "TW",
+ .dfs_region = NL80211_DFS_JP,
+ .reg_rules = {
+ REG_RULE_EXT(2402, 2472, 40, 0, 30, 0, 0),
+ REG_RULE_EXT(5270, 5330, 40, 0, 17, 0,
+ NL80211_RRF_DFS | 0),
+ REG_RULE_EXT(5490, 5590, 80, 0, 30, 0,
+ NL80211_RRF_DFS | 0),
+ REG_RULE_EXT(5650, 5710, 40, 0, 30, 0,
+ NL80211_RRF_DFS | 0),
+ REG_RULE_EXT(5735, 5835, 80, 0, 30, 0, 0),
+ },
+ .n_reg_rules = 5
+};
+
+static const struct ieee80211_regdomain regdom_UA = {
+ .alpha2 = "UA",
+ .dfs_region = NL80211_DFS_ETSI,
+ .reg_rules = {
+ REG_RULE_EXT(2400, 2483, 40, 0, 20, 0,
+ NL80211_RRF_NO_OUTDOOR | 0),
+ REG_RULE_EXT(5150, 5350, 40, 0, 20, 0,
+ NL80211_RRF_NO_OUTDOOR | 0),
+ REG_RULE_EXT(5490, 5670, 80, 0, 20, 0,
+ NL80211_RRF_DFS | 0),
+ REG_RULE_EXT(5735, 5835, 80, 0, 20, 0, 0),
+ REG_RULE_EXT(57000, 66000, 2160, 0, 40, 0, 0),
+ },
+ .n_reg_rules = 5
+};
+
+static const struct ieee80211_regdomain regdom_UG = {
+ .alpha2 = "UG",
+ .dfs_region = NL80211_DFS_FCC,
+ .reg_rules = {
+ REG_RULE_EXT(2402, 2482, 40, 0, 20, 0, 0),
+ REG_RULE_EXT(5170, 5250, 80, 0, 24, 0,
+ NL80211_RRF_AUTO_BW | 0),
+ REG_RULE_EXT(5250, 5330, 80, 0, 24, 0,
+ NL80211_RRF_DFS |
+ NL80211_RRF_AUTO_BW | 0),
+ REG_RULE_EXT(5490, 5730, 160, 0, 24, 0,
+ NL80211_RRF_DFS | 0),
+ REG_RULE_EXT(5735, 5835, 80, 0, 30, 0, 0),
+ },
+ .n_reg_rules = 5
+};
+
+static const struct ieee80211_regdomain regdom_US = {
+ .alpha2 = "US",
+ .dfs_region = NL80211_DFS_FCC,
+ .reg_rules = {
+ // 1...13
+ REG_RULE_EXT(2402, 2472, 40, 0, 30, 0, 0),
+ // 36 40 44 48
+ REG_RULE_EXT(5170, 5250, 80, 0, 17, 0,
+ NL80211_RRF_AUTO_BW | 0),
+ // 52 56 60 64
+ REG_RULE_EXT(5250, 5330, 80, 0, 23, 0,
+ NL80211_RRF_DFS |
+ NL80211_RRF_AUTO_BW | 0),
+ // 100 104 108 112 116 120 124
+ REG_RULE_EXT(5490, 5600, 80, 0, 24, 0,
+ NL80211_RRF_DFS | 0),
+ // 128 132 136 140
+ REG_RULE_EXT(5650, 5710, 40, 0, 24, 0,
+ NL80211_RRF_DFS | 0),
+ // 149 153 157 161 165
+ REG_RULE_EXT(5735, 5835, 80, 0, 30, 0, 0),
+ REG_RULE_EXT(57240, 63720, 2160, 0, 40, 0, 0),
+ },
+ .n_reg_rules = 7
+};
+
+static const struct ieee80211_regdomain regdom_UY = {
+ .alpha2 = "UY",
+ .dfs_region = NL80211_DFS_FCC,
+ .reg_rules = {
+ REG_RULE_EXT(2402, 2482, 40, 0, 20, 0, 0),
+ REG_RULE_EXT(5170, 5250, 80, 0, 17, 0,
+ NL80211_RRF_AUTO_BW | 0),
+ REG_RULE_EXT(5250, 5330, 80, 0, 24, 0,
+ NL80211_RRF_DFS |
+ NL80211_RRF_AUTO_BW | 0),
+ REG_RULE_EXT(5490, 5730, 160, 0, 24, 0,
+ NL80211_RRF_DFS | 0),
+ REG_RULE_EXT(5735, 5835, 80, 0, 30, 0, 0),
+ },
+ .n_reg_rules = 5
+};
+
+static const struct ieee80211_regdomain regdom_UZ = {
+ .alpha2 = "UZ",
+ .dfs_region = NL80211_DFS_ETSI,
+ .reg_rules = {
+ REG_RULE_EXT(2402, 2482, 40, 0, 20, 0, 0),
+ REG_RULE_EXT(5170, 5250, 80, 0, 20, 0,
+ NL80211_RRF_AUTO_BW | 0),
+ REG_RULE_EXT(5250, 5330, 80, 0, 20, 0,
+ NL80211_RRF_DFS |
+ NL80211_RRF_AUTO_BW | 0),
+ },
+ .n_reg_rules = 3
+};
+
+static const struct ieee80211_regdomain regdom_VC = {
+ .alpha2 = "VC",
+ .dfs_region = NL80211_DFS_ETSI,
+ .reg_rules = {
+ REG_RULE_EXT(2402, 2482, 40, 0, 20, 0, 0),
+ REG_RULE_EXT(5170, 5250, 80, 0, 20, 0,
+ NL80211_RRF_AUTO_BW | 0),
+ REG_RULE_EXT(5250, 5330, 80, 0, 20, 0,
+ NL80211_RRF_DFS |
+ NL80211_RRF_AUTO_BW | 0),
+ REG_RULE_EXT(5490, 5710, 160, 0, 27, 0,
+ NL80211_RRF_DFS | 0),
+ },
+ .n_reg_rules = 4
+};
+
+static const struct ieee80211_regdomain regdom_VE = {
+ .alpha2 = "VE",
+ .dfs_region = NL80211_DFS_FCC,
+ .reg_rules = {
+ REG_RULE_EXT(2402, 2482, 40, 0, 30, 0, 0),
+ REG_RULE_EXT(5170, 5250, 80, 0, 23, 0,
+ NL80211_RRF_AUTO_BW | 0),
+ REG_RULE_EXT(5250, 5330, 80, 0, 23, 0,
+ NL80211_RRF_DFS |
+ NL80211_RRF_AUTO_BW | 0),
+ REG_RULE_EXT(5735, 5835, 80, 0, 30, 0, 0),
+ },
+ .n_reg_rules = 4
+};
+
+static const struct ieee80211_regdomain regdom_VI = {
+ .alpha2 = "VI",
+ .dfs_region = NL80211_DFS_FCC,
+ .reg_rules = {
+ REG_RULE_EXT(2402, 2472, 40, 0, 30, 0, 0),
+ REG_RULE_EXT(5170, 5250, 80, 0, 24, 0,
+ NL80211_RRF_AUTO_BW | 0),
+ REG_RULE_EXT(5250, 5330, 80, 0, 24, 0,
+ NL80211_RRF_DFS |
+ NL80211_RRF_AUTO_BW | 0),
+ REG_RULE_EXT(5490, 5730, 160, 0, 24, 0,
+ NL80211_RRF_DFS | 0),
+ REG_RULE_EXT(5735, 5835, 80, 0, 30, 0, 0),
+ },
+ .n_reg_rules = 5
+};
+
+static const struct ieee80211_regdomain regdom_VN = {
+ .alpha2 = "VN",
+ .dfs_region = NL80211_DFS_FCC,
+ .reg_rules = {
+ REG_RULE_EXT(2402, 2482, 40, 0, 20, 0, 0),
+ REG_RULE_EXT(5170, 5250, 80, 0, 17, 0, 0),
+ REG_RULE_EXT(5250, 5330, 80, 0, 24, 0,
+ NL80211_RRF_DFS | 0),
+ REG_RULE_EXT(5490, 5730, 80, 0, 24, 0,
+ NL80211_RRF_DFS | 0),
+ REG_RULE_EXT(5735, 5835, 80, 0, 30, 0, 0),
+ },
+ .n_reg_rules = 5
+};
+
+static const struct ieee80211_regdomain regdom_VU = {
+ .alpha2 = "VU",
+ .dfs_region = NL80211_DFS_FCC,
+ .reg_rules = {
+ REG_RULE_EXT(2402, 2482, 40, 0, 20, 0, 0),
+ REG_RULE_EXT(5170, 5250, 80, 0, 17, 0,
+ NL80211_RRF_AUTO_BW | 0),
+ REG_RULE_EXT(5250, 5330, 80, 0, 24, 0,
+ NL80211_RRF_DFS |
+ NL80211_RRF_AUTO_BW | 0),
+ REG_RULE_EXT(5490, 5730, 160, 0, 24, 0,
+ NL80211_RRF_DFS | 0),
+ REG_RULE_EXT(5735, 5835, 80, 0, 30, 0, 0),
+ },
+ .n_reg_rules = 5
+};
+
+static const struct ieee80211_regdomain regdom_WF = {
+ .alpha2 = "WF",
+ .dfs_region = NL80211_DFS_ETSI,
+ .reg_rules = {
+ REG_RULE_EXT(2402, 2482, 40, 0, 20, 0, 0),
+ REG_RULE_EXT(5170, 5250, 80, 0, 20, 0,
+ NL80211_RRF_AUTO_BW | 0),
+ REG_RULE_EXT(5250, 5330, 80, 0, 20, 0,
+ NL80211_RRF_DFS |
+ NL80211_RRF_AUTO_BW | 0),
+ REG_RULE_EXT(5490, 5710, 160, 0, 27, 0,
+ NL80211_RRF_DFS | 0),
+ },
+ .n_reg_rules = 4
+};
+
+static const struct ieee80211_regdomain regdom_YE = {
+ .alpha2 = "YE",
+ .reg_rules = {
+ REG_RULE_EXT(2402, 2482, 40, 0, 20, 0, 0),
+ },
+ .n_reg_rules = 1
+};
+
+static const struct ieee80211_regdomain regdom_ZM = {
+ .alpha2 = "ZM",
+ .reg_rules = {
+ REG_RULE_EXT(2402, 2482, 40, 0, 20, 0, 0),
+ },
+ .n_reg_rules = 1
+};
+
+static const struct ieee80211_regdomain regdom_YT = {
+ .alpha2 = "YT",
+ .dfs_region = NL80211_DFS_ETSI,
+ .reg_rules = {
+ REG_RULE_EXT(2402, 2482, 40, 0, 20, 0, 0),
+ REG_RULE_EXT(5170, 5250, 80, 0, 20, 0,
+ NL80211_RRF_AUTO_BW | 0),
+ REG_RULE_EXT(5250, 5330, 80, 0, 20, 0,
+ NL80211_RRF_DFS |
+ NL80211_RRF_AUTO_BW | 0),
+ REG_RULE_EXT(5490, 5710, 160, 0, 27, 0,
+ NL80211_RRF_DFS | 0),
+ },
+ .n_reg_rules = 4
+};
+
+static const struct ieee80211_regdomain regdom_ZA = {
+ .alpha2 = "ZA",
+ .dfs_region = NL80211_DFS_ETSI,
+ .reg_rules = {
+ REG_RULE_EXT(2402, 2482, 40, 0, 20, 0, 0),
+ REG_RULE_EXT(5170, 5250, 80, 0, 20, 0,
+ NL80211_RRF_AUTO_BW | 0),
+ REG_RULE_EXT(5250, 5330, 80, 0, 20, 0,
+ NL80211_RRF_DFS |
+ NL80211_RRF_AUTO_BW | 0),
+ REG_RULE_EXT(5490, 5695, 160, 0, 27, 0,
+ NL80211_RRF_DFS | 0),
+ /*REG_RULE_EXT(5490, 5710, 160, 0, 27, 0,
+ NL80211_RRF_DFS | 0),*/
+ },
+ .n_reg_rules = 4
+};
+
+static const struct ieee80211_regdomain regdom_ZW = {
+ .alpha2 = "ZW",
+ .dfs_region = NL80211_DFS_ETSI,
+ .reg_rules = {
+ REG_RULE_EXT(2402, 2482, 40, 0, 20, 0, 0),
+ REG_RULE_EXT(5170, 5250, 80, 0, 20, 0,
+ NL80211_RRF_AUTO_BW | 0),
+ REG_RULE_EXT(5250, 5330, 80, 0, 20, 0,
+ NL80211_RRF_DFS |
+ NL80211_RRF_AUTO_BW | 0),
+ REG_RULE_EXT(5490, 5710, 160, 0, 27, 0,
+ NL80211_RRF_DFS | 0),
+ },
+ .n_reg_rules = 4
+};
+
+const struct ieee80211_regdomain *reg_regdb1[] = {
+ ®dom_00,
+ ®dom_AD,
+ ®dom_AE,
+ ®dom_AF,
+ ®dom_AI,
+ ®dom_AL,
+ ®dom_AM,
+ ®dom_AN,
+ ®dom_AR,
+ ®dom_AS,
+ ®dom_AT,
+ ®dom_AU,
+ ®dom_AW,
+ ®dom_AZ,
+ ®dom_BA,
+ ®dom_BB,
+ ®dom_BD,
+ ®dom_BE,
+ ®dom_BF,
+ ®dom_BG,
+ ®dom_BH,
+ ®dom_BL,
+ ®dom_BM,
+ ®dom_BN,
+ ®dom_BO,
+ ®dom_BR,
+ ®dom_BS,
+ ®dom_BT,
+ ®dom_BY,
+ ®dom_BZ,
+ ®dom_CA,
+ ®dom_CF,
+ ®dom_CH,
+ ®dom_CI,
+ ®dom_CL,
+ ®dom_CN,
+ ®dom_CO,
+ ®dom_CR,
+ ®dom_CX,
+ ®dom_CY,
+ ®dom_CZ,
+ ®dom_DE,
+ ®dom_DK,
+ ®dom_DM,
+ ®dom_DO,
+ ®dom_DZ,
+ ®dom_EC,
+ ®dom_EE,
+ ®dom_EG,
+ ®dom_ES,
+ ®dom_ET,
+ ®dom_FI,
+ ®dom_FM,
+ ®dom_FR,
+ ®dom_GB,
+ ®dom_GD,
+ ®dom_GE,
+ ®dom_GF,
+ ®dom_GH,
+ ®dom_GL,
+ ®dom_GP,
+ ®dom_GR,
+ ®dom_GT,
+ ®dom_GU,
+ ®dom_GY,
+ ®dom_HK,
+ ®dom_HN,
+ ®dom_HR,
+ ®dom_HT,
+ ®dom_HU,
+ ®dom_ID,
+ ®dom_IE,
+ ®dom_IL,
+ ®dom_IN,
+ ®dom_IR,
+ ®dom_IS,
+ ®dom_IT,
+ ®dom_JM,
+ ®dom_JO,
+ ®dom_JP,
+ ®dom_KE,
+ ®dom_KH,
+ ®dom_KN,
+ ®dom_KP,
+ ®dom_KR,
+ ®dom_KW,
+ ®dom_KY,
+ ®dom_KZ,
+ ®dom_LB,
+ ®dom_LC,
+ ®dom_LI,
+ ®dom_LK,
+ ®dom_LS,
+ ®dom_LT,
+ ®dom_LU,
+ ®dom_LV,
+ ®dom_MA,
+ ®dom_MC,
+ ®dom_MD,
+ ®dom_ME,
+ ®dom_MF,
+ ®dom_MH,
+ ®dom_MK,
+ ®dom_MN,
+ ®dom_MO,
+ ®dom_MP,
+ ®dom_MQ,
+ ®dom_MR,
+ ®dom_MT,
+ ®dom_MU,
+ ®dom_MW,
+ ®dom_MX,
+ ®dom_MY,
+ ®dom_NI,
+ ®dom_NL,
+ ®dom_NO,
+ ®dom_NP,
+ ®dom_NZ,
+ ®dom_OM,
+ ®dom_PA,
+ ®dom_PE,
+ ®dom_PF,
+ ®dom_PG,
+ ®dom_PH,
+ ®dom_PK,
+ ®dom_PL,
+ ®dom_PM,
+ ®dom_PR,
+ ®dom_PT,
+ ®dom_PW,
+ ®dom_PY,
+ ®dom_QA,
+ ®dom_RE,
+ ®dom_RO,
+ ®dom_RS,
+ ®dom_RU,
+ ®dom_RW,
+ ®dom_SA,
+ ®dom_SE,
+ ®dom_SG,
+ ®dom_SI,
+ ®dom_SK,
+ ®dom_SN,
+ ®dom_SR,
+ ®dom_SV,
+ ®dom_SY,
+ ®dom_TC,
+ ®dom_TD,
+ ®dom_TG,
+ ®dom_TH,
+ ®dom_TN,
+ ®dom_TR,
+ ®dom_TT,
+ ®dom_TW,
+ ®dom_UA,
+ ®dom_UG,
+ ®dom_US,
+ ®dom_UY,
+ ®dom_UZ,
+ ®dom_VC,
+ ®dom_VE,
+ ®dom_VI,
+ ®dom_VN,
+ ®dom_VU,
+ ®dom_WF,
+ ®dom_YE,
+ ®dom_ZM,
+ ®dom_YT,
+ ®dom_ZA,
+ ®dom_ZW,
+};
+
+int reg_regdb_size1 = ARRAY_SIZE(reg_regdb1);
+
+
diff --git a/lynq/MD310EU/ap/os/linux/linux-3.4.x/drivers/net/wireless/aic8800/regdb.c b/lynq/MD310EU/ap/os/linux/linux-3.4.x/drivers/net/wireless/aic8800/regdb.c
new file mode 100644
index 0000000..47bb3dc
--- /dev/null
+++ b/lynq/MD310EU/ap/os/linux/linux-3.4.x/drivers/net/wireless/aic8800/regdb.c
@@ -0,0 +1,2882 @@
+#include <linux/nl80211.h>
+#include <net/cfg80211.h>
+#include <linux/version.h>
+
+//#include "regdb.h"
+
+#if LINUX_VERSION_CODE < KERNEL_VERSION(3, 15, 0)
+#define REG_RULE_EXT(start, end, bw, gain, eirp, dfs_cac, reg_flags) \
+{ \
+ .freq_range.start_freq_khz = MHZ_TO_KHZ(start), \
+ .freq_range.end_freq_khz = MHZ_TO_KHZ(end), \
+ .freq_range.max_bandwidth_khz = MHZ_TO_KHZ(bw), \
+ .power_rule.max_antenna_gain = DBI_TO_MBI(gain),\
+ .power_rule.max_eirp = DBM_TO_MBM(eirp), \
+ .flags = reg_flags, \
+}
+#define NL80211_RRF_AUTO_BW 0
+#endif
+
+static const struct ieee80211_regdomain regdom_00 = {
+ .n_reg_rules = 2,
+ .alpha2 = "00",
+ .reg_rules = {
+ // 1...14
+ REG_RULE(2390 - 10, 2510 + 10, 40, 0, 20, 0),
+ // 36...165
+ REG_RULE(5150 - 10, 5970 + 10, 80, 0, 20, 0),
+ }
+};
+
+static const struct ieee80211_regdomain regdom_AD = {
+ .alpha2 = "AD",
+ .reg_rules = {
+ REG_RULE_EXT(2402, 2482, 40, 0, 20, 0, 0),
+ REG_RULE_EXT(5170, 5250, 80, 0, 20, 0, 0),
+ REG_RULE_EXT(5250, 5330, 80, 0, 20, 0,
+ NL80211_RRF_DFS | 0),
+ REG_RULE_EXT(5490, 5710, 80, 0, 27, 0,
+ NL80211_RRF_DFS | 0),
+ REG_RULE_EXT(57000, 66000, 2160, 0, 40, 0, 0),
+ },
+ .n_reg_rules = 5
+};
+
+static const struct ieee80211_regdomain regdom_AE = {
+ .alpha2 = "AE",
+ .dfs_region = NL80211_DFS_FCC,
+ .reg_rules = {
+ REG_RULE_EXT(2402, 2482, 40, 0, 20, 0, 0),
+ REG_RULE_EXT(5170, 5250, 80, 0, 17, 0,
+ NL80211_RRF_AUTO_BW | 0),
+ REG_RULE_EXT(5250, 5330, 80, 0, 24, 0,
+ NL80211_RRF_DFS |
+ NL80211_RRF_AUTO_BW | 0),
+ REG_RULE_EXT(5490, 5730, 160, 0, 24, 0,
+ NL80211_RRF_DFS | 0),
+ //REG_RULE_EXT(5735, 5835, 80, 0, 30, 0, 0),
+ },
+ .n_reg_rules = 4
+};
+
+static const struct ieee80211_regdomain regdom_AF = {
+ .alpha2 = "AF",
+ .dfs_region = NL80211_DFS_ETSI,
+ .reg_rules = {
+ REG_RULE_EXT(2402, 2482, 40, 0, 20, 0, 0),
+ REG_RULE_EXT(5170, 5250, 80, 0, 20, 0,
+ NL80211_RRF_AUTO_BW | 0),
+ REG_RULE_EXT(5250, 5330, 80, 0, 20, 0,
+ NL80211_RRF_DFS |
+ NL80211_RRF_AUTO_BW | 0),
+ REG_RULE_EXT(5490, 5710, 160, 0, 27, 0,
+ NL80211_RRF_DFS | 0),
+ },
+ .n_reg_rules = 4
+};
+
+static const struct ieee80211_regdomain regdom_AI = {
+ .alpha2 = "AI",
+ .dfs_region = NL80211_DFS_ETSI,
+ .reg_rules = {
+ REG_RULE_EXT(2402, 2482, 40, 0, 20, 0, 0),
+ REG_RULE_EXT(5170, 5250, 80, 0, 20, 0,
+ NL80211_RRF_AUTO_BW | 0),
+ REG_RULE_EXT(5250, 5330, 80, 0, 20, 0,
+ NL80211_RRF_DFS |
+ NL80211_RRF_AUTO_BW | 0),
+ REG_RULE_EXT(5490, 5710, 160, 0, 27, 0,
+ NL80211_RRF_DFS | 0),
+ },
+ .n_reg_rules = 4
+};
+
+static const struct ieee80211_regdomain regdom_AL = {
+ .alpha2 = "AL",
+ .dfs_region = NL80211_DFS_ETSI,
+ .reg_rules = {
+ REG_RULE_EXT(2402, 2482, 40, 0, 20, 0, 0),
+ REG_RULE_EXT(5170, 5250, 80, 0, 20, 0,
+ NL80211_RRF_AUTO_BW | 0),
+ REG_RULE_EXT(5250, 5330, 80, 0, 20, 0,
+ NL80211_RRF_DFS |
+ NL80211_RRF_AUTO_BW | 0),
+ REG_RULE_EXT(5490, 5710, 160, 0, 27, 0,
+ NL80211_RRF_DFS | 0),
+ },
+ .n_reg_rules = 4
+};
+
+static const struct ieee80211_regdomain regdom_AM = {
+ .alpha2 = "AM",
+ .dfs_region = NL80211_DFS_ETSI,
+ .reg_rules = {
+ REG_RULE_EXT(2402, 2482, 40, 0, 20, 0, 0),
+ REG_RULE_EXT(5170, 5250, 80, 0, 18, 0, 0),
+ REG_RULE_EXT(5250, 5330, 80, 0, 18, 0,
+ NL80211_RRF_DFS | 0),
+ },
+ .n_reg_rules = 3
+};
+
+static const struct ieee80211_regdomain regdom_AN = {
+ .alpha2 = "AN",
+ .dfs_region = NL80211_DFS_ETSI,
+ .reg_rules = {
+ REG_RULE_EXT(2402, 2482, 40, 0, 20, 0, 0),
+ REG_RULE_EXT(5170, 5250, 80, 0, 20, 0,
+ NL80211_RRF_AUTO_BW | 0),
+ REG_RULE_EXT(5250, 5330, 80, 0, 20, 0,
+ NL80211_RRF_DFS |
+ NL80211_RRF_AUTO_BW | 0),
+ REG_RULE_EXT(5490, 5710, 160, 0, 27, 0,
+ NL80211_RRF_DFS | 0),
+ },
+ .n_reg_rules = 4
+};
+
+static const struct ieee80211_regdomain regdom_AR = {
+ .alpha2 = "AR",
+ .dfs_region = NL80211_DFS_FCC,
+ .reg_rules = {
+ REG_RULE_EXT(2402, 2482, 40, 0, 20, 0, 0),
+ //REG_RULE_EXT(5170, 5250, 80, 0, 17, 0,
+ // NL80211_RRF_AUTO_BW | 0),
+ //REG_RULE_EXT(5250, 5330, 80, 0, 24, 0,
+ // NL80211_RRF_DFS |
+ // NL80211_RRF_AUTO_BW | 0),
+ REG_RULE_EXT(5270, 5330, 40, 0, 24, 0,
+ NL80211_RRF_DFS |
+ NL80211_RRF_AUTO_BW | 0),
+ //REG_RULE_EXT(5490, 5730, 160, 0, 24, 0,
+ // NL80211_RRF_DFS | 0),
+ REG_RULE_EXT(5735, 5815, 80, 0, 30, 0, 0),
+ },
+ .n_reg_rules = 3
+};
+
+static const struct ieee80211_regdomain regdom_AS = {
+ .alpha2 = "AS",
+ .dfs_region = NL80211_DFS_FCC,
+ .reg_rules = {
+ REG_RULE_EXT(2402, 2472, 40, 0, 30, 0, 0),
+ REG_RULE_EXT(5170, 5250, 80, 0, 24, 0,
+ NL80211_RRF_AUTO_BW | 0),
+ REG_RULE_EXT(5250, 5330, 80, 0, 24, 0,
+ NL80211_RRF_DFS |
+ NL80211_RRF_AUTO_BW | 0),
+ REG_RULE_EXT(5490, 5730, 160, 0, 24, 0,
+ NL80211_RRF_DFS | 0),
+ REG_RULE_EXT(5735, 5835, 80, 0, 30, 0, 0),
+ },
+ .n_reg_rules = 5
+};
+
+static const struct ieee80211_regdomain regdom_AT = {
+ .alpha2 = "AT",
+ .dfs_region = NL80211_DFS_ETSI,
+ .reg_rules = {
+ REG_RULE_EXT(2402, 2482, 40, 0, 20, 0, 0),
+ REG_RULE_EXT(5170, 5250, 80, 0, 20, 0,
+ NL80211_RRF_AUTO_BW | 0),
+ REG_RULE_EXT(5250, 5330, 80, 0, 20, 0,
+ NL80211_RRF_DFS |
+ NL80211_RRF_AUTO_BW | 0),
+ REG_RULE_EXT(5490, 5710, 160, 0, 27, 0,
+ NL80211_RRF_DFS | 0),
+ REG_RULE_EXT(57000, 66000, 2160, 0, 40, 0, 0),
+ },
+ .n_reg_rules = 5
+};
+
+static const struct ieee80211_regdomain regdom_AU = {
+ .alpha2 = "AU",
+ .reg_rules = {
+ REG_RULE_EXT(2402, 2482, 40, 0, 20, 0, 0),
+ REG_RULE_EXT(5170, 5250, 80, 0, 17, 0,
+ NL80211_RRF_AUTO_BW | 0),
+ REG_RULE_EXT(5250, 5330, 80, 0, 24, 0,
+ NL80211_RRF_DFS |
+ NL80211_RRF_AUTO_BW | 0),
+ REG_RULE_EXT(5490, 5710, 160, 0, 24, 0,
+ NL80211_RRF_DFS | 0),
+ REG_RULE_EXT(5735, 5835, 80, 0, 30, 0, 0),
+ },
+ .n_reg_rules = 5
+};
+
+static const struct ieee80211_regdomain regdom_AW = {
+ .alpha2 = "AW",
+ .dfs_region = NL80211_DFS_ETSI,
+ .reg_rules = {
+ REG_RULE_EXT(2402, 2482, 40, 0, 20, 0, 0),
+ REG_RULE_EXT(5170, 5250, 80, 0, 20, 0,
+ NL80211_RRF_AUTO_BW | 0),
+ REG_RULE_EXT(5250, 5330, 80, 0, 20, 0,
+ NL80211_RRF_DFS |
+ NL80211_RRF_AUTO_BW | 0),
+ REG_RULE_EXT(5490, 5710, 160, 0, 27, 0,
+ NL80211_RRF_DFS | 0),
+ },
+ .n_reg_rules = 4
+};
+
+static const struct ieee80211_regdomain regdom_AZ = {
+ .alpha2 = "AZ",
+ .dfs_region = NL80211_DFS_ETSI,
+ .reg_rules = {
+ REG_RULE_EXT(2402, 2482, 40, 0, 20, 0, 0),
+ REG_RULE_EXT(5170, 5250, 80, 0, 18, 0,
+ NL80211_RRF_AUTO_BW | 0),
+ REG_RULE_EXT(5250, 5330, 80, 0, 18, 0,
+ NL80211_RRF_DFS |
+ NL80211_RRF_AUTO_BW | 0),
+ },
+ .n_reg_rules = 3
+};
+
+static const struct ieee80211_regdomain regdom_BA = {
+ .alpha2 = "BA",
+ .dfs_region = NL80211_DFS_ETSI,
+ .reg_rules = {
+ REG_RULE_EXT(2402, 2482, 40, 0, 20, 0, 0),
+ REG_RULE_EXT(5170, 5250, 80, 0, 20, 0,
+ NL80211_RRF_AUTO_BW | 0),
+ REG_RULE_EXT(5250, 5330, 80, 0, 20, 0,
+ NL80211_RRF_DFS |
+ NL80211_RRF_AUTO_BW | 0),
+ REG_RULE_EXT(5490, 5710, 160, 0, 27, 0,
+ NL80211_RRF_DFS | 0),
+ REG_RULE_EXT(57000, 66000, 2160, 0, 40, 0, 0),
+ },
+ .n_reg_rules = 5
+};
+
+static const struct ieee80211_regdomain regdom_BB = {
+ .alpha2 = "BB",
+ .dfs_region = NL80211_DFS_FCC,
+ .reg_rules = {
+ REG_RULE_EXT(2402, 2482, 40, 0, 20, 0, 0),
+ REG_RULE_EXT(5170, 5250, 80, 0, 23, 0,
+ NL80211_RRF_AUTO_BW | 0),
+ REG_RULE_EXT(5250, 5330, 80, 0, 23, 0,
+ NL80211_RRF_DFS |
+ NL80211_RRF_AUTO_BW | 0),
+ REG_RULE_EXT(5735, 5835, 80, 0, 30, 0, 0),
+ },
+ .n_reg_rules = 4
+};
+
+static const struct ieee80211_regdomain regdom_BD = {
+ .alpha2 = "BD",
+ .dfs_region = NL80211_DFS_JP,
+ .reg_rules = {
+ REG_RULE_EXT(2402, 2482, 40, 0, 20, 0, 0),
+ REG_RULE_EXT(5735, 5835, 80, 0, 30, 0, 0),
+ },
+ .n_reg_rules = 2
+};
+
+static const struct ieee80211_regdomain regdom_BE = {
+ .alpha2 = "BE",
+ .dfs_region = NL80211_DFS_ETSI,
+ .reg_rules = {
+ REG_RULE_EXT(2402, 2482, 40, 0, 20, 0, 0),
+ REG_RULE_EXT(5170, 5250, 80, 0, 20, 0,
+ NL80211_RRF_AUTO_BW | 0),
+ REG_RULE_EXT(5250, 5330, 80, 0, 20, 0,
+ NL80211_RRF_DFS |
+ NL80211_RRF_AUTO_BW | 0),
+ REG_RULE_EXT(5490, 5710, 160, 0, 27, 0,
+ NL80211_RRF_DFS | 0),
+ REG_RULE_EXT(57000, 66000, 2160, 0, 40, 0, 0),
+ },
+ .n_reg_rules = 5
+};
+
+static const struct ieee80211_regdomain regdom_BF = {
+ .alpha2 = "BF",
+ .dfs_region = NL80211_DFS_FCC,
+ .reg_rules = {
+ REG_RULE_EXT(2402, 2482, 40, 0, 20, 0, 0),
+ REG_RULE_EXT(5170, 5250, 80, 0, 17, 0,
+ NL80211_RRF_AUTO_BW | 0),
+ REG_RULE_EXT(5250, 5330, 80, 0, 24, 0,
+ NL80211_RRF_DFS |
+ NL80211_RRF_AUTO_BW | 0),
+ REG_RULE_EXT(5490, 5730, 160, 0, 24, 0,
+ NL80211_RRF_DFS | 0),
+ REG_RULE_EXT(5735, 5835, 80, 0, 30, 0, 0),
+ },
+ .n_reg_rules = 5
+};
+
+static const struct ieee80211_regdomain regdom_BG = {
+ .alpha2 = "BG",
+ .dfs_region = NL80211_DFS_ETSI,
+ .reg_rules = {
+ REG_RULE_EXT(2402, 2482, 40, 0, 20, 0, 0),
+ REG_RULE_EXT(5170, 5250, 80, 0, 20, 0,
+ NL80211_RRF_AUTO_BW | 0),
+ REG_RULE_EXT(5250, 5330, 80, 0, 20, 0,
+ NL80211_RRF_DFS |
+ NL80211_RRF_AUTO_BW | 0),
+ REG_RULE_EXT(5490, 5710, 160, 0, 27, 0,
+ NL80211_RRF_DFS | 0),
+ REG_RULE_EXT(57000, 66000, 2160, 0, 40, 0, 0),
+ },
+ .n_reg_rules = 5
+};
+
+static const struct ieee80211_regdomain regdom_BH = {
+ .alpha2 = "BH",
+ .dfs_region = NL80211_DFS_JP,
+ .reg_rules = {
+ REG_RULE_EXT(2402, 2482, 40, 0, 20, 0, 0),
+ REG_RULE_EXT(5170, 5250, 80, 0, 20, 0, 0),
+ REG_RULE_EXT(5250, 5330, 80, 0, 20, 0,
+ NL80211_RRF_DFS | 0),
+ REG_RULE_EXT(5735, 5835, 80, 0, 20, 0, 0),
+ },
+ .n_reg_rules = 4
+};
+
+static const struct ieee80211_regdomain regdom_BL = {
+ .alpha2 = "BL",
+ .dfs_region = NL80211_DFS_ETSI,
+ .reg_rules = {
+ REG_RULE_EXT(2402, 2482, 40, 0, 20, 0, 0),
+ REG_RULE_EXT(5170, 5250, 80, 0, 20, 0,
+ NL80211_RRF_AUTO_BW | 0),
+ REG_RULE_EXT(5250, 5330, 80, 0, 20, 0,
+ NL80211_RRF_DFS |
+ NL80211_RRF_AUTO_BW | 0),
+ REG_RULE_EXT(5490, 5710, 160, 0, 27, 0,
+ NL80211_RRF_DFS | 0),
+ },
+ .n_reg_rules = 4
+};
+
+static const struct ieee80211_regdomain regdom_BM = {
+ .alpha2 = "BM",
+ .dfs_region = NL80211_DFS_FCC,
+ .reg_rules = {
+ REG_RULE_EXT(2402, 2472, 40, 0, 30, 0, 0),
+ REG_RULE_EXT(5170, 5250, 80, 0, 24, 0,
+ NL80211_RRF_AUTO_BW | 0),
+ REG_RULE_EXT(5250, 5330, 80, 0, 24, 0,
+ NL80211_RRF_DFS |
+ NL80211_RRF_AUTO_BW | 0),
+ REG_RULE_EXT(5490, 5730, 160, 0, 24, 0,
+ NL80211_RRF_DFS | 0),
+ REG_RULE_EXT(5735, 5835, 80, 0, 30, 0, 0),
+ },
+ .n_reg_rules = 5
+};
+
+static const struct ieee80211_regdomain regdom_BN = {
+ .alpha2 = "BN",
+ .dfs_region = NL80211_DFS_JP,
+ .reg_rules = {
+ REG_RULE_EXT(2402, 2482, 40, 0, 20, 0, 0),
+ REG_RULE_EXT(5170, 5250, 80, 0, 20, 0,
+ NL80211_RRF_AUTO_BW | 0),
+ REG_RULE_EXT(5250, 5330, 80, 0, 20, 0,
+ NL80211_RRF_DFS |
+ NL80211_RRF_AUTO_BW | 0),
+ REG_RULE_EXT(5735, 5835, 80, 0, 20, 0, 0),
+ },
+ .n_reg_rules = 4
+};
+
+static const struct ieee80211_regdomain regdom_BO = {
+ .alpha2 = "BO",
+ .dfs_region = NL80211_DFS_JP,
+ .reg_rules = {
+ REG_RULE_EXT(2402, 2482, 40, 0, 20, 0, 0),
+ REG_RULE_EXT(5250, 5330, 80, 0, 30, 0,
+ NL80211_RRF_DFS | 0),
+ REG_RULE_EXT(5735, 5835, 80, 0, 30, 0, 0),
+ },
+ .n_reg_rules = 3
+};
+
+static const struct ieee80211_regdomain regdom_BR = {
+ .alpha2 = "BR",
+ .dfs_region = NL80211_DFS_FCC,
+ .reg_rules = {
+ REG_RULE_EXT(2402, 2482, 40, 0, 20, 0, 0),
+ REG_RULE_EXT(5170, 5250, 80, 0, 17, 0,
+ NL80211_RRF_AUTO_BW | 0),
+ REG_RULE_EXT(5250, 5330, 80, 0, 24, 0,
+ NL80211_RRF_DFS |
+ NL80211_RRF_AUTO_BW | 0),
+ REG_RULE_EXT(5490, 5730, 160, 0, 24, 0,
+ NL80211_RRF_DFS | 0),
+ REG_RULE_EXT(5735, 5835, 80, 0, 30, 0, 0),
+ },
+ .n_reg_rules = 5
+};
+
+static const struct ieee80211_regdomain regdom_BS = {
+ .alpha2 = "BS",
+ .dfs_region = NL80211_DFS_FCC,
+ .reg_rules = {
+ REG_RULE_EXT(2402, 2482, 40, 0, 20, 0, 0),
+ REG_RULE_EXT(5170, 5250, 80, 0, 24, 0,
+ NL80211_RRF_AUTO_BW | 0),
+ REG_RULE_EXT(5250, 5330, 80, 0, 24, 0,
+ NL80211_RRF_DFS |
+ NL80211_RRF_AUTO_BW | 0),
+ REG_RULE_EXT(5490, 5730, 160, 0, 24, 0,
+ NL80211_RRF_DFS | 0),
+ REG_RULE_EXT(5735, 5835, 80, 0, 30, 0, 0),
+ },
+ .n_reg_rules = 5
+};
+
+static const struct ieee80211_regdomain regdom_BT = {
+ .alpha2 = "BT",
+ .dfs_region = NL80211_DFS_ETSI,
+ .reg_rules = {
+ REG_RULE_EXT(2402, 2482, 40, 0, 20, 0, 0),
+ REG_RULE_EXT(5170, 5250, 80, 0, 20, 0,
+ NL80211_RRF_AUTO_BW | 0),
+ REG_RULE_EXT(5250, 5330, 80, 0, 20, 0,
+ NL80211_RRF_DFS |
+ NL80211_RRF_AUTO_BW | 0),
+ REG_RULE_EXT(5490, 5710, 160, 0, 27, 0,
+ NL80211_RRF_DFS | 0),
+ },
+ .n_reg_rules = 4
+};
+
+static const struct ieee80211_regdomain regdom_BY = {
+ .alpha2 = "BY",
+ .dfs_region = NL80211_DFS_ETSI,
+ .reg_rules = {
+ REG_RULE_EXT(2402, 2482, 40, 0, 20, 0, 0),
+ REG_RULE_EXT(5170, 5250, 80, 0, 20, 0,
+ NL80211_RRF_AUTO_BW | 0),
+ REG_RULE_EXT(5250, 5330, 80, 0, 20, 0,
+ NL80211_RRF_DFS |
+ NL80211_RRF_AUTO_BW | 0),
+ REG_RULE_EXT(5490, 5710, 160, 0, 27, 0,
+ NL80211_RRF_DFS | 0),
+ },
+ .n_reg_rules = 4
+};
+
+static const struct ieee80211_regdomain regdom_BZ = {
+ .alpha2 = "BZ",
+ .dfs_region = NL80211_DFS_JP,
+ .reg_rules = {
+ REG_RULE_EXT(2402, 2482, 40, 0, 30, 0, 0),
+ REG_RULE_EXT(5735, 5835, 80, 0, 30, 0, 0),
+ },
+ .n_reg_rules = 2
+};
+
+static const struct ieee80211_regdomain regdom_CA = {
+ .alpha2 = "CA",
+ .dfs_region = NL80211_DFS_FCC,
+ .reg_rules = {
+ REG_RULE_EXT(2402, 2472, 40, 0, 30, 0, 0),
+ REG_RULE_EXT(5170, 5250, 80, 0, 17, 0,
+ NL80211_RRF_AUTO_BW | 0),
+ REG_RULE_EXT(5250, 5330, 80, 0, 24, 0,
+ NL80211_RRF_DFS |
+ NL80211_RRF_AUTO_BW | 0),
+ REG_RULE_EXT(5490, 5730, 160, 0, 24, 0,
+ NL80211_RRF_DFS | 0),
+ REG_RULE_EXT(5735, 5835, 80, 0, 30, 0, 0),
+ },
+ .n_reg_rules = 5
+};
+
+static const struct ieee80211_regdomain regdom_CF = {
+ .alpha2 = "CF",
+ .dfs_region = NL80211_DFS_FCC,
+ .reg_rules = {
+ REG_RULE_EXT(2402, 2482, 40, 0, 20, 0, 0),
+ REG_RULE_EXT(5170, 5250, 40, 0, 17, 0, 0),
+ REG_RULE_EXT(5250, 5330, 40, 0, 24, 0,
+ NL80211_RRF_DFS | 0),
+ REG_RULE_EXT(5490, 5730, 40, 0, 24, 0,
+ NL80211_RRF_DFS | 0),
+ REG_RULE_EXT(5735, 5835, 40, 0, 30, 0, 0),
+ },
+ .n_reg_rules = 5
+};
+
+static const struct ieee80211_regdomain regdom_CH = {
+ .alpha2 = "CH",
+ .dfs_region = NL80211_DFS_ETSI,
+ .reg_rules = {
+ REG_RULE_EXT(2402, 2482, 40, 0, 20, 0, 0),
+ REG_RULE_EXT(5170, 5250, 80, 0, 20, 0,
+ NL80211_RRF_AUTO_BW | 0),
+ REG_RULE_EXT(5250, 5330, 80, 0, 20, 0,
+ NL80211_RRF_DFS |
+ NL80211_RRF_AUTO_BW | 0),
+ REG_RULE_EXT(5490, 5710, 160, 0, 27, 0,
+ NL80211_RRF_DFS | 0),
+ REG_RULE_EXT(57000, 66000, 2160, 0, 40, 0, 0),
+ },
+ .n_reg_rules = 5
+};
+
+static const struct ieee80211_regdomain regdom_CI = {
+ .alpha2 = "CI",
+ .dfs_region = NL80211_DFS_FCC,
+ .reg_rules = {
+ REG_RULE_EXT(2402, 2482, 40, 0, 20, 0, 0),
+ REG_RULE_EXT(5170, 5250, 80, 0, 17, 0,
+ NL80211_RRF_AUTO_BW | 0),
+ REG_RULE_EXT(5250, 5330, 80, 0, 24, 0,
+ NL80211_RRF_DFS |
+ NL80211_RRF_AUTO_BW | 0),
+ REG_RULE_EXT(5490, 5730, 160, 0, 24, 0,
+ NL80211_RRF_DFS | 0),
+ REG_RULE_EXT(5735, 5835, 80, 0, 30, 0, 0),
+ },
+ .n_reg_rules = 5
+};
+
+static const struct ieee80211_regdomain regdom_CL = {
+ .alpha2 = "CL",
+ .dfs_region = NL80211_DFS_JP,
+ .reg_rules = {
+ REG_RULE_EXT(2402, 2482, 40, 0, 20, 0, 0),
+ REG_RULE_EXT(5170, 5250, 80, 0, 20, 0,
+ NL80211_RRF_AUTO_BW | 0),
+ REG_RULE_EXT(5250, 5330, 80, 0, 20, 0,
+ NL80211_RRF_DFS |
+ NL80211_RRF_AUTO_BW | 0),
+ REG_RULE_EXT(5735, 5835, 80, 0, 20, 0, 0),
+ },
+ .n_reg_rules = 4
+};
+
+static const struct ieee80211_regdomain regdom_CN = {
+ .alpha2 = "CN",
+ .dfs_region = NL80211_DFS_FCC,
+ .reg_rules = {
+ REG_RULE_EXT(2402, 2482, 40, 0, 20, 0, 0),
+ REG_RULE_EXT(5170, 5250, 80, 0, 23, 0,
+ NL80211_RRF_AUTO_BW | 0),
+ REG_RULE_EXT(5250, 5330, 80, 0, 23, 0,
+ NL80211_RRF_DFS |
+ NL80211_RRF_AUTO_BW | 0),
+ REG_RULE_EXT(5735, 5835, 80, 0, 30, 0, 0),
+ REG_RULE_EXT(57240, 59400, 2160, 0, 28, 0, 0),
+ REG_RULE_EXT(59400, 63720, 2160, 0, 44, 0, 0),
+ REG_RULE_EXT(63720, 65880, 2160, 0, 28, 0, 0),
+ },
+ .n_reg_rules = 7
+};
+
+static const struct ieee80211_regdomain regdom_CO = {
+ .alpha2 = "CO",
+ .dfs_region = NL80211_DFS_FCC,
+ .reg_rules = {
+ REG_RULE_EXT(2402, 2482, 40, 0, 20, 0, 0),
+ REG_RULE_EXT(5170, 5250, 80, 0, 17, 0,
+ NL80211_RRF_AUTO_BW | 0),
+ REG_RULE_EXT(5250, 5330, 80, 0, 24, 0,
+ NL80211_RRF_DFS |
+ NL80211_RRF_AUTO_BW | 0),
+ REG_RULE_EXT(5490, 5730, 160, 0, 24, 0,
+ NL80211_RRF_DFS | 0),
+ REG_RULE_EXT(5735, 5835, 80, 0, 30, 0, 0),
+ },
+ .n_reg_rules = 5
+};
+
+static const struct ieee80211_regdomain regdom_CR = {
+ .alpha2 = "CR",
+ .dfs_region = NL80211_DFS_FCC,
+ .reg_rules = {
+ REG_RULE_EXT(2402, 2482, 40, 0, 20, 0, 0),
+ REG_RULE_EXT(5170, 5250, 80, 0, 17, 0, 0),
+ REG_RULE_EXT(5250, 5330, 80, 0, 24, 0,
+ NL80211_RRF_DFS | 0),
+ REG_RULE_EXT(5490, 5730, 80, 0, 24, 0,
+ NL80211_RRF_DFS | 0),
+ REG_RULE_EXT(5735, 5835, 80, 0, 30, 0, 0),
+ },
+ .n_reg_rules = 5
+};
+
+static const struct ieee80211_regdomain regdom_CX = {
+ .alpha2 = "CX",
+ .dfs_region = NL80211_DFS_FCC,
+ .reg_rules = {
+ REG_RULE_EXT(2402, 2482, 40, 0, 20, 0, 0),
+ REG_RULE_EXT(5170, 5250, 80, 0, 24, 0,
+ NL80211_RRF_AUTO_BW | 0),
+ REG_RULE_EXT(5250, 5330, 80, 0, 24, 0,
+ NL80211_RRF_DFS |
+ NL80211_RRF_AUTO_BW | 0),
+ REG_RULE_EXT(5490, 5730, 160, 0, 24, 0,
+ NL80211_RRF_DFS | 0),
+ REG_RULE_EXT(5735, 5835, 80, 0, 30, 0, 0),
+ },
+ .n_reg_rules = 5
+};
+
+static const struct ieee80211_regdomain regdom_CY = {
+ .alpha2 = "CY",
+ .dfs_region = NL80211_DFS_ETSI,
+ .reg_rules = {
+ REG_RULE_EXT(2402, 2482, 40, 0, 20, 0, 0),
+ REG_RULE_EXT(5170, 5250, 80, 0, 20, 0,
+ NL80211_RRF_AUTO_BW | 0),
+ REG_RULE_EXT(5250, 5330, 80, 0, 20, 0,
+ NL80211_RRF_DFS |
+ NL80211_RRF_AUTO_BW | 0),
+ REG_RULE_EXT(5490, 5710, 160, 0, 27, 0,
+ NL80211_RRF_DFS | 0),
+ REG_RULE_EXT(57000, 66000, 2160, 0, 40, 0, 0),
+ },
+ .n_reg_rules = 5
+};
+
+static const struct ieee80211_regdomain regdom_CZ = {
+ .alpha2 = "CZ",
+ .dfs_region = NL80211_DFS_ETSI,
+ .reg_rules = {
+ REG_RULE_EXT(2400, 2483, 40, 0, 20, 0, 0),
+ REG_RULE_EXT(5150, 5250, 80, 0, 23, 0,
+ NL80211_RRF_NO_OUTDOOR |
+ NL80211_RRF_AUTO_BW | 0),
+ REG_RULE_EXT(5250, 5350, 80, 0, 20, 0,
+ NL80211_RRF_NO_OUTDOOR |
+ NL80211_RRF_DFS |
+ NL80211_RRF_AUTO_BW | 0),
+ REG_RULE_EXT(5470, 5725, 160, 0, 27, 0,
+ NL80211_RRF_DFS | 0),
+ REG_RULE_EXT(57000, 66000, 2160, 0, 40, 0, 0),
+ },
+ .n_reg_rules = 5
+};
+
+static const struct ieee80211_regdomain regdom_DE = {
+ .alpha2 = "DE",
+ .dfs_region = NL80211_DFS_ETSI,
+ .reg_rules = {
+ REG_RULE_EXT(2400, 2483, 40, 0, 20, 0, 0),
+ REG_RULE_EXT(5150, 5250, 80, 0, 20, 0,
+ NL80211_RRF_NO_OUTDOOR |
+ NL80211_RRF_AUTO_BW | 0),
+ REG_RULE_EXT(5250, 5350, 80, 0, 20, 0,
+ NL80211_RRF_NO_OUTDOOR |
+ NL80211_RRF_DFS |
+ NL80211_RRF_AUTO_BW | 0),
+ REG_RULE_EXT(5470, 5695, 160, 0, 27, 0,
+ NL80211_RRF_DFS | 0),
+ /*REG_RULE_EXT(5470, 5725, 160, 0, 27, 0,
+ NL80211_RRF_DFS | 0),*/
+ REG_RULE_EXT(57000, 66000, 2160, 0, 40, 0, 0),
+ },
+ .n_reg_rules = 5
+};
+
+static const struct ieee80211_regdomain regdom_DK = {
+ .alpha2 = "DK",
+ .dfs_region = NL80211_DFS_ETSI,
+ .reg_rules = {
+ REG_RULE_EXT(2402, 2482, 40, 0, 20, 0, 0),
+ REG_RULE_EXT(5170, 5250, 80, 0, 20, 0,
+ NL80211_RRF_AUTO_BW | 0),
+ REG_RULE_EXT(5250, 5330, 80, 0, 20, 0,
+ NL80211_RRF_DFS |
+ NL80211_RRF_AUTO_BW | 0),
+ REG_RULE_EXT(5490, 5710, 160, 0, 27, 0,
+ NL80211_RRF_DFS | 0),
+ REG_RULE_EXT(57000, 66000, 2160, 0, 40, 0, 0),
+ },
+ .n_reg_rules = 5
+};
+
+static const struct ieee80211_regdomain regdom_DM = {
+ .alpha2 = "DM",
+ .dfs_region = NL80211_DFS_FCC,
+ .reg_rules = {
+ REG_RULE_EXT(2402, 2472, 40, 0, 30, 0, 0),
+ REG_RULE_EXT(5170, 5250, 80, 0, 17, 0,
+ NL80211_RRF_AUTO_BW | 0),
+ REG_RULE_EXT(5250, 5330, 80, 0, 23, 0,
+ NL80211_RRF_DFS |
+ NL80211_RRF_AUTO_BW | 0),
+ REG_RULE_EXT(5735, 5835, 80, 0, 30, 0, 0),
+ },
+ .n_reg_rules = 4
+};
+
+static const struct ieee80211_regdomain regdom_DO = {
+ .alpha2 = "DO",
+ .dfs_region = NL80211_DFS_FCC,
+ .reg_rules = {
+ REG_RULE_EXT(2402, 2472, 40, 0, 30, 0, 0),
+ REG_RULE_EXT(5170, 5250, 80, 0, 17, 0,
+ NL80211_RRF_AUTO_BW | 0),
+ REG_RULE_EXT(5250, 5330, 80, 0, 23, 0,
+ NL80211_RRF_DFS |
+ NL80211_RRF_AUTO_BW | 0),
+ REG_RULE_EXT(5735, 5835, 80, 0, 30, 0, 0),
+ },
+ .n_reg_rules = 4
+};
+
+static const struct ieee80211_regdomain regdom_DZ = {
+ .alpha2 = "DZ",
+ .dfs_region = NL80211_DFS_JP,
+ .reg_rules = {
+ REG_RULE_EXT(2402, 2482, 40, 0, 20, 0, 0),
+ REG_RULE_EXT(5170, 5250, 80, 0, 23, 0,
+ NL80211_RRF_AUTO_BW | 0),
+ REG_RULE_EXT(5250, 5330, 80, 0, 23, 0,
+ NL80211_RRF_DFS |
+ NL80211_RRF_AUTO_BW | 0),
+ REG_RULE_EXT(5490, 5670, 160, 0, 23, 0,
+ NL80211_RRF_DFS | 0),
+ },
+ .n_reg_rules = 4
+};
+
+static const struct ieee80211_regdomain regdom_EC = {
+ .alpha2 = "EC",
+ .dfs_region = NL80211_DFS_FCC,
+ .reg_rules = {
+ REG_RULE_EXT(2402, 2482, 40, 0, 20, 0, 0),
+ REG_RULE_EXT(5170, 5250, 80, 0, 17, 0, 0),
+ REG_RULE_EXT(5250, 5330, 80, 0, 24, 0,
+ NL80211_RRF_DFS | 0),
+ REG_RULE_EXT(5490, 5730, 80, 0, 24, 0,
+ NL80211_RRF_DFS | 0),
+ REG_RULE_EXT(5735, 5835, 80, 0, 30, 0, 0),
+ },
+ .n_reg_rules = 5
+};
+
+static const struct ieee80211_regdomain regdom_EE = {
+ .alpha2 = "EE",
+ .dfs_region = NL80211_DFS_ETSI,
+ .reg_rules = {
+ REG_RULE_EXT(2402, 2482, 40, 0, 20, 0, 0),
+ REG_RULE_EXT(5170, 5250, 80, 0, 20, 0,
+ NL80211_RRF_AUTO_BW | 0),
+ REG_RULE_EXT(5250, 5330, 80, 0, 20, 0,
+ NL80211_RRF_DFS |
+ NL80211_RRF_AUTO_BW | 0),
+ REG_RULE_EXT(5490, 5710, 160, 0, 27, 0,
+ NL80211_RRF_DFS | 0),
+ REG_RULE_EXT(57000, 66000, 2160, 0, 40, 0, 0),
+ },
+ .n_reg_rules = 5
+};
+
+static const struct ieee80211_regdomain regdom_EG = {
+ .alpha2 = "EG",
+ .dfs_region = NL80211_DFS_ETSI,
+ .reg_rules = {
+ REG_RULE_EXT(2402, 2482, 40, 0, 20, 0, 0),
+ REG_RULE_EXT(5170, 5250, 80, 0, 20, 0, 0),
+ REG_RULE_EXT(5250, 5330, 80, 0, 20, 0,
+ NL80211_RRF_DFS | 0),
+ },
+ .n_reg_rules = 3
+};
+
+static const struct ieee80211_regdomain regdom_ES = {
+ .alpha2 = "ES",
+ .dfs_region = NL80211_DFS_ETSI,
+ .reg_rules = {
+ REG_RULE_EXT(2400, 2483, 40, 0, 20, 0, 0),
+ REG_RULE_EXT(5150, 5250, 80, 0, 23, 0,
+ NL80211_RRF_NO_OUTDOOR |
+ NL80211_RRF_AUTO_BW | 0),
+ REG_RULE_EXT(5250, 5350, 80, 0, 20, 0,
+ NL80211_RRF_NO_OUTDOOR |
+ NL80211_RRF_DFS |
+ NL80211_RRF_AUTO_BW | 0),
+ REG_RULE_EXT(5470, 5725, 160, 0, 27, 0,
+ NL80211_RRF_DFS | 0),
+ REG_RULE_EXT(57000, 66000, 2160, 0, 40, 0, 0),
+ },
+ .n_reg_rules = 5
+};
+
+static const struct ieee80211_regdomain regdom_ET = {
+ .alpha2 = "ET",
+ .dfs_region = NL80211_DFS_ETSI,
+ .reg_rules = {
+ REG_RULE_EXT(2402, 2482, 40, 0, 20, 0, 0),
+ REG_RULE_EXT(5170, 5250, 80, 0, 20, 0,
+ NL80211_RRF_AUTO_BW | 0),
+ REG_RULE_EXT(5250, 5330, 80, 0, 20, 0,
+ NL80211_RRF_DFS |
+ NL80211_RRF_AUTO_BW | 0),
+ REG_RULE_EXT(5490, 5710, 160, 0, 27, 0,
+ NL80211_RRF_DFS | 0),
+ },
+ .n_reg_rules = 4
+};
+
+static const struct ieee80211_regdomain regdom_FI = {
+ .alpha2 = "FI",
+ .dfs_region = NL80211_DFS_ETSI,
+ .reg_rules = {
+ REG_RULE_EXT(2402, 2482, 40, 0, 20, 0, 0),
+ REG_RULE_EXT(5170, 5250, 80, 0, 20, 0,
+ NL80211_RRF_AUTO_BW | 0),
+ REG_RULE_EXT(5250, 5330, 80, 0, 20, 0,
+ NL80211_RRF_DFS |
+ NL80211_RRF_AUTO_BW | 0),
+ REG_RULE_EXT(5490, 5710, 160, 0, 27, 0,
+ NL80211_RRF_DFS | 0),
+ REG_RULE_EXT(57000, 66000, 2160, 0, 40, 0, 0),
+ },
+ .n_reg_rules = 5
+};
+
+static const struct ieee80211_regdomain regdom_FM = {
+ .alpha2 = "FM",
+ .dfs_region = NL80211_DFS_FCC,
+ .reg_rules = {
+ REG_RULE_EXT(2402, 2472, 40, 0, 30, 0, 0),
+ REG_RULE_EXT(5170, 5250, 80, 0, 24, 0,
+ NL80211_RRF_AUTO_BW | 0),
+ REG_RULE_EXT(5250, 5330, 80, 0, 24, 0,
+ NL80211_RRF_DFS |
+ NL80211_RRF_AUTO_BW | 0),
+ REG_RULE_EXT(5490, 5730, 160, 0, 24, 0,
+ NL80211_RRF_DFS | 0),
+ REG_RULE_EXT(5735, 5835, 80, 0, 30, 0, 0),
+ },
+ .n_reg_rules = 5
+};
+
+static const struct ieee80211_regdomain regdom_FR = {
+ .alpha2 = "FR",
+ .dfs_region = NL80211_DFS_ETSI,
+ .reg_rules = {
+ REG_RULE_EXT(2402, 2482, 40, 0, 20, 0, 0),
+ REG_RULE_EXT(5170, 5250, 80, 0, 20, 0,
+ NL80211_RRF_AUTO_BW | 0),
+ REG_RULE_EXT(5250, 5330, 80, 0, 20, 0,
+ NL80211_RRF_DFS |
+ NL80211_RRF_AUTO_BW | 0),
+ REG_RULE_EXT(5490, 5695, 160, 0, 27, 0,
+ NL80211_RRF_DFS | 0),
+ REG_RULE_EXT(57000, 66000, 2160, 0, 40, 0, 0),
+ },
+ .n_reg_rules = 5
+};
+
+static const struct ieee80211_regdomain regdom_GB = {
+ .alpha2 = "GB",
+ .dfs_region = NL80211_DFS_ETSI,
+ .reg_rules = {
+ REG_RULE_EXT(2402, 2482, 40, 0, 20, 0, 0),
+ REG_RULE_EXT(5170, 5250, 80, 0, 20, 0,
+ NL80211_RRF_AUTO_BW | 0),
+ REG_RULE_EXT(5250, 5330, 80, 0, 20, 0,
+ NL80211_RRF_DFS |
+ NL80211_RRF_AUTO_BW | 0),
+ REG_RULE_EXT(5490, 5710, 160, 0, 27, 0,
+ NL80211_RRF_DFS | 0),
+ REG_RULE_EXT(57000, 66000, 2160, 0, 40, 0, 0),
+ },
+ .n_reg_rules = 5
+};
+
+static const struct ieee80211_regdomain regdom_GD = {
+ .alpha2 = "GD",
+ .dfs_region = NL80211_DFS_FCC,
+ .reg_rules = {
+ REG_RULE_EXT(2402, 2472, 40, 0, 30, 0, 0),
+ REG_RULE_EXT(5170, 5250, 80, 0, 17, 0,
+ NL80211_RRF_AUTO_BW | 0),
+ REG_RULE_EXT(5250, 5330, 80, 0, 24, 0,
+ NL80211_RRF_DFS |
+ NL80211_RRF_AUTO_BW | 0),
+ REG_RULE_EXT(5490, 5730, 160, 0, 24, 0,
+ NL80211_RRF_DFS | 0),
+ REG_RULE_EXT(5735, 5835, 80, 0, 30, 0, 0),
+ },
+ .n_reg_rules = 5
+};
+
+static const struct ieee80211_regdomain regdom_GE = {
+ .alpha2 = "GE",
+ .dfs_region = NL80211_DFS_ETSI,
+ .reg_rules = {
+ REG_RULE_EXT(2402, 2482, 40, 0, 20, 0, 0),
+ REG_RULE_EXT(5170, 5250, 80, 0, 18, 0,
+ NL80211_RRF_AUTO_BW | 0),
+ REG_RULE_EXT(5250, 5330, 80, 0, 18, 0,
+ NL80211_RRF_DFS |
+ NL80211_RRF_AUTO_BW | 0),
+ REG_RULE_EXT(57000, 66000, 2160, 0, 40, 0, 0),
+ },
+ .n_reg_rules = 4
+};
+
+static const struct ieee80211_regdomain regdom_GF = {
+ .alpha2 = "GF",
+ .dfs_region = NL80211_DFS_ETSI,
+ .reg_rules = {
+ REG_RULE_EXT(2402, 2482, 40, 0, 20, 0, 0),
+ REG_RULE_EXT(5170, 5250, 80, 0, 20, 0,
+ NL80211_RRF_AUTO_BW | 0),
+ REG_RULE_EXT(5250, 5330, 80, 0, 20, 0,
+ NL80211_RRF_DFS |
+ NL80211_RRF_AUTO_BW | 0),
+ REG_RULE_EXT(5490, 5710, 160, 0, 27, 0,
+ NL80211_RRF_DFS | 0),
+ },
+ .n_reg_rules = 4
+};
+
+static const struct ieee80211_regdomain regdom_GH = {
+ .alpha2 = "GH",
+ .dfs_region = NL80211_DFS_FCC,
+ .reg_rules = {
+ REG_RULE_EXT(2402, 2482, 40, 0, 20, 0, 0),
+ REG_RULE_EXT(5170, 5250, 80, 0, 17, 0,
+ NL80211_RRF_AUTO_BW | 0),
+ REG_RULE_EXT(5250, 5330, 80, 0, 24, 0,
+ NL80211_RRF_DFS |
+ NL80211_RRF_AUTO_BW | 0),
+ REG_RULE_EXT(5490, 5730, 160, 0, 24, 0,
+ NL80211_RRF_DFS | 0),
+ REG_RULE_EXT(5735, 5835, 80, 0, 30, 0, 0),
+ },
+ .n_reg_rules = 5
+};
+
+static const struct ieee80211_regdomain regdom_GL = {
+ .alpha2 = "GL",
+ .dfs_region = NL80211_DFS_ETSI,
+ .reg_rules = {
+ REG_RULE_EXT(2402, 2482, 40, 0, 20, 0, 0),
+ REG_RULE_EXT(5170, 5250, 80, 0, 20, 0, 0),
+ REG_RULE_EXT(5250, 5330, 80, 0, 20, 0,
+ NL80211_RRF_DFS | 0),
+ REG_RULE_EXT(5490, 5710, 80, 0, 27, 0,
+ NL80211_RRF_DFS | 0),
+ },
+ .n_reg_rules = 4
+};
+
+static const struct ieee80211_regdomain regdom_GP = {
+ .alpha2 = "GP",
+ .dfs_region = NL80211_DFS_ETSI,
+ .reg_rules = {
+ REG_RULE_EXT(2402, 2482, 40, 0, 20, 0, 0),
+ REG_RULE_EXT(5170, 5250, 80, 0, 20, 0,
+ NL80211_RRF_AUTO_BW | 0),
+ REG_RULE_EXT(5250, 5330, 80, 0, 20, 0,
+ NL80211_RRF_DFS |
+ NL80211_RRF_AUTO_BW | 0),
+ REG_RULE_EXT(5490, 5710, 160, 0, 27, 0,
+ NL80211_RRF_DFS | 0),
+ },
+ .n_reg_rules = 4
+};
+
+static const struct ieee80211_regdomain regdom_GR = {
+ .alpha2 = "GR",
+ .dfs_region = NL80211_DFS_ETSI,
+ .reg_rules = {
+ REG_RULE_EXT(2402, 2482, 40, 0, 20, 0, 0),
+ REG_RULE_EXT(5170, 5250, 80, 0, 20, 0,
+ NL80211_RRF_AUTO_BW | 0),
+ REG_RULE_EXT(5250, 5330, 80, 0, 20, 0,
+ NL80211_RRF_DFS |
+ NL80211_RRF_AUTO_BW | 0),
+ REG_RULE_EXT(5490, 5710, 160, 0, 27, 0,
+ NL80211_RRF_DFS | 0),
+ REG_RULE_EXT(57000, 66000, 2160, 0, 40, 0, 0),
+ },
+ .n_reg_rules = 5
+};
+
+static const struct ieee80211_regdomain regdom_GT = {
+ .alpha2 = "GT",
+ .dfs_region = NL80211_DFS_FCC,
+ .reg_rules = {
+ REG_RULE_EXT(2402, 2472, 40, 0, 30, 0, 0),
+ REG_RULE_EXT(5170, 5250, 80, 0, 17, 0,
+ NL80211_RRF_AUTO_BW | 0),
+ REG_RULE_EXT(5250, 5330, 80, 0, 23, 0,
+ NL80211_RRF_DFS |
+ NL80211_RRF_AUTO_BW | 0),
+ REG_RULE_EXT(5735, 5835, 80, 0, 30, 0, 0),
+ },
+ .n_reg_rules = 4
+};
+
+static const struct ieee80211_regdomain regdom_GU = {
+ .alpha2 = "GU",
+ .dfs_region = NL80211_DFS_FCC,
+ .reg_rules = {
+ REG_RULE_EXT(2402, 2472, 40, 0, 30, 0, 0),
+ REG_RULE_EXT(5170, 5250, 80, 0, 17, 0, 0),
+ REG_RULE_EXT(5250, 5330, 80, 0, 24, 0,
+ NL80211_RRF_DFS | 0),
+ REG_RULE_EXT(5490, 5730, 80, 0, 24, 0,
+ NL80211_RRF_DFS | 0),
+ REG_RULE_EXT(5735, 5835, 80, 0, 30, 0, 0),
+ },
+ .n_reg_rules = 5
+};
+
+static const struct ieee80211_regdomain regdom_GY = {
+ .alpha2 = "GY",
+ .reg_rules = {
+ REG_RULE_EXT(2402, 2482, 40, 0, 30, 0, 0),
+ REG_RULE_EXT(5735, 5835, 80, 0, 30, 0, 0),
+ },
+ .n_reg_rules = 2
+};
+
+static const struct ieee80211_regdomain regdom_HK = {
+ .alpha2 = "HK",
+ .reg_rules = {
+ REG_RULE_EXT(2402, 2482, 40, 0, 20, 0, 0),
+ REG_RULE_EXT(5170, 5250, 80, 0, 17, 0,
+ NL80211_RRF_AUTO_BW | 0),
+ REG_RULE_EXT(5250, 5330, 80, 0, 24, 0,
+ NL80211_RRF_DFS |
+ NL80211_RRF_AUTO_BW | 0),
+ REG_RULE_EXT(5490, 5710, 160, 0, 24, 0,
+ NL80211_RRF_DFS | 0),
+ REG_RULE_EXT(5735, 5835, 80, 0, 30, 0, 0),
+ },
+ .n_reg_rules = 5
+};
+
+static const struct ieee80211_regdomain regdom_HN = {
+ .alpha2 = "HN",
+ .dfs_region = NL80211_DFS_FCC,
+ .reg_rules = {
+ REG_RULE_EXT(2402, 2482, 40, 0, 20, 0, 0),
+ REG_RULE_EXT(5170, 5250, 80, 0, 17, 0,
+ NL80211_RRF_AUTO_BW | 0),
+ REG_RULE_EXT(5250, 5330, 80, 0, 24, 0,
+ NL80211_RRF_DFS |
+ NL80211_RRF_AUTO_BW | 0),
+ REG_RULE_EXT(5490, 5730, 160, 0, 24, 0,
+ NL80211_RRF_DFS | 0),
+ REG_RULE_EXT(5735, 5835, 80, 0, 30, 0, 0),
+ },
+ .n_reg_rules = 5
+};
+
+static const struct ieee80211_regdomain regdom_HR = {
+ .alpha2 = "HR",
+ .dfs_region = NL80211_DFS_ETSI,
+ .reg_rules = {
+ REG_RULE_EXT(2402, 2482, 40, 0, 20, 0, 0),
+ REG_RULE_EXT(5170, 5250, 80, 0, 20, 0,
+ NL80211_RRF_AUTO_BW | 0),
+ REG_RULE_EXT(5250, 5330, 80, 0, 20, 0,
+ NL80211_RRF_DFS |
+ NL80211_RRF_AUTO_BW | 0),
+ REG_RULE_EXT(5490, 5710, 160, 0, 27, 0,
+ NL80211_RRF_DFS | 0),
+ REG_RULE_EXT(57000, 66000, 2160, 0, 40, 0, 0),
+ },
+ .n_reg_rules = 5
+};
+
+static const struct ieee80211_regdomain regdom_HT = {
+ .alpha2 = "HT",
+ .dfs_region = NL80211_DFS_FCC,
+ .reg_rules = {
+ REG_RULE_EXT(2402, 2472, 40, 0, 30, 0, 0),
+ REG_RULE_EXT(5170, 5250, 80, 0, 24, 0,
+ NL80211_RRF_AUTO_BW | 0),
+ REG_RULE_EXT(5250, 5330, 80, 0, 24, 0,
+ NL80211_RRF_DFS |
+ NL80211_RRF_AUTO_BW | 0),
+ REG_RULE_EXT(5490, 5730, 160, 0, 24, 0,
+ NL80211_RRF_DFS | 0),
+ REG_RULE_EXT(5735, 5835, 80, 0, 30, 0, 0),
+ },
+ .n_reg_rules = 5
+};
+
+static const struct ieee80211_regdomain regdom_HU = {
+ .alpha2 = "HU",
+ .dfs_region = NL80211_DFS_ETSI,
+ .reg_rules = {
+ REG_RULE_EXT(2402, 2482, 40, 0, 20, 0, 0),
+ REG_RULE_EXT(5170, 5250, 80, 0, 20, 0,
+ NL80211_RRF_AUTO_BW | 0),
+ REG_RULE_EXT(5250, 5330, 80, 0, 20, 0,
+ NL80211_RRF_DFS |
+ NL80211_RRF_AUTO_BW | 0),
+ REG_RULE_EXT(5490, 5710, 160, 0, 27, 0,
+ NL80211_RRF_DFS | 0),
+ REG_RULE_EXT(57000, 66000, 2160, 0, 40, 0, 0),
+ },
+ .n_reg_rules = 5
+};
+
+static const struct ieee80211_regdomain regdom_ID = {
+ .alpha2 = "ID",
+ .dfs_region = NL80211_DFS_JP,
+ .reg_rules = {
+ REG_RULE_EXT(2402, 2482, 40, 0, 20, 0, 0),
+ REG_RULE_EXT(5735, 5815, 80, 0, 23, 0, 0),
+ },
+ .n_reg_rules = 2
+};
+
+static const struct ieee80211_regdomain regdom_IE = {
+ .alpha2 = "IE",
+ .dfs_region = NL80211_DFS_ETSI,
+ .reg_rules = {
+ REG_RULE_EXT(2402, 2482, 40, 0, 20, 0, 0),
+ REG_RULE_EXT(5170, 5250, 80, 0, 20, 0,
+ NL80211_RRF_AUTO_BW | 0),
+ REG_RULE_EXT(5250, 5330, 80, 0, 20, 0,
+ NL80211_RRF_DFS |
+ NL80211_RRF_AUTO_BW | 0),
+ REG_RULE_EXT(5490, 5710, 160, 0, 27, 0,
+ NL80211_RRF_DFS | 0),
+ REG_RULE_EXT(57000, 66000, 2160, 0, 40, 0, 0),
+ },
+ .n_reg_rules = 5
+};
+
+static const struct ieee80211_regdomain regdom_IL = {
+ .alpha2 = "IL",
+ .dfs_region = NL80211_DFS_ETSI,
+ .reg_rules = {
+ REG_RULE_EXT(2402, 2482, 40, 0, 20, 0, 0),
+ REG_RULE_EXT(5150, 5250, 80, 0, 23, 0,
+ NL80211_RRF_NO_OUTDOOR |
+ NL80211_RRF_AUTO_BW | 0),
+ REG_RULE_EXT(5250, 5350, 80, 0, 23, 0,
+ NL80211_RRF_NO_OUTDOOR |
+ NL80211_RRF_DFS |
+ NL80211_RRF_AUTO_BW | 0),
+ },
+ .n_reg_rules = 3
+};
+
+static const struct ieee80211_regdomain regdom_IN = {
+ .alpha2 = "IN",
+ .dfs_region = NL80211_DFS_JP,
+ .reg_rules = {
+ REG_RULE_EXT(2402, 2482, 40, 0, 20, 0, 0),
+ REG_RULE_EXT(5170, 5250, 80, 0, 20, 0,
+ NL80211_RRF_AUTO_BW | 0),
+ REG_RULE_EXT(5250, 5330, 80, 0, 20, 0,
+ NL80211_RRF_DFS |
+ NL80211_RRF_AUTO_BW | 0),
+ REG_RULE_EXT(5735, 5835, 80, 0, 20, 0, 0),
+ },
+ .n_reg_rules = 4
+};
+
+static const struct ieee80211_regdomain regdom_IR = {
+ .alpha2 = "IR",
+ .dfs_region = NL80211_DFS_JP,
+ .reg_rules = {
+ REG_RULE_EXT(2402, 2482, 40, 0, 20, 0, 0),
+ REG_RULE_EXT(5735, 5835, 80, 0, 30, 0, 0),
+ },
+ .n_reg_rules = 2
+};
+
+static const struct ieee80211_regdomain regdom_IS = {
+ .alpha2 = "IS",
+ .dfs_region = NL80211_DFS_ETSI,
+ .reg_rules = {
+ REG_RULE_EXT(2402, 2482, 40, 0, 20, 0, 0),
+ REG_RULE_EXT(5170, 5250, 80, 0, 20, 0,
+ NL80211_RRF_AUTO_BW | 0),
+ REG_RULE_EXT(5250, 5330, 80, 0, 20, 0,
+ NL80211_RRF_DFS |
+ NL80211_RRF_AUTO_BW | 0),
+ REG_RULE_EXT(5490, 5710, 160, 0, 27, 0,
+ NL80211_RRF_DFS | 0),
+ REG_RULE_EXT(57000, 66000, 2160, 0, 40, 0, 0),
+ },
+ .n_reg_rules = 5
+};
+
+static const struct ieee80211_regdomain regdom_IT = {
+ .alpha2 = "IT",
+ .dfs_region = NL80211_DFS_ETSI,
+ .reg_rules = {
+ REG_RULE_EXT(2402, 2482, 40, 0, 20, 0, 0),
+ REG_RULE_EXT(5170, 5250, 80, 0, 20, 0,
+ NL80211_RRF_AUTO_BW | 0),
+ REG_RULE_EXT(5250, 5330, 80, 0, 20, 0,
+ NL80211_RRF_DFS |
+ NL80211_RRF_AUTO_BW | 0),
+ REG_RULE_EXT(5490, 5710, 160, 0, 27, 0,
+ NL80211_RRF_DFS | 0),
+ REG_RULE_EXT(57000, 66000, 2160, 0, 40, 0, 0),
+ },
+ .n_reg_rules = 5
+};
+
+static const struct ieee80211_regdomain regdom_JM = {
+ .alpha2 = "JM",
+ .dfs_region = NL80211_DFS_FCC,
+ .reg_rules = {
+ REG_RULE_EXT(2402, 2482, 40, 0, 20, 0, 0),
+ REG_RULE_EXT(5170, 5250, 80, 0, 17, 0,
+ NL80211_RRF_AUTO_BW | 0),
+ REG_RULE_EXT(5250, 5330, 80, 0, 24, 0,
+ NL80211_RRF_DFS |
+ NL80211_RRF_AUTO_BW | 0),
+ REG_RULE_EXT(5490, 5730, 160, 0, 24, 0,
+ NL80211_RRF_DFS | 0),
+ REG_RULE_EXT(5735, 5835, 80, 0, 30, 0, 0),
+ },
+ .n_reg_rules = 5
+};
+
+static const struct ieee80211_regdomain regdom_JO = {
+ .alpha2 = "JO",
+ .dfs_region = NL80211_DFS_JP,
+ .reg_rules = {
+ REG_RULE_EXT(2402, 2482, 40, 0, 20, 0, 0),
+ REG_RULE_EXT(5170, 5250, 80, 0, 23, 0, 0),
+ REG_RULE_EXT(5735, 5835, 80, 0, 23, 0, 0),
+ },
+ .n_reg_rules = 3
+};
+
+static const struct ieee80211_regdomain regdom_JP = {
+ .alpha2 = "JP",
+ .dfs_region = NL80211_DFS_JP,
+ .reg_rules = {
+ REG_RULE_EXT(2402, 2482, 40, 0, 20, 0, 0),
+ REG_RULE_EXT(2474, 2494, 20, 0, 20, 0,
+ NL80211_RRF_NO_OFDM | 0),
+ REG_RULE_EXT(4910, 4990, 40, 0, 23, 0, 0),
+ REG_RULE_EXT(5030, 5090, 40, 0, 23, 0, 0),
+ REG_RULE_EXT(5170, 5250, 80, 0, 20, 0,
+ NL80211_RRF_AUTO_BW | 0),
+ REG_RULE_EXT(5250, 5330, 80, 0, 20, 0,
+ NL80211_RRF_DFS |
+ NL80211_RRF_AUTO_BW | 0),
+ REG_RULE_EXT(5490, 5710, 160, 0, 23, 0,
+ NL80211_RRF_DFS | 0),
+ },
+ .n_reg_rules = 7
+};
+
+static const struct ieee80211_regdomain regdom_KE = {
+ .alpha2 = "KE",
+ .dfs_region = NL80211_DFS_JP,
+ .reg_rules = {
+ REG_RULE_EXT(2402, 2482, 40, 0, 20, 0, 0),
+ REG_RULE_EXT(5170, 5250, 80, 0, 23, 0, 0),
+ REG_RULE_EXT(5490, 5570, 80, 0, 30, 0,
+ NL80211_RRF_DFS | 0),
+ REG_RULE_EXT(5735, 5775, 40, 0, 23, 0, 0),
+ },
+ .n_reg_rules = 4
+};
+
+static const struct ieee80211_regdomain regdom_KH = {
+ .alpha2 = "KH",
+ .dfs_region = NL80211_DFS_ETSI,
+ .reg_rules = {
+ REG_RULE_EXT(2402, 2482, 40, 0, 20, 0, 0),
+ REG_RULE_EXT(5170, 5250, 80, 0, 20, 0,
+ NL80211_RRF_AUTO_BW | 0),
+ REG_RULE_EXT(5250, 5330, 80, 0, 20, 0,
+ NL80211_RRF_DFS |
+ NL80211_RRF_AUTO_BW | 0),
+ REG_RULE_EXT(5490, 5710, 160, 0, 27, 0,
+ NL80211_RRF_DFS | 0),
+ },
+ .n_reg_rules = 4
+};
+
+static const struct ieee80211_regdomain regdom_KN = {
+ .alpha2 = "KN",
+ .dfs_region = NL80211_DFS_ETSI,
+ .reg_rules = {
+ REG_RULE_EXT(2402, 2482, 40, 0, 20, 0, 0),
+ REG_RULE_EXT(5170, 5250, 80, 0, 20, 0,
+ NL80211_RRF_AUTO_BW | 0),
+ REG_RULE_EXT(5250, 5330, 80, 0, 20, 0,
+ NL80211_RRF_DFS |
+ NL80211_RRF_AUTO_BW | 0),
+ REG_RULE_EXT(5490, 5710, 160, 0, 30, 0,
+ NL80211_RRF_DFS | 0),
+ REG_RULE_EXT(5735, 5815, 80, 0, 30, 0, 0),
+ },
+ .n_reg_rules = 5
+};
+
+static const struct ieee80211_regdomain regdom_KP = {
+ .alpha2 = "KP",
+ .dfs_region = NL80211_DFS_JP,
+ .reg_rules = {
+ REG_RULE_EXT(2402, 2482, 40, 0, 20, 0, 0),
+ REG_RULE_EXT(5170, 5250, 80, 0, 20, 0,
+ NL80211_RRF_AUTO_BW | 0),
+ REG_RULE_EXT(5250, 5330, 80, 0, 20, 0,
+ NL80211_RRF_DFS |
+ NL80211_RRF_AUTO_BW | 0),
+ REG_RULE_EXT(5490, 5630, 80, 0, 30, 0,
+ NL80211_RRF_DFS | 0),
+ REG_RULE_EXT(5735, 5815, 80, 0, 30, 0, 0),
+ },
+ .n_reg_rules = 5
+};
+
+static const struct ieee80211_regdomain regdom_KR = {
+ .alpha2 = "KR",
+ .dfs_region = NL80211_DFS_JP,
+ .reg_rules = {
+ REG_RULE_EXT(2402, 2482, 40, 0, 20, 0, 0),
+ REG_RULE_EXT(5170, 5250, 80, 0, 20, 0,
+ NL80211_RRF_AUTO_BW | 0),
+ REG_RULE_EXT(5250, 5330, 80, 0, 20, 0,
+ NL80211_RRF_DFS |
+ NL80211_RRF_AUTO_BW | 0),
+ REG_RULE_EXT(5490, 5710, 160, 0, 30, 0,
+ NL80211_RRF_DFS | 0),
+ REG_RULE_EXT(5735, 5835, 80, 0, 30, 0, 0),
+ },
+ .n_reg_rules = 5
+};
+
+static const struct ieee80211_regdomain regdom_KW = {
+ .alpha2 = "KW",
+ .dfs_region = NL80211_DFS_ETSI,
+ .reg_rules = {
+ REG_RULE_EXT(2402, 2482, 40, 0, 20, 0, 0),
+ REG_RULE_EXT(5170, 5250, 80, 0, 20, 0,
+ NL80211_RRF_AUTO_BW | 0),
+ REG_RULE_EXT(5250, 5330, 80, 0, 20, 0,
+ NL80211_RRF_DFS |
+ NL80211_RRF_AUTO_BW | 0),
+ },
+ .n_reg_rules = 3
+};
+
+static const struct ieee80211_regdomain regdom_KY = {
+ .alpha2 = "KY",
+ .dfs_region = NL80211_DFS_FCC,
+ .reg_rules = {
+ REG_RULE_EXT(2402, 2482, 40, 0, 20, 0, 0),
+ REG_RULE_EXT(5170, 5250, 80, 0, 24, 0,
+ NL80211_RRF_AUTO_BW | 0),
+ REG_RULE_EXT(5250, 5330, 80, 0, 24, 0,
+ NL80211_RRF_DFS |
+ NL80211_RRF_AUTO_BW | 0),
+ REG_RULE_EXT(5490, 5730, 160, 0, 24, 0,
+ NL80211_RRF_DFS | 0),
+ REG_RULE_EXT(5735, 5835, 80, 0, 30, 0, 0),
+ },
+ .n_reg_rules = 5
+};
+
+static const struct ieee80211_regdomain regdom_KZ = {
+ .alpha2 = "KZ",
+ .reg_rules = {
+ REG_RULE_EXT(2402, 2482, 40, 0, 20, 0, 0),
+ },
+ .n_reg_rules = 1
+};
+
+static const struct ieee80211_regdomain regdom_LB = {
+ .alpha2 = "LB",
+ .dfs_region = NL80211_DFS_FCC,
+ .reg_rules = {
+ REG_RULE_EXT(2402, 2482, 40, 0, 20, 0, 0),
+ REG_RULE_EXT(5170, 5250, 80, 0, 17, 0,
+ NL80211_RRF_AUTO_BW | 0),
+ REG_RULE_EXT(5250, 5330, 80, 0, 24, 0,
+ NL80211_RRF_DFS |
+ NL80211_RRF_AUTO_BW | 0),
+ REG_RULE_EXT(5490, 5730, 160, 0, 24, 0,
+ NL80211_RRF_DFS | 0),
+ REG_RULE_EXT(5735, 5835, 80, 0, 30, 0, 0),
+ },
+ .n_reg_rules = 5
+};
+
+static const struct ieee80211_regdomain regdom_LC = {
+ .alpha2 = "LC",
+ .dfs_region = NL80211_DFS_ETSI,
+ .reg_rules = {
+ REG_RULE_EXT(2402, 2482, 40, 0, 20, 0, 0),
+ REG_RULE_EXT(5170, 5250, 80, 0, 20, 0,
+ NL80211_RRF_AUTO_BW | 0),
+ REG_RULE_EXT(5250, 5330, 80, 0, 20, 0,
+ NL80211_RRF_DFS |
+ NL80211_RRF_AUTO_BW | 0),
+ REG_RULE_EXT(5490, 5710, 160, 0, 30, 0,
+ NL80211_RRF_DFS | 0),
+ REG_RULE_EXT(5735, 5815, 80, 0, 30, 0, 0),
+ },
+ .n_reg_rules = 5
+};
+
+static const struct ieee80211_regdomain regdom_LI = {
+ .alpha2 = "LI",
+ .dfs_region = NL80211_DFS_ETSI,
+ .reg_rules = {
+ REG_RULE_EXT(2402, 2482, 40, 0, 20, 0, 0),
+ REG_RULE_EXT(5170, 5250, 80, 0, 20, 0,
+ NL80211_RRF_AUTO_BW | 0),
+ REG_RULE_EXT(5250, 5330, 80, 0, 20, 0,
+ NL80211_RRF_DFS |
+ NL80211_RRF_AUTO_BW | 0),
+ REG_RULE_EXT(5490, 5710, 160, 0, 27, 0,
+ NL80211_RRF_DFS | 0),
+ },
+ .n_reg_rules = 4
+};
+
+static const struct ieee80211_regdomain regdom_LK = {
+ .alpha2 = "LK",
+ .dfs_region = NL80211_DFS_FCC,
+ .reg_rules = {
+ REG_RULE_EXT(2402, 2482, 40, 0, 20, 0, 0),
+ REG_RULE_EXT(5170, 5250, 80, 0, 17, 0, 0),
+ REG_RULE_EXT(5250, 5330, 80, 0, 24, 0,
+ NL80211_RRF_DFS | 0),
+ REG_RULE_EXT(5490, 5730, 80, 0, 24, 0,
+ NL80211_RRF_DFS | 0),
+ REG_RULE_EXT(5735, 5835, 80, 0, 30, 0, 0),
+ },
+ .n_reg_rules = 5
+};
+
+static const struct ieee80211_regdomain regdom_LS = {
+ .alpha2 = "LS",
+ .dfs_region = NL80211_DFS_ETSI,
+ .reg_rules = {
+ REG_RULE_EXT(2402, 2482, 40, 0, 20, 0, 0),
+ REG_RULE_EXT(5170, 5250, 80, 0, 20, 0,
+ NL80211_RRF_AUTO_BW | 0),
+ REG_RULE_EXT(5250, 5330, 80, 0, 20, 0,
+ NL80211_RRF_DFS |
+ NL80211_RRF_AUTO_BW | 0),
+ REG_RULE_EXT(5490, 5710, 160, 0, 27, 0,
+ NL80211_RRF_DFS | 0),
+ },
+ .n_reg_rules = 4
+};
+
+static const struct ieee80211_regdomain regdom_LT = {
+ .alpha2 = "LT",
+ .dfs_region = NL80211_DFS_ETSI,
+ .reg_rules = {
+ REG_RULE_EXT(2402, 2482, 40, 0, 20, 0, 0),
+ REG_RULE_EXT(5170, 5250, 80, 0, 20, 0,
+ NL80211_RRF_AUTO_BW | 0),
+ REG_RULE_EXT(5250, 5330, 80, 0, 20, 0,
+ NL80211_RRF_DFS |
+ NL80211_RRF_AUTO_BW | 0),
+ REG_RULE_EXT(5490, 5710, 160, 0, 27, 0,
+ NL80211_RRF_DFS | 0),
+ REG_RULE_EXT(57000, 66000, 2160, 0, 40, 0, 0),
+ },
+ .n_reg_rules = 5
+};
+
+static const struct ieee80211_regdomain regdom_LU = {
+ .alpha2 = "LU",
+ .dfs_region = NL80211_DFS_ETSI,
+ .reg_rules = {
+ REG_RULE_EXT(2402, 2482, 40, 0, 20, 0, 0),
+ REG_RULE_EXT(5170, 5250, 80, 0, 20, 0,
+ NL80211_RRF_AUTO_BW | 0),
+ REG_RULE_EXT(5250, 5330, 80, 0, 20, 0,
+ NL80211_RRF_DFS |
+ NL80211_RRF_AUTO_BW | 0),
+ REG_RULE_EXT(5490, 5710, 160, 0, 27, 0,
+ NL80211_RRF_DFS | 0),
+ REG_RULE_EXT(57000, 66000, 2160, 0, 40, 0, 0),
+ },
+ .n_reg_rules = 5
+};
+
+static const struct ieee80211_regdomain regdom_LV = {
+ .alpha2 = "LV",
+ .dfs_region = NL80211_DFS_ETSI,
+ .reg_rules = {
+ REG_RULE_EXT(2402, 2482, 40, 0, 20, 0, 0),
+ REG_RULE_EXT(5170, 5250, 80, 0, 20, 0,
+ NL80211_RRF_AUTO_BW | 0),
+ REG_RULE_EXT(5250, 5330, 80, 0, 20, 0,
+ NL80211_RRF_DFS |
+ NL80211_RRF_AUTO_BW | 0),
+ REG_RULE_EXT(5490, 5710, 160, 0, 27, 0,
+ NL80211_RRF_DFS | 0),
+ REG_RULE_EXT(57000, 66000, 2160, 0, 40, 0, 0),
+ },
+ .n_reg_rules = 5
+};
+
+static const struct ieee80211_regdomain regdom_MA = {
+ .alpha2 = "MA",
+ .dfs_region = NL80211_DFS_ETSI,
+ .reg_rules = {
+ REG_RULE_EXT(2402, 2482, 40, 0, 20, 0, 0),
+ REG_RULE_EXT(5170, 5250, 80, 0, 20, 0,
+ NL80211_RRF_AUTO_BW | 0),
+ REG_RULE_EXT(5250, 5330, 80, 0, 20, 0,
+ NL80211_RRF_DFS |
+ NL80211_RRF_AUTO_BW | 0),
+ },
+ .n_reg_rules = 3
+};
+
+static const struct ieee80211_regdomain regdom_MC = {
+ .alpha2 = "MC",
+ .dfs_region = NL80211_DFS_ETSI,
+ .reg_rules = {
+ REG_RULE_EXT(2402, 2482, 40, 0, 20, 0, 0),
+ REG_RULE_EXT(5170, 5250, 80, 0, 20, 0,
+ NL80211_RRF_AUTO_BW | 0),
+ REG_RULE_EXT(5250, 5330, 80, 0, 20, 0,
+ NL80211_RRF_DFS |
+ NL80211_RRF_AUTO_BW | 0),
+ REG_RULE_EXT(5490, 5710, 160, 0, 27, 0,
+ NL80211_RRF_DFS | 0),
+ },
+ .n_reg_rules = 4
+};
+
+static const struct ieee80211_regdomain regdom_MD = {
+ .alpha2 = "MD",
+ .dfs_region = NL80211_DFS_ETSI,
+ .reg_rules = {
+ REG_RULE_EXT(2402, 2482, 40, 0, 20, 0, 0),
+ REG_RULE_EXT(5170, 5250, 80, 0, 20, 0,
+ NL80211_RRF_AUTO_BW | 0),
+ REG_RULE_EXT(5250, 5330, 80, 0, 20, 0,
+ NL80211_RRF_DFS |
+ NL80211_RRF_AUTO_BW | 0),
+ REG_RULE_EXT(5490, 5710, 160, 0, 27, 0,
+ NL80211_RRF_DFS | 0),
+ },
+ .n_reg_rules = 4
+};
+
+static const struct ieee80211_regdomain regdom_ME = {
+ .alpha2 = "ME",
+ .dfs_region = NL80211_DFS_ETSI,
+ .reg_rules = {
+ REG_RULE_EXT(2402, 2482, 40, 0, 20, 0, 0),
+ REG_RULE_EXT(5170, 5250, 80, 0, 20, 0,
+ NL80211_RRF_AUTO_BW | 0),
+ REG_RULE_EXT(5250, 5330, 80, 0, 20, 0,
+ NL80211_RRF_DFS |
+ NL80211_RRF_AUTO_BW | 0),
+ REG_RULE_EXT(5490, 5710, 160, 0, 27, 0,
+ NL80211_RRF_DFS | 0),
+ },
+ .n_reg_rules = 4
+};
+
+static const struct ieee80211_regdomain regdom_MF = {
+ .alpha2 = "MF",
+ .dfs_region = NL80211_DFS_ETSI,
+ .reg_rules = {
+ REG_RULE_EXT(2402, 2482, 40, 0, 20, 0, 0),
+ REG_RULE_EXT(5170, 5250, 80, 0, 20, 0,
+ NL80211_RRF_AUTO_BW | 0),
+ REG_RULE_EXT(5250, 5330, 80, 0, 20, 0,
+ NL80211_RRF_DFS |
+ NL80211_RRF_AUTO_BW | 0),
+ REG_RULE_EXT(5490, 5710, 160, 0, 27, 0,
+ NL80211_RRF_DFS | 0),
+ },
+ .n_reg_rules = 4
+};
+
+static const struct ieee80211_regdomain regdom_MH = {
+ .alpha2 = "MH",
+ .dfs_region = NL80211_DFS_FCC,
+ .reg_rules = {
+ REG_RULE_EXT(2402, 2472, 40, 0, 30, 0, 0),
+ REG_RULE_EXT(5170, 5250, 80, 0, 24, 0,
+ NL80211_RRF_AUTO_BW | 0),
+ REG_RULE_EXT(5250, 5330, 80, 0, 24, 0,
+ NL80211_RRF_DFS |
+ NL80211_RRF_AUTO_BW | 0),
+ REG_RULE_EXT(5490, 5730, 160, 0, 24, 0,
+ NL80211_RRF_DFS | 0),
+ REG_RULE_EXT(5735, 5835, 80, 0, 30, 0, 0),
+ },
+ .n_reg_rules = 5
+};
+
+static const struct ieee80211_regdomain regdom_MK = {
+ .alpha2 = "MK",
+ .dfs_region = NL80211_DFS_ETSI,
+ .reg_rules = {
+ REG_RULE_EXT(2402, 2482, 40, 0, 20, 0, 0),
+ REG_RULE_EXT(5170, 5250, 80, 0, 20, 0,
+ NL80211_RRF_AUTO_BW | 0),
+ REG_RULE_EXT(5250, 5330, 80, 0, 20, 0,
+ NL80211_RRF_DFS |
+ NL80211_RRF_AUTO_BW | 0),
+ REG_RULE_EXT(5490, 5710, 160, 0, 27, 0,
+ NL80211_RRF_DFS | 0),
+ REG_RULE_EXT(57000, 66000, 2160, 0, 40, 0, 0),
+ },
+ .n_reg_rules = 5
+};
+
+static const struct ieee80211_regdomain regdom_MN = {
+ .alpha2 = "MN",
+ .dfs_region = NL80211_DFS_FCC,
+ .reg_rules = {
+ REG_RULE_EXT(2402, 2482, 40, 0, 20, 0, 0),
+ REG_RULE_EXT(5170, 5250, 80, 0, 24, 0,
+ NL80211_RRF_AUTO_BW | 0),
+ REG_RULE_EXT(5250, 5330, 80, 0, 24, 0,
+ NL80211_RRF_DFS |
+ NL80211_RRF_AUTO_BW | 0),
+ REG_RULE_EXT(5490, 5730, 160, 0, 24, 0,
+ NL80211_RRF_DFS | 0),
+ REG_RULE_EXT(5735, 5835, 80, 0, 30, 0, 0),
+ },
+ .n_reg_rules = 5
+};
+
+static const struct ieee80211_regdomain regdom_MO = {
+ .alpha2 = "MO",
+ .reg_rules = {
+ REG_RULE_EXT(2402, 2482, 40, 0, 20, 0, 0),
+ REG_RULE_EXT(5170, 5250, 40, 0, 23, 0, 0),
+ REG_RULE_EXT(5250, 5330, 40, 0, 23, 0,
+ NL80211_RRF_DFS | 0),
+ REG_RULE_EXT(5735, 5835, 40, 0, 30, 0, 0),
+ },
+ .n_reg_rules = 4
+};
+
+static const struct ieee80211_regdomain regdom_MP = {
+ .alpha2 = "MP",
+ .dfs_region = NL80211_DFS_FCC,
+ .reg_rules = {
+ REG_RULE_EXT(2402, 2472, 40, 0, 30, 0, 0),
+ REG_RULE_EXT(5170, 5250, 80, 0, 24, 0,
+ NL80211_RRF_AUTO_BW | 0),
+ REG_RULE_EXT(5250, 5330, 80, 0, 24, 0,
+ NL80211_RRF_DFS |
+ NL80211_RRF_AUTO_BW | 0),
+ REG_RULE_EXT(5490, 5730, 160, 0, 24, 0,
+ NL80211_RRF_DFS | 0),
+ REG_RULE_EXT(5735, 5835, 80, 0, 30, 0, 0),
+ },
+ .n_reg_rules = 5
+};
+
+static const struct ieee80211_regdomain regdom_MQ = {
+ .alpha2 = "MQ",
+ .dfs_region = NL80211_DFS_ETSI,
+ .reg_rules = {
+ REG_RULE_EXT(2402, 2482, 40, 0, 20, 0, 0),
+ REG_RULE_EXT(5170, 5250, 80, 0, 20, 0,
+ NL80211_RRF_AUTO_BW | 0),
+ REG_RULE_EXT(5250, 5330, 80, 0, 20, 0,
+ NL80211_RRF_DFS |
+ NL80211_RRF_AUTO_BW | 0),
+ REG_RULE_EXT(5490, 5710, 160, 0, 27, 0,
+ NL80211_RRF_DFS | 0),
+ },
+ .n_reg_rules = 4
+};
+
+static const struct ieee80211_regdomain regdom_MR = {
+ .alpha2 = "MR",
+ .dfs_region = NL80211_DFS_ETSI,
+ .reg_rules = {
+ REG_RULE_EXT(2402, 2482, 40, 0, 20, 0, 0),
+ REG_RULE_EXT(5170, 5250, 80, 0, 20, 0,
+ NL80211_RRF_AUTO_BW | 0),
+ REG_RULE_EXT(5250, 5330, 80, 0, 20, 0,
+ NL80211_RRF_DFS |
+ NL80211_RRF_AUTO_BW | 0),
+ REG_RULE_EXT(5490, 5710, 160, 0, 27, 0,
+ NL80211_RRF_DFS | 0),
+ },
+ .n_reg_rules = 4
+};
+
+static const struct ieee80211_regdomain regdom_MT = {
+ .alpha2 = "MT",
+ .dfs_region = NL80211_DFS_ETSI,
+ .reg_rules = {
+ REG_RULE_EXT(2402, 2482, 40, 0, 20, 0, 0),
+ REG_RULE_EXT(5170, 5250, 80, 0, 20, 0,
+ NL80211_RRF_AUTO_BW | 0),
+ REG_RULE_EXT(5250, 5330, 80, 0, 20, 0,
+ NL80211_RRF_DFS |
+ NL80211_RRF_AUTO_BW | 0),
+ REG_RULE_EXT(5490, 5710, 160, 0, 27, 0,
+ NL80211_RRF_DFS | 0),
+ REG_RULE_EXT(57000, 66000, 2160, 0, 40, 0, 0),
+ },
+ .n_reg_rules = 5
+};
+
+static const struct ieee80211_regdomain regdom_MU = {
+ .alpha2 = "MU",
+ .dfs_region = NL80211_DFS_FCC,
+ .reg_rules = {
+ REG_RULE_EXT(2402, 2482, 40, 0, 20, 0, 0),
+ REG_RULE_EXT(5170, 5250, 80, 0, 24, 0,
+ NL80211_RRF_AUTO_BW | 0),
+ REG_RULE_EXT(5250, 5330, 80, 0, 24, 0,
+ NL80211_RRF_DFS |
+ NL80211_RRF_AUTO_BW | 0),
+ REG_RULE_EXT(5490, 5730, 160, 0, 24, 0,
+ NL80211_RRF_DFS | 0),
+ REG_RULE_EXT(5735, 5835, 80, 0, 30, 0, 0),
+ },
+ .n_reg_rules = 5
+};
+
+static const struct ieee80211_regdomain regdom_MW = {
+ .alpha2 = "MW",
+ .dfs_region = NL80211_DFS_ETSI,
+ .reg_rules = {
+ REG_RULE_EXT(2402, 2482, 40, 0, 20, 0, 0),
+ REG_RULE_EXT(5170, 5250, 80, 0, 20, 0,
+ NL80211_RRF_AUTO_BW | 0),
+ REG_RULE_EXT(5250, 5330, 80, 0, 20, 0,
+ NL80211_RRF_DFS |
+ NL80211_RRF_AUTO_BW | 0),
+ REG_RULE_EXT(5490, 5710, 160, 0, 27, 0,
+ NL80211_RRF_DFS | 0),
+ },
+ .n_reg_rules = 4
+};
+
+static const struct ieee80211_regdomain regdom_MX = {
+ .alpha2 = "MX",
+ .dfs_region = NL80211_DFS_FCC,
+ .reg_rules = {
+ REG_RULE_EXT(2402, 2482, 40, 0, 20, 0, 0),
+ REG_RULE_EXT(5170, 5250, 80, 0, 17, 0,
+ NL80211_RRF_AUTO_BW | 0),
+ REG_RULE_EXT(5250, 5330, 80, 0, 24, 0,
+ NL80211_RRF_DFS |
+ NL80211_RRF_AUTO_BW | 0),
+ REG_RULE_EXT(5490, 5730, 160, 0, 24, 0,
+ NL80211_RRF_DFS | 0),
+ REG_RULE_EXT(5735, 5835, 80, 0, 30, 0, 0),
+ },
+ .n_reg_rules = 5
+};
+
+static const struct ieee80211_regdomain regdom_MY = {
+ .alpha2 = "MY",
+ .dfs_region = NL80211_DFS_FCC,
+ .reg_rules = {
+ REG_RULE_EXT(2402, 2482, 40, 0, 20, 0, 0),
+ REG_RULE_EXT(5170, 5250, 80, 0, 17, 0,
+ NL80211_RRF_AUTO_BW | 0),
+ REG_RULE_EXT(5250, 5330, 80, 0, 23, 0,
+ NL80211_RRF_DFS |
+ NL80211_RRF_AUTO_BW | 0),
+ REG_RULE_EXT(5735, 5835, 80, 0, 30, 0, 0),
+ },
+ .n_reg_rules = 4
+};
+
+static const struct ieee80211_regdomain regdom_NI = {
+ .alpha2 = "NI",
+ .dfs_region = NL80211_DFS_FCC,
+ .reg_rules = {
+ REG_RULE_EXT(2402, 2472, 40, 0, 30, 0, 0),
+ REG_RULE_EXT(5170, 5250, 80, 0, 24, 0,
+ NL80211_RRF_AUTO_BW | 0),
+ REG_RULE_EXT(5250, 5330, 80, 0, 24, 0,
+ NL80211_RRF_DFS |
+ NL80211_RRF_AUTO_BW | 0),
+ REG_RULE_EXT(5490, 5730, 160, 0, 24, 0,
+ NL80211_RRF_DFS | 0),
+ REG_RULE_EXT(5735, 5835, 80, 0, 30, 0, 0),
+ },
+ .n_reg_rules = 5
+};
+
+static const struct ieee80211_regdomain regdom_NL = {
+ .alpha2 = "NL",
+ .dfs_region = NL80211_DFS_ETSI,
+ .reg_rules = {
+ REG_RULE_EXT(2402, 2482, 40, 0, 20, 0, 0),
+ REG_RULE_EXT(5170, 5250, 80, 0, 20, 0,
+ NL80211_RRF_NO_OUTDOOR |
+ NL80211_RRF_AUTO_BW | 0),
+ REG_RULE_EXT(5250, 5330, 80, 0, 20, 0,
+ NL80211_RRF_NO_OUTDOOR |
+ NL80211_RRF_DFS |
+ NL80211_RRF_AUTO_BW | 0),
+ REG_RULE_EXT(5490, 5710, 160, 0, 27, 0,
+ NL80211_RRF_DFS | 0),
+ REG_RULE_EXT(57000, 66000, 2160, 0, 40, 0, 0),
+ },
+ .n_reg_rules = 5
+};
+
+static const struct ieee80211_regdomain regdom_NO = {
+ .alpha2 = "NO",
+ .dfs_region = NL80211_DFS_ETSI,
+ .reg_rules = {
+ REG_RULE_EXT(2400, 2483, 40, 0, 20, 0, 0),
+ REG_RULE_EXT(5150, 5250, 80, 0, 23, 0,
+ NL80211_RRF_AUTO_BW | 0),
+ REG_RULE_EXT(5250, 5350, 80, 0, 20, 0,
+ NL80211_RRF_DFS |
+ NL80211_RRF_AUTO_BW | 0),
+ REG_RULE_EXT(5470, 5795, 160, 0, 27, 0,
+ NL80211_RRF_DFS | 0),
+ REG_RULE_EXT(5815, 5850, 35, 0, 33, 0,
+ NL80211_RRF_DFS | 0),
+ REG_RULE_EXT(17100, 17300, 200, 0, 20, 0, 0),
+ REG_RULE_EXT(57000, 66000, 2160, 0, 40, 0, 0),
+ },
+ .n_reg_rules = 7
+};
+
+static const struct ieee80211_regdomain regdom_NP = {
+ .alpha2 = "NP",
+ .dfs_region = NL80211_DFS_JP,
+ .reg_rules = {
+ REG_RULE_EXT(2402, 2482, 40, 0, 20, 0, 0),
+ REG_RULE_EXT(5170, 5250, 80, 0, 20, 0,
+ NL80211_RRF_AUTO_BW | 0),
+ REG_RULE_EXT(5250, 5330, 80, 0, 20, 0,
+ NL80211_RRF_DFS |
+ NL80211_RRF_AUTO_BW | 0),
+ REG_RULE_EXT(5735, 5835, 80, 0, 20, 0, 0),
+ },
+ .n_reg_rules = 4
+};
+
+static const struct ieee80211_regdomain regdom_NZ = {
+ .alpha2 = "NZ",
+ .dfs_region = NL80211_DFS_FCC,
+ .reg_rules = {
+ REG_RULE_EXT(2402, 2482, 40, 0, 30, 0, 0),
+ REG_RULE_EXT(5170, 5250, 80, 0, 17, 0,
+ NL80211_RRF_AUTO_BW | 0),
+ REG_RULE_EXT(5250, 5330, 80, 0, 24, 0,
+ NL80211_RRF_DFS |
+ NL80211_RRF_AUTO_BW | 0),
+ REG_RULE_EXT(5490, 5730, 160, 0, 24, 0,
+ NL80211_RRF_DFS | 0),
+ REG_RULE_EXT(5735, 5835, 80, 0, 30, 0, 0),
+ },
+ .n_reg_rules = 5
+};
+
+static const struct ieee80211_regdomain regdom_OM = {
+ .alpha2 = "OM",
+ .dfs_region = NL80211_DFS_ETSI,
+ .reg_rules = {
+ REG_RULE_EXT(2402, 2482, 40, 0, 20, 0, 0),
+ REG_RULE_EXT(5170, 5250, 80, 0, 20, 0,
+ NL80211_RRF_AUTO_BW | 0),
+ REG_RULE_EXT(5250, 5330, 80, 0, 20, 0,
+ NL80211_RRF_DFS |
+ NL80211_RRF_AUTO_BW | 0),
+ REG_RULE_EXT(5490, 5710, 160, 0, 27, 0,
+ NL80211_RRF_DFS | 0),
+ },
+ .n_reg_rules = 4
+};
+
+static const struct ieee80211_regdomain regdom_PA = {
+ .alpha2 = "PA",
+ .dfs_region = NL80211_DFS_FCC,
+ .reg_rules = {
+ REG_RULE_EXT(2402, 2472, 40, 0, 30, 0, 0),
+ REG_RULE_EXT(5170, 5250, 80, 0, 17, 0,
+ NL80211_RRF_AUTO_BW | 0),
+ REG_RULE_EXT(5250, 5330, 80, 0, 23, 0,
+ NL80211_RRF_DFS |
+ NL80211_RRF_AUTO_BW | 0),
+ REG_RULE_EXT(5735, 5835, 80, 0, 30, 0, 0),
+ },
+ .n_reg_rules = 4
+};
+
+static const struct ieee80211_regdomain regdom_PE = {
+ .alpha2 = "PE",
+ .dfs_region = NL80211_DFS_FCC,
+ .reg_rules = {
+ REG_RULE_EXT(2402, 2482, 40, 0, 20, 0, 0),
+ REG_RULE_EXT(5170, 5250, 80, 0, 17, 0,
+ NL80211_RRF_AUTO_BW | 0),
+ REG_RULE_EXT(5250, 5330, 80, 0, 24, 0,
+ NL80211_RRF_DFS |
+ NL80211_RRF_AUTO_BW | 0),
+ REG_RULE_EXT(5490, 5730, 160, 0, 24, 0,
+ NL80211_RRF_DFS | 0),
+ REG_RULE_EXT(5735, 5835, 80, 0, 30, 0, 0),
+ },
+ .n_reg_rules = 5
+};
+
+static const struct ieee80211_regdomain regdom_PF = {
+ .alpha2 = "PF",
+ .dfs_region = NL80211_DFS_ETSI,
+ .reg_rules = {
+ REG_RULE_EXT(2402, 2482, 40, 0, 20, 0, 0),
+ REG_RULE_EXT(5170, 5250, 80, 0, 20, 0,
+ NL80211_RRF_AUTO_BW | 0),
+ REG_RULE_EXT(5250, 5330, 80, 0, 20, 0,
+ NL80211_RRF_DFS |
+ NL80211_RRF_AUTO_BW | 0),
+ REG_RULE_EXT(5490, 5710, 160, 0, 27, 0,
+ NL80211_RRF_DFS | 0),
+ },
+ .n_reg_rules = 4
+};
+
+static const struct ieee80211_regdomain regdom_PG = {
+ .alpha2 = "PG",
+ .dfs_region = NL80211_DFS_FCC,
+ .reg_rules = {
+ REG_RULE_EXT(2402, 2482, 40, 0, 20, 0, 0),
+ REG_RULE_EXT(5170, 5250, 80, 0, 17, 0,
+ NL80211_RRF_AUTO_BW | 0),
+ REG_RULE_EXT(5250, 5330, 80, 0, 24, 0,
+ NL80211_RRF_DFS |
+ NL80211_RRF_AUTO_BW | 0),
+ REG_RULE_EXT(5490, 5730, 160, 0, 24, 0,
+ NL80211_RRF_DFS | 0),
+ REG_RULE_EXT(5735, 5835, 80, 0, 30, 0, 0),
+ },
+ .n_reg_rules = 5
+};
+
+static const struct ieee80211_regdomain regdom_PH = {
+ .alpha2 = "PH",
+ .dfs_region = NL80211_DFS_FCC,
+ .reg_rules = {
+ REG_RULE_EXT(2402, 2482, 40, 0, 20, 0, 0),
+ REG_RULE_EXT(5170, 5250, 80, 0, 17, 0,
+ NL80211_RRF_AUTO_BW | 0),
+ REG_RULE_EXT(5250, 5330, 80, 0, 24, 0,
+ NL80211_RRF_DFS |
+ NL80211_RRF_AUTO_BW | 0),
+ REG_RULE_EXT(5490, 5730, 160, 0, 24, 0,
+ NL80211_RRF_DFS | 0),
+ REG_RULE_EXT(5735, 5835, 80, 0, 30, 0, 0),
+ },
+ .n_reg_rules = 5
+};
+
+static const struct ieee80211_regdomain regdom_PK = {
+ .alpha2 = "PK",
+ .dfs_region = NL80211_DFS_JP,
+ .reg_rules = {
+ REG_RULE_EXT(2402, 2482, 40, 0, 20, 0, 0),
+ REG_RULE_EXT(5735, 5835, 80, 0, 30, 0, 0),
+ },
+ .n_reg_rules = 2
+};
+
+static const struct ieee80211_regdomain regdom_PL = {
+ .alpha2 = "PL",
+ .dfs_region = NL80211_DFS_ETSI,
+ .reg_rules = {
+ REG_RULE_EXT(2402, 2482, 40, 0, 20, 0, 0),
+ REG_RULE_EXT(5170, 5250, 80, 0, 20, 0,
+ NL80211_RRF_AUTO_BW | 0),
+ REG_RULE_EXT(5250, 5330, 80, 0, 20, 0,
+ NL80211_RRF_DFS |
+ NL80211_RRF_AUTO_BW | 0),
+ REG_RULE_EXT(5490, 5710, 160, 0, 27, 0,
+ NL80211_RRF_DFS | 0),
+ REG_RULE_EXT(57000, 66000, 2160, 0, 40, 0, 0),
+ },
+ .n_reg_rules = 5
+};
+
+static const struct ieee80211_regdomain regdom_PM = {
+ .alpha2 = "PM",
+ .dfs_region = NL80211_DFS_ETSI,
+ .reg_rules = {
+ REG_RULE_EXT(2402, 2482, 40, 0, 20, 0, 0),
+ REG_RULE_EXT(5170, 5250, 80, 0, 20, 0,
+ NL80211_RRF_AUTO_BW | 0),
+ REG_RULE_EXT(5250, 5330, 80, 0, 20, 0,
+ NL80211_RRF_DFS |
+ NL80211_RRF_AUTO_BW | 0),
+ REG_RULE_EXT(5490, 5710, 160, 0, 27, 0,
+ NL80211_RRF_DFS | 0),
+ },
+ .n_reg_rules = 4
+};
+
+static const struct ieee80211_regdomain regdom_PR = {
+ .alpha2 = "PR",
+ .dfs_region = NL80211_DFS_FCC,
+ .reg_rules = {
+ REG_RULE_EXT(2402, 2472, 40, 0, 30, 0, 0),
+ REG_RULE_EXT(5170, 5250, 80, 0, 17, 0,
+ NL80211_RRF_AUTO_BW | 0),
+ REG_RULE_EXT(5250, 5330, 80, 0, 24, 0,
+ NL80211_RRF_DFS |
+ NL80211_RRF_AUTO_BW | 0),
+ REG_RULE_EXT(5490, 5730, 160, 0, 24, 0,
+ NL80211_RRF_DFS | 0),
+ REG_RULE_EXT(5735, 5835, 80, 0, 30, 0, 0),
+ },
+ .n_reg_rules = 5
+};
+
+static const struct ieee80211_regdomain regdom_PT = {
+ .alpha2 = "PT",
+ .dfs_region = NL80211_DFS_ETSI,
+ .reg_rules = {
+ REG_RULE_EXT(2402, 2482, 40, 0, 20, 0, 0),
+ REG_RULE_EXT(5170, 5250, 80, 0, 20, 0,
+ NL80211_RRF_AUTO_BW | 0),
+ REG_RULE_EXT(5250, 5330, 80, 0, 20, 0,
+ NL80211_RRF_DFS |
+ NL80211_RRF_AUTO_BW | 0),
+ REG_RULE_EXT(5490, 5710, 160, 0, 27, 0,
+ NL80211_RRF_DFS | 0),
+ REG_RULE_EXT(57000, 66000, 2160, 0, 40, 0, 0),
+ },
+ .n_reg_rules = 5
+};
+
+static const struct ieee80211_regdomain regdom_PW = {
+ .alpha2 = "PW",
+ .dfs_region = NL80211_DFS_FCC,
+ .reg_rules = {
+ REG_RULE_EXT(2402, 2472, 40, 0, 30, 0, 0),
+ REG_RULE_EXT(5170, 5250, 80, 0, 24, 0,
+ NL80211_RRF_AUTO_BW | 0),
+ REG_RULE_EXT(5250, 5330, 80, 0, 24, 0,
+ NL80211_RRF_DFS |
+ NL80211_RRF_AUTO_BW | 0),
+ REG_RULE_EXT(5490, 5730, 160, 0, 24, 0,
+ NL80211_RRF_DFS | 0),
+ REG_RULE_EXT(5735, 5835, 80, 0, 30, 0, 0),
+ },
+ .n_reg_rules = 5
+};
+
+static const struct ieee80211_regdomain regdom_PY = {
+ .alpha2 = "PY",
+ .dfs_region = NL80211_DFS_FCC,
+ .reg_rules = {
+ REG_RULE_EXT(2402, 2482, 40, 0, 20, 0, 0),
+ REG_RULE_EXT(5170, 5250, 80, 0, 24, 0,
+ NL80211_RRF_AUTO_BW | 0),
+ REG_RULE_EXT(5250, 5330, 80, 0, 24, 0,
+ NL80211_RRF_DFS |
+ NL80211_RRF_AUTO_BW | 0),
+ REG_RULE_EXT(5490, 5730, 160, 0, 24, 0,
+ NL80211_RRF_DFS | 0),
+ REG_RULE_EXT(5735, 5835, 80, 0, 30, 0, 0),
+ },
+ .n_reg_rules = 5
+};
+
+static const struct ieee80211_regdomain regdom_QA = {
+ .alpha2 = "QA",
+ .dfs_region = NL80211_DFS_JP,
+ .reg_rules = {
+ REG_RULE_EXT(2402, 2482, 40, 0, 20, 0, 0),
+ REG_RULE_EXT(5735, 5835, 80, 0, 30, 0, 0),
+ },
+ .n_reg_rules = 2
+};
+
+static const struct ieee80211_regdomain regdom_RE = {
+ .alpha2 = "RE",
+ .dfs_region = NL80211_DFS_ETSI,
+ .reg_rules = {
+ REG_RULE_EXT(2402, 2482, 40, 0, 20, 0, 0),
+ REG_RULE_EXT(5170, 5250, 80, 0, 20, 0,
+ NL80211_RRF_AUTO_BW | 0),
+ REG_RULE_EXT(5250, 5330, 80, 0, 20, 0,
+ NL80211_RRF_DFS |
+ NL80211_RRF_AUTO_BW | 0),
+ REG_RULE_EXT(5490, 5710, 160, 0, 27, 0,
+ NL80211_RRF_DFS | 0),
+ },
+ .n_reg_rules = 4
+};
+
+static const struct ieee80211_regdomain regdom_RO = {
+ .alpha2 = "RO",
+ .dfs_region = NL80211_DFS_ETSI,
+ .reg_rules = {
+ REG_RULE_EXT(2402, 2482, 40, 0, 20, 0, 0),
+ REG_RULE_EXT(5170, 5250, 80, 0, 20, 0,
+ NL80211_RRF_AUTO_BW | 0),
+ REG_RULE_EXT(5250, 5330, 80, 0, 20, 0,
+ NL80211_RRF_DFS |
+ NL80211_RRF_AUTO_BW | 0),
+ REG_RULE_EXT(5490, 5710, 160, 0, 27, 0,
+ NL80211_RRF_DFS | 0),
+ REG_RULE_EXT(57000, 66000, 2160, 0, 40, 0, 0),
+ },
+ .n_reg_rules = 5
+};
+
+static const struct ieee80211_regdomain regdom_RS = {
+ .alpha2 = "RS",
+ .dfs_region = NL80211_DFS_ETSI,
+ .reg_rules = {
+ REG_RULE_EXT(2400, 2483, 40, 0, 20, 0, 0),
+ REG_RULE_EXT(5150, 5350, 40, 0, 23, 0,
+ NL80211_RRF_NO_OUTDOOR | 0),
+ REG_RULE_EXT(5470, 5725, 20, 0, 30, 0,
+ NL80211_RRF_DFS | 0),
+ REG_RULE_EXT(57000, 66000, 2160, 0, 40, 0, 0),
+ },
+ .n_reg_rules = 4
+};
+
+static const struct ieee80211_regdomain regdom_RU = {
+ .alpha2 = "RU",
+ .dfs_region = NL80211_DFS_ETSI,
+ .reg_rules = {
+ REG_RULE_EXT(2402, 2482, 40, 0, 20, 0, 0),
+ REG_RULE_EXT(5170, 5250, 80, 0, 20, 0, 0),
+ REG_RULE_EXT(5250, 5330, 80, 0, 20, 0,
+ NL80211_RRF_DFS | 0),
+ REG_RULE_EXT(5650, 5730, 80, 0, 30, 0,
+ NL80211_RRF_DFS | 0),
+ REG_RULE_EXT(5735, 5835, 80, 0, 30, 0, 0),
+ },
+ .n_reg_rules = 5
+};
+
+static const struct ieee80211_regdomain regdom_RW = {
+ .alpha2 = "RW",
+ .dfs_region = NL80211_DFS_FCC,
+ .reg_rules = {
+ REG_RULE_EXT(2402, 2482, 40, 0, 20, 0, 0),
+ REG_RULE_EXT(5170, 5250, 80, 0, 17, 0,
+ NL80211_RRF_AUTO_BW | 0),
+ REG_RULE_EXT(5250, 5330, 80, 0, 24, 0,
+ NL80211_RRF_DFS |
+ NL80211_RRF_AUTO_BW | 0),
+ REG_RULE_EXT(5490, 5730, 160, 0, 24, 0,
+ NL80211_RRF_DFS | 0),
+ REG_RULE_EXT(5735, 5835, 80, 0, 30, 0, 0),
+ },
+ .n_reg_rules = 5
+};
+
+static const struct ieee80211_regdomain regdom_SA = {
+ .alpha2 = "SA",
+ .dfs_region = NL80211_DFS_ETSI,
+ .reg_rules = {
+ REG_RULE_EXT(2402, 2482, 40, 0, 20, 0, 0),
+ REG_RULE_EXT(5170, 5250, 80, 0, 20, 0,
+ NL80211_RRF_AUTO_BW | 0),
+ REG_RULE_EXT(5250, 5330, 80, 0, 20, 0,
+ NL80211_RRF_DFS |
+ NL80211_RRF_AUTO_BW | 0),
+ REG_RULE_EXT(5490, 5710, 160, 0, 27, 0,
+ NL80211_RRF_DFS | 0),
+ },
+ .n_reg_rules = 4
+};
+
+static const struct ieee80211_regdomain regdom_SE = {
+ .alpha2 = "SE",
+ .dfs_region = NL80211_DFS_ETSI,
+ .reg_rules = {
+ REG_RULE_EXT(2402, 2482, 40, 0, 20, 0, 0),
+ REG_RULE_EXT(5170, 5250, 80, 0, 20, 0,
+ NL80211_RRF_AUTO_BW | 0),
+ REG_RULE_EXT(5250, 5330, 80, 0, 20, 0,
+ NL80211_RRF_DFS |
+ NL80211_RRF_AUTO_BW | 0),
+ REG_RULE_EXT(5490, 5710, 160, 0, 27, 0,
+ NL80211_RRF_DFS | 0),
+ REG_RULE_EXT(57000, 66000, 2160, 0, 40, 0, 0),
+ },
+ .n_reg_rules = 5
+};
+
+static const struct ieee80211_regdomain regdom_SG = {
+ .alpha2 = "SG",
+ .dfs_region = NL80211_DFS_FCC,
+ .reg_rules = {
+ REG_RULE_EXT(2402, 2482, 40, 0, 20, 0, 0),
+ REG_RULE_EXT(5170, 5250, 80, 0, 17, 0,
+ NL80211_RRF_AUTO_BW | 0),
+ REG_RULE_EXT(5250, 5330, 80, 0, 24, 0,
+ NL80211_RRF_DFS |
+ NL80211_RRF_AUTO_BW | 0),
+ REG_RULE_EXT(5490, 5730, 160, 0, 24, 0,
+ NL80211_RRF_DFS | 0),
+ REG_RULE_EXT(5735, 5835, 80, 0, 30, 0, 0),
+ },
+ .n_reg_rules = 5
+};
+
+static const struct ieee80211_regdomain regdom_SI = {
+ .alpha2 = "SI",
+ .dfs_region = NL80211_DFS_ETSI,
+ .reg_rules = {
+ REG_RULE_EXT(2402, 2482, 40, 0, 20, 0, 0),
+ REG_RULE_EXT(5170, 5250, 80, 0, 20, 0,
+ NL80211_RRF_AUTO_BW | 0),
+ REG_RULE_EXT(5250, 5330, 80, 0, 20, 0,
+ NL80211_RRF_DFS |
+ NL80211_RRF_AUTO_BW | 0),
+ REG_RULE_EXT(5490, 5710, 160, 0, 27, 0,
+ NL80211_RRF_DFS | 0),
+ REG_RULE_EXT(57000, 66000, 2160, 0, 40, 0, 0),
+ },
+ .n_reg_rules = 5
+};
+
+static const struct ieee80211_regdomain regdom_SK = {
+ .alpha2 = "SK",
+ .dfs_region = NL80211_DFS_ETSI,
+ .reg_rules = {
+ REG_RULE_EXT(2402, 2482, 40, 0, 20, 0, 0),
+ REG_RULE_EXT(5170, 5250, 80, 0, 20, 0,
+ NL80211_RRF_AUTO_BW | 0),
+ REG_RULE_EXT(5250, 5330, 80, 0, 20, 0,
+ NL80211_RRF_DFS |
+ NL80211_RRF_AUTO_BW | 0),
+ REG_RULE_EXT(5490, 5710, 160, 0, 27, 0,
+ NL80211_RRF_DFS | 0),
+ REG_RULE_EXT(57000, 66000, 2160, 0, 40, 0, 0),
+ },
+ .n_reg_rules = 5
+};
+
+static const struct ieee80211_regdomain regdom_SN = {
+ .alpha2 = "SN",
+ .dfs_region = NL80211_DFS_FCC,
+ .reg_rules = {
+ REG_RULE_EXT(2402, 2482, 40, 0, 20, 0, 0),
+ REG_RULE_EXT(5170, 5250, 80, 0, 17, 0,
+ NL80211_RRF_AUTO_BW | 0),
+ REG_RULE_EXT(5250, 5330, 80, 0, 24, 0,
+ NL80211_RRF_DFS |
+ NL80211_RRF_AUTO_BW | 0),
+ REG_RULE_EXT(5490, 5730, 160, 0, 24, 0,
+ NL80211_RRF_DFS | 0),
+ REG_RULE_EXT(5735, 5835, 80, 0, 30, 0, 0),
+ },
+ .n_reg_rules = 5
+};
+
+static const struct ieee80211_regdomain regdom_SR = {
+ .alpha2 = "SR",
+ .dfs_region = NL80211_DFS_ETSI,
+ .reg_rules = {
+ REG_RULE_EXT(2402, 2482, 40, 0, 20, 0, 0),
+ REG_RULE_EXT(5170, 5250, 80, 0, 20, 0,
+ NL80211_RRF_AUTO_BW | 0),
+ REG_RULE_EXT(5250, 5330, 80, 0, 20, 0,
+ NL80211_RRF_DFS |
+ NL80211_RRF_AUTO_BW | 0),
+ REG_RULE_EXT(5490, 5710, 160, 0, 27, 0,
+ NL80211_RRF_DFS | 0),
+ },
+ .n_reg_rules = 4
+};
+
+static const struct ieee80211_regdomain regdom_SV = {
+ .alpha2 = "SV",
+ .dfs_region = NL80211_DFS_FCC,
+ .reg_rules = {
+ REG_RULE_EXT(2402, 2482, 40, 0, 20, 0, 0),
+ REG_RULE_EXT(5170, 5250, 80, 0, 17, 0, 0),
+ REG_RULE_EXT(5250, 5330, 80, 0, 23, 0,
+ NL80211_RRF_DFS | 0),
+ REG_RULE_EXT(5735, 5835, 80, 0, 30, 0, 0),
+ },
+ .n_reg_rules = 4
+};
+
+static const struct ieee80211_regdomain regdom_SY = {
+ .alpha2 = "SY",
+ .reg_rules = {
+ REG_RULE_EXT(2402, 2482, 40, 0, 20, 0, 0),
+ },
+ .n_reg_rules = 1
+};
+
+static const struct ieee80211_regdomain regdom_TC = {
+ .alpha2 = "TC",
+ .dfs_region = NL80211_DFS_FCC,
+ .reg_rules = {
+ REG_RULE_EXT(2402, 2482, 40, 0, 20, 0, 0),
+ REG_RULE_EXT(5170, 5250, 80, 0, 24, 0,
+ NL80211_RRF_AUTO_BW | 0),
+ REG_RULE_EXT(5250, 5330, 80, 0, 24, 0,
+ NL80211_RRF_DFS |
+ NL80211_RRF_AUTO_BW | 0),
+ REG_RULE_EXT(5490, 5730, 160, 0, 24, 0,
+ NL80211_RRF_DFS | 0),
+ REG_RULE_EXT(5735, 5835, 80, 0, 30, 0, 0),
+ },
+ .n_reg_rules = 5
+};
+
+static const struct ieee80211_regdomain regdom_TD = {
+ .alpha2 = "TD",
+ .dfs_region = NL80211_DFS_ETSI,
+ .reg_rules = {
+ REG_RULE_EXT(2402, 2482, 40, 0, 20, 0, 0),
+ REG_RULE_EXT(5170, 5250, 80, 0, 20, 0,
+ NL80211_RRF_AUTO_BW | 0),
+ REG_RULE_EXT(5250, 5330, 80, 0, 20, 0,
+ NL80211_RRF_DFS |
+ NL80211_RRF_AUTO_BW | 0),
+ REG_RULE_EXT(5490, 5710, 160, 0, 27, 0,
+ NL80211_RRF_DFS | 0),
+ },
+ .n_reg_rules = 4
+};
+
+static const struct ieee80211_regdomain regdom_TG = {
+ .alpha2 = "TG",
+ .dfs_region = NL80211_DFS_ETSI,
+ .reg_rules = {
+ REG_RULE_EXT(2402, 2482, 40, 0, 20, 0, 0),
+ REG_RULE_EXT(5170, 5250, 40, 0, 20, 0, 0),
+ REG_RULE_EXT(5250, 5330, 40, 0, 20, 0,
+ NL80211_RRF_DFS | 0),
+ REG_RULE_EXT(5490, 5710, 40, 0, 27, 0,
+ NL80211_RRF_DFS | 0),
+ },
+ .n_reg_rules = 4
+};
+
+static const struct ieee80211_regdomain regdom_TH = {
+ .alpha2 = "TH",
+ .dfs_region = NL80211_DFS_FCC,
+ .reg_rules = {
+ REG_RULE_EXT(2402, 2482, 40, 0, 20, 0, 0),
+ REG_RULE_EXT(5170, 5250, 80, 0, 17, 0,
+ NL80211_RRF_AUTO_BW | 0),
+ REG_RULE_EXT(5250, 5330, 80, 0, 24, 0,
+ NL80211_RRF_DFS |
+ NL80211_RRF_AUTO_BW | 0),
+ REG_RULE_EXT(5490, 5730, 160, 0, 24, 0,
+ NL80211_RRF_DFS | 0),
+ REG_RULE_EXT(5735, 5835, 80, 0, 30, 0, 0),
+ },
+ .n_reg_rules = 5
+};
+
+static const struct ieee80211_regdomain regdom_TN = {
+ .alpha2 = "TN",
+ .dfs_region = NL80211_DFS_ETSI,
+ .reg_rules = {
+ REG_RULE_EXT(2402, 2482, 40, 0, 20, 0, 0),
+ REG_RULE_EXT(5170, 5250, 80, 0, 20, 0,
+ NL80211_RRF_AUTO_BW | 0),
+ REG_RULE_EXT(5250, 5330, 80, 0, 20, 0,
+ NL80211_RRF_DFS |
+ NL80211_RRF_AUTO_BW | 0),
+ },
+ .n_reg_rules = 3
+};
+
+static const struct ieee80211_regdomain regdom_TR = {
+ .alpha2 = "TR",
+ .dfs_region = NL80211_DFS_ETSI,
+ .reg_rules = {
+ REG_RULE_EXT(2402, 2482, 40, 0, 20, 0, 0),
+ REG_RULE_EXT(5170, 5250, 80, 0, 20, 0,
+ NL80211_RRF_AUTO_BW | 0),
+ REG_RULE_EXT(5250, 5330, 80, 0, 20, 0,
+ NL80211_RRF_DFS |
+ NL80211_RRF_AUTO_BW | 0),
+ REG_RULE_EXT(5490, 5710, 160, 0, 27, 0,
+ NL80211_RRF_DFS | 0),
+ REG_RULE_EXT(57000, 66000, 2160, 0, 40, 0, 0),
+ },
+ .n_reg_rules = 5
+};
+
+static const struct ieee80211_regdomain regdom_TT = {
+ .alpha2 = "TT",
+ .dfs_region = NL80211_DFS_FCC,
+ .reg_rules = {
+ REG_RULE_EXT(2402, 2482, 40, 0, 20, 0, 0),
+ REG_RULE_EXT(5170, 5250, 80, 0, 17, 0,
+ NL80211_RRF_AUTO_BW | 0),
+ REG_RULE_EXT(5250, 5330, 80, 0, 24, 0,
+ NL80211_RRF_DFS |
+ NL80211_RRF_AUTO_BW | 0),
+ REG_RULE_EXT(5490, 5730, 160, 0, 24, 0,
+ NL80211_RRF_DFS | 0),
+ REG_RULE_EXT(5735, 5835, 80, 0, 30, 0, 0),
+ },
+ .n_reg_rules = 5
+};
+
+static const struct ieee80211_regdomain regdom_TW = {
+ .alpha2 = "TW",
+ .dfs_region = NL80211_DFS_JP,
+ .reg_rules = {
+ REG_RULE_EXT(2402, 2472, 40, 0, 30, 0, 0),
+ REG_RULE_EXT(5270, 5330, 40, 0, 17, 0,
+ NL80211_RRF_DFS | 0),
+ REG_RULE_EXT(5490, 5590, 80, 0, 30, 0,
+ NL80211_RRF_DFS | 0),
+ REG_RULE_EXT(5650, 5710, 40, 0, 30, 0,
+ NL80211_RRF_DFS | 0),
+ REG_RULE_EXT(5735, 5835, 80, 0, 30, 0, 0),
+ },
+ .n_reg_rules = 5
+};
+
+static const struct ieee80211_regdomain regdom_UA = {
+ .alpha2 = "UA",
+ .dfs_region = NL80211_DFS_ETSI,
+ .reg_rules = {
+ REG_RULE_EXT(2400, 2483, 40, 0, 20, 0,
+ NL80211_RRF_NO_OUTDOOR | 0),
+ REG_RULE_EXT(5150, 5350, 40, 0, 20, 0,
+ NL80211_RRF_NO_OUTDOOR | 0),
+ REG_RULE_EXT(5490, 5670, 80, 0, 20, 0,
+ NL80211_RRF_DFS | 0),
+ REG_RULE_EXT(5735, 5835, 80, 0, 20, 0, 0),
+ REG_RULE_EXT(57000, 66000, 2160, 0, 40, 0, 0),
+ },
+ .n_reg_rules = 5
+};
+
+static const struct ieee80211_regdomain regdom_UG = {
+ .alpha2 = "UG",
+ .dfs_region = NL80211_DFS_FCC,
+ .reg_rules = {
+ REG_RULE_EXT(2402, 2482, 40, 0, 20, 0, 0),
+ REG_RULE_EXT(5170, 5250, 80, 0, 24, 0,
+ NL80211_RRF_AUTO_BW | 0),
+ REG_RULE_EXT(5250, 5330, 80, 0, 24, 0,
+ NL80211_RRF_DFS |
+ NL80211_RRF_AUTO_BW | 0),
+ REG_RULE_EXT(5490, 5730, 160, 0, 24, 0,
+ NL80211_RRF_DFS | 0),
+ REG_RULE_EXT(5735, 5835, 80, 0, 30, 0, 0),
+ },
+ .n_reg_rules = 5
+};
+
+static const struct ieee80211_regdomain regdom_US = {
+ .alpha2 = "US",
+ .dfs_region = NL80211_DFS_FCC,
+ .reg_rules = {
+ // 1...13
+ REG_RULE_EXT(2402, 2472, 40, 0, 30, 0, 0),
+ // 36 40 44 48
+ REG_RULE_EXT(5170, 5250, 80, 0, 17, 0,
+ NL80211_RRF_AUTO_BW | 0),
+ // 52 56 60 64
+ REG_RULE_EXT(5250, 5330, 80, 0, 23, 0,
+ NL80211_RRF_DFS |
+ NL80211_RRF_AUTO_BW | 0),
+ // 100 104 108 112 116 120 124
+ REG_RULE_EXT(5490, 5600, 80, 0, 24, 0,
+ NL80211_RRF_DFS | 0),
+ // 128 132 136 140
+ REG_RULE_EXT(5650, 5710, 40, 0, 24, 0,
+ NL80211_RRF_DFS | 0),
+ // 149 153 157 161 165
+ REG_RULE_EXT(5735, 5835, 80, 0, 30, 0, 0),
+ REG_RULE_EXT(57240, 63720, 2160, 0, 40, 0, 0),
+ },
+ .n_reg_rules = 7
+};
+
+static const struct ieee80211_regdomain regdom_UY = {
+ .alpha2 = "UY",
+ .dfs_region = NL80211_DFS_FCC,
+ .reg_rules = {
+ REG_RULE_EXT(2402, 2482, 40, 0, 20, 0, 0),
+ REG_RULE_EXT(5170, 5250, 80, 0, 17, 0,
+ NL80211_RRF_AUTO_BW | 0),
+ REG_RULE_EXT(5250, 5330, 80, 0, 24, 0,
+ NL80211_RRF_DFS |
+ NL80211_RRF_AUTO_BW | 0),
+ REG_RULE_EXT(5490, 5730, 160, 0, 24, 0,
+ NL80211_RRF_DFS | 0),
+ REG_RULE_EXT(5735, 5835, 80, 0, 30, 0, 0),
+ },
+ .n_reg_rules = 5
+};
+
+static const struct ieee80211_regdomain regdom_UZ = {
+ .alpha2 = "UZ",
+ .dfs_region = NL80211_DFS_ETSI,
+ .reg_rules = {
+ REG_RULE_EXT(2402, 2482, 40, 0, 20, 0, 0),
+ REG_RULE_EXT(5170, 5250, 80, 0, 20, 0,
+ NL80211_RRF_AUTO_BW | 0),
+ REG_RULE_EXT(5250, 5330, 80, 0, 20, 0,
+ NL80211_RRF_DFS |
+ NL80211_RRF_AUTO_BW | 0),
+ },
+ .n_reg_rules = 3
+};
+
+static const struct ieee80211_regdomain regdom_VC = {
+ .alpha2 = "VC",
+ .dfs_region = NL80211_DFS_ETSI,
+ .reg_rules = {
+ REG_RULE_EXT(2402, 2482, 40, 0, 20, 0, 0),
+ REG_RULE_EXT(5170, 5250, 80, 0, 20, 0,
+ NL80211_RRF_AUTO_BW | 0),
+ REG_RULE_EXT(5250, 5330, 80, 0, 20, 0,
+ NL80211_RRF_DFS |
+ NL80211_RRF_AUTO_BW | 0),
+ REG_RULE_EXT(5490, 5710, 160, 0, 27, 0,
+ NL80211_RRF_DFS | 0),
+ },
+ .n_reg_rules = 4
+};
+
+static const struct ieee80211_regdomain regdom_VE = {
+ .alpha2 = "VE",
+ .dfs_region = NL80211_DFS_FCC,
+ .reg_rules = {
+ REG_RULE_EXT(2402, 2482, 40, 0, 30, 0, 0),
+ REG_RULE_EXT(5170, 5250, 80, 0, 23, 0,
+ NL80211_RRF_AUTO_BW | 0),
+ REG_RULE_EXT(5250, 5330, 80, 0, 23, 0,
+ NL80211_RRF_DFS |
+ NL80211_RRF_AUTO_BW | 0),
+ REG_RULE_EXT(5735, 5835, 80, 0, 30, 0, 0),
+ },
+ .n_reg_rules = 4
+};
+
+static const struct ieee80211_regdomain regdom_VI = {
+ .alpha2 = "VI",
+ .dfs_region = NL80211_DFS_FCC,
+ .reg_rules = {
+ REG_RULE_EXT(2402, 2472, 40, 0, 30, 0, 0),
+ REG_RULE_EXT(5170, 5250, 80, 0, 24, 0,
+ NL80211_RRF_AUTO_BW | 0),
+ REG_RULE_EXT(5250, 5330, 80, 0, 24, 0,
+ NL80211_RRF_DFS |
+ NL80211_RRF_AUTO_BW | 0),
+ REG_RULE_EXT(5490, 5730, 160, 0, 24, 0,
+ NL80211_RRF_DFS | 0),
+ REG_RULE_EXT(5735, 5835, 80, 0, 30, 0, 0),
+ },
+ .n_reg_rules = 5
+};
+
+static const struct ieee80211_regdomain regdom_VN = {
+ .alpha2 = "VN",
+ .dfs_region = NL80211_DFS_FCC,
+ .reg_rules = {
+ REG_RULE_EXT(2402, 2482, 40, 0, 20, 0, 0),
+ REG_RULE_EXT(5170, 5250, 80, 0, 17, 0, 0),
+ REG_RULE_EXT(5250, 5330, 80, 0, 24, 0,
+ NL80211_RRF_DFS | 0),
+ REG_RULE_EXT(5490, 5730, 80, 0, 24, 0,
+ NL80211_RRF_DFS | 0),
+ REG_RULE_EXT(5735, 5835, 80, 0, 30, 0, 0),
+ },
+ .n_reg_rules = 5
+};
+
+static const struct ieee80211_regdomain regdom_VU = {
+ .alpha2 = "VU",
+ .dfs_region = NL80211_DFS_FCC,
+ .reg_rules = {
+ REG_RULE_EXT(2402, 2482, 40, 0, 20, 0, 0),
+ REG_RULE_EXT(5170, 5250, 80, 0, 17, 0,
+ NL80211_RRF_AUTO_BW | 0),
+ REG_RULE_EXT(5250, 5330, 80, 0, 24, 0,
+ NL80211_RRF_DFS |
+ NL80211_RRF_AUTO_BW | 0),
+ REG_RULE_EXT(5490, 5730, 160, 0, 24, 0,
+ NL80211_RRF_DFS | 0),
+ REG_RULE_EXT(5735, 5835, 80, 0, 30, 0, 0),
+ },
+ .n_reg_rules = 5
+};
+
+static const struct ieee80211_regdomain regdom_WF = {
+ .alpha2 = "WF",
+ .dfs_region = NL80211_DFS_ETSI,
+ .reg_rules = {
+ REG_RULE_EXT(2402, 2482, 40, 0, 20, 0, 0),
+ REG_RULE_EXT(5170, 5250, 80, 0, 20, 0,
+ NL80211_RRF_AUTO_BW | 0),
+ REG_RULE_EXT(5250, 5330, 80, 0, 20, 0,
+ NL80211_RRF_DFS |
+ NL80211_RRF_AUTO_BW | 0),
+ REG_RULE_EXT(5490, 5710, 160, 0, 27, 0,
+ NL80211_RRF_DFS | 0),
+ },
+ .n_reg_rules = 4
+};
+
+static const struct ieee80211_regdomain regdom_YE = {
+ .alpha2 = "YE",
+ .reg_rules = {
+ REG_RULE_EXT(2402, 2482, 40, 0, 20, 0, 0),
+ },
+ .n_reg_rules = 1
+};
+
+static const struct ieee80211_regdomain regdom_ZM = {
+ .alpha2 = "ZM",
+ .reg_rules = {
+ REG_RULE_EXT(2402, 2482, 40, 0, 20, 0, 0),
+ },
+ .n_reg_rules = 1
+};
+
+static const struct ieee80211_regdomain regdom_YT = {
+ .alpha2 = "YT",
+ .dfs_region = NL80211_DFS_ETSI,
+ .reg_rules = {
+ REG_RULE_EXT(2402, 2482, 40, 0, 20, 0, 0),
+ REG_RULE_EXT(5170, 5250, 80, 0, 20, 0,
+ NL80211_RRF_AUTO_BW | 0),
+ REG_RULE_EXT(5250, 5330, 80, 0, 20, 0,
+ NL80211_RRF_DFS |
+ NL80211_RRF_AUTO_BW | 0),
+ REG_RULE_EXT(5490, 5710, 160, 0, 27, 0,
+ NL80211_RRF_DFS | 0),
+ },
+ .n_reg_rules = 4
+};
+
+static const struct ieee80211_regdomain regdom_ZA = {
+ .alpha2 = "ZA",
+ .dfs_region = NL80211_DFS_ETSI,
+ .reg_rules = {
+ REG_RULE_EXT(2402, 2482, 40, 0, 20, 0, 0),
+ REG_RULE_EXT(5170, 5250, 80, 0, 20, 0,
+ NL80211_RRF_AUTO_BW | 0),
+ REG_RULE_EXT(5250, 5330, 80, 0, 20, 0,
+ NL80211_RRF_DFS |
+ NL80211_RRF_AUTO_BW | 0),
+ REG_RULE_EXT(5490, 5695, 160, 0, 27, 0,
+ NL80211_RRF_DFS | 0),
+ /*REG_RULE_EXT(5490, 5710, 160, 0, 27, 0,
+ NL80211_RRF_DFS | 0),*/
+ },
+ .n_reg_rules = 4
+};
+
+static const struct ieee80211_regdomain regdom_ZW = {
+ .alpha2 = "ZW",
+ .dfs_region = NL80211_DFS_ETSI,
+ .reg_rules = {
+ REG_RULE_EXT(2402, 2482, 40, 0, 20, 0, 0),
+ REG_RULE_EXT(5170, 5250, 80, 0, 20, 0,
+ NL80211_RRF_AUTO_BW | 0),
+ REG_RULE_EXT(5250, 5330, 80, 0, 20, 0,
+ NL80211_RRF_DFS |
+ NL80211_RRF_AUTO_BW | 0),
+ REG_RULE_EXT(5490, 5710, 160, 0, 27, 0,
+ NL80211_RRF_DFS | 0),
+ },
+ .n_reg_rules = 4
+};
+
+const struct ieee80211_regdomain *reg_regdb1[] = {
+ ®dom_00,
+ ®dom_AD,
+ ®dom_AE,
+ ®dom_AF,
+ ®dom_AI,
+ ®dom_AL,
+ ®dom_AM,
+ ®dom_AN,
+ ®dom_AR,
+ ®dom_AS,
+ ®dom_AT,
+ ®dom_AU,
+ ®dom_AW,
+ ®dom_AZ,
+ ®dom_BA,
+ ®dom_BB,
+ ®dom_BD,
+ ®dom_BE,
+ ®dom_BF,
+ ®dom_BG,
+ ®dom_BH,
+ ®dom_BL,
+ ®dom_BM,
+ ®dom_BN,
+ ®dom_BO,
+ ®dom_BR,
+ ®dom_BS,
+ ®dom_BT,
+ ®dom_BY,
+ ®dom_BZ,
+ ®dom_CA,
+ ®dom_CF,
+ ®dom_CH,
+ ®dom_CI,
+ ®dom_CL,
+ ®dom_CN,
+ ®dom_CO,
+ ®dom_CR,
+ ®dom_CX,
+ ®dom_CY,
+ ®dom_CZ,
+ ®dom_DE,
+ ®dom_DK,
+ ®dom_DM,
+ ®dom_DO,
+ ®dom_DZ,
+ ®dom_EC,
+ ®dom_EE,
+ ®dom_EG,
+ ®dom_ES,
+ ®dom_ET,
+ ®dom_FI,
+ ®dom_FM,
+ ®dom_FR,
+ ®dom_GB,
+ ®dom_GD,
+ ®dom_GE,
+ ®dom_GF,
+ ®dom_GH,
+ ®dom_GL,
+ ®dom_GP,
+ ®dom_GR,
+ ®dom_GT,
+ ®dom_GU,
+ ®dom_GY,
+ ®dom_HK,
+ ®dom_HN,
+ ®dom_HR,
+ ®dom_HT,
+ ®dom_HU,
+ ®dom_ID,
+ ®dom_IE,
+ ®dom_IL,
+ ®dom_IN,
+ ®dom_IR,
+ ®dom_IS,
+ ®dom_IT,
+ ®dom_JM,
+ ®dom_JO,
+ ®dom_JP,
+ ®dom_KE,
+ ®dom_KH,
+ ®dom_KN,
+ ®dom_KP,
+ ®dom_KR,
+ ®dom_KW,
+ ®dom_KY,
+ ®dom_KZ,
+ ®dom_LB,
+ ®dom_LC,
+ ®dom_LI,
+ ®dom_LK,
+ ®dom_LS,
+ ®dom_LT,
+ ®dom_LU,
+ ®dom_LV,
+ ®dom_MA,
+ ®dom_MC,
+ ®dom_MD,
+ ®dom_ME,
+ ®dom_MF,
+ ®dom_MH,
+ ®dom_MK,
+ ®dom_MN,
+ ®dom_MO,
+ ®dom_MP,
+ ®dom_MQ,
+ ®dom_MR,
+ ®dom_MT,
+ ®dom_MU,
+ ®dom_MW,
+ ®dom_MX,
+ ®dom_MY,
+ ®dom_NI,
+ ®dom_NL,
+ ®dom_NO,
+ ®dom_NP,
+ ®dom_NZ,
+ ®dom_OM,
+ ®dom_PA,
+ ®dom_PE,
+ ®dom_PF,
+ ®dom_PG,
+ ®dom_PH,
+ ®dom_PK,
+ ®dom_PL,
+ ®dom_PM,
+ ®dom_PR,
+ ®dom_PT,
+ ®dom_PW,
+ ®dom_PY,
+ ®dom_QA,
+ ®dom_RE,
+ ®dom_RO,
+ ®dom_RS,
+ ®dom_RU,
+ ®dom_RW,
+ ®dom_SA,
+ ®dom_SE,
+ ®dom_SG,
+ ®dom_SI,
+ ®dom_SK,
+ ®dom_SN,
+ ®dom_SR,
+ ®dom_SV,
+ ®dom_SY,
+ ®dom_TC,
+ ®dom_TD,
+ ®dom_TG,
+ ®dom_TH,
+ ®dom_TN,
+ ®dom_TR,
+ ®dom_TT,
+ ®dom_TW,
+ ®dom_UA,
+ ®dom_UG,
+ ®dom_US,
+ ®dom_UY,
+ ®dom_UZ,
+ ®dom_VC,
+ ®dom_VE,
+ ®dom_VI,
+ ®dom_VN,
+ ®dom_VU,
+ ®dom_WF,
+ ®dom_YE,
+ ®dom_ZM,
+ ®dom_YT,
+ ®dom_ZA,
+ ®dom_ZW,
+};
+
+int reg_regdb_size1 = ARRAY_SIZE(reg_regdb1);
+
+
diff --git a/lynq/R307/ap/os/linux/linux-3.4.x/drivers/net/wireless/aic8800/regdb.c b/lynq/R307/ap/os/linux/linux-3.4.x/drivers/net/wireless/aic8800/regdb.c
new file mode 100644
index 0000000..47bb3dc
--- /dev/null
+++ b/lynq/R307/ap/os/linux/linux-3.4.x/drivers/net/wireless/aic8800/regdb.c
@@ -0,0 +1,2882 @@
+#include <linux/nl80211.h>
+#include <net/cfg80211.h>
+#include <linux/version.h>
+
+//#include "regdb.h"
+
+#if LINUX_VERSION_CODE < KERNEL_VERSION(3, 15, 0)
+#define REG_RULE_EXT(start, end, bw, gain, eirp, dfs_cac, reg_flags) \
+{ \
+ .freq_range.start_freq_khz = MHZ_TO_KHZ(start), \
+ .freq_range.end_freq_khz = MHZ_TO_KHZ(end), \
+ .freq_range.max_bandwidth_khz = MHZ_TO_KHZ(bw), \
+ .power_rule.max_antenna_gain = DBI_TO_MBI(gain),\
+ .power_rule.max_eirp = DBM_TO_MBM(eirp), \
+ .flags = reg_flags, \
+}
+#define NL80211_RRF_AUTO_BW 0
+#endif
+
+static const struct ieee80211_regdomain regdom_00 = {
+ .n_reg_rules = 2,
+ .alpha2 = "00",
+ .reg_rules = {
+ // 1...14
+ REG_RULE(2390 - 10, 2510 + 10, 40, 0, 20, 0),
+ // 36...165
+ REG_RULE(5150 - 10, 5970 + 10, 80, 0, 20, 0),
+ }
+};
+
+static const struct ieee80211_regdomain regdom_AD = {
+ .alpha2 = "AD",
+ .reg_rules = {
+ REG_RULE_EXT(2402, 2482, 40, 0, 20, 0, 0),
+ REG_RULE_EXT(5170, 5250, 80, 0, 20, 0, 0),
+ REG_RULE_EXT(5250, 5330, 80, 0, 20, 0,
+ NL80211_RRF_DFS | 0),
+ REG_RULE_EXT(5490, 5710, 80, 0, 27, 0,
+ NL80211_RRF_DFS | 0),
+ REG_RULE_EXT(57000, 66000, 2160, 0, 40, 0, 0),
+ },
+ .n_reg_rules = 5
+};
+
+static const struct ieee80211_regdomain regdom_AE = {
+ .alpha2 = "AE",
+ .dfs_region = NL80211_DFS_FCC,
+ .reg_rules = {
+ REG_RULE_EXT(2402, 2482, 40, 0, 20, 0, 0),
+ REG_RULE_EXT(5170, 5250, 80, 0, 17, 0,
+ NL80211_RRF_AUTO_BW | 0),
+ REG_RULE_EXT(5250, 5330, 80, 0, 24, 0,
+ NL80211_RRF_DFS |
+ NL80211_RRF_AUTO_BW | 0),
+ REG_RULE_EXT(5490, 5730, 160, 0, 24, 0,
+ NL80211_RRF_DFS | 0),
+ //REG_RULE_EXT(5735, 5835, 80, 0, 30, 0, 0),
+ },
+ .n_reg_rules = 4
+};
+
+static const struct ieee80211_regdomain regdom_AF = {
+ .alpha2 = "AF",
+ .dfs_region = NL80211_DFS_ETSI,
+ .reg_rules = {
+ REG_RULE_EXT(2402, 2482, 40, 0, 20, 0, 0),
+ REG_RULE_EXT(5170, 5250, 80, 0, 20, 0,
+ NL80211_RRF_AUTO_BW | 0),
+ REG_RULE_EXT(5250, 5330, 80, 0, 20, 0,
+ NL80211_RRF_DFS |
+ NL80211_RRF_AUTO_BW | 0),
+ REG_RULE_EXT(5490, 5710, 160, 0, 27, 0,
+ NL80211_RRF_DFS | 0),
+ },
+ .n_reg_rules = 4
+};
+
+static const struct ieee80211_regdomain regdom_AI = {
+ .alpha2 = "AI",
+ .dfs_region = NL80211_DFS_ETSI,
+ .reg_rules = {
+ REG_RULE_EXT(2402, 2482, 40, 0, 20, 0, 0),
+ REG_RULE_EXT(5170, 5250, 80, 0, 20, 0,
+ NL80211_RRF_AUTO_BW | 0),
+ REG_RULE_EXT(5250, 5330, 80, 0, 20, 0,
+ NL80211_RRF_DFS |
+ NL80211_RRF_AUTO_BW | 0),
+ REG_RULE_EXT(5490, 5710, 160, 0, 27, 0,
+ NL80211_RRF_DFS | 0),
+ },
+ .n_reg_rules = 4
+};
+
+static const struct ieee80211_regdomain regdom_AL = {
+ .alpha2 = "AL",
+ .dfs_region = NL80211_DFS_ETSI,
+ .reg_rules = {
+ REG_RULE_EXT(2402, 2482, 40, 0, 20, 0, 0),
+ REG_RULE_EXT(5170, 5250, 80, 0, 20, 0,
+ NL80211_RRF_AUTO_BW | 0),
+ REG_RULE_EXT(5250, 5330, 80, 0, 20, 0,
+ NL80211_RRF_DFS |
+ NL80211_RRF_AUTO_BW | 0),
+ REG_RULE_EXT(5490, 5710, 160, 0, 27, 0,
+ NL80211_RRF_DFS | 0),
+ },
+ .n_reg_rules = 4
+};
+
+static const struct ieee80211_regdomain regdom_AM = {
+ .alpha2 = "AM",
+ .dfs_region = NL80211_DFS_ETSI,
+ .reg_rules = {
+ REG_RULE_EXT(2402, 2482, 40, 0, 20, 0, 0),
+ REG_RULE_EXT(5170, 5250, 80, 0, 18, 0, 0),
+ REG_RULE_EXT(5250, 5330, 80, 0, 18, 0,
+ NL80211_RRF_DFS | 0),
+ },
+ .n_reg_rules = 3
+};
+
+static const struct ieee80211_regdomain regdom_AN = {
+ .alpha2 = "AN",
+ .dfs_region = NL80211_DFS_ETSI,
+ .reg_rules = {
+ REG_RULE_EXT(2402, 2482, 40, 0, 20, 0, 0),
+ REG_RULE_EXT(5170, 5250, 80, 0, 20, 0,
+ NL80211_RRF_AUTO_BW | 0),
+ REG_RULE_EXT(5250, 5330, 80, 0, 20, 0,
+ NL80211_RRF_DFS |
+ NL80211_RRF_AUTO_BW | 0),
+ REG_RULE_EXT(5490, 5710, 160, 0, 27, 0,
+ NL80211_RRF_DFS | 0),
+ },
+ .n_reg_rules = 4
+};
+
+static const struct ieee80211_regdomain regdom_AR = {
+ .alpha2 = "AR",
+ .dfs_region = NL80211_DFS_FCC,
+ .reg_rules = {
+ REG_RULE_EXT(2402, 2482, 40, 0, 20, 0, 0),
+ //REG_RULE_EXT(5170, 5250, 80, 0, 17, 0,
+ // NL80211_RRF_AUTO_BW | 0),
+ //REG_RULE_EXT(5250, 5330, 80, 0, 24, 0,
+ // NL80211_RRF_DFS |
+ // NL80211_RRF_AUTO_BW | 0),
+ REG_RULE_EXT(5270, 5330, 40, 0, 24, 0,
+ NL80211_RRF_DFS |
+ NL80211_RRF_AUTO_BW | 0),
+ //REG_RULE_EXT(5490, 5730, 160, 0, 24, 0,
+ // NL80211_RRF_DFS | 0),
+ REG_RULE_EXT(5735, 5815, 80, 0, 30, 0, 0),
+ },
+ .n_reg_rules = 3
+};
+
+static const struct ieee80211_regdomain regdom_AS = {
+ .alpha2 = "AS",
+ .dfs_region = NL80211_DFS_FCC,
+ .reg_rules = {
+ REG_RULE_EXT(2402, 2472, 40, 0, 30, 0, 0),
+ REG_RULE_EXT(5170, 5250, 80, 0, 24, 0,
+ NL80211_RRF_AUTO_BW | 0),
+ REG_RULE_EXT(5250, 5330, 80, 0, 24, 0,
+ NL80211_RRF_DFS |
+ NL80211_RRF_AUTO_BW | 0),
+ REG_RULE_EXT(5490, 5730, 160, 0, 24, 0,
+ NL80211_RRF_DFS | 0),
+ REG_RULE_EXT(5735, 5835, 80, 0, 30, 0, 0),
+ },
+ .n_reg_rules = 5
+};
+
+static const struct ieee80211_regdomain regdom_AT = {
+ .alpha2 = "AT",
+ .dfs_region = NL80211_DFS_ETSI,
+ .reg_rules = {
+ REG_RULE_EXT(2402, 2482, 40, 0, 20, 0, 0),
+ REG_RULE_EXT(5170, 5250, 80, 0, 20, 0,
+ NL80211_RRF_AUTO_BW | 0),
+ REG_RULE_EXT(5250, 5330, 80, 0, 20, 0,
+ NL80211_RRF_DFS |
+ NL80211_RRF_AUTO_BW | 0),
+ REG_RULE_EXT(5490, 5710, 160, 0, 27, 0,
+ NL80211_RRF_DFS | 0),
+ REG_RULE_EXT(57000, 66000, 2160, 0, 40, 0, 0),
+ },
+ .n_reg_rules = 5
+};
+
+static const struct ieee80211_regdomain regdom_AU = {
+ .alpha2 = "AU",
+ .reg_rules = {
+ REG_RULE_EXT(2402, 2482, 40, 0, 20, 0, 0),
+ REG_RULE_EXT(5170, 5250, 80, 0, 17, 0,
+ NL80211_RRF_AUTO_BW | 0),
+ REG_RULE_EXT(5250, 5330, 80, 0, 24, 0,
+ NL80211_RRF_DFS |
+ NL80211_RRF_AUTO_BW | 0),
+ REG_RULE_EXT(5490, 5710, 160, 0, 24, 0,
+ NL80211_RRF_DFS | 0),
+ REG_RULE_EXT(5735, 5835, 80, 0, 30, 0, 0),
+ },
+ .n_reg_rules = 5
+};
+
+static const struct ieee80211_regdomain regdom_AW = {
+ .alpha2 = "AW",
+ .dfs_region = NL80211_DFS_ETSI,
+ .reg_rules = {
+ REG_RULE_EXT(2402, 2482, 40, 0, 20, 0, 0),
+ REG_RULE_EXT(5170, 5250, 80, 0, 20, 0,
+ NL80211_RRF_AUTO_BW | 0),
+ REG_RULE_EXT(5250, 5330, 80, 0, 20, 0,
+ NL80211_RRF_DFS |
+ NL80211_RRF_AUTO_BW | 0),
+ REG_RULE_EXT(5490, 5710, 160, 0, 27, 0,
+ NL80211_RRF_DFS | 0),
+ },
+ .n_reg_rules = 4
+};
+
+static const struct ieee80211_regdomain regdom_AZ = {
+ .alpha2 = "AZ",
+ .dfs_region = NL80211_DFS_ETSI,
+ .reg_rules = {
+ REG_RULE_EXT(2402, 2482, 40, 0, 20, 0, 0),
+ REG_RULE_EXT(5170, 5250, 80, 0, 18, 0,
+ NL80211_RRF_AUTO_BW | 0),
+ REG_RULE_EXT(5250, 5330, 80, 0, 18, 0,
+ NL80211_RRF_DFS |
+ NL80211_RRF_AUTO_BW | 0),
+ },
+ .n_reg_rules = 3
+};
+
+static const struct ieee80211_regdomain regdom_BA = {
+ .alpha2 = "BA",
+ .dfs_region = NL80211_DFS_ETSI,
+ .reg_rules = {
+ REG_RULE_EXT(2402, 2482, 40, 0, 20, 0, 0),
+ REG_RULE_EXT(5170, 5250, 80, 0, 20, 0,
+ NL80211_RRF_AUTO_BW | 0),
+ REG_RULE_EXT(5250, 5330, 80, 0, 20, 0,
+ NL80211_RRF_DFS |
+ NL80211_RRF_AUTO_BW | 0),
+ REG_RULE_EXT(5490, 5710, 160, 0, 27, 0,
+ NL80211_RRF_DFS | 0),
+ REG_RULE_EXT(57000, 66000, 2160, 0, 40, 0, 0),
+ },
+ .n_reg_rules = 5
+};
+
+static const struct ieee80211_regdomain regdom_BB = {
+ .alpha2 = "BB",
+ .dfs_region = NL80211_DFS_FCC,
+ .reg_rules = {
+ REG_RULE_EXT(2402, 2482, 40, 0, 20, 0, 0),
+ REG_RULE_EXT(5170, 5250, 80, 0, 23, 0,
+ NL80211_RRF_AUTO_BW | 0),
+ REG_RULE_EXT(5250, 5330, 80, 0, 23, 0,
+ NL80211_RRF_DFS |
+ NL80211_RRF_AUTO_BW | 0),
+ REG_RULE_EXT(5735, 5835, 80, 0, 30, 0, 0),
+ },
+ .n_reg_rules = 4
+};
+
+static const struct ieee80211_regdomain regdom_BD = {
+ .alpha2 = "BD",
+ .dfs_region = NL80211_DFS_JP,
+ .reg_rules = {
+ REG_RULE_EXT(2402, 2482, 40, 0, 20, 0, 0),
+ REG_RULE_EXT(5735, 5835, 80, 0, 30, 0, 0),
+ },
+ .n_reg_rules = 2
+};
+
+static const struct ieee80211_regdomain regdom_BE = {
+ .alpha2 = "BE",
+ .dfs_region = NL80211_DFS_ETSI,
+ .reg_rules = {
+ REG_RULE_EXT(2402, 2482, 40, 0, 20, 0, 0),
+ REG_RULE_EXT(5170, 5250, 80, 0, 20, 0,
+ NL80211_RRF_AUTO_BW | 0),
+ REG_RULE_EXT(5250, 5330, 80, 0, 20, 0,
+ NL80211_RRF_DFS |
+ NL80211_RRF_AUTO_BW | 0),
+ REG_RULE_EXT(5490, 5710, 160, 0, 27, 0,
+ NL80211_RRF_DFS | 0),
+ REG_RULE_EXT(57000, 66000, 2160, 0, 40, 0, 0),
+ },
+ .n_reg_rules = 5
+};
+
+static const struct ieee80211_regdomain regdom_BF = {
+ .alpha2 = "BF",
+ .dfs_region = NL80211_DFS_FCC,
+ .reg_rules = {
+ REG_RULE_EXT(2402, 2482, 40, 0, 20, 0, 0),
+ REG_RULE_EXT(5170, 5250, 80, 0, 17, 0,
+ NL80211_RRF_AUTO_BW | 0),
+ REG_RULE_EXT(5250, 5330, 80, 0, 24, 0,
+ NL80211_RRF_DFS |
+ NL80211_RRF_AUTO_BW | 0),
+ REG_RULE_EXT(5490, 5730, 160, 0, 24, 0,
+ NL80211_RRF_DFS | 0),
+ REG_RULE_EXT(5735, 5835, 80, 0, 30, 0, 0),
+ },
+ .n_reg_rules = 5
+};
+
+static const struct ieee80211_regdomain regdom_BG = {
+ .alpha2 = "BG",
+ .dfs_region = NL80211_DFS_ETSI,
+ .reg_rules = {
+ REG_RULE_EXT(2402, 2482, 40, 0, 20, 0, 0),
+ REG_RULE_EXT(5170, 5250, 80, 0, 20, 0,
+ NL80211_RRF_AUTO_BW | 0),
+ REG_RULE_EXT(5250, 5330, 80, 0, 20, 0,
+ NL80211_RRF_DFS |
+ NL80211_RRF_AUTO_BW | 0),
+ REG_RULE_EXT(5490, 5710, 160, 0, 27, 0,
+ NL80211_RRF_DFS | 0),
+ REG_RULE_EXT(57000, 66000, 2160, 0, 40, 0, 0),
+ },
+ .n_reg_rules = 5
+};
+
+static const struct ieee80211_regdomain regdom_BH = {
+ .alpha2 = "BH",
+ .dfs_region = NL80211_DFS_JP,
+ .reg_rules = {
+ REG_RULE_EXT(2402, 2482, 40, 0, 20, 0, 0),
+ REG_RULE_EXT(5170, 5250, 80, 0, 20, 0, 0),
+ REG_RULE_EXT(5250, 5330, 80, 0, 20, 0,
+ NL80211_RRF_DFS | 0),
+ REG_RULE_EXT(5735, 5835, 80, 0, 20, 0, 0),
+ },
+ .n_reg_rules = 4
+};
+
+static const struct ieee80211_regdomain regdom_BL = {
+ .alpha2 = "BL",
+ .dfs_region = NL80211_DFS_ETSI,
+ .reg_rules = {
+ REG_RULE_EXT(2402, 2482, 40, 0, 20, 0, 0),
+ REG_RULE_EXT(5170, 5250, 80, 0, 20, 0,
+ NL80211_RRF_AUTO_BW | 0),
+ REG_RULE_EXT(5250, 5330, 80, 0, 20, 0,
+ NL80211_RRF_DFS |
+ NL80211_RRF_AUTO_BW | 0),
+ REG_RULE_EXT(5490, 5710, 160, 0, 27, 0,
+ NL80211_RRF_DFS | 0),
+ },
+ .n_reg_rules = 4
+};
+
+static const struct ieee80211_regdomain regdom_BM = {
+ .alpha2 = "BM",
+ .dfs_region = NL80211_DFS_FCC,
+ .reg_rules = {
+ REG_RULE_EXT(2402, 2472, 40, 0, 30, 0, 0),
+ REG_RULE_EXT(5170, 5250, 80, 0, 24, 0,
+ NL80211_RRF_AUTO_BW | 0),
+ REG_RULE_EXT(5250, 5330, 80, 0, 24, 0,
+ NL80211_RRF_DFS |
+ NL80211_RRF_AUTO_BW | 0),
+ REG_RULE_EXT(5490, 5730, 160, 0, 24, 0,
+ NL80211_RRF_DFS | 0),
+ REG_RULE_EXT(5735, 5835, 80, 0, 30, 0, 0),
+ },
+ .n_reg_rules = 5
+};
+
+static const struct ieee80211_regdomain regdom_BN = {
+ .alpha2 = "BN",
+ .dfs_region = NL80211_DFS_JP,
+ .reg_rules = {
+ REG_RULE_EXT(2402, 2482, 40, 0, 20, 0, 0),
+ REG_RULE_EXT(5170, 5250, 80, 0, 20, 0,
+ NL80211_RRF_AUTO_BW | 0),
+ REG_RULE_EXT(5250, 5330, 80, 0, 20, 0,
+ NL80211_RRF_DFS |
+ NL80211_RRF_AUTO_BW | 0),
+ REG_RULE_EXT(5735, 5835, 80, 0, 20, 0, 0),
+ },
+ .n_reg_rules = 4
+};
+
+static const struct ieee80211_regdomain regdom_BO = {
+ .alpha2 = "BO",
+ .dfs_region = NL80211_DFS_JP,
+ .reg_rules = {
+ REG_RULE_EXT(2402, 2482, 40, 0, 20, 0, 0),
+ REG_RULE_EXT(5250, 5330, 80, 0, 30, 0,
+ NL80211_RRF_DFS | 0),
+ REG_RULE_EXT(5735, 5835, 80, 0, 30, 0, 0),
+ },
+ .n_reg_rules = 3
+};
+
+static const struct ieee80211_regdomain regdom_BR = {
+ .alpha2 = "BR",
+ .dfs_region = NL80211_DFS_FCC,
+ .reg_rules = {
+ REG_RULE_EXT(2402, 2482, 40, 0, 20, 0, 0),
+ REG_RULE_EXT(5170, 5250, 80, 0, 17, 0,
+ NL80211_RRF_AUTO_BW | 0),
+ REG_RULE_EXT(5250, 5330, 80, 0, 24, 0,
+ NL80211_RRF_DFS |
+ NL80211_RRF_AUTO_BW | 0),
+ REG_RULE_EXT(5490, 5730, 160, 0, 24, 0,
+ NL80211_RRF_DFS | 0),
+ REG_RULE_EXT(5735, 5835, 80, 0, 30, 0, 0),
+ },
+ .n_reg_rules = 5
+};
+
+static const struct ieee80211_regdomain regdom_BS = {
+ .alpha2 = "BS",
+ .dfs_region = NL80211_DFS_FCC,
+ .reg_rules = {
+ REG_RULE_EXT(2402, 2482, 40, 0, 20, 0, 0),
+ REG_RULE_EXT(5170, 5250, 80, 0, 24, 0,
+ NL80211_RRF_AUTO_BW | 0),
+ REG_RULE_EXT(5250, 5330, 80, 0, 24, 0,
+ NL80211_RRF_DFS |
+ NL80211_RRF_AUTO_BW | 0),
+ REG_RULE_EXT(5490, 5730, 160, 0, 24, 0,
+ NL80211_RRF_DFS | 0),
+ REG_RULE_EXT(5735, 5835, 80, 0, 30, 0, 0),
+ },
+ .n_reg_rules = 5
+};
+
+static const struct ieee80211_regdomain regdom_BT = {
+ .alpha2 = "BT",
+ .dfs_region = NL80211_DFS_ETSI,
+ .reg_rules = {
+ REG_RULE_EXT(2402, 2482, 40, 0, 20, 0, 0),
+ REG_RULE_EXT(5170, 5250, 80, 0, 20, 0,
+ NL80211_RRF_AUTO_BW | 0),
+ REG_RULE_EXT(5250, 5330, 80, 0, 20, 0,
+ NL80211_RRF_DFS |
+ NL80211_RRF_AUTO_BW | 0),
+ REG_RULE_EXT(5490, 5710, 160, 0, 27, 0,
+ NL80211_RRF_DFS | 0),
+ },
+ .n_reg_rules = 4
+};
+
+static const struct ieee80211_regdomain regdom_BY = {
+ .alpha2 = "BY",
+ .dfs_region = NL80211_DFS_ETSI,
+ .reg_rules = {
+ REG_RULE_EXT(2402, 2482, 40, 0, 20, 0, 0),
+ REG_RULE_EXT(5170, 5250, 80, 0, 20, 0,
+ NL80211_RRF_AUTO_BW | 0),
+ REG_RULE_EXT(5250, 5330, 80, 0, 20, 0,
+ NL80211_RRF_DFS |
+ NL80211_RRF_AUTO_BW | 0),
+ REG_RULE_EXT(5490, 5710, 160, 0, 27, 0,
+ NL80211_RRF_DFS | 0),
+ },
+ .n_reg_rules = 4
+};
+
+static const struct ieee80211_regdomain regdom_BZ = {
+ .alpha2 = "BZ",
+ .dfs_region = NL80211_DFS_JP,
+ .reg_rules = {
+ REG_RULE_EXT(2402, 2482, 40, 0, 30, 0, 0),
+ REG_RULE_EXT(5735, 5835, 80, 0, 30, 0, 0),
+ },
+ .n_reg_rules = 2
+};
+
+static const struct ieee80211_regdomain regdom_CA = {
+ .alpha2 = "CA",
+ .dfs_region = NL80211_DFS_FCC,
+ .reg_rules = {
+ REG_RULE_EXT(2402, 2472, 40, 0, 30, 0, 0),
+ REG_RULE_EXT(5170, 5250, 80, 0, 17, 0,
+ NL80211_RRF_AUTO_BW | 0),
+ REG_RULE_EXT(5250, 5330, 80, 0, 24, 0,
+ NL80211_RRF_DFS |
+ NL80211_RRF_AUTO_BW | 0),
+ REG_RULE_EXT(5490, 5730, 160, 0, 24, 0,
+ NL80211_RRF_DFS | 0),
+ REG_RULE_EXT(5735, 5835, 80, 0, 30, 0, 0),
+ },
+ .n_reg_rules = 5
+};
+
+static const struct ieee80211_regdomain regdom_CF = {
+ .alpha2 = "CF",
+ .dfs_region = NL80211_DFS_FCC,
+ .reg_rules = {
+ REG_RULE_EXT(2402, 2482, 40, 0, 20, 0, 0),
+ REG_RULE_EXT(5170, 5250, 40, 0, 17, 0, 0),
+ REG_RULE_EXT(5250, 5330, 40, 0, 24, 0,
+ NL80211_RRF_DFS | 0),
+ REG_RULE_EXT(5490, 5730, 40, 0, 24, 0,
+ NL80211_RRF_DFS | 0),
+ REG_RULE_EXT(5735, 5835, 40, 0, 30, 0, 0),
+ },
+ .n_reg_rules = 5
+};
+
+static const struct ieee80211_regdomain regdom_CH = {
+ .alpha2 = "CH",
+ .dfs_region = NL80211_DFS_ETSI,
+ .reg_rules = {
+ REG_RULE_EXT(2402, 2482, 40, 0, 20, 0, 0),
+ REG_RULE_EXT(5170, 5250, 80, 0, 20, 0,
+ NL80211_RRF_AUTO_BW | 0),
+ REG_RULE_EXT(5250, 5330, 80, 0, 20, 0,
+ NL80211_RRF_DFS |
+ NL80211_RRF_AUTO_BW | 0),
+ REG_RULE_EXT(5490, 5710, 160, 0, 27, 0,
+ NL80211_RRF_DFS | 0),
+ REG_RULE_EXT(57000, 66000, 2160, 0, 40, 0, 0),
+ },
+ .n_reg_rules = 5
+};
+
+static const struct ieee80211_regdomain regdom_CI = {
+ .alpha2 = "CI",
+ .dfs_region = NL80211_DFS_FCC,
+ .reg_rules = {
+ REG_RULE_EXT(2402, 2482, 40, 0, 20, 0, 0),
+ REG_RULE_EXT(5170, 5250, 80, 0, 17, 0,
+ NL80211_RRF_AUTO_BW | 0),
+ REG_RULE_EXT(5250, 5330, 80, 0, 24, 0,
+ NL80211_RRF_DFS |
+ NL80211_RRF_AUTO_BW | 0),
+ REG_RULE_EXT(5490, 5730, 160, 0, 24, 0,
+ NL80211_RRF_DFS | 0),
+ REG_RULE_EXT(5735, 5835, 80, 0, 30, 0, 0),
+ },
+ .n_reg_rules = 5
+};
+
+static const struct ieee80211_regdomain regdom_CL = {
+ .alpha2 = "CL",
+ .dfs_region = NL80211_DFS_JP,
+ .reg_rules = {
+ REG_RULE_EXT(2402, 2482, 40, 0, 20, 0, 0),
+ REG_RULE_EXT(5170, 5250, 80, 0, 20, 0,
+ NL80211_RRF_AUTO_BW | 0),
+ REG_RULE_EXT(5250, 5330, 80, 0, 20, 0,
+ NL80211_RRF_DFS |
+ NL80211_RRF_AUTO_BW | 0),
+ REG_RULE_EXT(5735, 5835, 80, 0, 20, 0, 0),
+ },
+ .n_reg_rules = 4
+};
+
+static const struct ieee80211_regdomain regdom_CN = {
+ .alpha2 = "CN",
+ .dfs_region = NL80211_DFS_FCC,
+ .reg_rules = {
+ REG_RULE_EXT(2402, 2482, 40, 0, 20, 0, 0),
+ REG_RULE_EXT(5170, 5250, 80, 0, 23, 0,
+ NL80211_RRF_AUTO_BW | 0),
+ REG_RULE_EXT(5250, 5330, 80, 0, 23, 0,
+ NL80211_RRF_DFS |
+ NL80211_RRF_AUTO_BW | 0),
+ REG_RULE_EXT(5735, 5835, 80, 0, 30, 0, 0),
+ REG_RULE_EXT(57240, 59400, 2160, 0, 28, 0, 0),
+ REG_RULE_EXT(59400, 63720, 2160, 0, 44, 0, 0),
+ REG_RULE_EXT(63720, 65880, 2160, 0, 28, 0, 0),
+ },
+ .n_reg_rules = 7
+};
+
+static const struct ieee80211_regdomain regdom_CO = {
+ .alpha2 = "CO",
+ .dfs_region = NL80211_DFS_FCC,
+ .reg_rules = {
+ REG_RULE_EXT(2402, 2482, 40, 0, 20, 0, 0),
+ REG_RULE_EXT(5170, 5250, 80, 0, 17, 0,
+ NL80211_RRF_AUTO_BW | 0),
+ REG_RULE_EXT(5250, 5330, 80, 0, 24, 0,
+ NL80211_RRF_DFS |
+ NL80211_RRF_AUTO_BW | 0),
+ REG_RULE_EXT(5490, 5730, 160, 0, 24, 0,
+ NL80211_RRF_DFS | 0),
+ REG_RULE_EXT(5735, 5835, 80, 0, 30, 0, 0),
+ },
+ .n_reg_rules = 5
+};
+
+static const struct ieee80211_regdomain regdom_CR = {
+ .alpha2 = "CR",
+ .dfs_region = NL80211_DFS_FCC,
+ .reg_rules = {
+ REG_RULE_EXT(2402, 2482, 40, 0, 20, 0, 0),
+ REG_RULE_EXT(5170, 5250, 80, 0, 17, 0, 0),
+ REG_RULE_EXT(5250, 5330, 80, 0, 24, 0,
+ NL80211_RRF_DFS | 0),
+ REG_RULE_EXT(5490, 5730, 80, 0, 24, 0,
+ NL80211_RRF_DFS | 0),
+ REG_RULE_EXT(5735, 5835, 80, 0, 30, 0, 0),
+ },
+ .n_reg_rules = 5
+};
+
+static const struct ieee80211_regdomain regdom_CX = {
+ .alpha2 = "CX",
+ .dfs_region = NL80211_DFS_FCC,
+ .reg_rules = {
+ REG_RULE_EXT(2402, 2482, 40, 0, 20, 0, 0),
+ REG_RULE_EXT(5170, 5250, 80, 0, 24, 0,
+ NL80211_RRF_AUTO_BW | 0),
+ REG_RULE_EXT(5250, 5330, 80, 0, 24, 0,
+ NL80211_RRF_DFS |
+ NL80211_RRF_AUTO_BW | 0),
+ REG_RULE_EXT(5490, 5730, 160, 0, 24, 0,
+ NL80211_RRF_DFS | 0),
+ REG_RULE_EXT(5735, 5835, 80, 0, 30, 0, 0),
+ },
+ .n_reg_rules = 5
+};
+
+static const struct ieee80211_regdomain regdom_CY = {
+ .alpha2 = "CY",
+ .dfs_region = NL80211_DFS_ETSI,
+ .reg_rules = {
+ REG_RULE_EXT(2402, 2482, 40, 0, 20, 0, 0),
+ REG_RULE_EXT(5170, 5250, 80, 0, 20, 0,
+ NL80211_RRF_AUTO_BW | 0),
+ REG_RULE_EXT(5250, 5330, 80, 0, 20, 0,
+ NL80211_RRF_DFS |
+ NL80211_RRF_AUTO_BW | 0),
+ REG_RULE_EXT(5490, 5710, 160, 0, 27, 0,
+ NL80211_RRF_DFS | 0),
+ REG_RULE_EXT(57000, 66000, 2160, 0, 40, 0, 0),
+ },
+ .n_reg_rules = 5
+};
+
+static const struct ieee80211_regdomain regdom_CZ = {
+ .alpha2 = "CZ",
+ .dfs_region = NL80211_DFS_ETSI,
+ .reg_rules = {
+ REG_RULE_EXT(2400, 2483, 40, 0, 20, 0, 0),
+ REG_RULE_EXT(5150, 5250, 80, 0, 23, 0,
+ NL80211_RRF_NO_OUTDOOR |
+ NL80211_RRF_AUTO_BW | 0),
+ REG_RULE_EXT(5250, 5350, 80, 0, 20, 0,
+ NL80211_RRF_NO_OUTDOOR |
+ NL80211_RRF_DFS |
+ NL80211_RRF_AUTO_BW | 0),
+ REG_RULE_EXT(5470, 5725, 160, 0, 27, 0,
+ NL80211_RRF_DFS | 0),
+ REG_RULE_EXT(57000, 66000, 2160, 0, 40, 0, 0),
+ },
+ .n_reg_rules = 5
+};
+
+static const struct ieee80211_regdomain regdom_DE = {
+ .alpha2 = "DE",
+ .dfs_region = NL80211_DFS_ETSI,
+ .reg_rules = {
+ REG_RULE_EXT(2400, 2483, 40, 0, 20, 0, 0),
+ REG_RULE_EXT(5150, 5250, 80, 0, 20, 0,
+ NL80211_RRF_NO_OUTDOOR |
+ NL80211_RRF_AUTO_BW | 0),
+ REG_RULE_EXT(5250, 5350, 80, 0, 20, 0,
+ NL80211_RRF_NO_OUTDOOR |
+ NL80211_RRF_DFS |
+ NL80211_RRF_AUTO_BW | 0),
+ REG_RULE_EXT(5470, 5695, 160, 0, 27, 0,
+ NL80211_RRF_DFS | 0),
+ /*REG_RULE_EXT(5470, 5725, 160, 0, 27, 0,
+ NL80211_RRF_DFS | 0),*/
+ REG_RULE_EXT(57000, 66000, 2160, 0, 40, 0, 0),
+ },
+ .n_reg_rules = 5
+};
+
+static const struct ieee80211_regdomain regdom_DK = {
+ .alpha2 = "DK",
+ .dfs_region = NL80211_DFS_ETSI,
+ .reg_rules = {
+ REG_RULE_EXT(2402, 2482, 40, 0, 20, 0, 0),
+ REG_RULE_EXT(5170, 5250, 80, 0, 20, 0,
+ NL80211_RRF_AUTO_BW | 0),
+ REG_RULE_EXT(5250, 5330, 80, 0, 20, 0,
+ NL80211_RRF_DFS |
+ NL80211_RRF_AUTO_BW | 0),
+ REG_RULE_EXT(5490, 5710, 160, 0, 27, 0,
+ NL80211_RRF_DFS | 0),
+ REG_RULE_EXT(57000, 66000, 2160, 0, 40, 0, 0),
+ },
+ .n_reg_rules = 5
+};
+
+static const struct ieee80211_regdomain regdom_DM = {
+ .alpha2 = "DM",
+ .dfs_region = NL80211_DFS_FCC,
+ .reg_rules = {
+ REG_RULE_EXT(2402, 2472, 40, 0, 30, 0, 0),
+ REG_RULE_EXT(5170, 5250, 80, 0, 17, 0,
+ NL80211_RRF_AUTO_BW | 0),
+ REG_RULE_EXT(5250, 5330, 80, 0, 23, 0,
+ NL80211_RRF_DFS |
+ NL80211_RRF_AUTO_BW | 0),
+ REG_RULE_EXT(5735, 5835, 80, 0, 30, 0, 0),
+ },
+ .n_reg_rules = 4
+};
+
+static const struct ieee80211_regdomain regdom_DO = {
+ .alpha2 = "DO",
+ .dfs_region = NL80211_DFS_FCC,
+ .reg_rules = {
+ REG_RULE_EXT(2402, 2472, 40, 0, 30, 0, 0),
+ REG_RULE_EXT(5170, 5250, 80, 0, 17, 0,
+ NL80211_RRF_AUTO_BW | 0),
+ REG_RULE_EXT(5250, 5330, 80, 0, 23, 0,
+ NL80211_RRF_DFS |
+ NL80211_RRF_AUTO_BW | 0),
+ REG_RULE_EXT(5735, 5835, 80, 0, 30, 0, 0),
+ },
+ .n_reg_rules = 4
+};
+
+static const struct ieee80211_regdomain regdom_DZ = {
+ .alpha2 = "DZ",
+ .dfs_region = NL80211_DFS_JP,
+ .reg_rules = {
+ REG_RULE_EXT(2402, 2482, 40, 0, 20, 0, 0),
+ REG_RULE_EXT(5170, 5250, 80, 0, 23, 0,
+ NL80211_RRF_AUTO_BW | 0),
+ REG_RULE_EXT(5250, 5330, 80, 0, 23, 0,
+ NL80211_RRF_DFS |
+ NL80211_RRF_AUTO_BW | 0),
+ REG_RULE_EXT(5490, 5670, 160, 0, 23, 0,
+ NL80211_RRF_DFS | 0),
+ },
+ .n_reg_rules = 4
+};
+
+static const struct ieee80211_regdomain regdom_EC = {
+ .alpha2 = "EC",
+ .dfs_region = NL80211_DFS_FCC,
+ .reg_rules = {
+ REG_RULE_EXT(2402, 2482, 40, 0, 20, 0, 0),
+ REG_RULE_EXT(5170, 5250, 80, 0, 17, 0, 0),
+ REG_RULE_EXT(5250, 5330, 80, 0, 24, 0,
+ NL80211_RRF_DFS | 0),
+ REG_RULE_EXT(5490, 5730, 80, 0, 24, 0,
+ NL80211_RRF_DFS | 0),
+ REG_RULE_EXT(5735, 5835, 80, 0, 30, 0, 0),
+ },
+ .n_reg_rules = 5
+};
+
+static const struct ieee80211_regdomain regdom_EE = {
+ .alpha2 = "EE",
+ .dfs_region = NL80211_DFS_ETSI,
+ .reg_rules = {
+ REG_RULE_EXT(2402, 2482, 40, 0, 20, 0, 0),
+ REG_RULE_EXT(5170, 5250, 80, 0, 20, 0,
+ NL80211_RRF_AUTO_BW | 0),
+ REG_RULE_EXT(5250, 5330, 80, 0, 20, 0,
+ NL80211_RRF_DFS |
+ NL80211_RRF_AUTO_BW | 0),
+ REG_RULE_EXT(5490, 5710, 160, 0, 27, 0,
+ NL80211_RRF_DFS | 0),
+ REG_RULE_EXT(57000, 66000, 2160, 0, 40, 0, 0),
+ },
+ .n_reg_rules = 5
+};
+
+static const struct ieee80211_regdomain regdom_EG = {
+ .alpha2 = "EG",
+ .dfs_region = NL80211_DFS_ETSI,
+ .reg_rules = {
+ REG_RULE_EXT(2402, 2482, 40, 0, 20, 0, 0),
+ REG_RULE_EXT(5170, 5250, 80, 0, 20, 0, 0),
+ REG_RULE_EXT(5250, 5330, 80, 0, 20, 0,
+ NL80211_RRF_DFS | 0),
+ },
+ .n_reg_rules = 3
+};
+
+static const struct ieee80211_regdomain regdom_ES = {
+ .alpha2 = "ES",
+ .dfs_region = NL80211_DFS_ETSI,
+ .reg_rules = {
+ REG_RULE_EXT(2400, 2483, 40, 0, 20, 0, 0),
+ REG_RULE_EXT(5150, 5250, 80, 0, 23, 0,
+ NL80211_RRF_NO_OUTDOOR |
+ NL80211_RRF_AUTO_BW | 0),
+ REG_RULE_EXT(5250, 5350, 80, 0, 20, 0,
+ NL80211_RRF_NO_OUTDOOR |
+ NL80211_RRF_DFS |
+ NL80211_RRF_AUTO_BW | 0),
+ REG_RULE_EXT(5470, 5725, 160, 0, 27, 0,
+ NL80211_RRF_DFS | 0),
+ REG_RULE_EXT(57000, 66000, 2160, 0, 40, 0, 0),
+ },
+ .n_reg_rules = 5
+};
+
+static const struct ieee80211_regdomain regdom_ET = {
+ .alpha2 = "ET",
+ .dfs_region = NL80211_DFS_ETSI,
+ .reg_rules = {
+ REG_RULE_EXT(2402, 2482, 40, 0, 20, 0, 0),
+ REG_RULE_EXT(5170, 5250, 80, 0, 20, 0,
+ NL80211_RRF_AUTO_BW | 0),
+ REG_RULE_EXT(5250, 5330, 80, 0, 20, 0,
+ NL80211_RRF_DFS |
+ NL80211_RRF_AUTO_BW | 0),
+ REG_RULE_EXT(5490, 5710, 160, 0, 27, 0,
+ NL80211_RRF_DFS | 0),
+ },
+ .n_reg_rules = 4
+};
+
+static const struct ieee80211_regdomain regdom_FI = {
+ .alpha2 = "FI",
+ .dfs_region = NL80211_DFS_ETSI,
+ .reg_rules = {
+ REG_RULE_EXT(2402, 2482, 40, 0, 20, 0, 0),
+ REG_RULE_EXT(5170, 5250, 80, 0, 20, 0,
+ NL80211_RRF_AUTO_BW | 0),
+ REG_RULE_EXT(5250, 5330, 80, 0, 20, 0,
+ NL80211_RRF_DFS |
+ NL80211_RRF_AUTO_BW | 0),
+ REG_RULE_EXT(5490, 5710, 160, 0, 27, 0,
+ NL80211_RRF_DFS | 0),
+ REG_RULE_EXT(57000, 66000, 2160, 0, 40, 0, 0),
+ },
+ .n_reg_rules = 5
+};
+
+static const struct ieee80211_regdomain regdom_FM = {
+ .alpha2 = "FM",
+ .dfs_region = NL80211_DFS_FCC,
+ .reg_rules = {
+ REG_RULE_EXT(2402, 2472, 40, 0, 30, 0, 0),
+ REG_RULE_EXT(5170, 5250, 80, 0, 24, 0,
+ NL80211_RRF_AUTO_BW | 0),
+ REG_RULE_EXT(5250, 5330, 80, 0, 24, 0,
+ NL80211_RRF_DFS |
+ NL80211_RRF_AUTO_BW | 0),
+ REG_RULE_EXT(5490, 5730, 160, 0, 24, 0,
+ NL80211_RRF_DFS | 0),
+ REG_RULE_EXT(5735, 5835, 80, 0, 30, 0, 0),
+ },
+ .n_reg_rules = 5
+};
+
+static const struct ieee80211_regdomain regdom_FR = {
+ .alpha2 = "FR",
+ .dfs_region = NL80211_DFS_ETSI,
+ .reg_rules = {
+ REG_RULE_EXT(2402, 2482, 40, 0, 20, 0, 0),
+ REG_RULE_EXT(5170, 5250, 80, 0, 20, 0,
+ NL80211_RRF_AUTO_BW | 0),
+ REG_RULE_EXT(5250, 5330, 80, 0, 20, 0,
+ NL80211_RRF_DFS |
+ NL80211_RRF_AUTO_BW | 0),
+ REG_RULE_EXT(5490, 5695, 160, 0, 27, 0,
+ NL80211_RRF_DFS | 0),
+ REG_RULE_EXT(57000, 66000, 2160, 0, 40, 0, 0),
+ },
+ .n_reg_rules = 5
+};
+
+static const struct ieee80211_regdomain regdom_GB = {
+ .alpha2 = "GB",
+ .dfs_region = NL80211_DFS_ETSI,
+ .reg_rules = {
+ REG_RULE_EXT(2402, 2482, 40, 0, 20, 0, 0),
+ REG_RULE_EXT(5170, 5250, 80, 0, 20, 0,
+ NL80211_RRF_AUTO_BW | 0),
+ REG_RULE_EXT(5250, 5330, 80, 0, 20, 0,
+ NL80211_RRF_DFS |
+ NL80211_RRF_AUTO_BW | 0),
+ REG_RULE_EXT(5490, 5710, 160, 0, 27, 0,
+ NL80211_RRF_DFS | 0),
+ REG_RULE_EXT(57000, 66000, 2160, 0, 40, 0, 0),
+ },
+ .n_reg_rules = 5
+};
+
+static const struct ieee80211_regdomain regdom_GD = {
+ .alpha2 = "GD",
+ .dfs_region = NL80211_DFS_FCC,
+ .reg_rules = {
+ REG_RULE_EXT(2402, 2472, 40, 0, 30, 0, 0),
+ REG_RULE_EXT(5170, 5250, 80, 0, 17, 0,
+ NL80211_RRF_AUTO_BW | 0),
+ REG_RULE_EXT(5250, 5330, 80, 0, 24, 0,
+ NL80211_RRF_DFS |
+ NL80211_RRF_AUTO_BW | 0),
+ REG_RULE_EXT(5490, 5730, 160, 0, 24, 0,
+ NL80211_RRF_DFS | 0),
+ REG_RULE_EXT(5735, 5835, 80, 0, 30, 0, 0),
+ },
+ .n_reg_rules = 5
+};
+
+static const struct ieee80211_regdomain regdom_GE = {
+ .alpha2 = "GE",
+ .dfs_region = NL80211_DFS_ETSI,
+ .reg_rules = {
+ REG_RULE_EXT(2402, 2482, 40, 0, 20, 0, 0),
+ REG_RULE_EXT(5170, 5250, 80, 0, 18, 0,
+ NL80211_RRF_AUTO_BW | 0),
+ REG_RULE_EXT(5250, 5330, 80, 0, 18, 0,
+ NL80211_RRF_DFS |
+ NL80211_RRF_AUTO_BW | 0),
+ REG_RULE_EXT(57000, 66000, 2160, 0, 40, 0, 0),
+ },
+ .n_reg_rules = 4
+};
+
+static const struct ieee80211_regdomain regdom_GF = {
+ .alpha2 = "GF",
+ .dfs_region = NL80211_DFS_ETSI,
+ .reg_rules = {
+ REG_RULE_EXT(2402, 2482, 40, 0, 20, 0, 0),
+ REG_RULE_EXT(5170, 5250, 80, 0, 20, 0,
+ NL80211_RRF_AUTO_BW | 0),
+ REG_RULE_EXT(5250, 5330, 80, 0, 20, 0,
+ NL80211_RRF_DFS |
+ NL80211_RRF_AUTO_BW | 0),
+ REG_RULE_EXT(5490, 5710, 160, 0, 27, 0,
+ NL80211_RRF_DFS | 0),
+ },
+ .n_reg_rules = 4
+};
+
+static const struct ieee80211_regdomain regdom_GH = {
+ .alpha2 = "GH",
+ .dfs_region = NL80211_DFS_FCC,
+ .reg_rules = {
+ REG_RULE_EXT(2402, 2482, 40, 0, 20, 0, 0),
+ REG_RULE_EXT(5170, 5250, 80, 0, 17, 0,
+ NL80211_RRF_AUTO_BW | 0),
+ REG_RULE_EXT(5250, 5330, 80, 0, 24, 0,
+ NL80211_RRF_DFS |
+ NL80211_RRF_AUTO_BW | 0),
+ REG_RULE_EXT(5490, 5730, 160, 0, 24, 0,
+ NL80211_RRF_DFS | 0),
+ REG_RULE_EXT(5735, 5835, 80, 0, 30, 0, 0),
+ },
+ .n_reg_rules = 5
+};
+
+static const struct ieee80211_regdomain regdom_GL = {
+ .alpha2 = "GL",
+ .dfs_region = NL80211_DFS_ETSI,
+ .reg_rules = {
+ REG_RULE_EXT(2402, 2482, 40, 0, 20, 0, 0),
+ REG_RULE_EXT(5170, 5250, 80, 0, 20, 0, 0),
+ REG_RULE_EXT(5250, 5330, 80, 0, 20, 0,
+ NL80211_RRF_DFS | 0),
+ REG_RULE_EXT(5490, 5710, 80, 0, 27, 0,
+ NL80211_RRF_DFS | 0),
+ },
+ .n_reg_rules = 4
+};
+
+static const struct ieee80211_regdomain regdom_GP = {
+ .alpha2 = "GP",
+ .dfs_region = NL80211_DFS_ETSI,
+ .reg_rules = {
+ REG_RULE_EXT(2402, 2482, 40, 0, 20, 0, 0),
+ REG_RULE_EXT(5170, 5250, 80, 0, 20, 0,
+ NL80211_RRF_AUTO_BW | 0),
+ REG_RULE_EXT(5250, 5330, 80, 0, 20, 0,
+ NL80211_RRF_DFS |
+ NL80211_RRF_AUTO_BW | 0),
+ REG_RULE_EXT(5490, 5710, 160, 0, 27, 0,
+ NL80211_RRF_DFS | 0),
+ },
+ .n_reg_rules = 4
+};
+
+static const struct ieee80211_regdomain regdom_GR = {
+ .alpha2 = "GR",
+ .dfs_region = NL80211_DFS_ETSI,
+ .reg_rules = {
+ REG_RULE_EXT(2402, 2482, 40, 0, 20, 0, 0),
+ REG_RULE_EXT(5170, 5250, 80, 0, 20, 0,
+ NL80211_RRF_AUTO_BW | 0),
+ REG_RULE_EXT(5250, 5330, 80, 0, 20, 0,
+ NL80211_RRF_DFS |
+ NL80211_RRF_AUTO_BW | 0),
+ REG_RULE_EXT(5490, 5710, 160, 0, 27, 0,
+ NL80211_RRF_DFS | 0),
+ REG_RULE_EXT(57000, 66000, 2160, 0, 40, 0, 0),
+ },
+ .n_reg_rules = 5
+};
+
+static const struct ieee80211_regdomain regdom_GT = {
+ .alpha2 = "GT",
+ .dfs_region = NL80211_DFS_FCC,
+ .reg_rules = {
+ REG_RULE_EXT(2402, 2472, 40, 0, 30, 0, 0),
+ REG_RULE_EXT(5170, 5250, 80, 0, 17, 0,
+ NL80211_RRF_AUTO_BW | 0),
+ REG_RULE_EXT(5250, 5330, 80, 0, 23, 0,
+ NL80211_RRF_DFS |
+ NL80211_RRF_AUTO_BW | 0),
+ REG_RULE_EXT(5735, 5835, 80, 0, 30, 0, 0),
+ },
+ .n_reg_rules = 4
+};
+
+static const struct ieee80211_regdomain regdom_GU = {
+ .alpha2 = "GU",
+ .dfs_region = NL80211_DFS_FCC,
+ .reg_rules = {
+ REG_RULE_EXT(2402, 2472, 40, 0, 30, 0, 0),
+ REG_RULE_EXT(5170, 5250, 80, 0, 17, 0, 0),
+ REG_RULE_EXT(5250, 5330, 80, 0, 24, 0,
+ NL80211_RRF_DFS | 0),
+ REG_RULE_EXT(5490, 5730, 80, 0, 24, 0,
+ NL80211_RRF_DFS | 0),
+ REG_RULE_EXT(5735, 5835, 80, 0, 30, 0, 0),
+ },
+ .n_reg_rules = 5
+};
+
+static const struct ieee80211_regdomain regdom_GY = {
+ .alpha2 = "GY",
+ .reg_rules = {
+ REG_RULE_EXT(2402, 2482, 40, 0, 30, 0, 0),
+ REG_RULE_EXT(5735, 5835, 80, 0, 30, 0, 0),
+ },
+ .n_reg_rules = 2
+};
+
+static const struct ieee80211_regdomain regdom_HK = {
+ .alpha2 = "HK",
+ .reg_rules = {
+ REG_RULE_EXT(2402, 2482, 40, 0, 20, 0, 0),
+ REG_RULE_EXT(5170, 5250, 80, 0, 17, 0,
+ NL80211_RRF_AUTO_BW | 0),
+ REG_RULE_EXT(5250, 5330, 80, 0, 24, 0,
+ NL80211_RRF_DFS |
+ NL80211_RRF_AUTO_BW | 0),
+ REG_RULE_EXT(5490, 5710, 160, 0, 24, 0,
+ NL80211_RRF_DFS | 0),
+ REG_RULE_EXT(5735, 5835, 80, 0, 30, 0, 0),
+ },
+ .n_reg_rules = 5
+};
+
+static const struct ieee80211_regdomain regdom_HN = {
+ .alpha2 = "HN",
+ .dfs_region = NL80211_DFS_FCC,
+ .reg_rules = {
+ REG_RULE_EXT(2402, 2482, 40, 0, 20, 0, 0),
+ REG_RULE_EXT(5170, 5250, 80, 0, 17, 0,
+ NL80211_RRF_AUTO_BW | 0),
+ REG_RULE_EXT(5250, 5330, 80, 0, 24, 0,
+ NL80211_RRF_DFS |
+ NL80211_RRF_AUTO_BW | 0),
+ REG_RULE_EXT(5490, 5730, 160, 0, 24, 0,
+ NL80211_RRF_DFS | 0),
+ REG_RULE_EXT(5735, 5835, 80, 0, 30, 0, 0),
+ },
+ .n_reg_rules = 5
+};
+
+static const struct ieee80211_regdomain regdom_HR = {
+ .alpha2 = "HR",
+ .dfs_region = NL80211_DFS_ETSI,
+ .reg_rules = {
+ REG_RULE_EXT(2402, 2482, 40, 0, 20, 0, 0),
+ REG_RULE_EXT(5170, 5250, 80, 0, 20, 0,
+ NL80211_RRF_AUTO_BW | 0),
+ REG_RULE_EXT(5250, 5330, 80, 0, 20, 0,
+ NL80211_RRF_DFS |
+ NL80211_RRF_AUTO_BW | 0),
+ REG_RULE_EXT(5490, 5710, 160, 0, 27, 0,
+ NL80211_RRF_DFS | 0),
+ REG_RULE_EXT(57000, 66000, 2160, 0, 40, 0, 0),
+ },
+ .n_reg_rules = 5
+};
+
+static const struct ieee80211_regdomain regdom_HT = {
+ .alpha2 = "HT",
+ .dfs_region = NL80211_DFS_FCC,
+ .reg_rules = {
+ REG_RULE_EXT(2402, 2472, 40, 0, 30, 0, 0),
+ REG_RULE_EXT(5170, 5250, 80, 0, 24, 0,
+ NL80211_RRF_AUTO_BW | 0),
+ REG_RULE_EXT(5250, 5330, 80, 0, 24, 0,
+ NL80211_RRF_DFS |
+ NL80211_RRF_AUTO_BW | 0),
+ REG_RULE_EXT(5490, 5730, 160, 0, 24, 0,
+ NL80211_RRF_DFS | 0),
+ REG_RULE_EXT(5735, 5835, 80, 0, 30, 0, 0),
+ },
+ .n_reg_rules = 5
+};
+
+static const struct ieee80211_regdomain regdom_HU = {
+ .alpha2 = "HU",
+ .dfs_region = NL80211_DFS_ETSI,
+ .reg_rules = {
+ REG_RULE_EXT(2402, 2482, 40, 0, 20, 0, 0),
+ REG_RULE_EXT(5170, 5250, 80, 0, 20, 0,
+ NL80211_RRF_AUTO_BW | 0),
+ REG_RULE_EXT(5250, 5330, 80, 0, 20, 0,
+ NL80211_RRF_DFS |
+ NL80211_RRF_AUTO_BW | 0),
+ REG_RULE_EXT(5490, 5710, 160, 0, 27, 0,
+ NL80211_RRF_DFS | 0),
+ REG_RULE_EXT(57000, 66000, 2160, 0, 40, 0, 0),
+ },
+ .n_reg_rules = 5
+};
+
+static const struct ieee80211_regdomain regdom_ID = {
+ .alpha2 = "ID",
+ .dfs_region = NL80211_DFS_JP,
+ .reg_rules = {
+ REG_RULE_EXT(2402, 2482, 40, 0, 20, 0, 0),
+ REG_RULE_EXT(5735, 5815, 80, 0, 23, 0, 0),
+ },
+ .n_reg_rules = 2
+};
+
+static const struct ieee80211_regdomain regdom_IE = {
+ .alpha2 = "IE",
+ .dfs_region = NL80211_DFS_ETSI,
+ .reg_rules = {
+ REG_RULE_EXT(2402, 2482, 40, 0, 20, 0, 0),
+ REG_RULE_EXT(5170, 5250, 80, 0, 20, 0,
+ NL80211_RRF_AUTO_BW | 0),
+ REG_RULE_EXT(5250, 5330, 80, 0, 20, 0,
+ NL80211_RRF_DFS |
+ NL80211_RRF_AUTO_BW | 0),
+ REG_RULE_EXT(5490, 5710, 160, 0, 27, 0,
+ NL80211_RRF_DFS | 0),
+ REG_RULE_EXT(57000, 66000, 2160, 0, 40, 0, 0),
+ },
+ .n_reg_rules = 5
+};
+
+static const struct ieee80211_regdomain regdom_IL = {
+ .alpha2 = "IL",
+ .dfs_region = NL80211_DFS_ETSI,
+ .reg_rules = {
+ REG_RULE_EXT(2402, 2482, 40, 0, 20, 0, 0),
+ REG_RULE_EXT(5150, 5250, 80, 0, 23, 0,
+ NL80211_RRF_NO_OUTDOOR |
+ NL80211_RRF_AUTO_BW | 0),
+ REG_RULE_EXT(5250, 5350, 80, 0, 23, 0,
+ NL80211_RRF_NO_OUTDOOR |
+ NL80211_RRF_DFS |
+ NL80211_RRF_AUTO_BW | 0),
+ },
+ .n_reg_rules = 3
+};
+
+static const struct ieee80211_regdomain regdom_IN = {
+ .alpha2 = "IN",
+ .dfs_region = NL80211_DFS_JP,
+ .reg_rules = {
+ REG_RULE_EXT(2402, 2482, 40, 0, 20, 0, 0),
+ REG_RULE_EXT(5170, 5250, 80, 0, 20, 0,
+ NL80211_RRF_AUTO_BW | 0),
+ REG_RULE_EXT(5250, 5330, 80, 0, 20, 0,
+ NL80211_RRF_DFS |
+ NL80211_RRF_AUTO_BW | 0),
+ REG_RULE_EXT(5735, 5835, 80, 0, 20, 0, 0),
+ },
+ .n_reg_rules = 4
+};
+
+static const struct ieee80211_regdomain regdom_IR = {
+ .alpha2 = "IR",
+ .dfs_region = NL80211_DFS_JP,
+ .reg_rules = {
+ REG_RULE_EXT(2402, 2482, 40, 0, 20, 0, 0),
+ REG_RULE_EXT(5735, 5835, 80, 0, 30, 0, 0),
+ },
+ .n_reg_rules = 2
+};
+
+static const struct ieee80211_regdomain regdom_IS = {
+ .alpha2 = "IS",
+ .dfs_region = NL80211_DFS_ETSI,
+ .reg_rules = {
+ REG_RULE_EXT(2402, 2482, 40, 0, 20, 0, 0),
+ REG_RULE_EXT(5170, 5250, 80, 0, 20, 0,
+ NL80211_RRF_AUTO_BW | 0),
+ REG_RULE_EXT(5250, 5330, 80, 0, 20, 0,
+ NL80211_RRF_DFS |
+ NL80211_RRF_AUTO_BW | 0),
+ REG_RULE_EXT(5490, 5710, 160, 0, 27, 0,
+ NL80211_RRF_DFS | 0),
+ REG_RULE_EXT(57000, 66000, 2160, 0, 40, 0, 0),
+ },
+ .n_reg_rules = 5
+};
+
+static const struct ieee80211_regdomain regdom_IT = {
+ .alpha2 = "IT",
+ .dfs_region = NL80211_DFS_ETSI,
+ .reg_rules = {
+ REG_RULE_EXT(2402, 2482, 40, 0, 20, 0, 0),
+ REG_RULE_EXT(5170, 5250, 80, 0, 20, 0,
+ NL80211_RRF_AUTO_BW | 0),
+ REG_RULE_EXT(5250, 5330, 80, 0, 20, 0,
+ NL80211_RRF_DFS |
+ NL80211_RRF_AUTO_BW | 0),
+ REG_RULE_EXT(5490, 5710, 160, 0, 27, 0,
+ NL80211_RRF_DFS | 0),
+ REG_RULE_EXT(57000, 66000, 2160, 0, 40, 0, 0),
+ },
+ .n_reg_rules = 5
+};
+
+static const struct ieee80211_regdomain regdom_JM = {
+ .alpha2 = "JM",
+ .dfs_region = NL80211_DFS_FCC,
+ .reg_rules = {
+ REG_RULE_EXT(2402, 2482, 40, 0, 20, 0, 0),
+ REG_RULE_EXT(5170, 5250, 80, 0, 17, 0,
+ NL80211_RRF_AUTO_BW | 0),
+ REG_RULE_EXT(5250, 5330, 80, 0, 24, 0,
+ NL80211_RRF_DFS |
+ NL80211_RRF_AUTO_BW | 0),
+ REG_RULE_EXT(5490, 5730, 160, 0, 24, 0,
+ NL80211_RRF_DFS | 0),
+ REG_RULE_EXT(5735, 5835, 80, 0, 30, 0, 0),
+ },
+ .n_reg_rules = 5
+};
+
+static const struct ieee80211_regdomain regdom_JO = {
+ .alpha2 = "JO",
+ .dfs_region = NL80211_DFS_JP,
+ .reg_rules = {
+ REG_RULE_EXT(2402, 2482, 40, 0, 20, 0, 0),
+ REG_RULE_EXT(5170, 5250, 80, 0, 23, 0, 0),
+ REG_RULE_EXT(5735, 5835, 80, 0, 23, 0, 0),
+ },
+ .n_reg_rules = 3
+};
+
+static const struct ieee80211_regdomain regdom_JP = {
+ .alpha2 = "JP",
+ .dfs_region = NL80211_DFS_JP,
+ .reg_rules = {
+ REG_RULE_EXT(2402, 2482, 40, 0, 20, 0, 0),
+ REG_RULE_EXT(2474, 2494, 20, 0, 20, 0,
+ NL80211_RRF_NO_OFDM | 0),
+ REG_RULE_EXT(4910, 4990, 40, 0, 23, 0, 0),
+ REG_RULE_EXT(5030, 5090, 40, 0, 23, 0, 0),
+ REG_RULE_EXT(5170, 5250, 80, 0, 20, 0,
+ NL80211_RRF_AUTO_BW | 0),
+ REG_RULE_EXT(5250, 5330, 80, 0, 20, 0,
+ NL80211_RRF_DFS |
+ NL80211_RRF_AUTO_BW | 0),
+ REG_RULE_EXT(5490, 5710, 160, 0, 23, 0,
+ NL80211_RRF_DFS | 0),
+ },
+ .n_reg_rules = 7
+};
+
+static const struct ieee80211_regdomain regdom_KE = {
+ .alpha2 = "KE",
+ .dfs_region = NL80211_DFS_JP,
+ .reg_rules = {
+ REG_RULE_EXT(2402, 2482, 40, 0, 20, 0, 0),
+ REG_RULE_EXT(5170, 5250, 80, 0, 23, 0, 0),
+ REG_RULE_EXT(5490, 5570, 80, 0, 30, 0,
+ NL80211_RRF_DFS | 0),
+ REG_RULE_EXT(5735, 5775, 40, 0, 23, 0, 0),
+ },
+ .n_reg_rules = 4
+};
+
+static const struct ieee80211_regdomain regdom_KH = {
+ .alpha2 = "KH",
+ .dfs_region = NL80211_DFS_ETSI,
+ .reg_rules = {
+ REG_RULE_EXT(2402, 2482, 40, 0, 20, 0, 0),
+ REG_RULE_EXT(5170, 5250, 80, 0, 20, 0,
+ NL80211_RRF_AUTO_BW | 0),
+ REG_RULE_EXT(5250, 5330, 80, 0, 20, 0,
+ NL80211_RRF_DFS |
+ NL80211_RRF_AUTO_BW | 0),
+ REG_RULE_EXT(5490, 5710, 160, 0, 27, 0,
+ NL80211_RRF_DFS | 0),
+ },
+ .n_reg_rules = 4
+};
+
+static const struct ieee80211_regdomain regdom_KN = {
+ .alpha2 = "KN",
+ .dfs_region = NL80211_DFS_ETSI,
+ .reg_rules = {
+ REG_RULE_EXT(2402, 2482, 40, 0, 20, 0, 0),
+ REG_RULE_EXT(5170, 5250, 80, 0, 20, 0,
+ NL80211_RRF_AUTO_BW | 0),
+ REG_RULE_EXT(5250, 5330, 80, 0, 20, 0,
+ NL80211_RRF_DFS |
+ NL80211_RRF_AUTO_BW | 0),
+ REG_RULE_EXT(5490, 5710, 160, 0, 30, 0,
+ NL80211_RRF_DFS | 0),
+ REG_RULE_EXT(5735, 5815, 80, 0, 30, 0, 0),
+ },
+ .n_reg_rules = 5
+};
+
+static const struct ieee80211_regdomain regdom_KP = {
+ .alpha2 = "KP",
+ .dfs_region = NL80211_DFS_JP,
+ .reg_rules = {
+ REG_RULE_EXT(2402, 2482, 40, 0, 20, 0, 0),
+ REG_RULE_EXT(5170, 5250, 80, 0, 20, 0,
+ NL80211_RRF_AUTO_BW | 0),
+ REG_RULE_EXT(5250, 5330, 80, 0, 20, 0,
+ NL80211_RRF_DFS |
+ NL80211_RRF_AUTO_BW | 0),
+ REG_RULE_EXT(5490, 5630, 80, 0, 30, 0,
+ NL80211_RRF_DFS | 0),
+ REG_RULE_EXT(5735, 5815, 80, 0, 30, 0, 0),
+ },
+ .n_reg_rules = 5
+};
+
+static const struct ieee80211_regdomain regdom_KR = {
+ .alpha2 = "KR",
+ .dfs_region = NL80211_DFS_JP,
+ .reg_rules = {
+ REG_RULE_EXT(2402, 2482, 40, 0, 20, 0, 0),
+ REG_RULE_EXT(5170, 5250, 80, 0, 20, 0,
+ NL80211_RRF_AUTO_BW | 0),
+ REG_RULE_EXT(5250, 5330, 80, 0, 20, 0,
+ NL80211_RRF_DFS |
+ NL80211_RRF_AUTO_BW | 0),
+ REG_RULE_EXT(5490, 5710, 160, 0, 30, 0,
+ NL80211_RRF_DFS | 0),
+ REG_RULE_EXT(5735, 5835, 80, 0, 30, 0, 0),
+ },
+ .n_reg_rules = 5
+};
+
+static const struct ieee80211_regdomain regdom_KW = {
+ .alpha2 = "KW",
+ .dfs_region = NL80211_DFS_ETSI,
+ .reg_rules = {
+ REG_RULE_EXT(2402, 2482, 40, 0, 20, 0, 0),
+ REG_RULE_EXT(5170, 5250, 80, 0, 20, 0,
+ NL80211_RRF_AUTO_BW | 0),
+ REG_RULE_EXT(5250, 5330, 80, 0, 20, 0,
+ NL80211_RRF_DFS |
+ NL80211_RRF_AUTO_BW | 0),
+ },
+ .n_reg_rules = 3
+};
+
+static const struct ieee80211_regdomain regdom_KY = {
+ .alpha2 = "KY",
+ .dfs_region = NL80211_DFS_FCC,
+ .reg_rules = {
+ REG_RULE_EXT(2402, 2482, 40, 0, 20, 0, 0),
+ REG_RULE_EXT(5170, 5250, 80, 0, 24, 0,
+ NL80211_RRF_AUTO_BW | 0),
+ REG_RULE_EXT(5250, 5330, 80, 0, 24, 0,
+ NL80211_RRF_DFS |
+ NL80211_RRF_AUTO_BW | 0),
+ REG_RULE_EXT(5490, 5730, 160, 0, 24, 0,
+ NL80211_RRF_DFS | 0),
+ REG_RULE_EXT(5735, 5835, 80, 0, 30, 0, 0),
+ },
+ .n_reg_rules = 5
+};
+
+static const struct ieee80211_regdomain regdom_KZ = {
+ .alpha2 = "KZ",
+ .reg_rules = {
+ REG_RULE_EXT(2402, 2482, 40, 0, 20, 0, 0),
+ },
+ .n_reg_rules = 1
+};
+
+static const struct ieee80211_regdomain regdom_LB = {
+ .alpha2 = "LB",
+ .dfs_region = NL80211_DFS_FCC,
+ .reg_rules = {
+ REG_RULE_EXT(2402, 2482, 40, 0, 20, 0, 0),
+ REG_RULE_EXT(5170, 5250, 80, 0, 17, 0,
+ NL80211_RRF_AUTO_BW | 0),
+ REG_RULE_EXT(5250, 5330, 80, 0, 24, 0,
+ NL80211_RRF_DFS |
+ NL80211_RRF_AUTO_BW | 0),
+ REG_RULE_EXT(5490, 5730, 160, 0, 24, 0,
+ NL80211_RRF_DFS | 0),
+ REG_RULE_EXT(5735, 5835, 80, 0, 30, 0, 0),
+ },
+ .n_reg_rules = 5
+};
+
+static const struct ieee80211_regdomain regdom_LC = {
+ .alpha2 = "LC",
+ .dfs_region = NL80211_DFS_ETSI,
+ .reg_rules = {
+ REG_RULE_EXT(2402, 2482, 40, 0, 20, 0, 0),
+ REG_RULE_EXT(5170, 5250, 80, 0, 20, 0,
+ NL80211_RRF_AUTO_BW | 0),
+ REG_RULE_EXT(5250, 5330, 80, 0, 20, 0,
+ NL80211_RRF_DFS |
+ NL80211_RRF_AUTO_BW | 0),
+ REG_RULE_EXT(5490, 5710, 160, 0, 30, 0,
+ NL80211_RRF_DFS | 0),
+ REG_RULE_EXT(5735, 5815, 80, 0, 30, 0, 0),
+ },
+ .n_reg_rules = 5
+};
+
+static const struct ieee80211_regdomain regdom_LI = {
+ .alpha2 = "LI",
+ .dfs_region = NL80211_DFS_ETSI,
+ .reg_rules = {
+ REG_RULE_EXT(2402, 2482, 40, 0, 20, 0, 0),
+ REG_RULE_EXT(5170, 5250, 80, 0, 20, 0,
+ NL80211_RRF_AUTO_BW | 0),
+ REG_RULE_EXT(5250, 5330, 80, 0, 20, 0,
+ NL80211_RRF_DFS |
+ NL80211_RRF_AUTO_BW | 0),
+ REG_RULE_EXT(5490, 5710, 160, 0, 27, 0,
+ NL80211_RRF_DFS | 0),
+ },
+ .n_reg_rules = 4
+};
+
+static const struct ieee80211_regdomain regdom_LK = {
+ .alpha2 = "LK",
+ .dfs_region = NL80211_DFS_FCC,
+ .reg_rules = {
+ REG_RULE_EXT(2402, 2482, 40, 0, 20, 0, 0),
+ REG_RULE_EXT(5170, 5250, 80, 0, 17, 0, 0),
+ REG_RULE_EXT(5250, 5330, 80, 0, 24, 0,
+ NL80211_RRF_DFS | 0),
+ REG_RULE_EXT(5490, 5730, 80, 0, 24, 0,
+ NL80211_RRF_DFS | 0),
+ REG_RULE_EXT(5735, 5835, 80, 0, 30, 0, 0),
+ },
+ .n_reg_rules = 5
+};
+
+static const struct ieee80211_regdomain regdom_LS = {
+ .alpha2 = "LS",
+ .dfs_region = NL80211_DFS_ETSI,
+ .reg_rules = {
+ REG_RULE_EXT(2402, 2482, 40, 0, 20, 0, 0),
+ REG_RULE_EXT(5170, 5250, 80, 0, 20, 0,
+ NL80211_RRF_AUTO_BW | 0),
+ REG_RULE_EXT(5250, 5330, 80, 0, 20, 0,
+ NL80211_RRF_DFS |
+ NL80211_RRF_AUTO_BW | 0),
+ REG_RULE_EXT(5490, 5710, 160, 0, 27, 0,
+ NL80211_RRF_DFS | 0),
+ },
+ .n_reg_rules = 4
+};
+
+static const struct ieee80211_regdomain regdom_LT = {
+ .alpha2 = "LT",
+ .dfs_region = NL80211_DFS_ETSI,
+ .reg_rules = {
+ REG_RULE_EXT(2402, 2482, 40, 0, 20, 0, 0),
+ REG_RULE_EXT(5170, 5250, 80, 0, 20, 0,
+ NL80211_RRF_AUTO_BW | 0),
+ REG_RULE_EXT(5250, 5330, 80, 0, 20, 0,
+ NL80211_RRF_DFS |
+ NL80211_RRF_AUTO_BW | 0),
+ REG_RULE_EXT(5490, 5710, 160, 0, 27, 0,
+ NL80211_RRF_DFS | 0),
+ REG_RULE_EXT(57000, 66000, 2160, 0, 40, 0, 0),
+ },
+ .n_reg_rules = 5
+};
+
+static const struct ieee80211_regdomain regdom_LU = {
+ .alpha2 = "LU",
+ .dfs_region = NL80211_DFS_ETSI,
+ .reg_rules = {
+ REG_RULE_EXT(2402, 2482, 40, 0, 20, 0, 0),
+ REG_RULE_EXT(5170, 5250, 80, 0, 20, 0,
+ NL80211_RRF_AUTO_BW | 0),
+ REG_RULE_EXT(5250, 5330, 80, 0, 20, 0,
+ NL80211_RRF_DFS |
+ NL80211_RRF_AUTO_BW | 0),
+ REG_RULE_EXT(5490, 5710, 160, 0, 27, 0,
+ NL80211_RRF_DFS | 0),
+ REG_RULE_EXT(57000, 66000, 2160, 0, 40, 0, 0),
+ },
+ .n_reg_rules = 5
+};
+
+static const struct ieee80211_regdomain regdom_LV = {
+ .alpha2 = "LV",
+ .dfs_region = NL80211_DFS_ETSI,
+ .reg_rules = {
+ REG_RULE_EXT(2402, 2482, 40, 0, 20, 0, 0),
+ REG_RULE_EXT(5170, 5250, 80, 0, 20, 0,
+ NL80211_RRF_AUTO_BW | 0),
+ REG_RULE_EXT(5250, 5330, 80, 0, 20, 0,
+ NL80211_RRF_DFS |
+ NL80211_RRF_AUTO_BW | 0),
+ REG_RULE_EXT(5490, 5710, 160, 0, 27, 0,
+ NL80211_RRF_DFS | 0),
+ REG_RULE_EXT(57000, 66000, 2160, 0, 40, 0, 0),
+ },
+ .n_reg_rules = 5
+};
+
+static const struct ieee80211_regdomain regdom_MA = {
+ .alpha2 = "MA",
+ .dfs_region = NL80211_DFS_ETSI,
+ .reg_rules = {
+ REG_RULE_EXT(2402, 2482, 40, 0, 20, 0, 0),
+ REG_RULE_EXT(5170, 5250, 80, 0, 20, 0,
+ NL80211_RRF_AUTO_BW | 0),
+ REG_RULE_EXT(5250, 5330, 80, 0, 20, 0,
+ NL80211_RRF_DFS |
+ NL80211_RRF_AUTO_BW | 0),
+ },
+ .n_reg_rules = 3
+};
+
+static const struct ieee80211_regdomain regdom_MC = {
+ .alpha2 = "MC",
+ .dfs_region = NL80211_DFS_ETSI,
+ .reg_rules = {
+ REG_RULE_EXT(2402, 2482, 40, 0, 20, 0, 0),
+ REG_RULE_EXT(5170, 5250, 80, 0, 20, 0,
+ NL80211_RRF_AUTO_BW | 0),
+ REG_RULE_EXT(5250, 5330, 80, 0, 20, 0,
+ NL80211_RRF_DFS |
+ NL80211_RRF_AUTO_BW | 0),
+ REG_RULE_EXT(5490, 5710, 160, 0, 27, 0,
+ NL80211_RRF_DFS | 0),
+ },
+ .n_reg_rules = 4
+};
+
+static const struct ieee80211_regdomain regdom_MD = {
+ .alpha2 = "MD",
+ .dfs_region = NL80211_DFS_ETSI,
+ .reg_rules = {
+ REG_RULE_EXT(2402, 2482, 40, 0, 20, 0, 0),
+ REG_RULE_EXT(5170, 5250, 80, 0, 20, 0,
+ NL80211_RRF_AUTO_BW | 0),
+ REG_RULE_EXT(5250, 5330, 80, 0, 20, 0,
+ NL80211_RRF_DFS |
+ NL80211_RRF_AUTO_BW | 0),
+ REG_RULE_EXT(5490, 5710, 160, 0, 27, 0,
+ NL80211_RRF_DFS | 0),
+ },
+ .n_reg_rules = 4
+};
+
+static const struct ieee80211_regdomain regdom_ME = {
+ .alpha2 = "ME",
+ .dfs_region = NL80211_DFS_ETSI,
+ .reg_rules = {
+ REG_RULE_EXT(2402, 2482, 40, 0, 20, 0, 0),
+ REG_RULE_EXT(5170, 5250, 80, 0, 20, 0,
+ NL80211_RRF_AUTO_BW | 0),
+ REG_RULE_EXT(5250, 5330, 80, 0, 20, 0,
+ NL80211_RRF_DFS |
+ NL80211_RRF_AUTO_BW | 0),
+ REG_RULE_EXT(5490, 5710, 160, 0, 27, 0,
+ NL80211_RRF_DFS | 0),
+ },
+ .n_reg_rules = 4
+};
+
+static const struct ieee80211_regdomain regdom_MF = {
+ .alpha2 = "MF",
+ .dfs_region = NL80211_DFS_ETSI,
+ .reg_rules = {
+ REG_RULE_EXT(2402, 2482, 40, 0, 20, 0, 0),
+ REG_RULE_EXT(5170, 5250, 80, 0, 20, 0,
+ NL80211_RRF_AUTO_BW | 0),
+ REG_RULE_EXT(5250, 5330, 80, 0, 20, 0,
+ NL80211_RRF_DFS |
+ NL80211_RRF_AUTO_BW | 0),
+ REG_RULE_EXT(5490, 5710, 160, 0, 27, 0,
+ NL80211_RRF_DFS | 0),
+ },
+ .n_reg_rules = 4
+};
+
+static const struct ieee80211_regdomain regdom_MH = {
+ .alpha2 = "MH",
+ .dfs_region = NL80211_DFS_FCC,
+ .reg_rules = {
+ REG_RULE_EXT(2402, 2472, 40, 0, 30, 0, 0),
+ REG_RULE_EXT(5170, 5250, 80, 0, 24, 0,
+ NL80211_RRF_AUTO_BW | 0),
+ REG_RULE_EXT(5250, 5330, 80, 0, 24, 0,
+ NL80211_RRF_DFS |
+ NL80211_RRF_AUTO_BW | 0),
+ REG_RULE_EXT(5490, 5730, 160, 0, 24, 0,
+ NL80211_RRF_DFS | 0),
+ REG_RULE_EXT(5735, 5835, 80, 0, 30, 0, 0),
+ },
+ .n_reg_rules = 5
+};
+
+static const struct ieee80211_regdomain regdom_MK = {
+ .alpha2 = "MK",
+ .dfs_region = NL80211_DFS_ETSI,
+ .reg_rules = {
+ REG_RULE_EXT(2402, 2482, 40, 0, 20, 0, 0),
+ REG_RULE_EXT(5170, 5250, 80, 0, 20, 0,
+ NL80211_RRF_AUTO_BW | 0),
+ REG_RULE_EXT(5250, 5330, 80, 0, 20, 0,
+ NL80211_RRF_DFS |
+ NL80211_RRF_AUTO_BW | 0),
+ REG_RULE_EXT(5490, 5710, 160, 0, 27, 0,
+ NL80211_RRF_DFS | 0),
+ REG_RULE_EXT(57000, 66000, 2160, 0, 40, 0, 0),
+ },
+ .n_reg_rules = 5
+};
+
+static const struct ieee80211_regdomain regdom_MN = {
+ .alpha2 = "MN",
+ .dfs_region = NL80211_DFS_FCC,
+ .reg_rules = {
+ REG_RULE_EXT(2402, 2482, 40, 0, 20, 0, 0),
+ REG_RULE_EXT(5170, 5250, 80, 0, 24, 0,
+ NL80211_RRF_AUTO_BW | 0),
+ REG_RULE_EXT(5250, 5330, 80, 0, 24, 0,
+ NL80211_RRF_DFS |
+ NL80211_RRF_AUTO_BW | 0),
+ REG_RULE_EXT(5490, 5730, 160, 0, 24, 0,
+ NL80211_RRF_DFS | 0),
+ REG_RULE_EXT(5735, 5835, 80, 0, 30, 0, 0),
+ },
+ .n_reg_rules = 5
+};
+
+static const struct ieee80211_regdomain regdom_MO = {
+ .alpha2 = "MO",
+ .reg_rules = {
+ REG_RULE_EXT(2402, 2482, 40, 0, 20, 0, 0),
+ REG_RULE_EXT(5170, 5250, 40, 0, 23, 0, 0),
+ REG_RULE_EXT(5250, 5330, 40, 0, 23, 0,
+ NL80211_RRF_DFS | 0),
+ REG_RULE_EXT(5735, 5835, 40, 0, 30, 0, 0),
+ },
+ .n_reg_rules = 4
+};
+
+static const struct ieee80211_regdomain regdom_MP = {
+ .alpha2 = "MP",
+ .dfs_region = NL80211_DFS_FCC,
+ .reg_rules = {
+ REG_RULE_EXT(2402, 2472, 40, 0, 30, 0, 0),
+ REG_RULE_EXT(5170, 5250, 80, 0, 24, 0,
+ NL80211_RRF_AUTO_BW | 0),
+ REG_RULE_EXT(5250, 5330, 80, 0, 24, 0,
+ NL80211_RRF_DFS |
+ NL80211_RRF_AUTO_BW | 0),
+ REG_RULE_EXT(5490, 5730, 160, 0, 24, 0,
+ NL80211_RRF_DFS | 0),
+ REG_RULE_EXT(5735, 5835, 80, 0, 30, 0, 0),
+ },
+ .n_reg_rules = 5
+};
+
+static const struct ieee80211_regdomain regdom_MQ = {
+ .alpha2 = "MQ",
+ .dfs_region = NL80211_DFS_ETSI,
+ .reg_rules = {
+ REG_RULE_EXT(2402, 2482, 40, 0, 20, 0, 0),
+ REG_RULE_EXT(5170, 5250, 80, 0, 20, 0,
+ NL80211_RRF_AUTO_BW | 0),
+ REG_RULE_EXT(5250, 5330, 80, 0, 20, 0,
+ NL80211_RRF_DFS |
+ NL80211_RRF_AUTO_BW | 0),
+ REG_RULE_EXT(5490, 5710, 160, 0, 27, 0,
+ NL80211_RRF_DFS | 0),
+ },
+ .n_reg_rules = 4
+};
+
+static const struct ieee80211_regdomain regdom_MR = {
+ .alpha2 = "MR",
+ .dfs_region = NL80211_DFS_ETSI,
+ .reg_rules = {
+ REG_RULE_EXT(2402, 2482, 40, 0, 20, 0, 0),
+ REG_RULE_EXT(5170, 5250, 80, 0, 20, 0,
+ NL80211_RRF_AUTO_BW | 0),
+ REG_RULE_EXT(5250, 5330, 80, 0, 20, 0,
+ NL80211_RRF_DFS |
+ NL80211_RRF_AUTO_BW | 0),
+ REG_RULE_EXT(5490, 5710, 160, 0, 27, 0,
+ NL80211_RRF_DFS | 0),
+ },
+ .n_reg_rules = 4
+};
+
+static const struct ieee80211_regdomain regdom_MT = {
+ .alpha2 = "MT",
+ .dfs_region = NL80211_DFS_ETSI,
+ .reg_rules = {
+ REG_RULE_EXT(2402, 2482, 40, 0, 20, 0, 0),
+ REG_RULE_EXT(5170, 5250, 80, 0, 20, 0,
+ NL80211_RRF_AUTO_BW | 0),
+ REG_RULE_EXT(5250, 5330, 80, 0, 20, 0,
+ NL80211_RRF_DFS |
+ NL80211_RRF_AUTO_BW | 0),
+ REG_RULE_EXT(5490, 5710, 160, 0, 27, 0,
+ NL80211_RRF_DFS | 0),
+ REG_RULE_EXT(57000, 66000, 2160, 0, 40, 0, 0),
+ },
+ .n_reg_rules = 5
+};
+
+static const struct ieee80211_regdomain regdom_MU = {
+ .alpha2 = "MU",
+ .dfs_region = NL80211_DFS_FCC,
+ .reg_rules = {
+ REG_RULE_EXT(2402, 2482, 40, 0, 20, 0, 0),
+ REG_RULE_EXT(5170, 5250, 80, 0, 24, 0,
+ NL80211_RRF_AUTO_BW | 0),
+ REG_RULE_EXT(5250, 5330, 80, 0, 24, 0,
+ NL80211_RRF_DFS |
+ NL80211_RRF_AUTO_BW | 0),
+ REG_RULE_EXT(5490, 5730, 160, 0, 24, 0,
+ NL80211_RRF_DFS | 0),
+ REG_RULE_EXT(5735, 5835, 80, 0, 30, 0, 0),
+ },
+ .n_reg_rules = 5
+};
+
+static const struct ieee80211_regdomain regdom_MW = {
+ .alpha2 = "MW",
+ .dfs_region = NL80211_DFS_ETSI,
+ .reg_rules = {
+ REG_RULE_EXT(2402, 2482, 40, 0, 20, 0, 0),
+ REG_RULE_EXT(5170, 5250, 80, 0, 20, 0,
+ NL80211_RRF_AUTO_BW | 0),
+ REG_RULE_EXT(5250, 5330, 80, 0, 20, 0,
+ NL80211_RRF_DFS |
+ NL80211_RRF_AUTO_BW | 0),
+ REG_RULE_EXT(5490, 5710, 160, 0, 27, 0,
+ NL80211_RRF_DFS | 0),
+ },
+ .n_reg_rules = 4
+};
+
+static const struct ieee80211_regdomain regdom_MX = {
+ .alpha2 = "MX",
+ .dfs_region = NL80211_DFS_FCC,
+ .reg_rules = {
+ REG_RULE_EXT(2402, 2482, 40, 0, 20, 0, 0),
+ REG_RULE_EXT(5170, 5250, 80, 0, 17, 0,
+ NL80211_RRF_AUTO_BW | 0),
+ REG_RULE_EXT(5250, 5330, 80, 0, 24, 0,
+ NL80211_RRF_DFS |
+ NL80211_RRF_AUTO_BW | 0),
+ REG_RULE_EXT(5490, 5730, 160, 0, 24, 0,
+ NL80211_RRF_DFS | 0),
+ REG_RULE_EXT(5735, 5835, 80, 0, 30, 0, 0),
+ },
+ .n_reg_rules = 5
+};
+
+static const struct ieee80211_regdomain regdom_MY = {
+ .alpha2 = "MY",
+ .dfs_region = NL80211_DFS_FCC,
+ .reg_rules = {
+ REG_RULE_EXT(2402, 2482, 40, 0, 20, 0, 0),
+ REG_RULE_EXT(5170, 5250, 80, 0, 17, 0,
+ NL80211_RRF_AUTO_BW | 0),
+ REG_RULE_EXT(5250, 5330, 80, 0, 23, 0,
+ NL80211_RRF_DFS |
+ NL80211_RRF_AUTO_BW | 0),
+ REG_RULE_EXT(5735, 5835, 80, 0, 30, 0, 0),
+ },
+ .n_reg_rules = 4
+};
+
+static const struct ieee80211_regdomain regdom_NI = {
+ .alpha2 = "NI",
+ .dfs_region = NL80211_DFS_FCC,
+ .reg_rules = {
+ REG_RULE_EXT(2402, 2472, 40, 0, 30, 0, 0),
+ REG_RULE_EXT(5170, 5250, 80, 0, 24, 0,
+ NL80211_RRF_AUTO_BW | 0),
+ REG_RULE_EXT(5250, 5330, 80, 0, 24, 0,
+ NL80211_RRF_DFS |
+ NL80211_RRF_AUTO_BW | 0),
+ REG_RULE_EXT(5490, 5730, 160, 0, 24, 0,
+ NL80211_RRF_DFS | 0),
+ REG_RULE_EXT(5735, 5835, 80, 0, 30, 0, 0),
+ },
+ .n_reg_rules = 5
+};
+
+static const struct ieee80211_regdomain regdom_NL = {
+ .alpha2 = "NL",
+ .dfs_region = NL80211_DFS_ETSI,
+ .reg_rules = {
+ REG_RULE_EXT(2402, 2482, 40, 0, 20, 0, 0),
+ REG_RULE_EXT(5170, 5250, 80, 0, 20, 0,
+ NL80211_RRF_NO_OUTDOOR |
+ NL80211_RRF_AUTO_BW | 0),
+ REG_RULE_EXT(5250, 5330, 80, 0, 20, 0,
+ NL80211_RRF_NO_OUTDOOR |
+ NL80211_RRF_DFS |
+ NL80211_RRF_AUTO_BW | 0),
+ REG_RULE_EXT(5490, 5710, 160, 0, 27, 0,
+ NL80211_RRF_DFS | 0),
+ REG_RULE_EXT(57000, 66000, 2160, 0, 40, 0, 0),
+ },
+ .n_reg_rules = 5
+};
+
+static const struct ieee80211_regdomain regdom_NO = {
+ .alpha2 = "NO",
+ .dfs_region = NL80211_DFS_ETSI,
+ .reg_rules = {
+ REG_RULE_EXT(2400, 2483, 40, 0, 20, 0, 0),
+ REG_RULE_EXT(5150, 5250, 80, 0, 23, 0,
+ NL80211_RRF_AUTO_BW | 0),
+ REG_RULE_EXT(5250, 5350, 80, 0, 20, 0,
+ NL80211_RRF_DFS |
+ NL80211_RRF_AUTO_BW | 0),
+ REG_RULE_EXT(5470, 5795, 160, 0, 27, 0,
+ NL80211_RRF_DFS | 0),
+ REG_RULE_EXT(5815, 5850, 35, 0, 33, 0,
+ NL80211_RRF_DFS | 0),
+ REG_RULE_EXT(17100, 17300, 200, 0, 20, 0, 0),
+ REG_RULE_EXT(57000, 66000, 2160, 0, 40, 0, 0),
+ },
+ .n_reg_rules = 7
+};
+
+static const struct ieee80211_regdomain regdom_NP = {
+ .alpha2 = "NP",
+ .dfs_region = NL80211_DFS_JP,
+ .reg_rules = {
+ REG_RULE_EXT(2402, 2482, 40, 0, 20, 0, 0),
+ REG_RULE_EXT(5170, 5250, 80, 0, 20, 0,
+ NL80211_RRF_AUTO_BW | 0),
+ REG_RULE_EXT(5250, 5330, 80, 0, 20, 0,
+ NL80211_RRF_DFS |
+ NL80211_RRF_AUTO_BW | 0),
+ REG_RULE_EXT(5735, 5835, 80, 0, 20, 0, 0),
+ },
+ .n_reg_rules = 4
+};
+
+static const struct ieee80211_regdomain regdom_NZ = {
+ .alpha2 = "NZ",
+ .dfs_region = NL80211_DFS_FCC,
+ .reg_rules = {
+ REG_RULE_EXT(2402, 2482, 40, 0, 30, 0, 0),
+ REG_RULE_EXT(5170, 5250, 80, 0, 17, 0,
+ NL80211_RRF_AUTO_BW | 0),
+ REG_RULE_EXT(5250, 5330, 80, 0, 24, 0,
+ NL80211_RRF_DFS |
+ NL80211_RRF_AUTO_BW | 0),
+ REG_RULE_EXT(5490, 5730, 160, 0, 24, 0,
+ NL80211_RRF_DFS | 0),
+ REG_RULE_EXT(5735, 5835, 80, 0, 30, 0, 0),
+ },
+ .n_reg_rules = 5
+};
+
+static const struct ieee80211_regdomain regdom_OM = {
+ .alpha2 = "OM",
+ .dfs_region = NL80211_DFS_ETSI,
+ .reg_rules = {
+ REG_RULE_EXT(2402, 2482, 40, 0, 20, 0, 0),
+ REG_RULE_EXT(5170, 5250, 80, 0, 20, 0,
+ NL80211_RRF_AUTO_BW | 0),
+ REG_RULE_EXT(5250, 5330, 80, 0, 20, 0,
+ NL80211_RRF_DFS |
+ NL80211_RRF_AUTO_BW | 0),
+ REG_RULE_EXT(5490, 5710, 160, 0, 27, 0,
+ NL80211_RRF_DFS | 0),
+ },
+ .n_reg_rules = 4
+};
+
+static const struct ieee80211_regdomain regdom_PA = {
+ .alpha2 = "PA",
+ .dfs_region = NL80211_DFS_FCC,
+ .reg_rules = {
+ REG_RULE_EXT(2402, 2472, 40, 0, 30, 0, 0),
+ REG_RULE_EXT(5170, 5250, 80, 0, 17, 0,
+ NL80211_RRF_AUTO_BW | 0),
+ REG_RULE_EXT(5250, 5330, 80, 0, 23, 0,
+ NL80211_RRF_DFS |
+ NL80211_RRF_AUTO_BW | 0),
+ REG_RULE_EXT(5735, 5835, 80, 0, 30, 0, 0),
+ },
+ .n_reg_rules = 4
+};
+
+static const struct ieee80211_regdomain regdom_PE = {
+ .alpha2 = "PE",
+ .dfs_region = NL80211_DFS_FCC,
+ .reg_rules = {
+ REG_RULE_EXT(2402, 2482, 40, 0, 20, 0, 0),
+ REG_RULE_EXT(5170, 5250, 80, 0, 17, 0,
+ NL80211_RRF_AUTO_BW | 0),
+ REG_RULE_EXT(5250, 5330, 80, 0, 24, 0,
+ NL80211_RRF_DFS |
+ NL80211_RRF_AUTO_BW | 0),
+ REG_RULE_EXT(5490, 5730, 160, 0, 24, 0,
+ NL80211_RRF_DFS | 0),
+ REG_RULE_EXT(5735, 5835, 80, 0, 30, 0, 0),
+ },
+ .n_reg_rules = 5
+};
+
+static const struct ieee80211_regdomain regdom_PF = {
+ .alpha2 = "PF",
+ .dfs_region = NL80211_DFS_ETSI,
+ .reg_rules = {
+ REG_RULE_EXT(2402, 2482, 40, 0, 20, 0, 0),
+ REG_RULE_EXT(5170, 5250, 80, 0, 20, 0,
+ NL80211_RRF_AUTO_BW | 0),
+ REG_RULE_EXT(5250, 5330, 80, 0, 20, 0,
+ NL80211_RRF_DFS |
+ NL80211_RRF_AUTO_BW | 0),
+ REG_RULE_EXT(5490, 5710, 160, 0, 27, 0,
+ NL80211_RRF_DFS | 0),
+ },
+ .n_reg_rules = 4
+};
+
+static const struct ieee80211_regdomain regdom_PG = {
+ .alpha2 = "PG",
+ .dfs_region = NL80211_DFS_FCC,
+ .reg_rules = {
+ REG_RULE_EXT(2402, 2482, 40, 0, 20, 0, 0),
+ REG_RULE_EXT(5170, 5250, 80, 0, 17, 0,
+ NL80211_RRF_AUTO_BW | 0),
+ REG_RULE_EXT(5250, 5330, 80, 0, 24, 0,
+ NL80211_RRF_DFS |
+ NL80211_RRF_AUTO_BW | 0),
+ REG_RULE_EXT(5490, 5730, 160, 0, 24, 0,
+ NL80211_RRF_DFS | 0),
+ REG_RULE_EXT(5735, 5835, 80, 0, 30, 0, 0),
+ },
+ .n_reg_rules = 5
+};
+
+static const struct ieee80211_regdomain regdom_PH = {
+ .alpha2 = "PH",
+ .dfs_region = NL80211_DFS_FCC,
+ .reg_rules = {
+ REG_RULE_EXT(2402, 2482, 40, 0, 20, 0, 0),
+ REG_RULE_EXT(5170, 5250, 80, 0, 17, 0,
+ NL80211_RRF_AUTO_BW | 0),
+ REG_RULE_EXT(5250, 5330, 80, 0, 24, 0,
+ NL80211_RRF_DFS |
+ NL80211_RRF_AUTO_BW | 0),
+ REG_RULE_EXT(5490, 5730, 160, 0, 24, 0,
+ NL80211_RRF_DFS | 0),
+ REG_RULE_EXT(5735, 5835, 80, 0, 30, 0, 0),
+ },
+ .n_reg_rules = 5
+};
+
+static const struct ieee80211_regdomain regdom_PK = {
+ .alpha2 = "PK",
+ .dfs_region = NL80211_DFS_JP,
+ .reg_rules = {
+ REG_RULE_EXT(2402, 2482, 40, 0, 20, 0, 0),
+ REG_RULE_EXT(5735, 5835, 80, 0, 30, 0, 0),
+ },
+ .n_reg_rules = 2
+};
+
+static const struct ieee80211_regdomain regdom_PL = {
+ .alpha2 = "PL",
+ .dfs_region = NL80211_DFS_ETSI,
+ .reg_rules = {
+ REG_RULE_EXT(2402, 2482, 40, 0, 20, 0, 0),
+ REG_RULE_EXT(5170, 5250, 80, 0, 20, 0,
+ NL80211_RRF_AUTO_BW | 0),
+ REG_RULE_EXT(5250, 5330, 80, 0, 20, 0,
+ NL80211_RRF_DFS |
+ NL80211_RRF_AUTO_BW | 0),
+ REG_RULE_EXT(5490, 5710, 160, 0, 27, 0,
+ NL80211_RRF_DFS | 0),
+ REG_RULE_EXT(57000, 66000, 2160, 0, 40, 0, 0),
+ },
+ .n_reg_rules = 5
+};
+
+static const struct ieee80211_regdomain regdom_PM = {
+ .alpha2 = "PM",
+ .dfs_region = NL80211_DFS_ETSI,
+ .reg_rules = {
+ REG_RULE_EXT(2402, 2482, 40, 0, 20, 0, 0),
+ REG_RULE_EXT(5170, 5250, 80, 0, 20, 0,
+ NL80211_RRF_AUTO_BW | 0),
+ REG_RULE_EXT(5250, 5330, 80, 0, 20, 0,
+ NL80211_RRF_DFS |
+ NL80211_RRF_AUTO_BW | 0),
+ REG_RULE_EXT(5490, 5710, 160, 0, 27, 0,
+ NL80211_RRF_DFS | 0),
+ },
+ .n_reg_rules = 4
+};
+
+static const struct ieee80211_regdomain regdom_PR = {
+ .alpha2 = "PR",
+ .dfs_region = NL80211_DFS_FCC,
+ .reg_rules = {
+ REG_RULE_EXT(2402, 2472, 40, 0, 30, 0, 0),
+ REG_RULE_EXT(5170, 5250, 80, 0, 17, 0,
+ NL80211_RRF_AUTO_BW | 0),
+ REG_RULE_EXT(5250, 5330, 80, 0, 24, 0,
+ NL80211_RRF_DFS |
+ NL80211_RRF_AUTO_BW | 0),
+ REG_RULE_EXT(5490, 5730, 160, 0, 24, 0,
+ NL80211_RRF_DFS | 0),
+ REG_RULE_EXT(5735, 5835, 80, 0, 30, 0, 0),
+ },
+ .n_reg_rules = 5
+};
+
+static const struct ieee80211_regdomain regdom_PT = {
+ .alpha2 = "PT",
+ .dfs_region = NL80211_DFS_ETSI,
+ .reg_rules = {
+ REG_RULE_EXT(2402, 2482, 40, 0, 20, 0, 0),
+ REG_RULE_EXT(5170, 5250, 80, 0, 20, 0,
+ NL80211_RRF_AUTO_BW | 0),
+ REG_RULE_EXT(5250, 5330, 80, 0, 20, 0,
+ NL80211_RRF_DFS |
+ NL80211_RRF_AUTO_BW | 0),
+ REG_RULE_EXT(5490, 5710, 160, 0, 27, 0,
+ NL80211_RRF_DFS | 0),
+ REG_RULE_EXT(57000, 66000, 2160, 0, 40, 0, 0),
+ },
+ .n_reg_rules = 5
+};
+
+static const struct ieee80211_regdomain regdom_PW = {
+ .alpha2 = "PW",
+ .dfs_region = NL80211_DFS_FCC,
+ .reg_rules = {
+ REG_RULE_EXT(2402, 2472, 40, 0, 30, 0, 0),
+ REG_RULE_EXT(5170, 5250, 80, 0, 24, 0,
+ NL80211_RRF_AUTO_BW | 0),
+ REG_RULE_EXT(5250, 5330, 80, 0, 24, 0,
+ NL80211_RRF_DFS |
+ NL80211_RRF_AUTO_BW | 0),
+ REG_RULE_EXT(5490, 5730, 160, 0, 24, 0,
+ NL80211_RRF_DFS | 0),
+ REG_RULE_EXT(5735, 5835, 80, 0, 30, 0, 0),
+ },
+ .n_reg_rules = 5
+};
+
+static const struct ieee80211_regdomain regdom_PY = {
+ .alpha2 = "PY",
+ .dfs_region = NL80211_DFS_FCC,
+ .reg_rules = {
+ REG_RULE_EXT(2402, 2482, 40, 0, 20, 0, 0),
+ REG_RULE_EXT(5170, 5250, 80, 0, 24, 0,
+ NL80211_RRF_AUTO_BW | 0),
+ REG_RULE_EXT(5250, 5330, 80, 0, 24, 0,
+ NL80211_RRF_DFS |
+ NL80211_RRF_AUTO_BW | 0),
+ REG_RULE_EXT(5490, 5730, 160, 0, 24, 0,
+ NL80211_RRF_DFS | 0),
+ REG_RULE_EXT(5735, 5835, 80, 0, 30, 0, 0),
+ },
+ .n_reg_rules = 5
+};
+
+static const struct ieee80211_regdomain regdom_QA = {
+ .alpha2 = "QA",
+ .dfs_region = NL80211_DFS_JP,
+ .reg_rules = {
+ REG_RULE_EXT(2402, 2482, 40, 0, 20, 0, 0),
+ REG_RULE_EXT(5735, 5835, 80, 0, 30, 0, 0),
+ },
+ .n_reg_rules = 2
+};
+
+static const struct ieee80211_regdomain regdom_RE = {
+ .alpha2 = "RE",
+ .dfs_region = NL80211_DFS_ETSI,
+ .reg_rules = {
+ REG_RULE_EXT(2402, 2482, 40, 0, 20, 0, 0),
+ REG_RULE_EXT(5170, 5250, 80, 0, 20, 0,
+ NL80211_RRF_AUTO_BW | 0),
+ REG_RULE_EXT(5250, 5330, 80, 0, 20, 0,
+ NL80211_RRF_DFS |
+ NL80211_RRF_AUTO_BW | 0),
+ REG_RULE_EXT(5490, 5710, 160, 0, 27, 0,
+ NL80211_RRF_DFS | 0),
+ },
+ .n_reg_rules = 4
+};
+
+static const struct ieee80211_regdomain regdom_RO = {
+ .alpha2 = "RO",
+ .dfs_region = NL80211_DFS_ETSI,
+ .reg_rules = {
+ REG_RULE_EXT(2402, 2482, 40, 0, 20, 0, 0),
+ REG_RULE_EXT(5170, 5250, 80, 0, 20, 0,
+ NL80211_RRF_AUTO_BW | 0),
+ REG_RULE_EXT(5250, 5330, 80, 0, 20, 0,
+ NL80211_RRF_DFS |
+ NL80211_RRF_AUTO_BW | 0),
+ REG_RULE_EXT(5490, 5710, 160, 0, 27, 0,
+ NL80211_RRF_DFS | 0),
+ REG_RULE_EXT(57000, 66000, 2160, 0, 40, 0, 0),
+ },
+ .n_reg_rules = 5
+};
+
+static const struct ieee80211_regdomain regdom_RS = {
+ .alpha2 = "RS",
+ .dfs_region = NL80211_DFS_ETSI,
+ .reg_rules = {
+ REG_RULE_EXT(2400, 2483, 40, 0, 20, 0, 0),
+ REG_RULE_EXT(5150, 5350, 40, 0, 23, 0,
+ NL80211_RRF_NO_OUTDOOR | 0),
+ REG_RULE_EXT(5470, 5725, 20, 0, 30, 0,
+ NL80211_RRF_DFS | 0),
+ REG_RULE_EXT(57000, 66000, 2160, 0, 40, 0, 0),
+ },
+ .n_reg_rules = 4
+};
+
+static const struct ieee80211_regdomain regdom_RU = {
+ .alpha2 = "RU",
+ .dfs_region = NL80211_DFS_ETSI,
+ .reg_rules = {
+ REG_RULE_EXT(2402, 2482, 40, 0, 20, 0, 0),
+ REG_RULE_EXT(5170, 5250, 80, 0, 20, 0, 0),
+ REG_RULE_EXT(5250, 5330, 80, 0, 20, 0,
+ NL80211_RRF_DFS | 0),
+ REG_RULE_EXT(5650, 5730, 80, 0, 30, 0,
+ NL80211_RRF_DFS | 0),
+ REG_RULE_EXT(5735, 5835, 80, 0, 30, 0, 0),
+ },
+ .n_reg_rules = 5
+};
+
+static const struct ieee80211_regdomain regdom_RW = {
+ .alpha2 = "RW",
+ .dfs_region = NL80211_DFS_FCC,
+ .reg_rules = {
+ REG_RULE_EXT(2402, 2482, 40, 0, 20, 0, 0),
+ REG_RULE_EXT(5170, 5250, 80, 0, 17, 0,
+ NL80211_RRF_AUTO_BW | 0),
+ REG_RULE_EXT(5250, 5330, 80, 0, 24, 0,
+ NL80211_RRF_DFS |
+ NL80211_RRF_AUTO_BW | 0),
+ REG_RULE_EXT(5490, 5730, 160, 0, 24, 0,
+ NL80211_RRF_DFS | 0),
+ REG_RULE_EXT(5735, 5835, 80, 0, 30, 0, 0),
+ },
+ .n_reg_rules = 5
+};
+
+static const struct ieee80211_regdomain regdom_SA = {
+ .alpha2 = "SA",
+ .dfs_region = NL80211_DFS_ETSI,
+ .reg_rules = {
+ REG_RULE_EXT(2402, 2482, 40, 0, 20, 0, 0),
+ REG_RULE_EXT(5170, 5250, 80, 0, 20, 0,
+ NL80211_RRF_AUTO_BW | 0),
+ REG_RULE_EXT(5250, 5330, 80, 0, 20, 0,
+ NL80211_RRF_DFS |
+ NL80211_RRF_AUTO_BW | 0),
+ REG_RULE_EXT(5490, 5710, 160, 0, 27, 0,
+ NL80211_RRF_DFS | 0),
+ },
+ .n_reg_rules = 4
+};
+
+static const struct ieee80211_regdomain regdom_SE = {
+ .alpha2 = "SE",
+ .dfs_region = NL80211_DFS_ETSI,
+ .reg_rules = {
+ REG_RULE_EXT(2402, 2482, 40, 0, 20, 0, 0),
+ REG_RULE_EXT(5170, 5250, 80, 0, 20, 0,
+ NL80211_RRF_AUTO_BW | 0),
+ REG_RULE_EXT(5250, 5330, 80, 0, 20, 0,
+ NL80211_RRF_DFS |
+ NL80211_RRF_AUTO_BW | 0),
+ REG_RULE_EXT(5490, 5710, 160, 0, 27, 0,
+ NL80211_RRF_DFS | 0),
+ REG_RULE_EXT(57000, 66000, 2160, 0, 40, 0, 0),
+ },
+ .n_reg_rules = 5
+};
+
+static const struct ieee80211_regdomain regdom_SG = {
+ .alpha2 = "SG",
+ .dfs_region = NL80211_DFS_FCC,
+ .reg_rules = {
+ REG_RULE_EXT(2402, 2482, 40, 0, 20, 0, 0),
+ REG_RULE_EXT(5170, 5250, 80, 0, 17, 0,
+ NL80211_RRF_AUTO_BW | 0),
+ REG_RULE_EXT(5250, 5330, 80, 0, 24, 0,
+ NL80211_RRF_DFS |
+ NL80211_RRF_AUTO_BW | 0),
+ REG_RULE_EXT(5490, 5730, 160, 0, 24, 0,
+ NL80211_RRF_DFS | 0),
+ REG_RULE_EXT(5735, 5835, 80, 0, 30, 0, 0),
+ },
+ .n_reg_rules = 5
+};
+
+static const struct ieee80211_regdomain regdom_SI = {
+ .alpha2 = "SI",
+ .dfs_region = NL80211_DFS_ETSI,
+ .reg_rules = {
+ REG_RULE_EXT(2402, 2482, 40, 0, 20, 0, 0),
+ REG_RULE_EXT(5170, 5250, 80, 0, 20, 0,
+ NL80211_RRF_AUTO_BW | 0),
+ REG_RULE_EXT(5250, 5330, 80, 0, 20, 0,
+ NL80211_RRF_DFS |
+ NL80211_RRF_AUTO_BW | 0),
+ REG_RULE_EXT(5490, 5710, 160, 0, 27, 0,
+ NL80211_RRF_DFS | 0),
+ REG_RULE_EXT(57000, 66000, 2160, 0, 40, 0, 0),
+ },
+ .n_reg_rules = 5
+};
+
+static const struct ieee80211_regdomain regdom_SK = {
+ .alpha2 = "SK",
+ .dfs_region = NL80211_DFS_ETSI,
+ .reg_rules = {
+ REG_RULE_EXT(2402, 2482, 40, 0, 20, 0, 0),
+ REG_RULE_EXT(5170, 5250, 80, 0, 20, 0,
+ NL80211_RRF_AUTO_BW | 0),
+ REG_RULE_EXT(5250, 5330, 80, 0, 20, 0,
+ NL80211_RRF_DFS |
+ NL80211_RRF_AUTO_BW | 0),
+ REG_RULE_EXT(5490, 5710, 160, 0, 27, 0,
+ NL80211_RRF_DFS | 0),
+ REG_RULE_EXT(57000, 66000, 2160, 0, 40, 0, 0),
+ },
+ .n_reg_rules = 5
+};
+
+static const struct ieee80211_regdomain regdom_SN = {
+ .alpha2 = "SN",
+ .dfs_region = NL80211_DFS_FCC,
+ .reg_rules = {
+ REG_RULE_EXT(2402, 2482, 40, 0, 20, 0, 0),
+ REG_RULE_EXT(5170, 5250, 80, 0, 17, 0,
+ NL80211_RRF_AUTO_BW | 0),
+ REG_RULE_EXT(5250, 5330, 80, 0, 24, 0,
+ NL80211_RRF_DFS |
+ NL80211_RRF_AUTO_BW | 0),
+ REG_RULE_EXT(5490, 5730, 160, 0, 24, 0,
+ NL80211_RRF_DFS | 0),
+ REG_RULE_EXT(5735, 5835, 80, 0, 30, 0, 0),
+ },
+ .n_reg_rules = 5
+};
+
+static const struct ieee80211_regdomain regdom_SR = {
+ .alpha2 = "SR",
+ .dfs_region = NL80211_DFS_ETSI,
+ .reg_rules = {
+ REG_RULE_EXT(2402, 2482, 40, 0, 20, 0, 0),
+ REG_RULE_EXT(5170, 5250, 80, 0, 20, 0,
+ NL80211_RRF_AUTO_BW | 0),
+ REG_RULE_EXT(5250, 5330, 80, 0, 20, 0,
+ NL80211_RRF_DFS |
+ NL80211_RRF_AUTO_BW | 0),
+ REG_RULE_EXT(5490, 5710, 160, 0, 27, 0,
+ NL80211_RRF_DFS | 0),
+ },
+ .n_reg_rules = 4
+};
+
+static const struct ieee80211_regdomain regdom_SV = {
+ .alpha2 = "SV",
+ .dfs_region = NL80211_DFS_FCC,
+ .reg_rules = {
+ REG_RULE_EXT(2402, 2482, 40, 0, 20, 0, 0),
+ REG_RULE_EXT(5170, 5250, 80, 0, 17, 0, 0),
+ REG_RULE_EXT(5250, 5330, 80, 0, 23, 0,
+ NL80211_RRF_DFS | 0),
+ REG_RULE_EXT(5735, 5835, 80, 0, 30, 0, 0),
+ },
+ .n_reg_rules = 4
+};
+
+static const struct ieee80211_regdomain regdom_SY = {
+ .alpha2 = "SY",
+ .reg_rules = {
+ REG_RULE_EXT(2402, 2482, 40, 0, 20, 0, 0),
+ },
+ .n_reg_rules = 1
+};
+
+static const struct ieee80211_regdomain regdom_TC = {
+ .alpha2 = "TC",
+ .dfs_region = NL80211_DFS_FCC,
+ .reg_rules = {
+ REG_RULE_EXT(2402, 2482, 40, 0, 20, 0, 0),
+ REG_RULE_EXT(5170, 5250, 80, 0, 24, 0,
+ NL80211_RRF_AUTO_BW | 0),
+ REG_RULE_EXT(5250, 5330, 80, 0, 24, 0,
+ NL80211_RRF_DFS |
+ NL80211_RRF_AUTO_BW | 0),
+ REG_RULE_EXT(5490, 5730, 160, 0, 24, 0,
+ NL80211_RRF_DFS | 0),
+ REG_RULE_EXT(5735, 5835, 80, 0, 30, 0, 0),
+ },
+ .n_reg_rules = 5
+};
+
+static const struct ieee80211_regdomain regdom_TD = {
+ .alpha2 = "TD",
+ .dfs_region = NL80211_DFS_ETSI,
+ .reg_rules = {
+ REG_RULE_EXT(2402, 2482, 40, 0, 20, 0, 0),
+ REG_RULE_EXT(5170, 5250, 80, 0, 20, 0,
+ NL80211_RRF_AUTO_BW | 0),
+ REG_RULE_EXT(5250, 5330, 80, 0, 20, 0,
+ NL80211_RRF_DFS |
+ NL80211_RRF_AUTO_BW | 0),
+ REG_RULE_EXT(5490, 5710, 160, 0, 27, 0,
+ NL80211_RRF_DFS | 0),
+ },
+ .n_reg_rules = 4
+};
+
+static const struct ieee80211_regdomain regdom_TG = {
+ .alpha2 = "TG",
+ .dfs_region = NL80211_DFS_ETSI,
+ .reg_rules = {
+ REG_RULE_EXT(2402, 2482, 40, 0, 20, 0, 0),
+ REG_RULE_EXT(5170, 5250, 40, 0, 20, 0, 0),
+ REG_RULE_EXT(5250, 5330, 40, 0, 20, 0,
+ NL80211_RRF_DFS | 0),
+ REG_RULE_EXT(5490, 5710, 40, 0, 27, 0,
+ NL80211_RRF_DFS | 0),
+ },
+ .n_reg_rules = 4
+};
+
+static const struct ieee80211_regdomain regdom_TH = {
+ .alpha2 = "TH",
+ .dfs_region = NL80211_DFS_FCC,
+ .reg_rules = {
+ REG_RULE_EXT(2402, 2482, 40, 0, 20, 0, 0),
+ REG_RULE_EXT(5170, 5250, 80, 0, 17, 0,
+ NL80211_RRF_AUTO_BW | 0),
+ REG_RULE_EXT(5250, 5330, 80, 0, 24, 0,
+ NL80211_RRF_DFS |
+ NL80211_RRF_AUTO_BW | 0),
+ REG_RULE_EXT(5490, 5730, 160, 0, 24, 0,
+ NL80211_RRF_DFS | 0),
+ REG_RULE_EXT(5735, 5835, 80, 0, 30, 0, 0),
+ },
+ .n_reg_rules = 5
+};
+
+static const struct ieee80211_regdomain regdom_TN = {
+ .alpha2 = "TN",
+ .dfs_region = NL80211_DFS_ETSI,
+ .reg_rules = {
+ REG_RULE_EXT(2402, 2482, 40, 0, 20, 0, 0),
+ REG_RULE_EXT(5170, 5250, 80, 0, 20, 0,
+ NL80211_RRF_AUTO_BW | 0),
+ REG_RULE_EXT(5250, 5330, 80, 0, 20, 0,
+ NL80211_RRF_DFS |
+ NL80211_RRF_AUTO_BW | 0),
+ },
+ .n_reg_rules = 3
+};
+
+static const struct ieee80211_regdomain regdom_TR = {
+ .alpha2 = "TR",
+ .dfs_region = NL80211_DFS_ETSI,
+ .reg_rules = {
+ REG_RULE_EXT(2402, 2482, 40, 0, 20, 0, 0),
+ REG_RULE_EXT(5170, 5250, 80, 0, 20, 0,
+ NL80211_RRF_AUTO_BW | 0),
+ REG_RULE_EXT(5250, 5330, 80, 0, 20, 0,
+ NL80211_RRF_DFS |
+ NL80211_RRF_AUTO_BW | 0),
+ REG_RULE_EXT(5490, 5710, 160, 0, 27, 0,
+ NL80211_RRF_DFS | 0),
+ REG_RULE_EXT(57000, 66000, 2160, 0, 40, 0, 0),
+ },
+ .n_reg_rules = 5
+};
+
+static const struct ieee80211_regdomain regdom_TT = {
+ .alpha2 = "TT",
+ .dfs_region = NL80211_DFS_FCC,
+ .reg_rules = {
+ REG_RULE_EXT(2402, 2482, 40, 0, 20, 0, 0),
+ REG_RULE_EXT(5170, 5250, 80, 0, 17, 0,
+ NL80211_RRF_AUTO_BW | 0),
+ REG_RULE_EXT(5250, 5330, 80, 0, 24, 0,
+ NL80211_RRF_DFS |
+ NL80211_RRF_AUTO_BW | 0),
+ REG_RULE_EXT(5490, 5730, 160, 0, 24, 0,
+ NL80211_RRF_DFS | 0),
+ REG_RULE_EXT(5735, 5835, 80, 0, 30, 0, 0),
+ },
+ .n_reg_rules = 5
+};
+
+static const struct ieee80211_regdomain regdom_TW = {
+ .alpha2 = "TW",
+ .dfs_region = NL80211_DFS_JP,
+ .reg_rules = {
+ REG_RULE_EXT(2402, 2472, 40, 0, 30, 0, 0),
+ REG_RULE_EXT(5270, 5330, 40, 0, 17, 0,
+ NL80211_RRF_DFS | 0),
+ REG_RULE_EXT(5490, 5590, 80, 0, 30, 0,
+ NL80211_RRF_DFS | 0),
+ REG_RULE_EXT(5650, 5710, 40, 0, 30, 0,
+ NL80211_RRF_DFS | 0),
+ REG_RULE_EXT(5735, 5835, 80, 0, 30, 0, 0),
+ },
+ .n_reg_rules = 5
+};
+
+static const struct ieee80211_regdomain regdom_UA = {
+ .alpha2 = "UA",
+ .dfs_region = NL80211_DFS_ETSI,
+ .reg_rules = {
+ REG_RULE_EXT(2400, 2483, 40, 0, 20, 0,
+ NL80211_RRF_NO_OUTDOOR | 0),
+ REG_RULE_EXT(5150, 5350, 40, 0, 20, 0,
+ NL80211_RRF_NO_OUTDOOR | 0),
+ REG_RULE_EXT(5490, 5670, 80, 0, 20, 0,
+ NL80211_RRF_DFS | 0),
+ REG_RULE_EXT(5735, 5835, 80, 0, 20, 0, 0),
+ REG_RULE_EXT(57000, 66000, 2160, 0, 40, 0, 0),
+ },
+ .n_reg_rules = 5
+};
+
+static const struct ieee80211_regdomain regdom_UG = {
+ .alpha2 = "UG",
+ .dfs_region = NL80211_DFS_FCC,
+ .reg_rules = {
+ REG_RULE_EXT(2402, 2482, 40, 0, 20, 0, 0),
+ REG_RULE_EXT(5170, 5250, 80, 0, 24, 0,
+ NL80211_RRF_AUTO_BW | 0),
+ REG_RULE_EXT(5250, 5330, 80, 0, 24, 0,
+ NL80211_RRF_DFS |
+ NL80211_RRF_AUTO_BW | 0),
+ REG_RULE_EXT(5490, 5730, 160, 0, 24, 0,
+ NL80211_RRF_DFS | 0),
+ REG_RULE_EXT(5735, 5835, 80, 0, 30, 0, 0),
+ },
+ .n_reg_rules = 5
+};
+
+static const struct ieee80211_regdomain regdom_US = {
+ .alpha2 = "US",
+ .dfs_region = NL80211_DFS_FCC,
+ .reg_rules = {
+ // 1...13
+ REG_RULE_EXT(2402, 2472, 40, 0, 30, 0, 0),
+ // 36 40 44 48
+ REG_RULE_EXT(5170, 5250, 80, 0, 17, 0,
+ NL80211_RRF_AUTO_BW | 0),
+ // 52 56 60 64
+ REG_RULE_EXT(5250, 5330, 80, 0, 23, 0,
+ NL80211_RRF_DFS |
+ NL80211_RRF_AUTO_BW | 0),
+ // 100 104 108 112 116 120 124
+ REG_RULE_EXT(5490, 5600, 80, 0, 24, 0,
+ NL80211_RRF_DFS | 0),
+ // 128 132 136 140
+ REG_RULE_EXT(5650, 5710, 40, 0, 24, 0,
+ NL80211_RRF_DFS | 0),
+ // 149 153 157 161 165
+ REG_RULE_EXT(5735, 5835, 80, 0, 30, 0, 0),
+ REG_RULE_EXT(57240, 63720, 2160, 0, 40, 0, 0),
+ },
+ .n_reg_rules = 7
+};
+
+static const struct ieee80211_regdomain regdom_UY = {
+ .alpha2 = "UY",
+ .dfs_region = NL80211_DFS_FCC,
+ .reg_rules = {
+ REG_RULE_EXT(2402, 2482, 40, 0, 20, 0, 0),
+ REG_RULE_EXT(5170, 5250, 80, 0, 17, 0,
+ NL80211_RRF_AUTO_BW | 0),
+ REG_RULE_EXT(5250, 5330, 80, 0, 24, 0,
+ NL80211_RRF_DFS |
+ NL80211_RRF_AUTO_BW | 0),
+ REG_RULE_EXT(5490, 5730, 160, 0, 24, 0,
+ NL80211_RRF_DFS | 0),
+ REG_RULE_EXT(5735, 5835, 80, 0, 30, 0, 0),
+ },
+ .n_reg_rules = 5
+};
+
+static const struct ieee80211_regdomain regdom_UZ = {
+ .alpha2 = "UZ",
+ .dfs_region = NL80211_DFS_ETSI,
+ .reg_rules = {
+ REG_RULE_EXT(2402, 2482, 40, 0, 20, 0, 0),
+ REG_RULE_EXT(5170, 5250, 80, 0, 20, 0,
+ NL80211_RRF_AUTO_BW | 0),
+ REG_RULE_EXT(5250, 5330, 80, 0, 20, 0,
+ NL80211_RRF_DFS |
+ NL80211_RRF_AUTO_BW | 0),
+ },
+ .n_reg_rules = 3
+};
+
+static const struct ieee80211_regdomain regdom_VC = {
+ .alpha2 = "VC",
+ .dfs_region = NL80211_DFS_ETSI,
+ .reg_rules = {
+ REG_RULE_EXT(2402, 2482, 40, 0, 20, 0, 0),
+ REG_RULE_EXT(5170, 5250, 80, 0, 20, 0,
+ NL80211_RRF_AUTO_BW | 0),
+ REG_RULE_EXT(5250, 5330, 80, 0, 20, 0,
+ NL80211_RRF_DFS |
+ NL80211_RRF_AUTO_BW | 0),
+ REG_RULE_EXT(5490, 5710, 160, 0, 27, 0,
+ NL80211_RRF_DFS | 0),
+ },
+ .n_reg_rules = 4
+};
+
+static const struct ieee80211_regdomain regdom_VE = {
+ .alpha2 = "VE",
+ .dfs_region = NL80211_DFS_FCC,
+ .reg_rules = {
+ REG_RULE_EXT(2402, 2482, 40, 0, 30, 0, 0),
+ REG_RULE_EXT(5170, 5250, 80, 0, 23, 0,
+ NL80211_RRF_AUTO_BW | 0),
+ REG_RULE_EXT(5250, 5330, 80, 0, 23, 0,
+ NL80211_RRF_DFS |
+ NL80211_RRF_AUTO_BW | 0),
+ REG_RULE_EXT(5735, 5835, 80, 0, 30, 0, 0),
+ },
+ .n_reg_rules = 4
+};
+
+static const struct ieee80211_regdomain regdom_VI = {
+ .alpha2 = "VI",
+ .dfs_region = NL80211_DFS_FCC,
+ .reg_rules = {
+ REG_RULE_EXT(2402, 2472, 40, 0, 30, 0, 0),
+ REG_RULE_EXT(5170, 5250, 80, 0, 24, 0,
+ NL80211_RRF_AUTO_BW | 0),
+ REG_RULE_EXT(5250, 5330, 80, 0, 24, 0,
+ NL80211_RRF_DFS |
+ NL80211_RRF_AUTO_BW | 0),
+ REG_RULE_EXT(5490, 5730, 160, 0, 24, 0,
+ NL80211_RRF_DFS | 0),
+ REG_RULE_EXT(5735, 5835, 80, 0, 30, 0, 0),
+ },
+ .n_reg_rules = 5
+};
+
+static const struct ieee80211_regdomain regdom_VN = {
+ .alpha2 = "VN",
+ .dfs_region = NL80211_DFS_FCC,
+ .reg_rules = {
+ REG_RULE_EXT(2402, 2482, 40, 0, 20, 0, 0),
+ REG_RULE_EXT(5170, 5250, 80, 0, 17, 0, 0),
+ REG_RULE_EXT(5250, 5330, 80, 0, 24, 0,
+ NL80211_RRF_DFS | 0),
+ REG_RULE_EXT(5490, 5730, 80, 0, 24, 0,
+ NL80211_RRF_DFS | 0),
+ REG_RULE_EXT(5735, 5835, 80, 0, 30, 0, 0),
+ },
+ .n_reg_rules = 5
+};
+
+static const struct ieee80211_regdomain regdom_VU = {
+ .alpha2 = "VU",
+ .dfs_region = NL80211_DFS_FCC,
+ .reg_rules = {
+ REG_RULE_EXT(2402, 2482, 40, 0, 20, 0, 0),
+ REG_RULE_EXT(5170, 5250, 80, 0, 17, 0,
+ NL80211_RRF_AUTO_BW | 0),
+ REG_RULE_EXT(5250, 5330, 80, 0, 24, 0,
+ NL80211_RRF_DFS |
+ NL80211_RRF_AUTO_BW | 0),
+ REG_RULE_EXT(5490, 5730, 160, 0, 24, 0,
+ NL80211_RRF_DFS | 0),
+ REG_RULE_EXT(5735, 5835, 80, 0, 30, 0, 0),
+ },
+ .n_reg_rules = 5
+};
+
+static const struct ieee80211_regdomain regdom_WF = {
+ .alpha2 = "WF",
+ .dfs_region = NL80211_DFS_ETSI,
+ .reg_rules = {
+ REG_RULE_EXT(2402, 2482, 40, 0, 20, 0, 0),
+ REG_RULE_EXT(5170, 5250, 80, 0, 20, 0,
+ NL80211_RRF_AUTO_BW | 0),
+ REG_RULE_EXT(5250, 5330, 80, 0, 20, 0,
+ NL80211_RRF_DFS |
+ NL80211_RRF_AUTO_BW | 0),
+ REG_RULE_EXT(5490, 5710, 160, 0, 27, 0,
+ NL80211_RRF_DFS | 0),
+ },
+ .n_reg_rules = 4
+};
+
+static const struct ieee80211_regdomain regdom_YE = {
+ .alpha2 = "YE",
+ .reg_rules = {
+ REG_RULE_EXT(2402, 2482, 40, 0, 20, 0, 0),
+ },
+ .n_reg_rules = 1
+};
+
+static const struct ieee80211_regdomain regdom_ZM = {
+ .alpha2 = "ZM",
+ .reg_rules = {
+ REG_RULE_EXT(2402, 2482, 40, 0, 20, 0, 0),
+ },
+ .n_reg_rules = 1
+};
+
+static const struct ieee80211_regdomain regdom_YT = {
+ .alpha2 = "YT",
+ .dfs_region = NL80211_DFS_ETSI,
+ .reg_rules = {
+ REG_RULE_EXT(2402, 2482, 40, 0, 20, 0, 0),
+ REG_RULE_EXT(5170, 5250, 80, 0, 20, 0,
+ NL80211_RRF_AUTO_BW | 0),
+ REG_RULE_EXT(5250, 5330, 80, 0, 20, 0,
+ NL80211_RRF_DFS |
+ NL80211_RRF_AUTO_BW | 0),
+ REG_RULE_EXT(5490, 5710, 160, 0, 27, 0,
+ NL80211_RRF_DFS | 0),
+ },
+ .n_reg_rules = 4
+};
+
+static const struct ieee80211_regdomain regdom_ZA = {
+ .alpha2 = "ZA",
+ .dfs_region = NL80211_DFS_ETSI,
+ .reg_rules = {
+ REG_RULE_EXT(2402, 2482, 40, 0, 20, 0, 0),
+ REG_RULE_EXT(5170, 5250, 80, 0, 20, 0,
+ NL80211_RRF_AUTO_BW | 0),
+ REG_RULE_EXT(5250, 5330, 80, 0, 20, 0,
+ NL80211_RRF_DFS |
+ NL80211_RRF_AUTO_BW | 0),
+ REG_RULE_EXT(5490, 5695, 160, 0, 27, 0,
+ NL80211_RRF_DFS | 0),
+ /*REG_RULE_EXT(5490, 5710, 160, 0, 27, 0,
+ NL80211_RRF_DFS | 0),*/
+ },
+ .n_reg_rules = 4
+};
+
+static const struct ieee80211_regdomain regdom_ZW = {
+ .alpha2 = "ZW",
+ .dfs_region = NL80211_DFS_ETSI,
+ .reg_rules = {
+ REG_RULE_EXT(2402, 2482, 40, 0, 20, 0, 0),
+ REG_RULE_EXT(5170, 5250, 80, 0, 20, 0,
+ NL80211_RRF_AUTO_BW | 0),
+ REG_RULE_EXT(5250, 5330, 80, 0, 20, 0,
+ NL80211_RRF_DFS |
+ NL80211_RRF_AUTO_BW | 0),
+ REG_RULE_EXT(5490, 5710, 160, 0, 27, 0,
+ NL80211_RRF_DFS | 0),
+ },
+ .n_reg_rules = 4
+};
+
+const struct ieee80211_regdomain *reg_regdb1[] = {
+ ®dom_00,
+ ®dom_AD,
+ ®dom_AE,
+ ®dom_AF,
+ ®dom_AI,
+ ®dom_AL,
+ ®dom_AM,
+ ®dom_AN,
+ ®dom_AR,
+ ®dom_AS,
+ ®dom_AT,
+ ®dom_AU,
+ ®dom_AW,
+ ®dom_AZ,
+ ®dom_BA,
+ ®dom_BB,
+ ®dom_BD,
+ ®dom_BE,
+ ®dom_BF,
+ ®dom_BG,
+ ®dom_BH,
+ ®dom_BL,
+ ®dom_BM,
+ ®dom_BN,
+ ®dom_BO,
+ ®dom_BR,
+ ®dom_BS,
+ ®dom_BT,
+ ®dom_BY,
+ ®dom_BZ,
+ ®dom_CA,
+ ®dom_CF,
+ ®dom_CH,
+ ®dom_CI,
+ ®dom_CL,
+ ®dom_CN,
+ ®dom_CO,
+ ®dom_CR,
+ ®dom_CX,
+ ®dom_CY,
+ ®dom_CZ,
+ ®dom_DE,
+ ®dom_DK,
+ ®dom_DM,
+ ®dom_DO,
+ ®dom_DZ,
+ ®dom_EC,
+ ®dom_EE,
+ ®dom_EG,
+ ®dom_ES,
+ ®dom_ET,
+ ®dom_FI,
+ ®dom_FM,
+ ®dom_FR,
+ ®dom_GB,
+ ®dom_GD,
+ ®dom_GE,
+ ®dom_GF,
+ ®dom_GH,
+ ®dom_GL,
+ ®dom_GP,
+ ®dom_GR,
+ ®dom_GT,
+ ®dom_GU,
+ ®dom_GY,
+ ®dom_HK,
+ ®dom_HN,
+ ®dom_HR,
+ ®dom_HT,
+ ®dom_HU,
+ ®dom_ID,
+ ®dom_IE,
+ ®dom_IL,
+ ®dom_IN,
+ ®dom_IR,
+ ®dom_IS,
+ ®dom_IT,
+ ®dom_JM,
+ ®dom_JO,
+ ®dom_JP,
+ ®dom_KE,
+ ®dom_KH,
+ ®dom_KN,
+ ®dom_KP,
+ ®dom_KR,
+ ®dom_KW,
+ ®dom_KY,
+ ®dom_KZ,
+ ®dom_LB,
+ ®dom_LC,
+ ®dom_LI,
+ ®dom_LK,
+ ®dom_LS,
+ ®dom_LT,
+ ®dom_LU,
+ ®dom_LV,
+ ®dom_MA,
+ ®dom_MC,
+ ®dom_MD,
+ ®dom_ME,
+ ®dom_MF,
+ ®dom_MH,
+ ®dom_MK,
+ ®dom_MN,
+ ®dom_MO,
+ ®dom_MP,
+ ®dom_MQ,
+ ®dom_MR,
+ ®dom_MT,
+ ®dom_MU,
+ ®dom_MW,
+ ®dom_MX,
+ ®dom_MY,
+ ®dom_NI,
+ ®dom_NL,
+ ®dom_NO,
+ ®dom_NP,
+ ®dom_NZ,
+ ®dom_OM,
+ ®dom_PA,
+ ®dom_PE,
+ ®dom_PF,
+ ®dom_PG,
+ ®dom_PH,
+ ®dom_PK,
+ ®dom_PL,
+ ®dom_PM,
+ ®dom_PR,
+ ®dom_PT,
+ ®dom_PW,
+ ®dom_PY,
+ ®dom_QA,
+ ®dom_RE,
+ ®dom_RO,
+ ®dom_RS,
+ ®dom_RU,
+ ®dom_RW,
+ ®dom_SA,
+ ®dom_SE,
+ ®dom_SG,
+ ®dom_SI,
+ ®dom_SK,
+ ®dom_SN,
+ ®dom_SR,
+ ®dom_SV,
+ ®dom_SY,
+ ®dom_TC,
+ ®dom_TD,
+ ®dom_TG,
+ ®dom_TH,
+ ®dom_TN,
+ ®dom_TR,
+ ®dom_TT,
+ ®dom_TW,
+ ®dom_UA,
+ ®dom_UG,
+ ®dom_US,
+ ®dom_UY,
+ ®dom_UZ,
+ ®dom_VC,
+ ®dom_VE,
+ ®dom_VI,
+ ®dom_VN,
+ ®dom_VU,
+ ®dom_WF,
+ ®dom_YE,
+ ®dom_ZM,
+ ®dom_YT,
+ ®dom_ZA,
+ ®dom_ZW,
+};
+
+int reg_regdb_size1 = ARRAY_SIZE(reg_regdb1);
+
+
diff --git a/lynq/R307L/ap/os/linux/linux-3.4.x/drivers/net/wireless/aic8800/regdb.c b/lynq/R307L/ap/os/linux/linux-3.4.x/drivers/net/wireless/aic8800/regdb.c
new file mode 100644
index 0000000..47bb3dc
--- /dev/null
+++ b/lynq/R307L/ap/os/linux/linux-3.4.x/drivers/net/wireless/aic8800/regdb.c
@@ -0,0 +1,2882 @@
+#include <linux/nl80211.h>
+#include <net/cfg80211.h>
+#include <linux/version.h>
+
+//#include "regdb.h"
+
+#if LINUX_VERSION_CODE < KERNEL_VERSION(3, 15, 0)
+#define REG_RULE_EXT(start, end, bw, gain, eirp, dfs_cac, reg_flags) \
+{ \
+ .freq_range.start_freq_khz = MHZ_TO_KHZ(start), \
+ .freq_range.end_freq_khz = MHZ_TO_KHZ(end), \
+ .freq_range.max_bandwidth_khz = MHZ_TO_KHZ(bw), \
+ .power_rule.max_antenna_gain = DBI_TO_MBI(gain),\
+ .power_rule.max_eirp = DBM_TO_MBM(eirp), \
+ .flags = reg_flags, \
+}
+#define NL80211_RRF_AUTO_BW 0
+#endif
+
+static const struct ieee80211_regdomain regdom_00 = {
+ .n_reg_rules = 2,
+ .alpha2 = "00",
+ .reg_rules = {
+ // 1...14
+ REG_RULE(2390 - 10, 2510 + 10, 40, 0, 20, 0),
+ // 36...165
+ REG_RULE(5150 - 10, 5970 + 10, 80, 0, 20, 0),
+ }
+};
+
+static const struct ieee80211_regdomain regdom_AD = {
+ .alpha2 = "AD",
+ .reg_rules = {
+ REG_RULE_EXT(2402, 2482, 40, 0, 20, 0, 0),
+ REG_RULE_EXT(5170, 5250, 80, 0, 20, 0, 0),
+ REG_RULE_EXT(5250, 5330, 80, 0, 20, 0,
+ NL80211_RRF_DFS | 0),
+ REG_RULE_EXT(5490, 5710, 80, 0, 27, 0,
+ NL80211_RRF_DFS | 0),
+ REG_RULE_EXT(57000, 66000, 2160, 0, 40, 0, 0),
+ },
+ .n_reg_rules = 5
+};
+
+static const struct ieee80211_regdomain regdom_AE = {
+ .alpha2 = "AE",
+ .dfs_region = NL80211_DFS_FCC,
+ .reg_rules = {
+ REG_RULE_EXT(2402, 2482, 40, 0, 20, 0, 0),
+ REG_RULE_EXT(5170, 5250, 80, 0, 17, 0,
+ NL80211_RRF_AUTO_BW | 0),
+ REG_RULE_EXT(5250, 5330, 80, 0, 24, 0,
+ NL80211_RRF_DFS |
+ NL80211_RRF_AUTO_BW | 0),
+ REG_RULE_EXT(5490, 5730, 160, 0, 24, 0,
+ NL80211_RRF_DFS | 0),
+ //REG_RULE_EXT(5735, 5835, 80, 0, 30, 0, 0),
+ },
+ .n_reg_rules = 4
+};
+
+static const struct ieee80211_regdomain regdom_AF = {
+ .alpha2 = "AF",
+ .dfs_region = NL80211_DFS_ETSI,
+ .reg_rules = {
+ REG_RULE_EXT(2402, 2482, 40, 0, 20, 0, 0),
+ REG_RULE_EXT(5170, 5250, 80, 0, 20, 0,
+ NL80211_RRF_AUTO_BW | 0),
+ REG_RULE_EXT(5250, 5330, 80, 0, 20, 0,
+ NL80211_RRF_DFS |
+ NL80211_RRF_AUTO_BW | 0),
+ REG_RULE_EXT(5490, 5710, 160, 0, 27, 0,
+ NL80211_RRF_DFS | 0),
+ },
+ .n_reg_rules = 4
+};
+
+static const struct ieee80211_regdomain regdom_AI = {
+ .alpha2 = "AI",
+ .dfs_region = NL80211_DFS_ETSI,
+ .reg_rules = {
+ REG_RULE_EXT(2402, 2482, 40, 0, 20, 0, 0),
+ REG_RULE_EXT(5170, 5250, 80, 0, 20, 0,
+ NL80211_RRF_AUTO_BW | 0),
+ REG_RULE_EXT(5250, 5330, 80, 0, 20, 0,
+ NL80211_RRF_DFS |
+ NL80211_RRF_AUTO_BW | 0),
+ REG_RULE_EXT(5490, 5710, 160, 0, 27, 0,
+ NL80211_RRF_DFS | 0),
+ },
+ .n_reg_rules = 4
+};
+
+static const struct ieee80211_regdomain regdom_AL = {
+ .alpha2 = "AL",
+ .dfs_region = NL80211_DFS_ETSI,
+ .reg_rules = {
+ REG_RULE_EXT(2402, 2482, 40, 0, 20, 0, 0),
+ REG_RULE_EXT(5170, 5250, 80, 0, 20, 0,
+ NL80211_RRF_AUTO_BW | 0),
+ REG_RULE_EXT(5250, 5330, 80, 0, 20, 0,
+ NL80211_RRF_DFS |
+ NL80211_RRF_AUTO_BW | 0),
+ REG_RULE_EXT(5490, 5710, 160, 0, 27, 0,
+ NL80211_RRF_DFS | 0),
+ },
+ .n_reg_rules = 4
+};
+
+static const struct ieee80211_regdomain regdom_AM = {
+ .alpha2 = "AM",
+ .dfs_region = NL80211_DFS_ETSI,
+ .reg_rules = {
+ REG_RULE_EXT(2402, 2482, 40, 0, 20, 0, 0),
+ REG_RULE_EXT(5170, 5250, 80, 0, 18, 0, 0),
+ REG_RULE_EXT(5250, 5330, 80, 0, 18, 0,
+ NL80211_RRF_DFS | 0),
+ },
+ .n_reg_rules = 3
+};
+
+static const struct ieee80211_regdomain regdom_AN = {
+ .alpha2 = "AN",
+ .dfs_region = NL80211_DFS_ETSI,
+ .reg_rules = {
+ REG_RULE_EXT(2402, 2482, 40, 0, 20, 0, 0),
+ REG_RULE_EXT(5170, 5250, 80, 0, 20, 0,
+ NL80211_RRF_AUTO_BW | 0),
+ REG_RULE_EXT(5250, 5330, 80, 0, 20, 0,
+ NL80211_RRF_DFS |
+ NL80211_RRF_AUTO_BW | 0),
+ REG_RULE_EXT(5490, 5710, 160, 0, 27, 0,
+ NL80211_RRF_DFS | 0),
+ },
+ .n_reg_rules = 4
+};
+
+static const struct ieee80211_regdomain regdom_AR = {
+ .alpha2 = "AR",
+ .dfs_region = NL80211_DFS_FCC,
+ .reg_rules = {
+ REG_RULE_EXT(2402, 2482, 40, 0, 20, 0, 0),
+ //REG_RULE_EXT(5170, 5250, 80, 0, 17, 0,
+ // NL80211_RRF_AUTO_BW | 0),
+ //REG_RULE_EXT(5250, 5330, 80, 0, 24, 0,
+ // NL80211_RRF_DFS |
+ // NL80211_RRF_AUTO_BW | 0),
+ REG_RULE_EXT(5270, 5330, 40, 0, 24, 0,
+ NL80211_RRF_DFS |
+ NL80211_RRF_AUTO_BW | 0),
+ //REG_RULE_EXT(5490, 5730, 160, 0, 24, 0,
+ // NL80211_RRF_DFS | 0),
+ REG_RULE_EXT(5735, 5815, 80, 0, 30, 0, 0),
+ },
+ .n_reg_rules = 3
+};
+
+static const struct ieee80211_regdomain regdom_AS = {
+ .alpha2 = "AS",
+ .dfs_region = NL80211_DFS_FCC,
+ .reg_rules = {
+ REG_RULE_EXT(2402, 2472, 40, 0, 30, 0, 0),
+ REG_RULE_EXT(5170, 5250, 80, 0, 24, 0,
+ NL80211_RRF_AUTO_BW | 0),
+ REG_RULE_EXT(5250, 5330, 80, 0, 24, 0,
+ NL80211_RRF_DFS |
+ NL80211_RRF_AUTO_BW | 0),
+ REG_RULE_EXT(5490, 5730, 160, 0, 24, 0,
+ NL80211_RRF_DFS | 0),
+ REG_RULE_EXT(5735, 5835, 80, 0, 30, 0, 0),
+ },
+ .n_reg_rules = 5
+};
+
+static const struct ieee80211_regdomain regdom_AT = {
+ .alpha2 = "AT",
+ .dfs_region = NL80211_DFS_ETSI,
+ .reg_rules = {
+ REG_RULE_EXT(2402, 2482, 40, 0, 20, 0, 0),
+ REG_RULE_EXT(5170, 5250, 80, 0, 20, 0,
+ NL80211_RRF_AUTO_BW | 0),
+ REG_RULE_EXT(5250, 5330, 80, 0, 20, 0,
+ NL80211_RRF_DFS |
+ NL80211_RRF_AUTO_BW | 0),
+ REG_RULE_EXT(5490, 5710, 160, 0, 27, 0,
+ NL80211_RRF_DFS | 0),
+ REG_RULE_EXT(57000, 66000, 2160, 0, 40, 0, 0),
+ },
+ .n_reg_rules = 5
+};
+
+static const struct ieee80211_regdomain regdom_AU = {
+ .alpha2 = "AU",
+ .reg_rules = {
+ REG_RULE_EXT(2402, 2482, 40, 0, 20, 0, 0),
+ REG_RULE_EXT(5170, 5250, 80, 0, 17, 0,
+ NL80211_RRF_AUTO_BW | 0),
+ REG_RULE_EXT(5250, 5330, 80, 0, 24, 0,
+ NL80211_RRF_DFS |
+ NL80211_RRF_AUTO_BW | 0),
+ REG_RULE_EXT(5490, 5710, 160, 0, 24, 0,
+ NL80211_RRF_DFS | 0),
+ REG_RULE_EXT(5735, 5835, 80, 0, 30, 0, 0),
+ },
+ .n_reg_rules = 5
+};
+
+static const struct ieee80211_regdomain regdom_AW = {
+ .alpha2 = "AW",
+ .dfs_region = NL80211_DFS_ETSI,
+ .reg_rules = {
+ REG_RULE_EXT(2402, 2482, 40, 0, 20, 0, 0),
+ REG_RULE_EXT(5170, 5250, 80, 0, 20, 0,
+ NL80211_RRF_AUTO_BW | 0),
+ REG_RULE_EXT(5250, 5330, 80, 0, 20, 0,
+ NL80211_RRF_DFS |
+ NL80211_RRF_AUTO_BW | 0),
+ REG_RULE_EXT(5490, 5710, 160, 0, 27, 0,
+ NL80211_RRF_DFS | 0),
+ },
+ .n_reg_rules = 4
+};
+
+static const struct ieee80211_regdomain regdom_AZ = {
+ .alpha2 = "AZ",
+ .dfs_region = NL80211_DFS_ETSI,
+ .reg_rules = {
+ REG_RULE_EXT(2402, 2482, 40, 0, 20, 0, 0),
+ REG_RULE_EXT(5170, 5250, 80, 0, 18, 0,
+ NL80211_RRF_AUTO_BW | 0),
+ REG_RULE_EXT(5250, 5330, 80, 0, 18, 0,
+ NL80211_RRF_DFS |
+ NL80211_RRF_AUTO_BW | 0),
+ },
+ .n_reg_rules = 3
+};
+
+static const struct ieee80211_regdomain regdom_BA = {
+ .alpha2 = "BA",
+ .dfs_region = NL80211_DFS_ETSI,
+ .reg_rules = {
+ REG_RULE_EXT(2402, 2482, 40, 0, 20, 0, 0),
+ REG_RULE_EXT(5170, 5250, 80, 0, 20, 0,
+ NL80211_RRF_AUTO_BW | 0),
+ REG_RULE_EXT(5250, 5330, 80, 0, 20, 0,
+ NL80211_RRF_DFS |
+ NL80211_RRF_AUTO_BW | 0),
+ REG_RULE_EXT(5490, 5710, 160, 0, 27, 0,
+ NL80211_RRF_DFS | 0),
+ REG_RULE_EXT(57000, 66000, 2160, 0, 40, 0, 0),
+ },
+ .n_reg_rules = 5
+};
+
+static const struct ieee80211_regdomain regdom_BB = {
+ .alpha2 = "BB",
+ .dfs_region = NL80211_DFS_FCC,
+ .reg_rules = {
+ REG_RULE_EXT(2402, 2482, 40, 0, 20, 0, 0),
+ REG_RULE_EXT(5170, 5250, 80, 0, 23, 0,
+ NL80211_RRF_AUTO_BW | 0),
+ REG_RULE_EXT(5250, 5330, 80, 0, 23, 0,
+ NL80211_RRF_DFS |
+ NL80211_RRF_AUTO_BW | 0),
+ REG_RULE_EXT(5735, 5835, 80, 0, 30, 0, 0),
+ },
+ .n_reg_rules = 4
+};
+
+static const struct ieee80211_regdomain regdom_BD = {
+ .alpha2 = "BD",
+ .dfs_region = NL80211_DFS_JP,
+ .reg_rules = {
+ REG_RULE_EXT(2402, 2482, 40, 0, 20, 0, 0),
+ REG_RULE_EXT(5735, 5835, 80, 0, 30, 0, 0),
+ },
+ .n_reg_rules = 2
+};
+
+static const struct ieee80211_regdomain regdom_BE = {
+ .alpha2 = "BE",
+ .dfs_region = NL80211_DFS_ETSI,
+ .reg_rules = {
+ REG_RULE_EXT(2402, 2482, 40, 0, 20, 0, 0),
+ REG_RULE_EXT(5170, 5250, 80, 0, 20, 0,
+ NL80211_RRF_AUTO_BW | 0),
+ REG_RULE_EXT(5250, 5330, 80, 0, 20, 0,
+ NL80211_RRF_DFS |
+ NL80211_RRF_AUTO_BW | 0),
+ REG_RULE_EXT(5490, 5710, 160, 0, 27, 0,
+ NL80211_RRF_DFS | 0),
+ REG_RULE_EXT(57000, 66000, 2160, 0, 40, 0, 0),
+ },
+ .n_reg_rules = 5
+};
+
+static const struct ieee80211_regdomain regdom_BF = {
+ .alpha2 = "BF",
+ .dfs_region = NL80211_DFS_FCC,
+ .reg_rules = {
+ REG_RULE_EXT(2402, 2482, 40, 0, 20, 0, 0),
+ REG_RULE_EXT(5170, 5250, 80, 0, 17, 0,
+ NL80211_RRF_AUTO_BW | 0),
+ REG_RULE_EXT(5250, 5330, 80, 0, 24, 0,
+ NL80211_RRF_DFS |
+ NL80211_RRF_AUTO_BW | 0),
+ REG_RULE_EXT(5490, 5730, 160, 0, 24, 0,
+ NL80211_RRF_DFS | 0),
+ REG_RULE_EXT(5735, 5835, 80, 0, 30, 0, 0),
+ },
+ .n_reg_rules = 5
+};
+
+static const struct ieee80211_regdomain regdom_BG = {
+ .alpha2 = "BG",
+ .dfs_region = NL80211_DFS_ETSI,
+ .reg_rules = {
+ REG_RULE_EXT(2402, 2482, 40, 0, 20, 0, 0),
+ REG_RULE_EXT(5170, 5250, 80, 0, 20, 0,
+ NL80211_RRF_AUTO_BW | 0),
+ REG_RULE_EXT(5250, 5330, 80, 0, 20, 0,
+ NL80211_RRF_DFS |
+ NL80211_RRF_AUTO_BW | 0),
+ REG_RULE_EXT(5490, 5710, 160, 0, 27, 0,
+ NL80211_RRF_DFS | 0),
+ REG_RULE_EXT(57000, 66000, 2160, 0, 40, 0, 0),
+ },
+ .n_reg_rules = 5
+};
+
+static const struct ieee80211_regdomain regdom_BH = {
+ .alpha2 = "BH",
+ .dfs_region = NL80211_DFS_JP,
+ .reg_rules = {
+ REG_RULE_EXT(2402, 2482, 40, 0, 20, 0, 0),
+ REG_RULE_EXT(5170, 5250, 80, 0, 20, 0, 0),
+ REG_RULE_EXT(5250, 5330, 80, 0, 20, 0,
+ NL80211_RRF_DFS | 0),
+ REG_RULE_EXT(5735, 5835, 80, 0, 20, 0, 0),
+ },
+ .n_reg_rules = 4
+};
+
+static const struct ieee80211_regdomain regdom_BL = {
+ .alpha2 = "BL",
+ .dfs_region = NL80211_DFS_ETSI,
+ .reg_rules = {
+ REG_RULE_EXT(2402, 2482, 40, 0, 20, 0, 0),
+ REG_RULE_EXT(5170, 5250, 80, 0, 20, 0,
+ NL80211_RRF_AUTO_BW | 0),
+ REG_RULE_EXT(5250, 5330, 80, 0, 20, 0,
+ NL80211_RRF_DFS |
+ NL80211_RRF_AUTO_BW | 0),
+ REG_RULE_EXT(5490, 5710, 160, 0, 27, 0,
+ NL80211_RRF_DFS | 0),
+ },
+ .n_reg_rules = 4
+};
+
+static const struct ieee80211_regdomain regdom_BM = {
+ .alpha2 = "BM",
+ .dfs_region = NL80211_DFS_FCC,
+ .reg_rules = {
+ REG_RULE_EXT(2402, 2472, 40, 0, 30, 0, 0),
+ REG_RULE_EXT(5170, 5250, 80, 0, 24, 0,
+ NL80211_RRF_AUTO_BW | 0),
+ REG_RULE_EXT(5250, 5330, 80, 0, 24, 0,
+ NL80211_RRF_DFS |
+ NL80211_RRF_AUTO_BW | 0),
+ REG_RULE_EXT(5490, 5730, 160, 0, 24, 0,
+ NL80211_RRF_DFS | 0),
+ REG_RULE_EXT(5735, 5835, 80, 0, 30, 0, 0),
+ },
+ .n_reg_rules = 5
+};
+
+static const struct ieee80211_regdomain regdom_BN = {
+ .alpha2 = "BN",
+ .dfs_region = NL80211_DFS_JP,
+ .reg_rules = {
+ REG_RULE_EXT(2402, 2482, 40, 0, 20, 0, 0),
+ REG_RULE_EXT(5170, 5250, 80, 0, 20, 0,
+ NL80211_RRF_AUTO_BW | 0),
+ REG_RULE_EXT(5250, 5330, 80, 0, 20, 0,
+ NL80211_RRF_DFS |
+ NL80211_RRF_AUTO_BW | 0),
+ REG_RULE_EXT(5735, 5835, 80, 0, 20, 0, 0),
+ },
+ .n_reg_rules = 4
+};
+
+static const struct ieee80211_regdomain regdom_BO = {
+ .alpha2 = "BO",
+ .dfs_region = NL80211_DFS_JP,
+ .reg_rules = {
+ REG_RULE_EXT(2402, 2482, 40, 0, 20, 0, 0),
+ REG_RULE_EXT(5250, 5330, 80, 0, 30, 0,
+ NL80211_RRF_DFS | 0),
+ REG_RULE_EXT(5735, 5835, 80, 0, 30, 0, 0),
+ },
+ .n_reg_rules = 3
+};
+
+static const struct ieee80211_regdomain regdom_BR = {
+ .alpha2 = "BR",
+ .dfs_region = NL80211_DFS_FCC,
+ .reg_rules = {
+ REG_RULE_EXT(2402, 2482, 40, 0, 20, 0, 0),
+ REG_RULE_EXT(5170, 5250, 80, 0, 17, 0,
+ NL80211_RRF_AUTO_BW | 0),
+ REG_RULE_EXT(5250, 5330, 80, 0, 24, 0,
+ NL80211_RRF_DFS |
+ NL80211_RRF_AUTO_BW | 0),
+ REG_RULE_EXT(5490, 5730, 160, 0, 24, 0,
+ NL80211_RRF_DFS | 0),
+ REG_RULE_EXT(5735, 5835, 80, 0, 30, 0, 0),
+ },
+ .n_reg_rules = 5
+};
+
+static const struct ieee80211_regdomain regdom_BS = {
+ .alpha2 = "BS",
+ .dfs_region = NL80211_DFS_FCC,
+ .reg_rules = {
+ REG_RULE_EXT(2402, 2482, 40, 0, 20, 0, 0),
+ REG_RULE_EXT(5170, 5250, 80, 0, 24, 0,
+ NL80211_RRF_AUTO_BW | 0),
+ REG_RULE_EXT(5250, 5330, 80, 0, 24, 0,
+ NL80211_RRF_DFS |
+ NL80211_RRF_AUTO_BW | 0),
+ REG_RULE_EXT(5490, 5730, 160, 0, 24, 0,
+ NL80211_RRF_DFS | 0),
+ REG_RULE_EXT(5735, 5835, 80, 0, 30, 0, 0),
+ },
+ .n_reg_rules = 5
+};
+
+static const struct ieee80211_regdomain regdom_BT = {
+ .alpha2 = "BT",
+ .dfs_region = NL80211_DFS_ETSI,
+ .reg_rules = {
+ REG_RULE_EXT(2402, 2482, 40, 0, 20, 0, 0),
+ REG_RULE_EXT(5170, 5250, 80, 0, 20, 0,
+ NL80211_RRF_AUTO_BW | 0),
+ REG_RULE_EXT(5250, 5330, 80, 0, 20, 0,
+ NL80211_RRF_DFS |
+ NL80211_RRF_AUTO_BW | 0),
+ REG_RULE_EXT(5490, 5710, 160, 0, 27, 0,
+ NL80211_RRF_DFS | 0),
+ },
+ .n_reg_rules = 4
+};
+
+static const struct ieee80211_regdomain regdom_BY = {
+ .alpha2 = "BY",
+ .dfs_region = NL80211_DFS_ETSI,
+ .reg_rules = {
+ REG_RULE_EXT(2402, 2482, 40, 0, 20, 0, 0),
+ REG_RULE_EXT(5170, 5250, 80, 0, 20, 0,
+ NL80211_RRF_AUTO_BW | 0),
+ REG_RULE_EXT(5250, 5330, 80, 0, 20, 0,
+ NL80211_RRF_DFS |
+ NL80211_RRF_AUTO_BW | 0),
+ REG_RULE_EXT(5490, 5710, 160, 0, 27, 0,
+ NL80211_RRF_DFS | 0),
+ },
+ .n_reg_rules = 4
+};
+
+static const struct ieee80211_regdomain regdom_BZ = {
+ .alpha2 = "BZ",
+ .dfs_region = NL80211_DFS_JP,
+ .reg_rules = {
+ REG_RULE_EXT(2402, 2482, 40, 0, 30, 0, 0),
+ REG_RULE_EXT(5735, 5835, 80, 0, 30, 0, 0),
+ },
+ .n_reg_rules = 2
+};
+
+static const struct ieee80211_regdomain regdom_CA = {
+ .alpha2 = "CA",
+ .dfs_region = NL80211_DFS_FCC,
+ .reg_rules = {
+ REG_RULE_EXT(2402, 2472, 40, 0, 30, 0, 0),
+ REG_RULE_EXT(5170, 5250, 80, 0, 17, 0,
+ NL80211_RRF_AUTO_BW | 0),
+ REG_RULE_EXT(5250, 5330, 80, 0, 24, 0,
+ NL80211_RRF_DFS |
+ NL80211_RRF_AUTO_BW | 0),
+ REG_RULE_EXT(5490, 5730, 160, 0, 24, 0,
+ NL80211_RRF_DFS | 0),
+ REG_RULE_EXT(5735, 5835, 80, 0, 30, 0, 0),
+ },
+ .n_reg_rules = 5
+};
+
+static const struct ieee80211_regdomain regdom_CF = {
+ .alpha2 = "CF",
+ .dfs_region = NL80211_DFS_FCC,
+ .reg_rules = {
+ REG_RULE_EXT(2402, 2482, 40, 0, 20, 0, 0),
+ REG_RULE_EXT(5170, 5250, 40, 0, 17, 0, 0),
+ REG_RULE_EXT(5250, 5330, 40, 0, 24, 0,
+ NL80211_RRF_DFS | 0),
+ REG_RULE_EXT(5490, 5730, 40, 0, 24, 0,
+ NL80211_RRF_DFS | 0),
+ REG_RULE_EXT(5735, 5835, 40, 0, 30, 0, 0),
+ },
+ .n_reg_rules = 5
+};
+
+static const struct ieee80211_regdomain regdom_CH = {
+ .alpha2 = "CH",
+ .dfs_region = NL80211_DFS_ETSI,
+ .reg_rules = {
+ REG_RULE_EXT(2402, 2482, 40, 0, 20, 0, 0),
+ REG_RULE_EXT(5170, 5250, 80, 0, 20, 0,
+ NL80211_RRF_AUTO_BW | 0),
+ REG_RULE_EXT(5250, 5330, 80, 0, 20, 0,
+ NL80211_RRF_DFS |
+ NL80211_RRF_AUTO_BW | 0),
+ REG_RULE_EXT(5490, 5710, 160, 0, 27, 0,
+ NL80211_RRF_DFS | 0),
+ REG_RULE_EXT(57000, 66000, 2160, 0, 40, 0, 0),
+ },
+ .n_reg_rules = 5
+};
+
+static const struct ieee80211_regdomain regdom_CI = {
+ .alpha2 = "CI",
+ .dfs_region = NL80211_DFS_FCC,
+ .reg_rules = {
+ REG_RULE_EXT(2402, 2482, 40, 0, 20, 0, 0),
+ REG_RULE_EXT(5170, 5250, 80, 0, 17, 0,
+ NL80211_RRF_AUTO_BW | 0),
+ REG_RULE_EXT(5250, 5330, 80, 0, 24, 0,
+ NL80211_RRF_DFS |
+ NL80211_RRF_AUTO_BW | 0),
+ REG_RULE_EXT(5490, 5730, 160, 0, 24, 0,
+ NL80211_RRF_DFS | 0),
+ REG_RULE_EXT(5735, 5835, 80, 0, 30, 0, 0),
+ },
+ .n_reg_rules = 5
+};
+
+static const struct ieee80211_regdomain regdom_CL = {
+ .alpha2 = "CL",
+ .dfs_region = NL80211_DFS_JP,
+ .reg_rules = {
+ REG_RULE_EXT(2402, 2482, 40, 0, 20, 0, 0),
+ REG_RULE_EXT(5170, 5250, 80, 0, 20, 0,
+ NL80211_RRF_AUTO_BW | 0),
+ REG_RULE_EXT(5250, 5330, 80, 0, 20, 0,
+ NL80211_RRF_DFS |
+ NL80211_RRF_AUTO_BW | 0),
+ REG_RULE_EXT(5735, 5835, 80, 0, 20, 0, 0),
+ },
+ .n_reg_rules = 4
+};
+
+static const struct ieee80211_regdomain regdom_CN = {
+ .alpha2 = "CN",
+ .dfs_region = NL80211_DFS_FCC,
+ .reg_rules = {
+ REG_RULE_EXT(2402, 2482, 40, 0, 20, 0, 0),
+ REG_RULE_EXT(5170, 5250, 80, 0, 23, 0,
+ NL80211_RRF_AUTO_BW | 0),
+ REG_RULE_EXT(5250, 5330, 80, 0, 23, 0,
+ NL80211_RRF_DFS |
+ NL80211_RRF_AUTO_BW | 0),
+ REG_RULE_EXT(5735, 5835, 80, 0, 30, 0, 0),
+ REG_RULE_EXT(57240, 59400, 2160, 0, 28, 0, 0),
+ REG_RULE_EXT(59400, 63720, 2160, 0, 44, 0, 0),
+ REG_RULE_EXT(63720, 65880, 2160, 0, 28, 0, 0),
+ },
+ .n_reg_rules = 7
+};
+
+static const struct ieee80211_regdomain regdom_CO = {
+ .alpha2 = "CO",
+ .dfs_region = NL80211_DFS_FCC,
+ .reg_rules = {
+ REG_RULE_EXT(2402, 2482, 40, 0, 20, 0, 0),
+ REG_RULE_EXT(5170, 5250, 80, 0, 17, 0,
+ NL80211_RRF_AUTO_BW | 0),
+ REG_RULE_EXT(5250, 5330, 80, 0, 24, 0,
+ NL80211_RRF_DFS |
+ NL80211_RRF_AUTO_BW | 0),
+ REG_RULE_EXT(5490, 5730, 160, 0, 24, 0,
+ NL80211_RRF_DFS | 0),
+ REG_RULE_EXT(5735, 5835, 80, 0, 30, 0, 0),
+ },
+ .n_reg_rules = 5
+};
+
+static const struct ieee80211_regdomain regdom_CR = {
+ .alpha2 = "CR",
+ .dfs_region = NL80211_DFS_FCC,
+ .reg_rules = {
+ REG_RULE_EXT(2402, 2482, 40, 0, 20, 0, 0),
+ REG_RULE_EXT(5170, 5250, 80, 0, 17, 0, 0),
+ REG_RULE_EXT(5250, 5330, 80, 0, 24, 0,
+ NL80211_RRF_DFS | 0),
+ REG_RULE_EXT(5490, 5730, 80, 0, 24, 0,
+ NL80211_RRF_DFS | 0),
+ REG_RULE_EXT(5735, 5835, 80, 0, 30, 0, 0),
+ },
+ .n_reg_rules = 5
+};
+
+static const struct ieee80211_regdomain regdom_CX = {
+ .alpha2 = "CX",
+ .dfs_region = NL80211_DFS_FCC,
+ .reg_rules = {
+ REG_RULE_EXT(2402, 2482, 40, 0, 20, 0, 0),
+ REG_RULE_EXT(5170, 5250, 80, 0, 24, 0,
+ NL80211_RRF_AUTO_BW | 0),
+ REG_RULE_EXT(5250, 5330, 80, 0, 24, 0,
+ NL80211_RRF_DFS |
+ NL80211_RRF_AUTO_BW | 0),
+ REG_RULE_EXT(5490, 5730, 160, 0, 24, 0,
+ NL80211_RRF_DFS | 0),
+ REG_RULE_EXT(5735, 5835, 80, 0, 30, 0, 0),
+ },
+ .n_reg_rules = 5
+};
+
+static const struct ieee80211_regdomain regdom_CY = {
+ .alpha2 = "CY",
+ .dfs_region = NL80211_DFS_ETSI,
+ .reg_rules = {
+ REG_RULE_EXT(2402, 2482, 40, 0, 20, 0, 0),
+ REG_RULE_EXT(5170, 5250, 80, 0, 20, 0,
+ NL80211_RRF_AUTO_BW | 0),
+ REG_RULE_EXT(5250, 5330, 80, 0, 20, 0,
+ NL80211_RRF_DFS |
+ NL80211_RRF_AUTO_BW | 0),
+ REG_RULE_EXT(5490, 5710, 160, 0, 27, 0,
+ NL80211_RRF_DFS | 0),
+ REG_RULE_EXT(57000, 66000, 2160, 0, 40, 0, 0),
+ },
+ .n_reg_rules = 5
+};
+
+static const struct ieee80211_regdomain regdom_CZ = {
+ .alpha2 = "CZ",
+ .dfs_region = NL80211_DFS_ETSI,
+ .reg_rules = {
+ REG_RULE_EXT(2400, 2483, 40, 0, 20, 0, 0),
+ REG_RULE_EXT(5150, 5250, 80, 0, 23, 0,
+ NL80211_RRF_NO_OUTDOOR |
+ NL80211_RRF_AUTO_BW | 0),
+ REG_RULE_EXT(5250, 5350, 80, 0, 20, 0,
+ NL80211_RRF_NO_OUTDOOR |
+ NL80211_RRF_DFS |
+ NL80211_RRF_AUTO_BW | 0),
+ REG_RULE_EXT(5470, 5725, 160, 0, 27, 0,
+ NL80211_RRF_DFS | 0),
+ REG_RULE_EXT(57000, 66000, 2160, 0, 40, 0, 0),
+ },
+ .n_reg_rules = 5
+};
+
+static const struct ieee80211_regdomain regdom_DE = {
+ .alpha2 = "DE",
+ .dfs_region = NL80211_DFS_ETSI,
+ .reg_rules = {
+ REG_RULE_EXT(2400, 2483, 40, 0, 20, 0, 0),
+ REG_RULE_EXT(5150, 5250, 80, 0, 20, 0,
+ NL80211_RRF_NO_OUTDOOR |
+ NL80211_RRF_AUTO_BW | 0),
+ REG_RULE_EXT(5250, 5350, 80, 0, 20, 0,
+ NL80211_RRF_NO_OUTDOOR |
+ NL80211_RRF_DFS |
+ NL80211_RRF_AUTO_BW | 0),
+ REG_RULE_EXT(5470, 5695, 160, 0, 27, 0,
+ NL80211_RRF_DFS | 0),
+ /*REG_RULE_EXT(5470, 5725, 160, 0, 27, 0,
+ NL80211_RRF_DFS | 0),*/
+ REG_RULE_EXT(57000, 66000, 2160, 0, 40, 0, 0),
+ },
+ .n_reg_rules = 5
+};
+
+static const struct ieee80211_regdomain regdom_DK = {
+ .alpha2 = "DK",
+ .dfs_region = NL80211_DFS_ETSI,
+ .reg_rules = {
+ REG_RULE_EXT(2402, 2482, 40, 0, 20, 0, 0),
+ REG_RULE_EXT(5170, 5250, 80, 0, 20, 0,
+ NL80211_RRF_AUTO_BW | 0),
+ REG_RULE_EXT(5250, 5330, 80, 0, 20, 0,
+ NL80211_RRF_DFS |
+ NL80211_RRF_AUTO_BW | 0),
+ REG_RULE_EXT(5490, 5710, 160, 0, 27, 0,
+ NL80211_RRF_DFS | 0),
+ REG_RULE_EXT(57000, 66000, 2160, 0, 40, 0, 0),
+ },
+ .n_reg_rules = 5
+};
+
+static const struct ieee80211_regdomain regdom_DM = {
+ .alpha2 = "DM",
+ .dfs_region = NL80211_DFS_FCC,
+ .reg_rules = {
+ REG_RULE_EXT(2402, 2472, 40, 0, 30, 0, 0),
+ REG_RULE_EXT(5170, 5250, 80, 0, 17, 0,
+ NL80211_RRF_AUTO_BW | 0),
+ REG_RULE_EXT(5250, 5330, 80, 0, 23, 0,
+ NL80211_RRF_DFS |
+ NL80211_RRF_AUTO_BW | 0),
+ REG_RULE_EXT(5735, 5835, 80, 0, 30, 0, 0),
+ },
+ .n_reg_rules = 4
+};
+
+static const struct ieee80211_regdomain regdom_DO = {
+ .alpha2 = "DO",
+ .dfs_region = NL80211_DFS_FCC,
+ .reg_rules = {
+ REG_RULE_EXT(2402, 2472, 40, 0, 30, 0, 0),
+ REG_RULE_EXT(5170, 5250, 80, 0, 17, 0,
+ NL80211_RRF_AUTO_BW | 0),
+ REG_RULE_EXT(5250, 5330, 80, 0, 23, 0,
+ NL80211_RRF_DFS |
+ NL80211_RRF_AUTO_BW | 0),
+ REG_RULE_EXT(5735, 5835, 80, 0, 30, 0, 0),
+ },
+ .n_reg_rules = 4
+};
+
+static const struct ieee80211_regdomain regdom_DZ = {
+ .alpha2 = "DZ",
+ .dfs_region = NL80211_DFS_JP,
+ .reg_rules = {
+ REG_RULE_EXT(2402, 2482, 40, 0, 20, 0, 0),
+ REG_RULE_EXT(5170, 5250, 80, 0, 23, 0,
+ NL80211_RRF_AUTO_BW | 0),
+ REG_RULE_EXT(5250, 5330, 80, 0, 23, 0,
+ NL80211_RRF_DFS |
+ NL80211_RRF_AUTO_BW | 0),
+ REG_RULE_EXT(5490, 5670, 160, 0, 23, 0,
+ NL80211_RRF_DFS | 0),
+ },
+ .n_reg_rules = 4
+};
+
+static const struct ieee80211_regdomain regdom_EC = {
+ .alpha2 = "EC",
+ .dfs_region = NL80211_DFS_FCC,
+ .reg_rules = {
+ REG_RULE_EXT(2402, 2482, 40, 0, 20, 0, 0),
+ REG_RULE_EXT(5170, 5250, 80, 0, 17, 0, 0),
+ REG_RULE_EXT(5250, 5330, 80, 0, 24, 0,
+ NL80211_RRF_DFS | 0),
+ REG_RULE_EXT(5490, 5730, 80, 0, 24, 0,
+ NL80211_RRF_DFS | 0),
+ REG_RULE_EXT(5735, 5835, 80, 0, 30, 0, 0),
+ },
+ .n_reg_rules = 5
+};
+
+static const struct ieee80211_regdomain regdom_EE = {
+ .alpha2 = "EE",
+ .dfs_region = NL80211_DFS_ETSI,
+ .reg_rules = {
+ REG_RULE_EXT(2402, 2482, 40, 0, 20, 0, 0),
+ REG_RULE_EXT(5170, 5250, 80, 0, 20, 0,
+ NL80211_RRF_AUTO_BW | 0),
+ REG_RULE_EXT(5250, 5330, 80, 0, 20, 0,
+ NL80211_RRF_DFS |
+ NL80211_RRF_AUTO_BW | 0),
+ REG_RULE_EXT(5490, 5710, 160, 0, 27, 0,
+ NL80211_RRF_DFS | 0),
+ REG_RULE_EXT(57000, 66000, 2160, 0, 40, 0, 0),
+ },
+ .n_reg_rules = 5
+};
+
+static const struct ieee80211_regdomain regdom_EG = {
+ .alpha2 = "EG",
+ .dfs_region = NL80211_DFS_ETSI,
+ .reg_rules = {
+ REG_RULE_EXT(2402, 2482, 40, 0, 20, 0, 0),
+ REG_RULE_EXT(5170, 5250, 80, 0, 20, 0, 0),
+ REG_RULE_EXT(5250, 5330, 80, 0, 20, 0,
+ NL80211_RRF_DFS | 0),
+ },
+ .n_reg_rules = 3
+};
+
+static const struct ieee80211_regdomain regdom_ES = {
+ .alpha2 = "ES",
+ .dfs_region = NL80211_DFS_ETSI,
+ .reg_rules = {
+ REG_RULE_EXT(2400, 2483, 40, 0, 20, 0, 0),
+ REG_RULE_EXT(5150, 5250, 80, 0, 23, 0,
+ NL80211_RRF_NO_OUTDOOR |
+ NL80211_RRF_AUTO_BW | 0),
+ REG_RULE_EXT(5250, 5350, 80, 0, 20, 0,
+ NL80211_RRF_NO_OUTDOOR |
+ NL80211_RRF_DFS |
+ NL80211_RRF_AUTO_BW | 0),
+ REG_RULE_EXT(5470, 5725, 160, 0, 27, 0,
+ NL80211_RRF_DFS | 0),
+ REG_RULE_EXT(57000, 66000, 2160, 0, 40, 0, 0),
+ },
+ .n_reg_rules = 5
+};
+
+static const struct ieee80211_regdomain regdom_ET = {
+ .alpha2 = "ET",
+ .dfs_region = NL80211_DFS_ETSI,
+ .reg_rules = {
+ REG_RULE_EXT(2402, 2482, 40, 0, 20, 0, 0),
+ REG_RULE_EXT(5170, 5250, 80, 0, 20, 0,
+ NL80211_RRF_AUTO_BW | 0),
+ REG_RULE_EXT(5250, 5330, 80, 0, 20, 0,
+ NL80211_RRF_DFS |
+ NL80211_RRF_AUTO_BW | 0),
+ REG_RULE_EXT(5490, 5710, 160, 0, 27, 0,
+ NL80211_RRF_DFS | 0),
+ },
+ .n_reg_rules = 4
+};
+
+static const struct ieee80211_regdomain regdom_FI = {
+ .alpha2 = "FI",
+ .dfs_region = NL80211_DFS_ETSI,
+ .reg_rules = {
+ REG_RULE_EXT(2402, 2482, 40, 0, 20, 0, 0),
+ REG_RULE_EXT(5170, 5250, 80, 0, 20, 0,
+ NL80211_RRF_AUTO_BW | 0),
+ REG_RULE_EXT(5250, 5330, 80, 0, 20, 0,
+ NL80211_RRF_DFS |
+ NL80211_RRF_AUTO_BW | 0),
+ REG_RULE_EXT(5490, 5710, 160, 0, 27, 0,
+ NL80211_RRF_DFS | 0),
+ REG_RULE_EXT(57000, 66000, 2160, 0, 40, 0, 0),
+ },
+ .n_reg_rules = 5
+};
+
+static const struct ieee80211_regdomain regdom_FM = {
+ .alpha2 = "FM",
+ .dfs_region = NL80211_DFS_FCC,
+ .reg_rules = {
+ REG_RULE_EXT(2402, 2472, 40, 0, 30, 0, 0),
+ REG_RULE_EXT(5170, 5250, 80, 0, 24, 0,
+ NL80211_RRF_AUTO_BW | 0),
+ REG_RULE_EXT(5250, 5330, 80, 0, 24, 0,
+ NL80211_RRF_DFS |
+ NL80211_RRF_AUTO_BW | 0),
+ REG_RULE_EXT(5490, 5730, 160, 0, 24, 0,
+ NL80211_RRF_DFS | 0),
+ REG_RULE_EXT(5735, 5835, 80, 0, 30, 0, 0),
+ },
+ .n_reg_rules = 5
+};
+
+static const struct ieee80211_regdomain regdom_FR = {
+ .alpha2 = "FR",
+ .dfs_region = NL80211_DFS_ETSI,
+ .reg_rules = {
+ REG_RULE_EXT(2402, 2482, 40, 0, 20, 0, 0),
+ REG_RULE_EXT(5170, 5250, 80, 0, 20, 0,
+ NL80211_RRF_AUTO_BW | 0),
+ REG_RULE_EXT(5250, 5330, 80, 0, 20, 0,
+ NL80211_RRF_DFS |
+ NL80211_RRF_AUTO_BW | 0),
+ REG_RULE_EXT(5490, 5695, 160, 0, 27, 0,
+ NL80211_RRF_DFS | 0),
+ REG_RULE_EXT(57000, 66000, 2160, 0, 40, 0, 0),
+ },
+ .n_reg_rules = 5
+};
+
+static const struct ieee80211_regdomain regdom_GB = {
+ .alpha2 = "GB",
+ .dfs_region = NL80211_DFS_ETSI,
+ .reg_rules = {
+ REG_RULE_EXT(2402, 2482, 40, 0, 20, 0, 0),
+ REG_RULE_EXT(5170, 5250, 80, 0, 20, 0,
+ NL80211_RRF_AUTO_BW | 0),
+ REG_RULE_EXT(5250, 5330, 80, 0, 20, 0,
+ NL80211_RRF_DFS |
+ NL80211_RRF_AUTO_BW | 0),
+ REG_RULE_EXT(5490, 5710, 160, 0, 27, 0,
+ NL80211_RRF_DFS | 0),
+ REG_RULE_EXT(57000, 66000, 2160, 0, 40, 0, 0),
+ },
+ .n_reg_rules = 5
+};
+
+static const struct ieee80211_regdomain regdom_GD = {
+ .alpha2 = "GD",
+ .dfs_region = NL80211_DFS_FCC,
+ .reg_rules = {
+ REG_RULE_EXT(2402, 2472, 40, 0, 30, 0, 0),
+ REG_RULE_EXT(5170, 5250, 80, 0, 17, 0,
+ NL80211_RRF_AUTO_BW | 0),
+ REG_RULE_EXT(5250, 5330, 80, 0, 24, 0,
+ NL80211_RRF_DFS |
+ NL80211_RRF_AUTO_BW | 0),
+ REG_RULE_EXT(5490, 5730, 160, 0, 24, 0,
+ NL80211_RRF_DFS | 0),
+ REG_RULE_EXT(5735, 5835, 80, 0, 30, 0, 0),
+ },
+ .n_reg_rules = 5
+};
+
+static const struct ieee80211_regdomain regdom_GE = {
+ .alpha2 = "GE",
+ .dfs_region = NL80211_DFS_ETSI,
+ .reg_rules = {
+ REG_RULE_EXT(2402, 2482, 40, 0, 20, 0, 0),
+ REG_RULE_EXT(5170, 5250, 80, 0, 18, 0,
+ NL80211_RRF_AUTO_BW | 0),
+ REG_RULE_EXT(5250, 5330, 80, 0, 18, 0,
+ NL80211_RRF_DFS |
+ NL80211_RRF_AUTO_BW | 0),
+ REG_RULE_EXT(57000, 66000, 2160, 0, 40, 0, 0),
+ },
+ .n_reg_rules = 4
+};
+
+static const struct ieee80211_regdomain regdom_GF = {
+ .alpha2 = "GF",
+ .dfs_region = NL80211_DFS_ETSI,
+ .reg_rules = {
+ REG_RULE_EXT(2402, 2482, 40, 0, 20, 0, 0),
+ REG_RULE_EXT(5170, 5250, 80, 0, 20, 0,
+ NL80211_RRF_AUTO_BW | 0),
+ REG_RULE_EXT(5250, 5330, 80, 0, 20, 0,
+ NL80211_RRF_DFS |
+ NL80211_RRF_AUTO_BW | 0),
+ REG_RULE_EXT(5490, 5710, 160, 0, 27, 0,
+ NL80211_RRF_DFS | 0),
+ },
+ .n_reg_rules = 4
+};
+
+static const struct ieee80211_regdomain regdom_GH = {
+ .alpha2 = "GH",
+ .dfs_region = NL80211_DFS_FCC,
+ .reg_rules = {
+ REG_RULE_EXT(2402, 2482, 40, 0, 20, 0, 0),
+ REG_RULE_EXT(5170, 5250, 80, 0, 17, 0,
+ NL80211_RRF_AUTO_BW | 0),
+ REG_RULE_EXT(5250, 5330, 80, 0, 24, 0,
+ NL80211_RRF_DFS |
+ NL80211_RRF_AUTO_BW | 0),
+ REG_RULE_EXT(5490, 5730, 160, 0, 24, 0,
+ NL80211_RRF_DFS | 0),
+ REG_RULE_EXT(5735, 5835, 80, 0, 30, 0, 0),
+ },
+ .n_reg_rules = 5
+};
+
+static const struct ieee80211_regdomain regdom_GL = {
+ .alpha2 = "GL",
+ .dfs_region = NL80211_DFS_ETSI,
+ .reg_rules = {
+ REG_RULE_EXT(2402, 2482, 40, 0, 20, 0, 0),
+ REG_RULE_EXT(5170, 5250, 80, 0, 20, 0, 0),
+ REG_RULE_EXT(5250, 5330, 80, 0, 20, 0,
+ NL80211_RRF_DFS | 0),
+ REG_RULE_EXT(5490, 5710, 80, 0, 27, 0,
+ NL80211_RRF_DFS | 0),
+ },
+ .n_reg_rules = 4
+};
+
+static const struct ieee80211_regdomain regdom_GP = {
+ .alpha2 = "GP",
+ .dfs_region = NL80211_DFS_ETSI,
+ .reg_rules = {
+ REG_RULE_EXT(2402, 2482, 40, 0, 20, 0, 0),
+ REG_RULE_EXT(5170, 5250, 80, 0, 20, 0,
+ NL80211_RRF_AUTO_BW | 0),
+ REG_RULE_EXT(5250, 5330, 80, 0, 20, 0,
+ NL80211_RRF_DFS |
+ NL80211_RRF_AUTO_BW | 0),
+ REG_RULE_EXT(5490, 5710, 160, 0, 27, 0,
+ NL80211_RRF_DFS | 0),
+ },
+ .n_reg_rules = 4
+};
+
+static const struct ieee80211_regdomain regdom_GR = {
+ .alpha2 = "GR",
+ .dfs_region = NL80211_DFS_ETSI,
+ .reg_rules = {
+ REG_RULE_EXT(2402, 2482, 40, 0, 20, 0, 0),
+ REG_RULE_EXT(5170, 5250, 80, 0, 20, 0,
+ NL80211_RRF_AUTO_BW | 0),
+ REG_RULE_EXT(5250, 5330, 80, 0, 20, 0,
+ NL80211_RRF_DFS |
+ NL80211_RRF_AUTO_BW | 0),
+ REG_RULE_EXT(5490, 5710, 160, 0, 27, 0,
+ NL80211_RRF_DFS | 0),
+ REG_RULE_EXT(57000, 66000, 2160, 0, 40, 0, 0),
+ },
+ .n_reg_rules = 5
+};
+
+static const struct ieee80211_regdomain regdom_GT = {
+ .alpha2 = "GT",
+ .dfs_region = NL80211_DFS_FCC,
+ .reg_rules = {
+ REG_RULE_EXT(2402, 2472, 40, 0, 30, 0, 0),
+ REG_RULE_EXT(5170, 5250, 80, 0, 17, 0,
+ NL80211_RRF_AUTO_BW | 0),
+ REG_RULE_EXT(5250, 5330, 80, 0, 23, 0,
+ NL80211_RRF_DFS |
+ NL80211_RRF_AUTO_BW | 0),
+ REG_RULE_EXT(5735, 5835, 80, 0, 30, 0, 0),
+ },
+ .n_reg_rules = 4
+};
+
+static const struct ieee80211_regdomain regdom_GU = {
+ .alpha2 = "GU",
+ .dfs_region = NL80211_DFS_FCC,
+ .reg_rules = {
+ REG_RULE_EXT(2402, 2472, 40, 0, 30, 0, 0),
+ REG_RULE_EXT(5170, 5250, 80, 0, 17, 0, 0),
+ REG_RULE_EXT(5250, 5330, 80, 0, 24, 0,
+ NL80211_RRF_DFS | 0),
+ REG_RULE_EXT(5490, 5730, 80, 0, 24, 0,
+ NL80211_RRF_DFS | 0),
+ REG_RULE_EXT(5735, 5835, 80, 0, 30, 0, 0),
+ },
+ .n_reg_rules = 5
+};
+
+static const struct ieee80211_regdomain regdom_GY = {
+ .alpha2 = "GY",
+ .reg_rules = {
+ REG_RULE_EXT(2402, 2482, 40, 0, 30, 0, 0),
+ REG_RULE_EXT(5735, 5835, 80, 0, 30, 0, 0),
+ },
+ .n_reg_rules = 2
+};
+
+static const struct ieee80211_regdomain regdom_HK = {
+ .alpha2 = "HK",
+ .reg_rules = {
+ REG_RULE_EXT(2402, 2482, 40, 0, 20, 0, 0),
+ REG_RULE_EXT(5170, 5250, 80, 0, 17, 0,
+ NL80211_RRF_AUTO_BW | 0),
+ REG_RULE_EXT(5250, 5330, 80, 0, 24, 0,
+ NL80211_RRF_DFS |
+ NL80211_RRF_AUTO_BW | 0),
+ REG_RULE_EXT(5490, 5710, 160, 0, 24, 0,
+ NL80211_RRF_DFS | 0),
+ REG_RULE_EXT(5735, 5835, 80, 0, 30, 0, 0),
+ },
+ .n_reg_rules = 5
+};
+
+static const struct ieee80211_regdomain regdom_HN = {
+ .alpha2 = "HN",
+ .dfs_region = NL80211_DFS_FCC,
+ .reg_rules = {
+ REG_RULE_EXT(2402, 2482, 40, 0, 20, 0, 0),
+ REG_RULE_EXT(5170, 5250, 80, 0, 17, 0,
+ NL80211_RRF_AUTO_BW | 0),
+ REG_RULE_EXT(5250, 5330, 80, 0, 24, 0,
+ NL80211_RRF_DFS |
+ NL80211_RRF_AUTO_BW | 0),
+ REG_RULE_EXT(5490, 5730, 160, 0, 24, 0,
+ NL80211_RRF_DFS | 0),
+ REG_RULE_EXT(5735, 5835, 80, 0, 30, 0, 0),
+ },
+ .n_reg_rules = 5
+};
+
+static const struct ieee80211_regdomain regdom_HR = {
+ .alpha2 = "HR",
+ .dfs_region = NL80211_DFS_ETSI,
+ .reg_rules = {
+ REG_RULE_EXT(2402, 2482, 40, 0, 20, 0, 0),
+ REG_RULE_EXT(5170, 5250, 80, 0, 20, 0,
+ NL80211_RRF_AUTO_BW | 0),
+ REG_RULE_EXT(5250, 5330, 80, 0, 20, 0,
+ NL80211_RRF_DFS |
+ NL80211_RRF_AUTO_BW | 0),
+ REG_RULE_EXT(5490, 5710, 160, 0, 27, 0,
+ NL80211_RRF_DFS | 0),
+ REG_RULE_EXT(57000, 66000, 2160, 0, 40, 0, 0),
+ },
+ .n_reg_rules = 5
+};
+
+static const struct ieee80211_regdomain regdom_HT = {
+ .alpha2 = "HT",
+ .dfs_region = NL80211_DFS_FCC,
+ .reg_rules = {
+ REG_RULE_EXT(2402, 2472, 40, 0, 30, 0, 0),
+ REG_RULE_EXT(5170, 5250, 80, 0, 24, 0,
+ NL80211_RRF_AUTO_BW | 0),
+ REG_RULE_EXT(5250, 5330, 80, 0, 24, 0,
+ NL80211_RRF_DFS |
+ NL80211_RRF_AUTO_BW | 0),
+ REG_RULE_EXT(5490, 5730, 160, 0, 24, 0,
+ NL80211_RRF_DFS | 0),
+ REG_RULE_EXT(5735, 5835, 80, 0, 30, 0, 0),
+ },
+ .n_reg_rules = 5
+};
+
+static const struct ieee80211_regdomain regdom_HU = {
+ .alpha2 = "HU",
+ .dfs_region = NL80211_DFS_ETSI,
+ .reg_rules = {
+ REG_RULE_EXT(2402, 2482, 40, 0, 20, 0, 0),
+ REG_RULE_EXT(5170, 5250, 80, 0, 20, 0,
+ NL80211_RRF_AUTO_BW | 0),
+ REG_RULE_EXT(5250, 5330, 80, 0, 20, 0,
+ NL80211_RRF_DFS |
+ NL80211_RRF_AUTO_BW | 0),
+ REG_RULE_EXT(5490, 5710, 160, 0, 27, 0,
+ NL80211_RRF_DFS | 0),
+ REG_RULE_EXT(57000, 66000, 2160, 0, 40, 0, 0),
+ },
+ .n_reg_rules = 5
+};
+
+static const struct ieee80211_regdomain regdom_ID = {
+ .alpha2 = "ID",
+ .dfs_region = NL80211_DFS_JP,
+ .reg_rules = {
+ REG_RULE_EXT(2402, 2482, 40, 0, 20, 0, 0),
+ REG_RULE_EXT(5735, 5815, 80, 0, 23, 0, 0),
+ },
+ .n_reg_rules = 2
+};
+
+static const struct ieee80211_regdomain regdom_IE = {
+ .alpha2 = "IE",
+ .dfs_region = NL80211_DFS_ETSI,
+ .reg_rules = {
+ REG_RULE_EXT(2402, 2482, 40, 0, 20, 0, 0),
+ REG_RULE_EXT(5170, 5250, 80, 0, 20, 0,
+ NL80211_RRF_AUTO_BW | 0),
+ REG_RULE_EXT(5250, 5330, 80, 0, 20, 0,
+ NL80211_RRF_DFS |
+ NL80211_RRF_AUTO_BW | 0),
+ REG_RULE_EXT(5490, 5710, 160, 0, 27, 0,
+ NL80211_RRF_DFS | 0),
+ REG_RULE_EXT(57000, 66000, 2160, 0, 40, 0, 0),
+ },
+ .n_reg_rules = 5
+};
+
+static const struct ieee80211_regdomain regdom_IL = {
+ .alpha2 = "IL",
+ .dfs_region = NL80211_DFS_ETSI,
+ .reg_rules = {
+ REG_RULE_EXT(2402, 2482, 40, 0, 20, 0, 0),
+ REG_RULE_EXT(5150, 5250, 80, 0, 23, 0,
+ NL80211_RRF_NO_OUTDOOR |
+ NL80211_RRF_AUTO_BW | 0),
+ REG_RULE_EXT(5250, 5350, 80, 0, 23, 0,
+ NL80211_RRF_NO_OUTDOOR |
+ NL80211_RRF_DFS |
+ NL80211_RRF_AUTO_BW | 0),
+ },
+ .n_reg_rules = 3
+};
+
+static const struct ieee80211_regdomain regdom_IN = {
+ .alpha2 = "IN",
+ .dfs_region = NL80211_DFS_JP,
+ .reg_rules = {
+ REG_RULE_EXT(2402, 2482, 40, 0, 20, 0, 0),
+ REG_RULE_EXT(5170, 5250, 80, 0, 20, 0,
+ NL80211_RRF_AUTO_BW | 0),
+ REG_RULE_EXT(5250, 5330, 80, 0, 20, 0,
+ NL80211_RRF_DFS |
+ NL80211_RRF_AUTO_BW | 0),
+ REG_RULE_EXT(5735, 5835, 80, 0, 20, 0, 0),
+ },
+ .n_reg_rules = 4
+};
+
+static const struct ieee80211_regdomain regdom_IR = {
+ .alpha2 = "IR",
+ .dfs_region = NL80211_DFS_JP,
+ .reg_rules = {
+ REG_RULE_EXT(2402, 2482, 40, 0, 20, 0, 0),
+ REG_RULE_EXT(5735, 5835, 80, 0, 30, 0, 0),
+ },
+ .n_reg_rules = 2
+};
+
+static const struct ieee80211_regdomain regdom_IS = {
+ .alpha2 = "IS",
+ .dfs_region = NL80211_DFS_ETSI,
+ .reg_rules = {
+ REG_RULE_EXT(2402, 2482, 40, 0, 20, 0, 0),
+ REG_RULE_EXT(5170, 5250, 80, 0, 20, 0,
+ NL80211_RRF_AUTO_BW | 0),
+ REG_RULE_EXT(5250, 5330, 80, 0, 20, 0,
+ NL80211_RRF_DFS |
+ NL80211_RRF_AUTO_BW | 0),
+ REG_RULE_EXT(5490, 5710, 160, 0, 27, 0,
+ NL80211_RRF_DFS | 0),
+ REG_RULE_EXT(57000, 66000, 2160, 0, 40, 0, 0),
+ },
+ .n_reg_rules = 5
+};
+
+static const struct ieee80211_regdomain regdom_IT = {
+ .alpha2 = "IT",
+ .dfs_region = NL80211_DFS_ETSI,
+ .reg_rules = {
+ REG_RULE_EXT(2402, 2482, 40, 0, 20, 0, 0),
+ REG_RULE_EXT(5170, 5250, 80, 0, 20, 0,
+ NL80211_RRF_AUTO_BW | 0),
+ REG_RULE_EXT(5250, 5330, 80, 0, 20, 0,
+ NL80211_RRF_DFS |
+ NL80211_RRF_AUTO_BW | 0),
+ REG_RULE_EXT(5490, 5710, 160, 0, 27, 0,
+ NL80211_RRF_DFS | 0),
+ REG_RULE_EXT(57000, 66000, 2160, 0, 40, 0, 0),
+ },
+ .n_reg_rules = 5
+};
+
+static const struct ieee80211_regdomain regdom_JM = {
+ .alpha2 = "JM",
+ .dfs_region = NL80211_DFS_FCC,
+ .reg_rules = {
+ REG_RULE_EXT(2402, 2482, 40, 0, 20, 0, 0),
+ REG_RULE_EXT(5170, 5250, 80, 0, 17, 0,
+ NL80211_RRF_AUTO_BW | 0),
+ REG_RULE_EXT(5250, 5330, 80, 0, 24, 0,
+ NL80211_RRF_DFS |
+ NL80211_RRF_AUTO_BW | 0),
+ REG_RULE_EXT(5490, 5730, 160, 0, 24, 0,
+ NL80211_RRF_DFS | 0),
+ REG_RULE_EXT(5735, 5835, 80, 0, 30, 0, 0),
+ },
+ .n_reg_rules = 5
+};
+
+static const struct ieee80211_regdomain regdom_JO = {
+ .alpha2 = "JO",
+ .dfs_region = NL80211_DFS_JP,
+ .reg_rules = {
+ REG_RULE_EXT(2402, 2482, 40, 0, 20, 0, 0),
+ REG_RULE_EXT(5170, 5250, 80, 0, 23, 0, 0),
+ REG_RULE_EXT(5735, 5835, 80, 0, 23, 0, 0),
+ },
+ .n_reg_rules = 3
+};
+
+static const struct ieee80211_regdomain regdom_JP = {
+ .alpha2 = "JP",
+ .dfs_region = NL80211_DFS_JP,
+ .reg_rules = {
+ REG_RULE_EXT(2402, 2482, 40, 0, 20, 0, 0),
+ REG_RULE_EXT(2474, 2494, 20, 0, 20, 0,
+ NL80211_RRF_NO_OFDM | 0),
+ REG_RULE_EXT(4910, 4990, 40, 0, 23, 0, 0),
+ REG_RULE_EXT(5030, 5090, 40, 0, 23, 0, 0),
+ REG_RULE_EXT(5170, 5250, 80, 0, 20, 0,
+ NL80211_RRF_AUTO_BW | 0),
+ REG_RULE_EXT(5250, 5330, 80, 0, 20, 0,
+ NL80211_RRF_DFS |
+ NL80211_RRF_AUTO_BW | 0),
+ REG_RULE_EXT(5490, 5710, 160, 0, 23, 0,
+ NL80211_RRF_DFS | 0),
+ },
+ .n_reg_rules = 7
+};
+
+static const struct ieee80211_regdomain regdom_KE = {
+ .alpha2 = "KE",
+ .dfs_region = NL80211_DFS_JP,
+ .reg_rules = {
+ REG_RULE_EXT(2402, 2482, 40, 0, 20, 0, 0),
+ REG_RULE_EXT(5170, 5250, 80, 0, 23, 0, 0),
+ REG_RULE_EXT(5490, 5570, 80, 0, 30, 0,
+ NL80211_RRF_DFS | 0),
+ REG_RULE_EXT(5735, 5775, 40, 0, 23, 0, 0),
+ },
+ .n_reg_rules = 4
+};
+
+static const struct ieee80211_regdomain regdom_KH = {
+ .alpha2 = "KH",
+ .dfs_region = NL80211_DFS_ETSI,
+ .reg_rules = {
+ REG_RULE_EXT(2402, 2482, 40, 0, 20, 0, 0),
+ REG_RULE_EXT(5170, 5250, 80, 0, 20, 0,
+ NL80211_RRF_AUTO_BW | 0),
+ REG_RULE_EXT(5250, 5330, 80, 0, 20, 0,
+ NL80211_RRF_DFS |
+ NL80211_RRF_AUTO_BW | 0),
+ REG_RULE_EXT(5490, 5710, 160, 0, 27, 0,
+ NL80211_RRF_DFS | 0),
+ },
+ .n_reg_rules = 4
+};
+
+static const struct ieee80211_regdomain regdom_KN = {
+ .alpha2 = "KN",
+ .dfs_region = NL80211_DFS_ETSI,
+ .reg_rules = {
+ REG_RULE_EXT(2402, 2482, 40, 0, 20, 0, 0),
+ REG_RULE_EXT(5170, 5250, 80, 0, 20, 0,
+ NL80211_RRF_AUTO_BW | 0),
+ REG_RULE_EXT(5250, 5330, 80, 0, 20, 0,
+ NL80211_RRF_DFS |
+ NL80211_RRF_AUTO_BW | 0),
+ REG_RULE_EXT(5490, 5710, 160, 0, 30, 0,
+ NL80211_RRF_DFS | 0),
+ REG_RULE_EXT(5735, 5815, 80, 0, 30, 0, 0),
+ },
+ .n_reg_rules = 5
+};
+
+static const struct ieee80211_regdomain regdom_KP = {
+ .alpha2 = "KP",
+ .dfs_region = NL80211_DFS_JP,
+ .reg_rules = {
+ REG_RULE_EXT(2402, 2482, 40, 0, 20, 0, 0),
+ REG_RULE_EXT(5170, 5250, 80, 0, 20, 0,
+ NL80211_RRF_AUTO_BW | 0),
+ REG_RULE_EXT(5250, 5330, 80, 0, 20, 0,
+ NL80211_RRF_DFS |
+ NL80211_RRF_AUTO_BW | 0),
+ REG_RULE_EXT(5490, 5630, 80, 0, 30, 0,
+ NL80211_RRF_DFS | 0),
+ REG_RULE_EXT(5735, 5815, 80, 0, 30, 0, 0),
+ },
+ .n_reg_rules = 5
+};
+
+static const struct ieee80211_regdomain regdom_KR = {
+ .alpha2 = "KR",
+ .dfs_region = NL80211_DFS_JP,
+ .reg_rules = {
+ REG_RULE_EXT(2402, 2482, 40, 0, 20, 0, 0),
+ REG_RULE_EXT(5170, 5250, 80, 0, 20, 0,
+ NL80211_RRF_AUTO_BW | 0),
+ REG_RULE_EXT(5250, 5330, 80, 0, 20, 0,
+ NL80211_RRF_DFS |
+ NL80211_RRF_AUTO_BW | 0),
+ REG_RULE_EXT(5490, 5710, 160, 0, 30, 0,
+ NL80211_RRF_DFS | 0),
+ REG_RULE_EXT(5735, 5835, 80, 0, 30, 0, 0),
+ },
+ .n_reg_rules = 5
+};
+
+static const struct ieee80211_regdomain regdom_KW = {
+ .alpha2 = "KW",
+ .dfs_region = NL80211_DFS_ETSI,
+ .reg_rules = {
+ REG_RULE_EXT(2402, 2482, 40, 0, 20, 0, 0),
+ REG_RULE_EXT(5170, 5250, 80, 0, 20, 0,
+ NL80211_RRF_AUTO_BW | 0),
+ REG_RULE_EXT(5250, 5330, 80, 0, 20, 0,
+ NL80211_RRF_DFS |
+ NL80211_RRF_AUTO_BW | 0),
+ },
+ .n_reg_rules = 3
+};
+
+static const struct ieee80211_regdomain regdom_KY = {
+ .alpha2 = "KY",
+ .dfs_region = NL80211_DFS_FCC,
+ .reg_rules = {
+ REG_RULE_EXT(2402, 2482, 40, 0, 20, 0, 0),
+ REG_RULE_EXT(5170, 5250, 80, 0, 24, 0,
+ NL80211_RRF_AUTO_BW | 0),
+ REG_RULE_EXT(5250, 5330, 80, 0, 24, 0,
+ NL80211_RRF_DFS |
+ NL80211_RRF_AUTO_BW | 0),
+ REG_RULE_EXT(5490, 5730, 160, 0, 24, 0,
+ NL80211_RRF_DFS | 0),
+ REG_RULE_EXT(5735, 5835, 80, 0, 30, 0, 0),
+ },
+ .n_reg_rules = 5
+};
+
+static const struct ieee80211_regdomain regdom_KZ = {
+ .alpha2 = "KZ",
+ .reg_rules = {
+ REG_RULE_EXT(2402, 2482, 40, 0, 20, 0, 0),
+ },
+ .n_reg_rules = 1
+};
+
+static const struct ieee80211_regdomain regdom_LB = {
+ .alpha2 = "LB",
+ .dfs_region = NL80211_DFS_FCC,
+ .reg_rules = {
+ REG_RULE_EXT(2402, 2482, 40, 0, 20, 0, 0),
+ REG_RULE_EXT(5170, 5250, 80, 0, 17, 0,
+ NL80211_RRF_AUTO_BW | 0),
+ REG_RULE_EXT(5250, 5330, 80, 0, 24, 0,
+ NL80211_RRF_DFS |
+ NL80211_RRF_AUTO_BW | 0),
+ REG_RULE_EXT(5490, 5730, 160, 0, 24, 0,
+ NL80211_RRF_DFS | 0),
+ REG_RULE_EXT(5735, 5835, 80, 0, 30, 0, 0),
+ },
+ .n_reg_rules = 5
+};
+
+static const struct ieee80211_regdomain regdom_LC = {
+ .alpha2 = "LC",
+ .dfs_region = NL80211_DFS_ETSI,
+ .reg_rules = {
+ REG_RULE_EXT(2402, 2482, 40, 0, 20, 0, 0),
+ REG_RULE_EXT(5170, 5250, 80, 0, 20, 0,
+ NL80211_RRF_AUTO_BW | 0),
+ REG_RULE_EXT(5250, 5330, 80, 0, 20, 0,
+ NL80211_RRF_DFS |
+ NL80211_RRF_AUTO_BW | 0),
+ REG_RULE_EXT(5490, 5710, 160, 0, 30, 0,
+ NL80211_RRF_DFS | 0),
+ REG_RULE_EXT(5735, 5815, 80, 0, 30, 0, 0),
+ },
+ .n_reg_rules = 5
+};
+
+static const struct ieee80211_regdomain regdom_LI = {
+ .alpha2 = "LI",
+ .dfs_region = NL80211_DFS_ETSI,
+ .reg_rules = {
+ REG_RULE_EXT(2402, 2482, 40, 0, 20, 0, 0),
+ REG_RULE_EXT(5170, 5250, 80, 0, 20, 0,
+ NL80211_RRF_AUTO_BW | 0),
+ REG_RULE_EXT(5250, 5330, 80, 0, 20, 0,
+ NL80211_RRF_DFS |
+ NL80211_RRF_AUTO_BW | 0),
+ REG_RULE_EXT(5490, 5710, 160, 0, 27, 0,
+ NL80211_RRF_DFS | 0),
+ },
+ .n_reg_rules = 4
+};
+
+static const struct ieee80211_regdomain regdom_LK = {
+ .alpha2 = "LK",
+ .dfs_region = NL80211_DFS_FCC,
+ .reg_rules = {
+ REG_RULE_EXT(2402, 2482, 40, 0, 20, 0, 0),
+ REG_RULE_EXT(5170, 5250, 80, 0, 17, 0, 0),
+ REG_RULE_EXT(5250, 5330, 80, 0, 24, 0,
+ NL80211_RRF_DFS | 0),
+ REG_RULE_EXT(5490, 5730, 80, 0, 24, 0,
+ NL80211_RRF_DFS | 0),
+ REG_RULE_EXT(5735, 5835, 80, 0, 30, 0, 0),
+ },
+ .n_reg_rules = 5
+};
+
+static const struct ieee80211_regdomain regdom_LS = {
+ .alpha2 = "LS",
+ .dfs_region = NL80211_DFS_ETSI,
+ .reg_rules = {
+ REG_RULE_EXT(2402, 2482, 40, 0, 20, 0, 0),
+ REG_RULE_EXT(5170, 5250, 80, 0, 20, 0,
+ NL80211_RRF_AUTO_BW | 0),
+ REG_RULE_EXT(5250, 5330, 80, 0, 20, 0,
+ NL80211_RRF_DFS |
+ NL80211_RRF_AUTO_BW | 0),
+ REG_RULE_EXT(5490, 5710, 160, 0, 27, 0,
+ NL80211_RRF_DFS | 0),
+ },
+ .n_reg_rules = 4
+};
+
+static const struct ieee80211_regdomain regdom_LT = {
+ .alpha2 = "LT",
+ .dfs_region = NL80211_DFS_ETSI,
+ .reg_rules = {
+ REG_RULE_EXT(2402, 2482, 40, 0, 20, 0, 0),
+ REG_RULE_EXT(5170, 5250, 80, 0, 20, 0,
+ NL80211_RRF_AUTO_BW | 0),
+ REG_RULE_EXT(5250, 5330, 80, 0, 20, 0,
+ NL80211_RRF_DFS |
+ NL80211_RRF_AUTO_BW | 0),
+ REG_RULE_EXT(5490, 5710, 160, 0, 27, 0,
+ NL80211_RRF_DFS | 0),
+ REG_RULE_EXT(57000, 66000, 2160, 0, 40, 0, 0),
+ },
+ .n_reg_rules = 5
+};
+
+static const struct ieee80211_regdomain regdom_LU = {
+ .alpha2 = "LU",
+ .dfs_region = NL80211_DFS_ETSI,
+ .reg_rules = {
+ REG_RULE_EXT(2402, 2482, 40, 0, 20, 0, 0),
+ REG_RULE_EXT(5170, 5250, 80, 0, 20, 0,
+ NL80211_RRF_AUTO_BW | 0),
+ REG_RULE_EXT(5250, 5330, 80, 0, 20, 0,
+ NL80211_RRF_DFS |
+ NL80211_RRF_AUTO_BW | 0),
+ REG_RULE_EXT(5490, 5710, 160, 0, 27, 0,
+ NL80211_RRF_DFS | 0),
+ REG_RULE_EXT(57000, 66000, 2160, 0, 40, 0, 0),
+ },
+ .n_reg_rules = 5
+};
+
+static const struct ieee80211_regdomain regdom_LV = {
+ .alpha2 = "LV",
+ .dfs_region = NL80211_DFS_ETSI,
+ .reg_rules = {
+ REG_RULE_EXT(2402, 2482, 40, 0, 20, 0, 0),
+ REG_RULE_EXT(5170, 5250, 80, 0, 20, 0,
+ NL80211_RRF_AUTO_BW | 0),
+ REG_RULE_EXT(5250, 5330, 80, 0, 20, 0,
+ NL80211_RRF_DFS |
+ NL80211_RRF_AUTO_BW | 0),
+ REG_RULE_EXT(5490, 5710, 160, 0, 27, 0,
+ NL80211_RRF_DFS | 0),
+ REG_RULE_EXT(57000, 66000, 2160, 0, 40, 0, 0),
+ },
+ .n_reg_rules = 5
+};
+
+static const struct ieee80211_regdomain regdom_MA = {
+ .alpha2 = "MA",
+ .dfs_region = NL80211_DFS_ETSI,
+ .reg_rules = {
+ REG_RULE_EXT(2402, 2482, 40, 0, 20, 0, 0),
+ REG_RULE_EXT(5170, 5250, 80, 0, 20, 0,
+ NL80211_RRF_AUTO_BW | 0),
+ REG_RULE_EXT(5250, 5330, 80, 0, 20, 0,
+ NL80211_RRF_DFS |
+ NL80211_RRF_AUTO_BW | 0),
+ },
+ .n_reg_rules = 3
+};
+
+static const struct ieee80211_regdomain regdom_MC = {
+ .alpha2 = "MC",
+ .dfs_region = NL80211_DFS_ETSI,
+ .reg_rules = {
+ REG_RULE_EXT(2402, 2482, 40, 0, 20, 0, 0),
+ REG_RULE_EXT(5170, 5250, 80, 0, 20, 0,
+ NL80211_RRF_AUTO_BW | 0),
+ REG_RULE_EXT(5250, 5330, 80, 0, 20, 0,
+ NL80211_RRF_DFS |
+ NL80211_RRF_AUTO_BW | 0),
+ REG_RULE_EXT(5490, 5710, 160, 0, 27, 0,
+ NL80211_RRF_DFS | 0),
+ },
+ .n_reg_rules = 4
+};
+
+static const struct ieee80211_regdomain regdom_MD = {
+ .alpha2 = "MD",
+ .dfs_region = NL80211_DFS_ETSI,
+ .reg_rules = {
+ REG_RULE_EXT(2402, 2482, 40, 0, 20, 0, 0),
+ REG_RULE_EXT(5170, 5250, 80, 0, 20, 0,
+ NL80211_RRF_AUTO_BW | 0),
+ REG_RULE_EXT(5250, 5330, 80, 0, 20, 0,
+ NL80211_RRF_DFS |
+ NL80211_RRF_AUTO_BW | 0),
+ REG_RULE_EXT(5490, 5710, 160, 0, 27, 0,
+ NL80211_RRF_DFS | 0),
+ },
+ .n_reg_rules = 4
+};
+
+static const struct ieee80211_regdomain regdom_ME = {
+ .alpha2 = "ME",
+ .dfs_region = NL80211_DFS_ETSI,
+ .reg_rules = {
+ REG_RULE_EXT(2402, 2482, 40, 0, 20, 0, 0),
+ REG_RULE_EXT(5170, 5250, 80, 0, 20, 0,
+ NL80211_RRF_AUTO_BW | 0),
+ REG_RULE_EXT(5250, 5330, 80, 0, 20, 0,
+ NL80211_RRF_DFS |
+ NL80211_RRF_AUTO_BW | 0),
+ REG_RULE_EXT(5490, 5710, 160, 0, 27, 0,
+ NL80211_RRF_DFS | 0),
+ },
+ .n_reg_rules = 4
+};
+
+static const struct ieee80211_regdomain regdom_MF = {
+ .alpha2 = "MF",
+ .dfs_region = NL80211_DFS_ETSI,
+ .reg_rules = {
+ REG_RULE_EXT(2402, 2482, 40, 0, 20, 0, 0),
+ REG_RULE_EXT(5170, 5250, 80, 0, 20, 0,
+ NL80211_RRF_AUTO_BW | 0),
+ REG_RULE_EXT(5250, 5330, 80, 0, 20, 0,
+ NL80211_RRF_DFS |
+ NL80211_RRF_AUTO_BW | 0),
+ REG_RULE_EXT(5490, 5710, 160, 0, 27, 0,
+ NL80211_RRF_DFS | 0),
+ },
+ .n_reg_rules = 4
+};
+
+static const struct ieee80211_regdomain regdom_MH = {
+ .alpha2 = "MH",
+ .dfs_region = NL80211_DFS_FCC,
+ .reg_rules = {
+ REG_RULE_EXT(2402, 2472, 40, 0, 30, 0, 0),
+ REG_RULE_EXT(5170, 5250, 80, 0, 24, 0,
+ NL80211_RRF_AUTO_BW | 0),
+ REG_RULE_EXT(5250, 5330, 80, 0, 24, 0,
+ NL80211_RRF_DFS |
+ NL80211_RRF_AUTO_BW | 0),
+ REG_RULE_EXT(5490, 5730, 160, 0, 24, 0,
+ NL80211_RRF_DFS | 0),
+ REG_RULE_EXT(5735, 5835, 80, 0, 30, 0, 0),
+ },
+ .n_reg_rules = 5
+};
+
+static const struct ieee80211_regdomain regdom_MK = {
+ .alpha2 = "MK",
+ .dfs_region = NL80211_DFS_ETSI,
+ .reg_rules = {
+ REG_RULE_EXT(2402, 2482, 40, 0, 20, 0, 0),
+ REG_RULE_EXT(5170, 5250, 80, 0, 20, 0,
+ NL80211_RRF_AUTO_BW | 0),
+ REG_RULE_EXT(5250, 5330, 80, 0, 20, 0,
+ NL80211_RRF_DFS |
+ NL80211_RRF_AUTO_BW | 0),
+ REG_RULE_EXT(5490, 5710, 160, 0, 27, 0,
+ NL80211_RRF_DFS | 0),
+ REG_RULE_EXT(57000, 66000, 2160, 0, 40, 0, 0),
+ },
+ .n_reg_rules = 5
+};
+
+static const struct ieee80211_regdomain regdom_MN = {
+ .alpha2 = "MN",
+ .dfs_region = NL80211_DFS_FCC,
+ .reg_rules = {
+ REG_RULE_EXT(2402, 2482, 40, 0, 20, 0, 0),
+ REG_RULE_EXT(5170, 5250, 80, 0, 24, 0,
+ NL80211_RRF_AUTO_BW | 0),
+ REG_RULE_EXT(5250, 5330, 80, 0, 24, 0,
+ NL80211_RRF_DFS |
+ NL80211_RRF_AUTO_BW | 0),
+ REG_RULE_EXT(5490, 5730, 160, 0, 24, 0,
+ NL80211_RRF_DFS | 0),
+ REG_RULE_EXT(5735, 5835, 80, 0, 30, 0, 0),
+ },
+ .n_reg_rules = 5
+};
+
+static const struct ieee80211_regdomain regdom_MO = {
+ .alpha2 = "MO",
+ .reg_rules = {
+ REG_RULE_EXT(2402, 2482, 40, 0, 20, 0, 0),
+ REG_RULE_EXT(5170, 5250, 40, 0, 23, 0, 0),
+ REG_RULE_EXT(5250, 5330, 40, 0, 23, 0,
+ NL80211_RRF_DFS | 0),
+ REG_RULE_EXT(5735, 5835, 40, 0, 30, 0, 0),
+ },
+ .n_reg_rules = 4
+};
+
+static const struct ieee80211_regdomain regdom_MP = {
+ .alpha2 = "MP",
+ .dfs_region = NL80211_DFS_FCC,
+ .reg_rules = {
+ REG_RULE_EXT(2402, 2472, 40, 0, 30, 0, 0),
+ REG_RULE_EXT(5170, 5250, 80, 0, 24, 0,
+ NL80211_RRF_AUTO_BW | 0),
+ REG_RULE_EXT(5250, 5330, 80, 0, 24, 0,
+ NL80211_RRF_DFS |
+ NL80211_RRF_AUTO_BW | 0),
+ REG_RULE_EXT(5490, 5730, 160, 0, 24, 0,
+ NL80211_RRF_DFS | 0),
+ REG_RULE_EXT(5735, 5835, 80, 0, 30, 0, 0),
+ },
+ .n_reg_rules = 5
+};
+
+static const struct ieee80211_regdomain regdom_MQ = {
+ .alpha2 = "MQ",
+ .dfs_region = NL80211_DFS_ETSI,
+ .reg_rules = {
+ REG_RULE_EXT(2402, 2482, 40, 0, 20, 0, 0),
+ REG_RULE_EXT(5170, 5250, 80, 0, 20, 0,
+ NL80211_RRF_AUTO_BW | 0),
+ REG_RULE_EXT(5250, 5330, 80, 0, 20, 0,
+ NL80211_RRF_DFS |
+ NL80211_RRF_AUTO_BW | 0),
+ REG_RULE_EXT(5490, 5710, 160, 0, 27, 0,
+ NL80211_RRF_DFS | 0),
+ },
+ .n_reg_rules = 4
+};
+
+static const struct ieee80211_regdomain regdom_MR = {
+ .alpha2 = "MR",
+ .dfs_region = NL80211_DFS_ETSI,
+ .reg_rules = {
+ REG_RULE_EXT(2402, 2482, 40, 0, 20, 0, 0),
+ REG_RULE_EXT(5170, 5250, 80, 0, 20, 0,
+ NL80211_RRF_AUTO_BW | 0),
+ REG_RULE_EXT(5250, 5330, 80, 0, 20, 0,
+ NL80211_RRF_DFS |
+ NL80211_RRF_AUTO_BW | 0),
+ REG_RULE_EXT(5490, 5710, 160, 0, 27, 0,
+ NL80211_RRF_DFS | 0),
+ },
+ .n_reg_rules = 4
+};
+
+static const struct ieee80211_regdomain regdom_MT = {
+ .alpha2 = "MT",
+ .dfs_region = NL80211_DFS_ETSI,
+ .reg_rules = {
+ REG_RULE_EXT(2402, 2482, 40, 0, 20, 0, 0),
+ REG_RULE_EXT(5170, 5250, 80, 0, 20, 0,
+ NL80211_RRF_AUTO_BW | 0),
+ REG_RULE_EXT(5250, 5330, 80, 0, 20, 0,
+ NL80211_RRF_DFS |
+ NL80211_RRF_AUTO_BW | 0),
+ REG_RULE_EXT(5490, 5710, 160, 0, 27, 0,
+ NL80211_RRF_DFS | 0),
+ REG_RULE_EXT(57000, 66000, 2160, 0, 40, 0, 0),
+ },
+ .n_reg_rules = 5
+};
+
+static const struct ieee80211_regdomain regdom_MU = {
+ .alpha2 = "MU",
+ .dfs_region = NL80211_DFS_FCC,
+ .reg_rules = {
+ REG_RULE_EXT(2402, 2482, 40, 0, 20, 0, 0),
+ REG_RULE_EXT(5170, 5250, 80, 0, 24, 0,
+ NL80211_RRF_AUTO_BW | 0),
+ REG_RULE_EXT(5250, 5330, 80, 0, 24, 0,
+ NL80211_RRF_DFS |
+ NL80211_RRF_AUTO_BW | 0),
+ REG_RULE_EXT(5490, 5730, 160, 0, 24, 0,
+ NL80211_RRF_DFS | 0),
+ REG_RULE_EXT(5735, 5835, 80, 0, 30, 0, 0),
+ },
+ .n_reg_rules = 5
+};
+
+static const struct ieee80211_regdomain regdom_MW = {
+ .alpha2 = "MW",
+ .dfs_region = NL80211_DFS_ETSI,
+ .reg_rules = {
+ REG_RULE_EXT(2402, 2482, 40, 0, 20, 0, 0),
+ REG_RULE_EXT(5170, 5250, 80, 0, 20, 0,
+ NL80211_RRF_AUTO_BW | 0),
+ REG_RULE_EXT(5250, 5330, 80, 0, 20, 0,
+ NL80211_RRF_DFS |
+ NL80211_RRF_AUTO_BW | 0),
+ REG_RULE_EXT(5490, 5710, 160, 0, 27, 0,
+ NL80211_RRF_DFS | 0),
+ },
+ .n_reg_rules = 4
+};
+
+static const struct ieee80211_regdomain regdom_MX = {
+ .alpha2 = "MX",
+ .dfs_region = NL80211_DFS_FCC,
+ .reg_rules = {
+ REG_RULE_EXT(2402, 2482, 40, 0, 20, 0, 0),
+ REG_RULE_EXT(5170, 5250, 80, 0, 17, 0,
+ NL80211_RRF_AUTO_BW | 0),
+ REG_RULE_EXT(5250, 5330, 80, 0, 24, 0,
+ NL80211_RRF_DFS |
+ NL80211_RRF_AUTO_BW | 0),
+ REG_RULE_EXT(5490, 5730, 160, 0, 24, 0,
+ NL80211_RRF_DFS | 0),
+ REG_RULE_EXT(5735, 5835, 80, 0, 30, 0, 0),
+ },
+ .n_reg_rules = 5
+};
+
+static const struct ieee80211_regdomain regdom_MY = {
+ .alpha2 = "MY",
+ .dfs_region = NL80211_DFS_FCC,
+ .reg_rules = {
+ REG_RULE_EXT(2402, 2482, 40, 0, 20, 0, 0),
+ REG_RULE_EXT(5170, 5250, 80, 0, 17, 0,
+ NL80211_RRF_AUTO_BW | 0),
+ REG_RULE_EXT(5250, 5330, 80, 0, 23, 0,
+ NL80211_RRF_DFS |
+ NL80211_RRF_AUTO_BW | 0),
+ REG_RULE_EXT(5735, 5835, 80, 0, 30, 0, 0),
+ },
+ .n_reg_rules = 4
+};
+
+static const struct ieee80211_regdomain regdom_NI = {
+ .alpha2 = "NI",
+ .dfs_region = NL80211_DFS_FCC,
+ .reg_rules = {
+ REG_RULE_EXT(2402, 2472, 40, 0, 30, 0, 0),
+ REG_RULE_EXT(5170, 5250, 80, 0, 24, 0,
+ NL80211_RRF_AUTO_BW | 0),
+ REG_RULE_EXT(5250, 5330, 80, 0, 24, 0,
+ NL80211_RRF_DFS |
+ NL80211_RRF_AUTO_BW | 0),
+ REG_RULE_EXT(5490, 5730, 160, 0, 24, 0,
+ NL80211_RRF_DFS | 0),
+ REG_RULE_EXT(5735, 5835, 80, 0, 30, 0, 0),
+ },
+ .n_reg_rules = 5
+};
+
+static const struct ieee80211_regdomain regdom_NL = {
+ .alpha2 = "NL",
+ .dfs_region = NL80211_DFS_ETSI,
+ .reg_rules = {
+ REG_RULE_EXT(2402, 2482, 40, 0, 20, 0, 0),
+ REG_RULE_EXT(5170, 5250, 80, 0, 20, 0,
+ NL80211_RRF_NO_OUTDOOR |
+ NL80211_RRF_AUTO_BW | 0),
+ REG_RULE_EXT(5250, 5330, 80, 0, 20, 0,
+ NL80211_RRF_NO_OUTDOOR |
+ NL80211_RRF_DFS |
+ NL80211_RRF_AUTO_BW | 0),
+ REG_RULE_EXT(5490, 5710, 160, 0, 27, 0,
+ NL80211_RRF_DFS | 0),
+ REG_RULE_EXT(57000, 66000, 2160, 0, 40, 0, 0),
+ },
+ .n_reg_rules = 5
+};
+
+static const struct ieee80211_regdomain regdom_NO = {
+ .alpha2 = "NO",
+ .dfs_region = NL80211_DFS_ETSI,
+ .reg_rules = {
+ REG_RULE_EXT(2400, 2483, 40, 0, 20, 0, 0),
+ REG_RULE_EXT(5150, 5250, 80, 0, 23, 0,
+ NL80211_RRF_AUTO_BW | 0),
+ REG_RULE_EXT(5250, 5350, 80, 0, 20, 0,
+ NL80211_RRF_DFS |
+ NL80211_RRF_AUTO_BW | 0),
+ REG_RULE_EXT(5470, 5795, 160, 0, 27, 0,
+ NL80211_RRF_DFS | 0),
+ REG_RULE_EXT(5815, 5850, 35, 0, 33, 0,
+ NL80211_RRF_DFS | 0),
+ REG_RULE_EXT(17100, 17300, 200, 0, 20, 0, 0),
+ REG_RULE_EXT(57000, 66000, 2160, 0, 40, 0, 0),
+ },
+ .n_reg_rules = 7
+};
+
+static const struct ieee80211_regdomain regdom_NP = {
+ .alpha2 = "NP",
+ .dfs_region = NL80211_DFS_JP,
+ .reg_rules = {
+ REG_RULE_EXT(2402, 2482, 40, 0, 20, 0, 0),
+ REG_RULE_EXT(5170, 5250, 80, 0, 20, 0,
+ NL80211_RRF_AUTO_BW | 0),
+ REG_RULE_EXT(5250, 5330, 80, 0, 20, 0,
+ NL80211_RRF_DFS |
+ NL80211_RRF_AUTO_BW | 0),
+ REG_RULE_EXT(5735, 5835, 80, 0, 20, 0, 0),
+ },
+ .n_reg_rules = 4
+};
+
+static const struct ieee80211_regdomain regdom_NZ = {
+ .alpha2 = "NZ",
+ .dfs_region = NL80211_DFS_FCC,
+ .reg_rules = {
+ REG_RULE_EXT(2402, 2482, 40, 0, 30, 0, 0),
+ REG_RULE_EXT(5170, 5250, 80, 0, 17, 0,
+ NL80211_RRF_AUTO_BW | 0),
+ REG_RULE_EXT(5250, 5330, 80, 0, 24, 0,
+ NL80211_RRF_DFS |
+ NL80211_RRF_AUTO_BW | 0),
+ REG_RULE_EXT(5490, 5730, 160, 0, 24, 0,
+ NL80211_RRF_DFS | 0),
+ REG_RULE_EXT(5735, 5835, 80, 0, 30, 0, 0),
+ },
+ .n_reg_rules = 5
+};
+
+static const struct ieee80211_regdomain regdom_OM = {
+ .alpha2 = "OM",
+ .dfs_region = NL80211_DFS_ETSI,
+ .reg_rules = {
+ REG_RULE_EXT(2402, 2482, 40, 0, 20, 0, 0),
+ REG_RULE_EXT(5170, 5250, 80, 0, 20, 0,
+ NL80211_RRF_AUTO_BW | 0),
+ REG_RULE_EXT(5250, 5330, 80, 0, 20, 0,
+ NL80211_RRF_DFS |
+ NL80211_RRF_AUTO_BW | 0),
+ REG_RULE_EXT(5490, 5710, 160, 0, 27, 0,
+ NL80211_RRF_DFS | 0),
+ },
+ .n_reg_rules = 4
+};
+
+static const struct ieee80211_regdomain regdom_PA = {
+ .alpha2 = "PA",
+ .dfs_region = NL80211_DFS_FCC,
+ .reg_rules = {
+ REG_RULE_EXT(2402, 2472, 40, 0, 30, 0, 0),
+ REG_RULE_EXT(5170, 5250, 80, 0, 17, 0,
+ NL80211_RRF_AUTO_BW | 0),
+ REG_RULE_EXT(5250, 5330, 80, 0, 23, 0,
+ NL80211_RRF_DFS |
+ NL80211_RRF_AUTO_BW | 0),
+ REG_RULE_EXT(5735, 5835, 80, 0, 30, 0, 0),
+ },
+ .n_reg_rules = 4
+};
+
+static const struct ieee80211_regdomain regdom_PE = {
+ .alpha2 = "PE",
+ .dfs_region = NL80211_DFS_FCC,
+ .reg_rules = {
+ REG_RULE_EXT(2402, 2482, 40, 0, 20, 0, 0),
+ REG_RULE_EXT(5170, 5250, 80, 0, 17, 0,
+ NL80211_RRF_AUTO_BW | 0),
+ REG_RULE_EXT(5250, 5330, 80, 0, 24, 0,
+ NL80211_RRF_DFS |
+ NL80211_RRF_AUTO_BW | 0),
+ REG_RULE_EXT(5490, 5730, 160, 0, 24, 0,
+ NL80211_RRF_DFS | 0),
+ REG_RULE_EXT(5735, 5835, 80, 0, 30, 0, 0),
+ },
+ .n_reg_rules = 5
+};
+
+static const struct ieee80211_regdomain regdom_PF = {
+ .alpha2 = "PF",
+ .dfs_region = NL80211_DFS_ETSI,
+ .reg_rules = {
+ REG_RULE_EXT(2402, 2482, 40, 0, 20, 0, 0),
+ REG_RULE_EXT(5170, 5250, 80, 0, 20, 0,
+ NL80211_RRF_AUTO_BW | 0),
+ REG_RULE_EXT(5250, 5330, 80, 0, 20, 0,
+ NL80211_RRF_DFS |
+ NL80211_RRF_AUTO_BW | 0),
+ REG_RULE_EXT(5490, 5710, 160, 0, 27, 0,
+ NL80211_RRF_DFS | 0),
+ },
+ .n_reg_rules = 4
+};
+
+static const struct ieee80211_regdomain regdom_PG = {
+ .alpha2 = "PG",
+ .dfs_region = NL80211_DFS_FCC,
+ .reg_rules = {
+ REG_RULE_EXT(2402, 2482, 40, 0, 20, 0, 0),
+ REG_RULE_EXT(5170, 5250, 80, 0, 17, 0,
+ NL80211_RRF_AUTO_BW | 0),
+ REG_RULE_EXT(5250, 5330, 80, 0, 24, 0,
+ NL80211_RRF_DFS |
+ NL80211_RRF_AUTO_BW | 0),
+ REG_RULE_EXT(5490, 5730, 160, 0, 24, 0,
+ NL80211_RRF_DFS | 0),
+ REG_RULE_EXT(5735, 5835, 80, 0, 30, 0, 0),
+ },
+ .n_reg_rules = 5
+};
+
+static const struct ieee80211_regdomain regdom_PH = {
+ .alpha2 = "PH",
+ .dfs_region = NL80211_DFS_FCC,
+ .reg_rules = {
+ REG_RULE_EXT(2402, 2482, 40, 0, 20, 0, 0),
+ REG_RULE_EXT(5170, 5250, 80, 0, 17, 0,
+ NL80211_RRF_AUTO_BW | 0),
+ REG_RULE_EXT(5250, 5330, 80, 0, 24, 0,
+ NL80211_RRF_DFS |
+ NL80211_RRF_AUTO_BW | 0),
+ REG_RULE_EXT(5490, 5730, 160, 0, 24, 0,
+ NL80211_RRF_DFS | 0),
+ REG_RULE_EXT(5735, 5835, 80, 0, 30, 0, 0),
+ },
+ .n_reg_rules = 5
+};
+
+static const struct ieee80211_regdomain regdom_PK = {
+ .alpha2 = "PK",
+ .dfs_region = NL80211_DFS_JP,
+ .reg_rules = {
+ REG_RULE_EXT(2402, 2482, 40, 0, 20, 0, 0),
+ REG_RULE_EXT(5735, 5835, 80, 0, 30, 0, 0),
+ },
+ .n_reg_rules = 2
+};
+
+static const struct ieee80211_regdomain regdom_PL = {
+ .alpha2 = "PL",
+ .dfs_region = NL80211_DFS_ETSI,
+ .reg_rules = {
+ REG_RULE_EXT(2402, 2482, 40, 0, 20, 0, 0),
+ REG_RULE_EXT(5170, 5250, 80, 0, 20, 0,
+ NL80211_RRF_AUTO_BW | 0),
+ REG_RULE_EXT(5250, 5330, 80, 0, 20, 0,
+ NL80211_RRF_DFS |
+ NL80211_RRF_AUTO_BW | 0),
+ REG_RULE_EXT(5490, 5710, 160, 0, 27, 0,
+ NL80211_RRF_DFS | 0),
+ REG_RULE_EXT(57000, 66000, 2160, 0, 40, 0, 0),
+ },
+ .n_reg_rules = 5
+};
+
+static const struct ieee80211_regdomain regdom_PM = {
+ .alpha2 = "PM",
+ .dfs_region = NL80211_DFS_ETSI,
+ .reg_rules = {
+ REG_RULE_EXT(2402, 2482, 40, 0, 20, 0, 0),
+ REG_RULE_EXT(5170, 5250, 80, 0, 20, 0,
+ NL80211_RRF_AUTO_BW | 0),
+ REG_RULE_EXT(5250, 5330, 80, 0, 20, 0,
+ NL80211_RRF_DFS |
+ NL80211_RRF_AUTO_BW | 0),
+ REG_RULE_EXT(5490, 5710, 160, 0, 27, 0,
+ NL80211_RRF_DFS | 0),
+ },
+ .n_reg_rules = 4
+};
+
+static const struct ieee80211_regdomain regdom_PR = {
+ .alpha2 = "PR",
+ .dfs_region = NL80211_DFS_FCC,
+ .reg_rules = {
+ REG_RULE_EXT(2402, 2472, 40, 0, 30, 0, 0),
+ REG_RULE_EXT(5170, 5250, 80, 0, 17, 0,
+ NL80211_RRF_AUTO_BW | 0),
+ REG_RULE_EXT(5250, 5330, 80, 0, 24, 0,
+ NL80211_RRF_DFS |
+ NL80211_RRF_AUTO_BW | 0),
+ REG_RULE_EXT(5490, 5730, 160, 0, 24, 0,
+ NL80211_RRF_DFS | 0),
+ REG_RULE_EXT(5735, 5835, 80, 0, 30, 0, 0),
+ },
+ .n_reg_rules = 5
+};
+
+static const struct ieee80211_regdomain regdom_PT = {
+ .alpha2 = "PT",
+ .dfs_region = NL80211_DFS_ETSI,
+ .reg_rules = {
+ REG_RULE_EXT(2402, 2482, 40, 0, 20, 0, 0),
+ REG_RULE_EXT(5170, 5250, 80, 0, 20, 0,
+ NL80211_RRF_AUTO_BW | 0),
+ REG_RULE_EXT(5250, 5330, 80, 0, 20, 0,
+ NL80211_RRF_DFS |
+ NL80211_RRF_AUTO_BW | 0),
+ REG_RULE_EXT(5490, 5710, 160, 0, 27, 0,
+ NL80211_RRF_DFS | 0),
+ REG_RULE_EXT(57000, 66000, 2160, 0, 40, 0, 0),
+ },
+ .n_reg_rules = 5
+};
+
+static const struct ieee80211_regdomain regdom_PW = {
+ .alpha2 = "PW",
+ .dfs_region = NL80211_DFS_FCC,
+ .reg_rules = {
+ REG_RULE_EXT(2402, 2472, 40, 0, 30, 0, 0),
+ REG_RULE_EXT(5170, 5250, 80, 0, 24, 0,
+ NL80211_RRF_AUTO_BW | 0),
+ REG_RULE_EXT(5250, 5330, 80, 0, 24, 0,
+ NL80211_RRF_DFS |
+ NL80211_RRF_AUTO_BW | 0),
+ REG_RULE_EXT(5490, 5730, 160, 0, 24, 0,
+ NL80211_RRF_DFS | 0),
+ REG_RULE_EXT(5735, 5835, 80, 0, 30, 0, 0),
+ },
+ .n_reg_rules = 5
+};
+
+static const struct ieee80211_regdomain regdom_PY = {
+ .alpha2 = "PY",
+ .dfs_region = NL80211_DFS_FCC,
+ .reg_rules = {
+ REG_RULE_EXT(2402, 2482, 40, 0, 20, 0, 0),
+ REG_RULE_EXT(5170, 5250, 80, 0, 24, 0,
+ NL80211_RRF_AUTO_BW | 0),
+ REG_RULE_EXT(5250, 5330, 80, 0, 24, 0,
+ NL80211_RRF_DFS |
+ NL80211_RRF_AUTO_BW | 0),
+ REG_RULE_EXT(5490, 5730, 160, 0, 24, 0,
+ NL80211_RRF_DFS | 0),
+ REG_RULE_EXT(5735, 5835, 80, 0, 30, 0, 0),
+ },
+ .n_reg_rules = 5
+};
+
+static const struct ieee80211_regdomain regdom_QA = {
+ .alpha2 = "QA",
+ .dfs_region = NL80211_DFS_JP,
+ .reg_rules = {
+ REG_RULE_EXT(2402, 2482, 40, 0, 20, 0, 0),
+ REG_RULE_EXT(5735, 5835, 80, 0, 30, 0, 0),
+ },
+ .n_reg_rules = 2
+};
+
+static const struct ieee80211_regdomain regdom_RE = {
+ .alpha2 = "RE",
+ .dfs_region = NL80211_DFS_ETSI,
+ .reg_rules = {
+ REG_RULE_EXT(2402, 2482, 40, 0, 20, 0, 0),
+ REG_RULE_EXT(5170, 5250, 80, 0, 20, 0,
+ NL80211_RRF_AUTO_BW | 0),
+ REG_RULE_EXT(5250, 5330, 80, 0, 20, 0,
+ NL80211_RRF_DFS |
+ NL80211_RRF_AUTO_BW | 0),
+ REG_RULE_EXT(5490, 5710, 160, 0, 27, 0,
+ NL80211_RRF_DFS | 0),
+ },
+ .n_reg_rules = 4
+};
+
+static const struct ieee80211_regdomain regdom_RO = {
+ .alpha2 = "RO",
+ .dfs_region = NL80211_DFS_ETSI,
+ .reg_rules = {
+ REG_RULE_EXT(2402, 2482, 40, 0, 20, 0, 0),
+ REG_RULE_EXT(5170, 5250, 80, 0, 20, 0,
+ NL80211_RRF_AUTO_BW | 0),
+ REG_RULE_EXT(5250, 5330, 80, 0, 20, 0,
+ NL80211_RRF_DFS |
+ NL80211_RRF_AUTO_BW | 0),
+ REG_RULE_EXT(5490, 5710, 160, 0, 27, 0,
+ NL80211_RRF_DFS | 0),
+ REG_RULE_EXT(57000, 66000, 2160, 0, 40, 0, 0),
+ },
+ .n_reg_rules = 5
+};
+
+static const struct ieee80211_regdomain regdom_RS = {
+ .alpha2 = "RS",
+ .dfs_region = NL80211_DFS_ETSI,
+ .reg_rules = {
+ REG_RULE_EXT(2400, 2483, 40, 0, 20, 0, 0),
+ REG_RULE_EXT(5150, 5350, 40, 0, 23, 0,
+ NL80211_RRF_NO_OUTDOOR | 0),
+ REG_RULE_EXT(5470, 5725, 20, 0, 30, 0,
+ NL80211_RRF_DFS | 0),
+ REG_RULE_EXT(57000, 66000, 2160, 0, 40, 0, 0),
+ },
+ .n_reg_rules = 4
+};
+
+static const struct ieee80211_regdomain regdom_RU = {
+ .alpha2 = "RU",
+ .dfs_region = NL80211_DFS_ETSI,
+ .reg_rules = {
+ REG_RULE_EXT(2402, 2482, 40, 0, 20, 0, 0),
+ REG_RULE_EXT(5170, 5250, 80, 0, 20, 0, 0),
+ REG_RULE_EXT(5250, 5330, 80, 0, 20, 0,
+ NL80211_RRF_DFS | 0),
+ REG_RULE_EXT(5650, 5730, 80, 0, 30, 0,
+ NL80211_RRF_DFS | 0),
+ REG_RULE_EXT(5735, 5835, 80, 0, 30, 0, 0),
+ },
+ .n_reg_rules = 5
+};
+
+static const struct ieee80211_regdomain regdom_RW = {
+ .alpha2 = "RW",
+ .dfs_region = NL80211_DFS_FCC,
+ .reg_rules = {
+ REG_RULE_EXT(2402, 2482, 40, 0, 20, 0, 0),
+ REG_RULE_EXT(5170, 5250, 80, 0, 17, 0,
+ NL80211_RRF_AUTO_BW | 0),
+ REG_RULE_EXT(5250, 5330, 80, 0, 24, 0,
+ NL80211_RRF_DFS |
+ NL80211_RRF_AUTO_BW | 0),
+ REG_RULE_EXT(5490, 5730, 160, 0, 24, 0,
+ NL80211_RRF_DFS | 0),
+ REG_RULE_EXT(5735, 5835, 80, 0, 30, 0, 0),
+ },
+ .n_reg_rules = 5
+};
+
+static const struct ieee80211_regdomain regdom_SA = {
+ .alpha2 = "SA",
+ .dfs_region = NL80211_DFS_ETSI,
+ .reg_rules = {
+ REG_RULE_EXT(2402, 2482, 40, 0, 20, 0, 0),
+ REG_RULE_EXT(5170, 5250, 80, 0, 20, 0,
+ NL80211_RRF_AUTO_BW | 0),
+ REG_RULE_EXT(5250, 5330, 80, 0, 20, 0,
+ NL80211_RRF_DFS |
+ NL80211_RRF_AUTO_BW | 0),
+ REG_RULE_EXT(5490, 5710, 160, 0, 27, 0,
+ NL80211_RRF_DFS | 0),
+ },
+ .n_reg_rules = 4
+};
+
+static const struct ieee80211_regdomain regdom_SE = {
+ .alpha2 = "SE",
+ .dfs_region = NL80211_DFS_ETSI,
+ .reg_rules = {
+ REG_RULE_EXT(2402, 2482, 40, 0, 20, 0, 0),
+ REG_RULE_EXT(5170, 5250, 80, 0, 20, 0,
+ NL80211_RRF_AUTO_BW | 0),
+ REG_RULE_EXT(5250, 5330, 80, 0, 20, 0,
+ NL80211_RRF_DFS |
+ NL80211_RRF_AUTO_BW | 0),
+ REG_RULE_EXT(5490, 5710, 160, 0, 27, 0,
+ NL80211_RRF_DFS | 0),
+ REG_RULE_EXT(57000, 66000, 2160, 0, 40, 0, 0),
+ },
+ .n_reg_rules = 5
+};
+
+static const struct ieee80211_regdomain regdom_SG = {
+ .alpha2 = "SG",
+ .dfs_region = NL80211_DFS_FCC,
+ .reg_rules = {
+ REG_RULE_EXT(2402, 2482, 40, 0, 20, 0, 0),
+ REG_RULE_EXT(5170, 5250, 80, 0, 17, 0,
+ NL80211_RRF_AUTO_BW | 0),
+ REG_RULE_EXT(5250, 5330, 80, 0, 24, 0,
+ NL80211_RRF_DFS |
+ NL80211_RRF_AUTO_BW | 0),
+ REG_RULE_EXT(5490, 5730, 160, 0, 24, 0,
+ NL80211_RRF_DFS | 0),
+ REG_RULE_EXT(5735, 5835, 80, 0, 30, 0, 0),
+ },
+ .n_reg_rules = 5
+};
+
+static const struct ieee80211_regdomain regdom_SI = {
+ .alpha2 = "SI",
+ .dfs_region = NL80211_DFS_ETSI,
+ .reg_rules = {
+ REG_RULE_EXT(2402, 2482, 40, 0, 20, 0, 0),
+ REG_RULE_EXT(5170, 5250, 80, 0, 20, 0,
+ NL80211_RRF_AUTO_BW | 0),
+ REG_RULE_EXT(5250, 5330, 80, 0, 20, 0,
+ NL80211_RRF_DFS |
+ NL80211_RRF_AUTO_BW | 0),
+ REG_RULE_EXT(5490, 5710, 160, 0, 27, 0,
+ NL80211_RRF_DFS | 0),
+ REG_RULE_EXT(57000, 66000, 2160, 0, 40, 0, 0),
+ },
+ .n_reg_rules = 5
+};
+
+static const struct ieee80211_regdomain regdom_SK = {
+ .alpha2 = "SK",
+ .dfs_region = NL80211_DFS_ETSI,
+ .reg_rules = {
+ REG_RULE_EXT(2402, 2482, 40, 0, 20, 0, 0),
+ REG_RULE_EXT(5170, 5250, 80, 0, 20, 0,
+ NL80211_RRF_AUTO_BW | 0),
+ REG_RULE_EXT(5250, 5330, 80, 0, 20, 0,
+ NL80211_RRF_DFS |
+ NL80211_RRF_AUTO_BW | 0),
+ REG_RULE_EXT(5490, 5710, 160, 0, 27, 0,
+ NL80211_RRF_DFS | 0),
+ REG_RULE_EXT(57000, 66000, 2160, 0, 40, 0, 0),
+ },
+ .n_reg_rules = 5
+};
+
+static const struct ieee80211_regdomain regdom_SN = {
+ .alpha2 = "SN",
+ .dfs_region = NL80211_DFS_FCC,
+ .reg_rules = {
+ REG_RULE_EXT(2402, 2482, 40, 0, 20, 0, 0),
+ REG_RULE_EXT(5170, 5250, 80, 0, 17, 0,
+ NL80211_RRF_AUTO_BW | 0),
+ REG_RULE_EXT(5250, 5330, 80, 0, 24, 0,
+ NL80211_RRF_DFS |
+ NL80211_RRF_AUTO_BW | 0),
+ REG_RULE_EXT(5490, 5730, 160, 0, 24, 0,
+ NL80211_RRF_DFS | 0),
+ REG_RULE_EXT(5735, 5835, 80, 0, 30, 0, 0),
+ },
+ .n_reg_rules = 5
+};
+
+static const struct ieee80211_regdomain regdom_SR = {
+ .alpha2 = "SR",
+ .dfs_region = NL80211_DFS_ETSI,
+ .reg_rules = {
+ REG_RULE_EXT(2402, 2482, 40, 0, 20, 0, 0),
+ REG_RULE_EXT(5170, 5250, 80, 0, 20, 0,
+ NL80211_RRF_AUTO_BW | 0),
+ REG_RULE_EXT(5250, 5330, 80, 0, 20, 0,
+ NL80211_RRF_DFS |
+ NL80211_RRF_AUTO_BW | 0),
+ REG_RULE_EXT(5490, 5710, 160, 0, 27, 0,
+ NL80211_RRF_DFS | 0),
+ },
+ .n_reg_rules = 4
+};
+
+static const struct ieee80211_regdomain regdom_SV = {
+ .alpha2 = "SV",
+ .dfs_region = NL80211_DFS_FCC,
+ .reg_rules = {
+ REG_RULE_EXT(2402, 2482, 40, 0, 20, 0, 0),
+ REG_RULE_EXT(5170, 5250, 80, 0, 17, 0, 0),
+ REG_RULE_EXT(5250, 5330, 80, 0, 23, 0,
+ NL80211_RRF_DFS | 0),
+ REG_RULE_EXT(5735, 5835, 80, 0, 30, 0, 0),
+ },
+ .n_reg_rules = 4
+};
+
+static const struct ieee80211_regdomain regdom_SY = {
+ .alpha2 = "SY",
+ .reg_rules = {
+ REG_RULE_EXT(2402, 2482, 40, 0, 20, 0, 0),
+ },
+ .n_reg_rules = 1
+};
+
+static const struct ieee80211_regdomain regdom_TC = {
+ .alpha2 = "TC",
+ .dfs_region = NL80211_DFS_FCC,
+ .reg_rules = {
+ REG_RULE_EXT(2402, 2482, 40, 0, 20, 0, 0),
+ REG_RULE_EXT(5170, 5250, 80, 0, 24, 0,
+ NL80211_RRF_AUTO_BW | 0),
+ REG_RULE_EXT(5250, 5330, 80, 0, 24, 0,
+ NL80211_RRF_DFS |
+ NL80211_RRF_AUTO_BW | 0),
+ REG_RULE_EXT(5490, 5730, 160, 0, 24, 0,
+ NL80211_RRF_DFS | 0),
+ REG_RULE_EXT(5735, 5835, 80, 0, 30, 0, 0),
+ },
+ .n_reg_rules = 5
+};
+
+static const struct ieee80211_regdomain regdom_TD = {
+ .alpha2 = "TD",
+ .dfs_region = NL80211_DFS_ETSI,
+ .reg_rules = {
+ REG_RULE_EXT(2402, 2482, 40, 0, 20, 0, 0),
+ REG_RULE_EXT(5170, 5250, 80, 0, 20, 0,
+ NL80211_RRF_AUTO_BW | 0),
+ REG_RULE_EXT(5250, 5330, 80, 0, 20, 0,
+ NL80211_RRF_DFS |
+ NL80211_RRF_AUTO_BW | 0),
+ REG_RULE_EXT(5490, 5710, 160, 0, 27, 0,
+ NL80211_RRF_DFS | 0),
+ },
+ .n_reg_rules = 4
+};
+
+static const struct ieee80211_regdomain regdom_TG = {
+ .alpha2 = "TG",
+ .dfs_region = NL80211_DFS_ETSI,
+ .reg_rules = {
+ REG_RULE_EXT(2402, 2482, 40, 0, 20, 0, 0),
+ REG_RULE_EXT(5170, 5250, 40, 0, 20, 0, 0),
+ REG_RULE_EXT(5250, 5330, 40, 0, 20, 0,
+ NL80211_RRF_DFS | 0),
+ REG_RULE_EXT(5490, 5710, 40, 0, 27, 0,
+ NL80211_RRF_DFS | 0),
+ },
+ .n_reg_rules = 4
+};
+
+static const struct ieee80211_regdomain regdom_TH = {
+ .alpha2 = "TH",
+ .dfs_region = NL80211_DFS_FCC,
+ .reg_rules = {
+ REG_RULE_EXT(2402, 2482, 40, 0, 20, 0, 0),
+ REG_RULE_EXT(5170, 5250, 80, 0, 17, 0,
+ NL80211_RRF_AUTO_BW | 0),
+ REG_RULE_EXT(5250, 5330, 80, 0, 24, 0,
+ NL80211_RRF_DFS |
+ NL80211_RRF_AUTO_BW | 0),
+ REG_RULE_EXT(5490, 5730, 160, 0, 24, 0,
+ NL80211_RRF_DFS | 0),
+ REG_RULE_EXT(5735, 5835, 80, 0, 30, 0, 0),
+ },
+ .n_reg_rules = 5
+};
+
+static const struct ieee80211_regdomain regdom_TN = {
+ .alpha2 = "TN",
+ .dfs_region = NL80211_DFS_ETSI,
+ .reg_rules = {
+ REG_RULE_EXT(2402, 2482, 40, 0, 20, 0, 0),
+ REG_RULE_EXT(5170, 5250, 80, 0, 20, 0,
+ NL80211_RRF_AUTO_BW | 0),
+ REG_RULE_EXT(5250, 5330, 80, 0, 20, 0,
+ NL80211_RRF_DFS |
+ NL80211_RRF_AUTO_BW | 0),
+ },
+ .n_reg_rules = 3
+};
+
+static const struct ieee80211_regdomain regdom_TR = {
+ .alpha2 = "TR",
+ .dfs_region = NL80211_DFS_ETSI,
+ .reg_rules = {
+ REG_RULE_EXT(2402, 2482, 40, 0, 20, 0, 0),
+ REG_RULE_EXT(5170, 5250, 80, 0, 20, 0,
+ NL80211_RRF_AUTO_BW | 0),
+ REG_RULE_EXT(5250, 5330, 80, 0, 20, 0,
+ NL80211_RRF_DFS |
+ NL80211_RRF_AUTO_BW | 0),
+ REG_RULE_EXT(5490, 5710, 160, 0, 27, 0,
+ NL80211_RRF_DFS | 0),
+ REG_RULE_EXT(57000, 66000, 2160, 0, 40, 0, 0),
+ },
+ .n_reg_rules = 5
+};
+
+static const struct ieee80211_regdomain regdom_TT = {
+ .alpha2 = "TT",
+ .dfs_region = NL80211_DFS_FCC,
+ .reg_rules = {
+ REG_RULE_EXT(2402, 2482, 40, 0, 20, 0, 0),
+ REG_RULE_EXT(5170, 5250, 80, 0, 17, 0,
+ NL80211_RRF_AUTO_BW | 0),
+ REG_RULE_EXT(5250, 5330, 80, 0, 24, 0,
+ NL80211_RRF_DFS |
+ NL80211_RRF_AUTO_BW | 0),
+ REG_RULE_EXT(5490, 5730, 160, 0, 24, 0,
+ NL80211_RRF_DFS | 0),
+ REG_RULE_EXT(5735, 5835, 80, 0, 30, 0, 0),
+ },
+ .n_reg_rules = 5
+};
+
+static const struct ieee80211_regdomain regdom_TW = {
+ .alpha2 = "TW",
+ .dfs_region = NL80211_DFS_JP,
+ .reg_rules = {
+ REG_RULE_EXT(2402, 2472, 40, 0, 30, 0, 0),
+ REG_RULE_EXT(5270, 5330, 40, 0, 17, 0,
+ NL80211_RRF_DFS | 0),
+ REG_RULE_EXT(5490, 5590, 80, 0, 30, 0,
+ NL80211_RRF_DFS | 0),
+ REG_RULE_EXT(5650, 5710, 40, 0, 30, 0,
+ NL80211_RRF_DFS | 0),
+ REG_RULE_EXT(5735, 5835, 80, 0, 30, 0, 0),
+ },
+ .n_reg_rules = 5
+};
+
+static const struct ieee80211_regdomain regdom_UA = {
+ .alpha2 = "UA",
+ .dfs_region = NL80211_DFS_ETSI,
+ .reg_rules = {
+ REG_RULE_EXT(2400, 2483, 40, 0, 20, 0,
+ NL80211_RRF_NO_OUTDOOR | 0),
+ REG_RULE_EXT(5150, 5350, 40, 0, 20, 0,
+ NL80211_RRF_NO_OUTDOOR | 0),
+ REG_RULE_EXT(5490, 5670, 80, 0, 20, 0,
+ NL80211_RRF_DFS | 0),
+ REG_RULE_EXT(5735, 5835, 80, 0, 20, 0, 0),
+ REG_RULE_EXT(57000, 66000, 2160, 0, 40, 0, 0),
+ },
+ .n_reg_rules = 5
+};
+
+static const struct ieee80211_regdomain regdom_UG = {
+ .alpha2 = "UG",
+ .dfs_region = NL80211_DFS_FCC,
+ .reg_rules = {
+ REG_RULE_EXT(2402, 2482, 40, 0, 20, 0, 0),
+ REG_RULE_EXT(5170, 5250, 80, 0, 24, 0,
+ NL80211_RRF_AUTO_BW | 0),
+ REG_RULE_EXT(5250, 5330, 80, 0, 24, 0,
+ NL80211_RRF_DFS |
+ NL80211_RRF_AUTO_BW | 0),
+ REG_RULE_EXT(5490, 5730, 160, 0, 24, 0,
+ NL80211_RRF_DFS | 0),
+ REG_RULE_EXT(5735, 5835, 80, 0, 30, 0, 0),
+ },
+ .n_reg_rules = 5
+};
+
+static const struct ieee80211_regdomain regdom_US = {
+ .alpha2 = "US",
+ .dfs_region = NL80211_DFS_FCC,
+ .reg_rules = {
+ // 1...13
+ REG_RULE_EXT(2402, 2472, 40, 0, 30, 0, 0),
+ // 36 40 44 48
+ REG_RULE_EXT(5170, 5250, 80, 0, 17, 0,
+ NL80211_RRF_AUTO_BW | 0),
+ // 52 56 60 64
+ REG_RULE_EXT(5250, 5330, 80, 0, 23, 0,
+ NL80211_RRF_DFS |
+ NL80211_RRF_AUTO_BW | 0),
+ // 100 104 108 112 116 120 124
+ REG_RULE_EXT(5490, 5600, 80, 0, 24, 0,
+ NL80211_RRF_DFS | 0),
+ // 128 132 136 140
+ REG_RULE_EXT(5650, 5710, 40, 0, 24, 0,
+ NL80211_RRF_DFS | 0),
+ // 149 153 157 161 165
+ REG_RULE_EXT(5735, 5835, 80, 0, 30, 0, 0),
+ REG_RULE_EXT(57240, 63720, 2160, 0, 40, 0, 0),
+ },
+ .n_reg_rules = 7
+};
+
+static const struct ieee80211_regdomain regdom_UY = {
+ .alpha2 = "UY",
+ .dfs_region = NL80211_DFS_FCC,
+ .reg_rules = {
+ REG_RULE_EXT(2402, 2482, 40, 0, 20, 0, 0),
+ REG_RULE_EXT(5170, 5250, 80, 0, 17, 0,
+ NL80211_RRF_AUTO_BW | 0),
+ REG_RULE_EXT(5250, 5330, 80, 0, 24, 0,
+ NL80211_RRF_DFS |
+ NL80211_RRF_AUTO_BW | 0),
+ REG_RULE_EXT(5490, 5730, 160, 0, 24, 0,
+ NL80211_RRF_DFS | 0),
+ REG_RULE_EXT(5735, 5835, 80, 0, 30, 0, 0),
+ },
+ .n_reg_rules = 5
+};
+
+static const struct ieee80211_regdomain regdom_UZ = {
+ .alpha2 = "UZ",
+ .dfs_region = NL80211_DFS_ETSI,
+ .reg_rules = {
+ REG_RULE_EXT(2402, 2482, 40, 0, 20, 0, 0),
+ REG_RULE_EXT(5170, 5250, 80, 0, 20, 0,
+ NL80211_RRF_AUTO_BW | 0),
+ REG_RULE_EXT(5250, 5330, 80, 0, 20, 0,
+ NL80211_RRF_DFS |
+ NL80211_RRF_AUTO_BW | 0),
+ },
+ .n_reg_rules = 3
+};
+
+static const struct ieee80211_regdomain regdom_VC = {
+ .alpha2 = "VC",
+ .dfs_region = NL80211_DFS_ETSI,
+ .reg_rules = {
+ REG_RULE_EXT(2402, 2482, 40, 0, 20, 0, 0),
+ REG_RULE_EXT(5170, 5250, 80, 0, 20, 0,
+ NL80211_RRF_AUTO_BW | 0),
+ REG_RULE_EXT(5250, 5330, 80, 0, 20, 0,
+ NL80211_RRF_DFS |
+ NL80211_RRF_AUTO_BW | 0),
+ REG_RULE_EXT(5490, 5710, 160, 0, 27, 0,
+ NL80211_RRF_DFS | 0),
+ },
+ .n_reg_rules = 4
+};
+
+static const struct ieee80211_regdomain regdom_VE = {
+ .alpha2 = "VE",
+ .dfs_region = NL80211_DFS_FCC,
+ .reg_rules = {
+ REG_RULE_EXT(2402, 2482, 40, 0, 30, 0, 0),
+ REG_RULE_EXT(5170, 5250, 80, 0, 23, 0,
+ NL80211_RRF_AUTO_BW | 0),
+ REG_RULE_EXT(5250, 5330, 80, 0, 23, 0,
+ NL80211_RRF_DFS |
+ NL80211_RRF_AUTO_BW | 0),
+ REG_RULE_EXT(5735, 5835, 80, 0, 30, 0, 0),
+ },
+ .n_reg_rules = 4
+};
+
+static const struct ieee80211_regdomain regdom_VI = {
+ .alpha2 = "VI",
+ .dfs_region = NL80211_DFS_FCC,
+ .reg_rules = {
+ REG_RULE_EXT(2402, 2472, 40, 0, 30, 0, 0),
+ REG_RULE_EXT(5170, 5250, 80, 0, 24, 0,
+ NL80211_RRF_AUTO_BW | 0),
+ REG_RULE_EXT(5250, 5330, 80, 0, 24, 0,
+ NL80211_RRF_DFS |
+ NL80211_RRF_AUTO_BW | 0),
+ REG_RULE_EXT(5490, 5730, 160, 0, 24, 0,
+ NL80211_RRF_DFS | 0),
+ REG_RULE_EXT(5735, 5835, 80, 0, 30, 0, 0),
+ },
+ .n_reg_rules = 5
+};
+
+static const struct ieee80211_regdomain regdom_VN = {
+ .alpha2 = "VN",
+ .dfs_region = NL80211_DFS_FCC,
+ .reg_rules = {
+ REG_RULE_EXT(2402, 2482, 40, 0, 20, 0, 0),
+ REG_RULE_EXT(5170, 5250, 80, 0, 17, 0, 0),
+ REG_RULE_EXT(5250, 5330, 80, 0, 24, 0,
+ NL80211_RRF_DFS | 0),
+ REG_RULE_EXT(5490, 5730, 80, 0, 24, 0,
+ NL80211_RRF_DFS | 0),
+ REG_RULE_EXT(5735, 5835, 80, 0, 30, 0, 0),
+ },
+ .n_reg_rules = 5
+};
+
+static const struct ieee80211_regdomain regdom_VU = {
+ .alpha2 = "VU",
+ .dfs_region = NL80211_DFS_FCC,
+ .reg_rules = {
+ REG_RULE_EXT(2402, 2482, 40, 0, 20, 0, 0),
+ REG_RULE_EXT(5170, 5250, 80, 0, 17, 0,
+ NL80211_RRF_AUTO_BW | 0),
+ REG_RULE_EXT(5250, 5330, 80, 0, 24, 0,
+ NL80211_RRF_DFS |
+ NL80211_RRF_AUTO_BW | 0),
+ REG_RULE_EXT(5490, 5730, 160, 0, 24, 0,
+ NL80211_RRF_DFS | 0),
+ REG_RULE_EXT(5735, 5835, 80, 0, 30, 0, 0),
+ },
+ .n_reg_rules = 5
+};
+
+static const struct ieee80211_regdomain regdom_WF = {
+ .alpha2 = "WF",
+ .dfs_region = NL80211_DFS_ETSI,
+ .reg_rules = {
+ REG_RULE_EXT(2402, 2482, 40, 0, 20, 0, 0),
+ REG_RULE_EXT(5170, 5250, 80, 0, 20, 0,
+ NL80211_RRF_AUTO_BW | 0),
+ REG_RULE_EXT(5250, 5330, 80, 0, 20, 0,
+ NL80211_RRF_DFS |
+ NL80211_RRF_AUTO_BW | 0),
+ REG_RULE_EXT(5490, 5710, 160, 0, 27, 0,
+ NL80211_RRF_DFS | 0),
+ },
+ .n_reg_rules = 4
+};
+
+static const struct ieee80211_regdomain regdom_YE = {
+ .alpha2 = "YE",
+ .reg_rules = {
+ REG_RULE_EXT(2402, 2482, 40, 0, 20, 0, 0),
+ },
+ .n_reg_rules = 1
+};
+
+static const struct ieee80211_regdomain regdom_ZM = {
+ .alpha2 = "ZM",
+ .reg_rules = {
+ REG_RULE_EXT(2402, 2482, 40, 0, 20, 0, 0),
+ },
+ .n_reg_rules = 1
+};
+
+static const struct ieee80211_regdomain regdom_YT = {
+ .alpha2 = "YT",
+ .dfs_region = NL80211_DFS_ETSI,
+ .reg_rules = {
+ REG_RULE_EXT(2402, 2482, 40, 0, 20, 0, 0),
+ REG_RULE_EXT(5170, 5250, 80, 0, 20, 0,
+ NL80211_RRF_AUTO_BW | 0),
+ REG_RULE_EXT(5250, 5330, 80, 0, 20, 0,
+ NL80211_RRF_DFS |
+ NL80211_RRF_AUTO_BW | 0),
+ REG_RULE_EXT(5490, 5710, 160, 0, 27, 0,
+ NL80211_RRF_DFS | 0),
+ },
+ .n_reg_rules = 4
+};
+
+static const struct ieee80211_regdomain regdom_ZA = {
+ .alpha2 = "ZA",
+ .dfs_region = NL80211_DFS_ETSI,
+ .reg_rules = {
+ REG_RULE_EXT(2402, 2482, 40, 0, 20, 0, 0),
+ REG_RULE_EXT(5170, 5250, 80, 0, 20, 0,
+ NL80211_RRF_AUTO_BW | 0),
+ REG_RULE_EXT(5250, 5330, 80, 0, 20, 0,
+ NL80211_RRF_DFS |
+ NL80211_RRF_AUTO_BW | 0),
+ REG_RULE_EXT(5490, 5695, 160, 0, 27, 0,
+ NL80211_RRF_DFS | 0),
+ /*REG_RULE_EXT(5490, 5710, 160, 0, 27, 0,
+ NL80211_RRF_DFS | 0),*/
+ },
+ .n_reg_rules = 4
+};
+
+static const struct ieee80211_regdomain regdom_ZW = {
+ .alpha2 = "ZW",
+ .dfs_region = NL80211_DFS_ETSI,
+ .reg_rules = {
+ REG_RULE_EXT(2402, 2482, 40, 0, 20, 0, 0),
+ REG_RULE_EXT(5170, 5250, 80, 0, 20, 0,
+ NL80211_RRF_AUTO_BW | 0),
+ REG_RULE_EXT(5250, 5330, 80, 0, 20, 0,
+ NL80211_RRF_DFS |
+ NL80211_RRF_AUTO_BW | 0),
+ REG_RULE_EXT(5490, 5710, 160, 0, 27, 0,
+ NL80211_RRF_DFS | 0),
+ },
+ .n_reg_rules = 4
+};
+
+const struct ieee80211_regdomain *reg_regdb1[] = {
+ ®dom_00,
+ ®dom_AD,
+ ®dom_AE,
+ ®dom_AF,
+ ®dom_AI,
+ ®dom_AL,
+ ®dom_AM,
+ ®dom_AN,
+ ®dom_AR,
+ ®dom_AS,
+ ®dom_AT,
+ ®dom_AU,
+ ®dom_AW,
+ ®dom_AZ,
+ ®dom_BA,
+ ®dom_BB,
+ ®dom_BD,
+ ®dom_BE,
+ ®dom_BF,
+ ®dom_BG,
+ ®dom_BH,
+ ®dom_BL,
+ ®dom_BM,
+ ®dom_BN,
+ ®dom_BO,
+ ®dom_BR,
+ ®dom_BS,
+ ®dom_BT,
+ ®dom_BY,
+ ®dom_BZ,
+ ®dom_CA,
+ ®dom_CF,
+ ®dom_CH,
+ ®dom_CI,
+ ®dom_CL,
+ ®dom_CN,
+ ®dom_CO,
+ ®dom_CR,
+ ®dom_CX,
+ ®dom_CY,
+ ®dom_CZ,
+ ®dom_DE,
+ ®dom_DK,
+ ®dom_DM,
+ ®dom_DO,
+ ®dom_DZ,
+ ®dom_EC,
+ ®dom_EE,
+ ®dom_EG,
+ ®dom_ES,
+ ®dom_ET,
+ ®dom_FI,
+ ®dom_FM,
+ ®dom_FR,
+ ®dom_GB,
+ ®dom_GD,
+ ®dom_GE,
+ ®dom_GF,
+ ®dom_GH,
+ ®dom_GL,
+ ®dom_GP,
+ ®dom_GR,
+ ®dom_GT,
+ ®dom_GU,
+ ®dom_GY,
+ ®dom_HK,
+ ®dom_HN,
+ ®dom_HR,
+ ®dom_HT,
+ ®dom_HU,
+ ®dom_ID,
+ ®dom_IE,
+ ®dom_IL,
+ ®dom_IN,
+ ®dom_IR,
+ ®dom_IS,
+ ®dom_IT,
+ ®dom_JM,
+ ®dom_JO,
+ ®dom_JP,
+ ®dom_KE,
+ ®dom_KH,
+ ®dom_KN,
+ ®dom_KP,
+ ®dom_KR,
+ ®dom_KW,
+ ®dom_KY,
+ ®dom_KZ,
+ ®dom_LB,
+ ®dom_LC,
+ ®dom_LI,
+ ®dom_LK,
+ ®dom_LS,
+ ®dom_LT,
+ ®dom_LU,
+ ®dom_LV,
+ ®dom_MA,
+ ®dom_MC,
+ ®dom_MD,
+ ®dom_ME,
+ ®dom_MF,
+ ®dom_MH,
+ ®dom_MK,
+ ®dom_MN,
+ ®dom_MO,
+ ®dom_MP,
+ ®dom_MQ,
+ ®dom_MR,
+ ®dom_MT,
+ ®dom_MU,
+ ®dom_MW,
+ ®dom_MX,
+ ®dom_MY,
+ ®dom_NI,
+ ®dom_NL,
+ ®dom_NO,
+ ®dom_NP,
+ ®dom_NZ,
+ ®dom_OM,
+ ®dom_PA,
+ ®dom_PE,
+ ®dom_PF,
+ ®dom_PG,
+ ®dom_PH,
+ ®dom_PK,
+ ®dom_PL,
+ ®dom_PM,
+ ®dom_PR,
+ ®dom_PT,
+ ®dom_PW,
+ ®dom_PY,
+ ®dom_QA,
+ ®dom_RE,
+ ®dom_RO,
+ ®dom_RS,
+ ®dom_RU,
+ ®dom_RW,
+ ®dom_SA,
+ ®dom_SE,
+ ®dom_SG,
+ ®dom_SI,
+ ®dom_SK,
+ ®dom_SN,
+ ®dom_SR,
+ ®dom_SV,
+ ®dom_SY,
+ ®dom_TC,
+ ®dom_TD,
+ ®dom_TG,
+ ®dom_TH,
+ ®dom_TN,
+ ®dom_TR,
+ ®dom_TT,
+ ®dom_TW,
+ ®dom_UA,
+ ®dom_UG,
+ ®dom_US,
+ ®dom_UY,
+ ®dom_UZ,
+ ®dom_VC,
+ ®dom_VE,
+ ®dom_VI,
+ ®dom_VN,
+ ®dom_VU,
+ ®dom_WF,
+ ®dom_YE,
+ ®dom_ZM,
+ ®dom_YT,
+ ®dom_ZA,
+ ®dom_ZW,
+};
+
+int reg_regdb_size1 = ARRAY_SIZE(reg_regdb1);
+
+