[Feature][R305][task-view-1918] add charger code for V4, old files

Change-Id: I92a33b2136df65fa91700ead93fdae8fd4aa07b3
diff --git a/lynq/R305/V4/ap/os/linux/linux-3.4.x/arch/arm/mach-zx297520v3/zx297520v3-ufi-devices.c b/lynq/R305/V4/ap/os/linux/linux-3.4.x/arch/arm/mach-zx297520v3/zx297520v3-ufi-devices.c
new file mode 100755
index 0000000..59504bb
--- /dev/null
+++ b/lynq/R305/V4/ap/os/linux/linux-3.4.x/arch/arm/mach-zx297520v3/zx297520v3-ufi-devices.c
@@ -0,0 +1,1485 @@
+/*
+ * arch/arm/mach-zx297520v3/zx297520v3_devices.c
+ *
+ *  Copyright (C) 2015 ZTE-TSP
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; either version 2 of the License, or
+ * (at your option) any later version.
+ *
+ */
+#include <asm/mach/arch.h>
+#include <asm/mach/map.h>
+
+#include <linux/dma-mapping.h>
+#include <linux/platform_device.h>
+#include <linux/soc/zte/rpm/rpmsg.h>
+#include <linux/i2c.h>
+
+#include <mach/dma.h>
+#include <mach/board.h>
+#include <mach/iomap.h>
+#include <mach/irqs.h>
+#include <mach/i2c.h>
+#include <mach/gpio.h>
+#include <mach/zx29_mmc.h>
+#include <mach/zx29_uart_def.h>
+#include <linux/soc/zte/tsc/tsc.h>
+
+#if (defined CONFIG_SPI_ZX29) || (defined CONFIG_SPI_GPIO)
+#include <linux/spi/spi.h>
+#include <linux/spi/spi_gpio.h>
+#include <mach/spi.h>
+#include <linux/video/zx29_lcd.h>
+#endif
+
+#ifdef CONFIG_CHARGER_ZX234502
+#include <linux/power/zx234502_charger.h>
+#endif
+#ifdef CONFIG_CHARGER_AW3215
+#include <linux/power/aw3215_charger.h>
+#endif
+#ifdef CONFIG_LEDS_GPIO
+#include <linux/leds.h>
+#endif
+#ifdef CONFIG_MMC_ZX29
+#include <linux/mmc/host.h>
+#endif
+#ifdef CONFIG_KEYBOARD_ZX_INT
+#include <linux/input.h>
+#include <linux/gpio_keys.h>
+#endif
+#ifdef CONFIG_KEYBOARD_ZX_5x6
+#include <linux/input.h>
+#include <linux/input/zx29_keypad_5x6.h>
+#endif
+#ifdef CONFIG_CHARGER_SGM41513
+#include <linux/power/sgm41513_charger.h>
+#endif
+
+#ifdef CONFIG_TCPC_RT1711H
+#include <linux/usb/rt1711.h>
+#endif
+
+#ifdef CONFIG_MFD_ZX234290_I2C
+#include <linux/mfd/zx234290.h>
+#endif
+
+#if (defined CONFIG_SND_SOC_ZX297520V3) || (defined CONFIG_SND_SOC_ZX297520V3_MODULE)
+#include <sound/zx29_snd_platform.h>
+#endif
+#include <mach/gpio_cfg.h>
+
+
+struct zx29_uart_platdata  zx29_uart0_platdata= {
+		.uart_use = 1,
+		.uart_rxd.gpioname = "uart0_rxd",
+		.uart_rxd.gpionum = PIN_UART0_RXD,
+		.uart_rxd.gpiofnc = FNC_UART0_RXD,
+		.uart_txd.gpioname = "uart0_txd",
+		.uart_txd.gpionum = PIN_UART0_TXD,
+		.uart_txd.gpiofnc = FNC_UART0_TXD,
+		.uart_ctsrtsuse = 0,
+		.uart_cts.gpioname = "uart0_cts",
+		.uart_cts.gpionum= PIN_UART0_CTS ,
+		.uart_cts.gpiofnc = FNC_UART0_CTS ,
+		.uart_rts.gpioname = "uart0_rts",
+		.uart_rts.gpionum =PIN_UART0_RTS,
+		.uart_rts.gpiofnc = FNC_UART0_RTS,
+		.uart_abauduse = 0,
+		.uart_input_enable = 0,
+};
+struct zx29_uart_platdata  zx29_uart1_platdata= {
+		.uart_use = 1,
+		.uart_rxd.gpioname = "uart1_rxd",
+		.uart_rxd.gpionum = PIN_UART1_RXD,
+		.uart_rxd.gpiofnc = FNC_UART1_RXD,
+		.uart_txd.gpioname = "uart1_txd",
+		.uart_txd.gpionum = PIN_UART1_TXD,
+		.uart_txd.gpiofnc = FNC_UART1_TXD,
+		.uart_ctsrtsuse = 0,
+#if 0
+		.uart_cts.gpioname = "uart1_cts",
+		.uart_cts.gpionum= PIN_UART1_CTS ,
+		.uart_cts.gpiofnc = FNC_UART1_CTS ,
+		.uart_rts.gpioname = "uart1_rts",
+		.uart_rts.gpionum = PIN_UART1_RTS,
+		.uart_rts.gpiofnc = FNC_UART1_RTS,
+#endif
+		.uart_abauduse = 0,
+		.uart_input_enable = 0,
+};
+struct zx29_uart_platdata  zx29_uart2_platdata= {
+		.uart_use = 0,
+		.uart_rxd.gpioname = "uart2_rxd",
+		.uart_rxd.gpionum = PIN_UART2_RXD,
+		.uart_rxd.gpiofnc = FNC_UART2_RXD,
+		.uart_txd.gpioname = "uart2_txd",
+		.uart_txd.gpionum = PIN_UART2_TXD,
+		.uart_txd.gpiofnc = FNC_UART2_TXD,
+		.uart_ctsrtsuse = 0,
+		.uart_cts.gpioname = "uart2_cts",
+		.uart_cts.gpionum= PIN_UART2_CTS ,
+		.uart_cts.gpiofnc = FNC_UART2_CTS ,
+		.uart_rts.gpioname = "uart2_rts",
+		.uart_rts.gpionum = PIN_UART2_RTS,
+		.uart_rts.gpiofnc = FNC_UART2_RTS,
+		.uart_abauduse = 0,
+		.uart_input_enable = 0,
+};
+/* --------------------------------------------------------------------
+ *  UART
+ * -------------------------------------------------------------------- */
+#ifdef CONFIG_SERIAL_ZX29_UART
+/* UART0*/
+static struct resource zx29_uart0_resources[] = {
+	[0] = {
+		.start	= ZX29_UART0_PHYS,
+		.end	= ZX29_UART0_PHYS + SZ_4K - 1,
+		.flags	= IORESOURCE_MEM,
+	},
+	[1] = {
+		.start	= UART0_MIX_INT,
+		.end	= UART0_MIX_INT,
+		.flags	= IORESOURCE_IRQ,
+	},
+};
+
+static struct platform_device zx29_uart0_device = {
+	.name		= "zx29_uart",
+	.id		= 0,
+	.resource	= zx29_uart0_resources,
+	.num_resources	= ARRAY_SIZE(zx29_uart0_resources),
+	.dev = {
+		.platform_data = &zx29_uart0_platdata,
+	}
+};
+/* UART2*/
+static struct resource zx29_uart1_resources[] = {
+	[0] = {
+		.start	= ZX29_UART1_PHYS,
+		.end	= ZX29_UART1_PHYS + SZ_4K - 1,
+		.flags	= IORESOURCE_MEM,
+	},
+	[1] = {
+		.start	= UART1_MIX_INT,
+		.end	= UART1_MIX_INT,
+		.flags	= IORESOURCE_IRQ,
+	},
+};
+
+static struct platform_device zx29_uart1_device = {
+	.name		= "zx29_uart",
+	.id		= 1,
+	.resource	= zx29_uart1_resources,
+	.num_resources	= ARRAY_SIZE(zx29_uart1_resources),
+	.dev = {
+		.platform_data = &zx29_uart1_platdata,
+	}
+};
+
+/* UART2*/
+static struct resource zx29_uart2_resources[] = {
+	[0] = {
+		.start	= ZX29_UART2_PHYS,
+		.end	= ZX29_UART2_PHYS + SZ_4K - 1,
+		.flags	= IORESOURCE_MEM,
+	},
+	[1] = {
+		.start	= UART2_MIX_INT,
+		.end	= UART2_MIX_INT,
+		.flags	= IORESOURCE_IRQ,
+	},
+};
+
+static struct platform_device zx29_uart2_device = {
+	.name		= "zx29_uart",
+	.id		= 2,
+	.resource	= zx29_uart2_resources,
+	.num_resources	= ARRAY_SIZE(zx29_uart2_resources),
+	.dev = {
+		.platform_data = & zx29_uart2_platdata,
+	}
+};
+#endif
+
+/* --------------------------------------------------------------------
+ *	DMA -- Direct Memory Access
+* -------------------------------------------------------------------- */
+#ifdef CONFIG_ZX29_DMA
+static struct resource zx29_dma_res[] = {
+	[0] = {
+		.start	= (u32)ZX_DMA_PS_BASE,
+		.end	= (u32)ZX_DMA_PS_BASE + SZ_4K - 1,
+		.flags  = IORESOURCE_MEM,
+	},
+	[1] = {
+		.start = PS_DMA_INT,
+		.end   = PS_DMA_INT,
+		.flags = IORESOURCE_IRQ,
+	},
+};
+static struct platform_device zx29_dma_device = {
+	.name = "zx29_dma",
+	.id = 0,
+	.resource = zx29_dma_res,
+	.num_resources	= ARRAY_SIZE(zx29_dma_res),
+};
+#endif
+
+#if (defined CONFIG_SND_SOC_ZX297520V3) || (defined CONFIG_SND_SOC_ZX297520V3_MODULE)
+
+static struct platform_device zx29_audio = {
+	.name		= SND_MACHINE_PDEV_NAME,
+	.id		= -1,
+	.dev		= {
+		.platform_data	= ZX29_SND_MACH_PDATA, //&snd_machine_pdata,
+	},
+};
+#endif
+
+#if (defined CONFIG_SND_SOC_ZX_PCM) || (defined CONFIG_SND_SOC_ZX_PCM_MODULE)
+/* ASOC DMA */
+static unsigned long long zx29_device_dma_mask = DMA_BIT_MASK(32);
+
+struct platform_device zx29_asoc_dma = {
+	.name		= "zx29-pcm-audio",
+	.id		= -1,
+	.dev		= {
+		.dma_mask		= &zx29_device_dma_mask,
+		.coherent_dma_mask	= DMA_BIT_MASK(32),
+	}
+};
+#endif
+
+/* --------------------------------------------------------------------
+ *	I2S
+* -------------------------------------------------------------------- */
+//#ifdef CONFIG_SND_SOC_ZX_I2S
+#if (defined CONFIG_SND_SOC_ZX_I2S) || (defined CONFIG_SND_SOC_ZX_I2S_MODULE)
+#define zx29_I2S0	1
+//#define zx29_I2S1	1
+
+#ifdef zx29_I2S0
+/* I2S0 */
+static struct resource i2s0_res[] = {
+	[0] = {
+		.start	= (u32)ZX_I2S0_BASE,
+		.end	= (u32)ZX_I2S0_BASE + SZ_4K - 1,
+		.flags  = IORESOURCE_MEM,
+	},
+	[1] = {
+		.start = DMA_CH_I2S0_TX,
+		.end   = DMA_CH_I2S0_TX,
+		.flags = IORESOURCE_DMA,
+	},
+	[2] = {
+		.start = DMA_CH_I2S0_RX0,
+		.end   = DMA_CH_I2S0_RX0,
+		.flags = IORESOURCE_DMA,
+	},
+};
+static struct platform_device zx29_i2s0_device = {
+	.name = "zx29_i2s",
+	.id = 0,
+	.resource = i2s0_res,
+	.num_resources	= ARRAY_SIZE(i2s0_res),
+};
+#endif
+
+#ifdef zx29_I2S1
+static struct resource i2s1_res[] = {
+	[0] = {
+		.start	= (u32)ZX_I2S1_BASE,
+		.end	= (u32)ZX_I2S1_BASE + SZ_4K - 1,
+		.flags  = IORESOURCE_MEM,
+	},
+	[1] = {
+		.start = DMA_CH_I2S1_TX,
+		.end   = DMA_CH_I2S1_TX,
+		.flags = IORESOURCE_DMA,
+	},
+	[2] = {
+		.start = DMA_CH_I2S1_RX0,
+		.end   = DMA_CH_I2S1_RX0,
+		.flags = IORESOURCE_DMA,
+	},
+};
+static struct platform_device zx29_i2s1_device = {
+	.name = "zx29_i2s",
+	.id = 1,
+	.resource = i2s1_res,
+	.num_resources	= ARRAY_SIZE(i2s1_res),
+};
+#endif
+#endif
+
+#if (defined CONFIG_SND_SOC_ZX_VOICE) || (defined CONFIG_SND_SOC_ZX_VOICE_MODULE)
+static struct platform_device voice_asoc_device = {
+	.name = "voice_audio",
+	.id = -1,
+};
+#endif
+/* --------------------------------------------------------------------
+ *  MMC / SD
+ * -------------------------------------------------------------------- */
+#ifdef CONFIG_MMC_ZX29
+static struct resource zx29_sdmmc0_resources[] = {
+	[0] = {
+		.start	= ZX_SD0_BASE,
+		.end	= ZX_SD0_BASE + SZ_4K - 1,
+		.flags	= IORESOURCE_MEM,
+	},
+	[1] = {
+		.start	= SD0_INT,
+		.end	= SD0_INT,
+		.flags	= IORESOURCE_IRQ,
+	},
+};
+
+struct dw_mci_board zx29_sdmmc0_platdata = {
+	.num_slots	= 1,
+#if 1//def CONFIG_RTL8192CD
+	.quirks = DW_MCI_QUIRK_BROKEN_CARD_DETECTION | DW_MCI_QUIRK_SDIO \
+	| DW_MCI_QUIRK_UNALIGN_DMA_SZ | DW_MCI_QUIRK_UNALIGN_DMA_START |DW_MCI_QUIRK_CLK_PHASE_TURN ,
+	.caps	= (MMC_CAP_4_BIT_DATA | MMC_CAP_MMC_HIGHSPEED | MMC_CAP_SD_HIGHSPEED |MMC_CAP_UHS_SDR50 | MMC_CAP_SDIO_IRQ |MMC_CAP_NONREMOVABLE),
+#else
+	.quirks = DW_MCI_QUIRK_BROKEN_CARD_DETECTION | DW_MCI_QUIRK_SDIO,
+	.caps	= (MMC_CAP_4_BIT_DATA | MMC_CAP_MMC_HIGHSPEED | MMC_CAP_SD_HIGHSPEED |MMC_CAP_UHS_SDR50),
+#endif
+
+#ifdef CONFIG_SSV6X5X
+	.bus_hz = 50*1000*1000,
+#else
+	.bus_hz = 100*1000*1000,
+#ifdef CONFIG_AIC8800
+	.bus_hz = 100 *1000*1000,
+#endif
+#endif
+	.pm_caps = MMC_PM_KEEP_POWER | MMC_PM_IGNORE_PM_NOTIFY,
+	.data1_irq = SD0_DATA1_INT,
+};
+static struct platform_device zx29_sdmmc0_device = {
+	.name		= "zx29_sd",
+	.id		= 0,
+	.resource	= zx29_sdmmc0_resources,
+	.num_resources	= ARRAY_SIZE(zx29_sdmmc0_resources),
+	.dev		= {
+		.coherent_dma_mask	= 0xffffffffUL,
+		.platform_data		= &zx29_sdmmc0_platdata,
+	},
+};
+static struct resource zx29_sdmmc1_resources[] = {
+	[0] = {
+		.start	= ZX_SD1_BASE,
+		.end	= ZX_SD1_BASE + SZ_4K - 1,
+		.flags	= IORESOURCE_MEM,
+	},
+	[1] = {
+		.start	= SD1_INT,
+		.end	= SD1_INT,
+		.flags	= IORESOURCE_IRQ,
+	},
+};
+
+struct dw_mci_board zx29_sdmmc1_platdata = {
+	.num_slots	= 1,
+#ifdef CONFIG_XR_WLAN
+	.quirks = DW_MCI_QUIRK_BROKEN_CARD_DETECTION | DW_MCI_QUIRK_SDIO \
+	| DW_MCI_QUIRK_UNALIGN_DMA_SZ | DW_MCI_QUIRK_UNALIGN_DMA_START,
+	.bus_hz = 100*1000*1000,
+	.caps	= (MMC_CAP_4_BIT_DATA | MMC_CAP_MMC_HIGHSPEED | MMC_CAP_SD_HIGHSPEED |MMC_CAP_UHS_SDR50 | MMC_CAP_SDIO_IRQ|MMC_CAP_NONREMOVABLE),
+	.pm_caps = MMC_PM_KEEP_POWER | MMC_PM_IGNORE_PM_NOTIFY,
+	.data1_irq = SD1_DATA1_INT,
+#else
+     .bus_hz = 50*1000*1000,
+	 .caps	= (MMC_CAP_4_BIT_DATA | MMC_CAP_MMC_HIGHSPEED | MMC_CAP_SD_HIGHSPEED),
+     .detect_delay_ms = 500,
+#endif
+	//.init = sdmmc_init,
+	//.setpower = sdmmc_set_power,
+
+	//.detect_delay_ms = 500,
+};
+
+
+static struct platform_device zx29_sdmmc1_device = {
+	.name		= "zx29_sd",
+	.id		= 1,
+	.resource	= zx29_sdmmc1_resources,
+	.num_resources	= ARRAY_SIZE(zx29_sdmmc1_resources),
+	.dev		= {
+		.coherent_dma_mask	= 0xffffffffUL,
+		.platform_data		= &zx29_sdmmc1_platdata,
+	},
+};
+#endif
+
+/* --------------------------------------------------------------------
+ *  NAND
+ * -------------------------------------------------------------------- */
+#ifdef CONFIG_MTD_ZXIC_SPIFC
+ static struct resource spi_nand_resource[] = {
+	  [0] = {
+		  .start  = ZX_SPIFC0_BASE,
+		  .end	  = ZX_SPIFC0_BASE + SZ_4K - 1,
+		  .flags  = IORESOURCE_MEM,
+		  .name   = "spifc_reg",
+	  },
+	  [2] = {
+		  .start  = SPI_FC0_INT,
+		  .end	  = SPI_FC0_INT,
+		  .flags  = IORESOURCE_IRQ,
+
+	  },
+  };
+#endif
+#ifdef CONFIG_MTD_NAND_DENALI
+static struct resource denali_nand_resource[] = {
+	[0] = {
+		.start	= ZX_NAND_REG_BASE,
+		.end	= ZX_NAND_REG_BASE + SZ_4K - 1,
+		.flags	= IORESOURCE_MEM,
+		.name   = "denali_reg",
+	},
+	[1] = {
+		.start	= ZX_NAND_DATA_BASE,
+		.end	= ZX_NAND_DATA_BASE + SZ_4K - 1,
+		.flags	= IORESOURCE_MEM,
+		.name   = "nand_data",
+	},
+    [2] = {
+		.start	= NAND_INT,
+		.end	= NAND_INT,
+		.flags	= IORESOURCE_IRQ,
+
+	},
+};
+struct denali_nand_data {
+	struct mtd_partition *parts;
+	int (*dev_ready)(struct mtd_info *mtd);
+	u32 nr_parts;
+	u8 ale;		/* address line number connected to ALE */
+	u8 cle;		/* address line number connected to CLE */
+	u8 width;	/* buswidth */
+	u8 chip_delay;
+};
+static struct denali_nand_data zx29_nand_data = {
+	.cle		= 0,
+	.ale		= 1,
+	.width		= 8,
+};
+struct platform_device zx29_device_nand = {
+	.name		= "denali-nand-dt",
+	.id		= -1,
+	.dev		= {
+		.platform_data	= &zx29_nand_data,
+	},
+	.num_resources	= ARRAY_SIZE(denali_nand_resource),
+	.resource	= denali_nand_resource,
+};
+#endif
+
+#ifdef CONFIG_MTD_ZXIC_SPIFC
+struct platform_device zx29_device_spi_nand = {
+	.name		= "spi-nand-dt",
+	.id		= -1,
+	.num_resources	= ARRAY_SIZE(spi_nand_resource),
+	.resource	= spi_nand_resource,
+};
+#endif
+
+/*
+ *--------------------------------------------------------------------
+ *  						NOR
+ * --------------------------------------------------------------------
+ */
+
+#ifdef CONFIG_SPI_ZXIC_NOR
+ static struct resource spi_nor_resource[] = {
+	  [0] = {
+		  .start  = ZX_SPIFC0_BASE,
+		  .end	  = ZX_SPIFC0_BASE + SZ_4K - 1,
+		  .flags  = IORESOURCE_MEM,
+		  .name   = "spi_nor_reg",
+	  },
+	  [2] = {
+		  .start  = SPI_FC0_INT,
+		  .end	  = SPI_FC0_INT,
+		  .flags  = IORESOURCE_IRQ,
+
+	  },
+  };
+
+struct platform_device zx29_device_spi_nor = {
+	.name		= "spi-nor-dt",
+	.id		= -1,
+	.num_resources	= ARRAY_SIZE(spi_nor_resource),
+	.resource	= spi_nor_resource,
+};
+#endif
+
+
+
+/* --------------------------------------------------------------------
+ *  I2C
+ * -------------------------------------------------------------------- */
+#ifdef CONFIG_I2C_ZX29
+
+#define zx29_pmic_i2c	1
+#define zx29_I2C0		1
+
+
+#ifdef zx29_pmic_i2c
+static struct zx29_i2c_platform_data zx29_pmic_i2c_platform_data = {
+	.bus_clk_rate   = 300000,
+};
+
+static struct resource pmic_i2c_resources[] = {
+	[0] = {
+		.start	= (u32)ZX_PMIC_I2C_BASE,
+		.end	= (u32)ZX_PMIC_I2C_BASE + SZ_4K - 1,
+		.flags	= IORESOURCE_MEM,
+	},
+	[1] = {
+		.start	= I2C0_INT,
+		.end	= I2C0_INT,
+		.flags	= IORESOURCE_IRQ,
+	},
+};
+
+static struct platform_device zx29_pmic_i2c_device = {
+	.name		= "zx29_i2c",
+	.id 	    = 0,
+	.resource	= pmic_i2c_resources,
+	.num_resources	= ARRAY_SIZE(pmic_i2c_resources),
+	.dev = {
+		.platform_data = &zx29_pmic_i2c_platform_data,
+	},
+};
+#endif
+
+#ifdef zx29_I2C0
+static struct zx29_i2c_platform_data zx29_i2c0_platform_data = {
+	.bus_clk_rate	 = 300000,
+};
+
+static struct resource i2c0_resources[] = {
+	[0] = {
+		.start	= (u32)ZX_I2C1_BASE,
+		.end	= (u32)ZX_I2C1_BASE + SZ_4K - 1,
+		.flags	= IORESOURCE_MEM,
+	},
+	[1] = {
+		.start	= I2C1_INT,
+		.end	= I2C1_INT,
+		.flags	= IORESOURCE_IRQ,
+	},
+};
+
+static struct platform_device zx29_i2c0_device = {
+	.name		= "zx29_i2c",
+	.id 	    = 1,
+	.resource	= i2c0_resources,
+	.num_resources	= ARRAY_SIZE(i2c0_resources),
+	.dev = {
+		.platform_data = &zx29_i2c0_platform_data,
+	},
+};
+#endif
+
+
+#endif //end CONFIG_I2C_ZX29
+
+/* --------------------------------------------------------------------
+ *  SPI
+ * -------------------------------------------------------------------- */
+#ifdef CONFIG_SPI_ZX29
+static struct resource spi0_resources[] = {
+	[0]={
+		.start	= ZX_SSP0_BASE,
+		.end	= ZX_SSP0_BASE + SZ_32 - 1,
+		.name	= "registers",
+		.flags	= IORESOURCE_MEM,
+	},
+	[1]={
+		.start	= SSP0_INT,
+		.end	= SSP0_INT,
+		.name	= "interrupt",
+		.flags	= IORESOURCE_IRQ,
+	},
+};
+
+static struct zx29_spi_controller spi0_data ={
+	.bus_id = 0,
+	.num_chipselect = 1,
+	.enable_dma = 1,
+	.autosuspend_delay=0,
+	.dma_tx_param = (void*) DMA_CH_SSP0_TX,
+	.dma_rx_param = (void*) DMA_CH_SSP0_RX,
+};
+
+static struct platform_device zx29_ssp0_device = {
+	.name		= "zx29_ssp",
+	.id 	= 0,
+	.dev	={
+			.platform_data = &spi0_data,
+		},
+	.resource	= spi0_resources,
+	.num_resources	= ARRAY_SIZE(spi0_resources),
+};
+#endif
+
+/* --------------------------------------------------------------------
+ *  USB
+ * -------------------------------------------------------------------- */
+#ifdef CONFIG_DWC_OTG_USB
+/* USB 20*/
+static struct resource zx29_usb0_resources[] = {
+	[0] = {
+		.start	= ZX29_USB_PHYS,
+		.end	= ZX29_USB_PHYS + SZ_256K - 1,
+		.flags	= IORESOURCE_MEM,
+	},
+	[1] = {
+		.name   = "usb_int",
+		.start	= USB_INT,
+		.end	= USB_INT,
+		.flags	= IORESOURCE_IRQ,
+	},
+	[2] = {
+	 	 .name   = "usb_powerdown_up",
+		 .start  = USB_POWERDWN_UP_INT,
+		 .end	 = USB_POWERDWN_UP_INT,
+		 .flags  = IORESOURCE_IRQ,
+	},
+	[3] = {
+	 	 .name   = "usb_powerdown_down",
+		 .start  = USB_POWERDWN_DOWN_INT,
+		 .end	 = USB_POWERDWN_DOWN_INT,
+		 .flags  = IORESOURCE_IRQ,
+	},
+};
+
+static struct platform_device zx29_usb0_device = {
+	.name		= "zx29_hsotg",
+	.id		= 0,
+	.resource	= zx29_usb0_resources,
+	.num_resources	= ARRAY_SIZE(zx29_usb0_resources),
+};
+#endif
+
+#ifdef CONFIG_USB_DWC_OTG_HCD
+ /* HSIC*/
+static struct resource zx29_usb1_resources[] = {
+ [0] = {
+	 .start  = ZX29_HSIC_PHYS,
+	 .end	 = ZX29_HSIC_PHYS + SZ_256K - 1,
+	 .flags  = IORESOURCE_MEM,
+ },
+ [1] = {
+ 	 .name   = "hsic_int",
+	 .start  = HSIC_INT,
+	 .end	 = HSIC_INT,
+	 .flags  = IORESOURCE_IRQ,
+ },
+ [2] = {
+ 	 .name   = "hsic_powerdown_up",
+	 .start  = HSIC_POWERDWN_UP_INT,
+	 .end	 = HSIC_POWERDWN_UP_INT,
+	 .flags  = IORESOURCE_IRQ,
+ },
+ [3] = {
+ 	 .name   = "hsic_powerdown_down",
+	 .start  = HSIC_POWERDWN_DOWN_INT,
+	 .end	 = HSIC_POWERDWN_DOWN_INT,
+	 .flags  = IORESOURCE_IRQ,
+ },
+};
+
+static struct platform_device zx29_usb1_device = {
+ .name		 = "zx29_hsic",
+ .id	 = 1,
+ .resource	 = zx29_usb1_resources,
+ .num_resources  = ARRAY_SIZE(zx29_usb1_resources),
+};
+#endif
+
+/* --------------------------------------------------------------------
+ * ICP
+ * -------------------------------------------------------------------- */
+#ifdef CONFIG_RPM_ZX29
+ /*ICP_M0/ICP_ARM0*/
+static struct zx29_rpmsg_platform_data rpmsg_m0_platform_data = {
+	.iram_send_base	= (u32)ICP_IRAM_APM0_BASEADDR,
+	.iram_send_size	= ICP_IRAM_APM0_SIZE,
+  	.iram_recv_base	= (u32)ICP_IRAM_M0AP_BASEADDR,
+	.iram_recv_size	= ICP_IRAM_M0AP_SIZE,
+  	.ddr_send_base	= (u32)ICP_DDR_APM0_BASEADDR,
+  	.ddr_send_size	= ICP_DDR_APM0_SIZE,
+  	.ddr_recv_base	= (u32)ICP_DDR_M0AP_BASEADDR,
+  	.ddr_recv_size	= ICP_DDR_M0AP_SIZE,
+  	.max_channel_cnt= CHANNEL_AP2M0_MAXID,
+};
+
+static struct resource icp_m0_resources[] = {
+	[0] = {
+		.start	= ICP_M02PS_INT,
+		.end	= ICP_M02PS_INT,
+		.flags	= IORESOURCE_IRQ,
+	},
+	[1] = {
+		.start	= (u32)ZX29_ICP_APM0_REG,
+		.end	= (u32)ZX29_ICP_APM0_REG + 0x30,
+		.flags	= IORESOURCE_MEM,
+		.name 	= "icp",
+	},
+
+};
+
+static struct zx29_rpmsg_platform_data rpmsg_ps_platform_data = {
+	.iram_send_base	= (u32)ICP_IRAM_APPS_BASEADDR,
+	.iram_send_size	= ICP_IRAM_APPS_SIZE,
+  	.iram_recv_base	= (u32)ICP_IRAM_PSAP_BASEADDR,
+	.iram_recv_size	= ICP_IRAM_PSAP_SIZE,
+  	.ddr_send_base	= (u32)ICP_DDR_APPS_BASEADDR,
+  	.ddr_send_size	= ICP_DDR_APPS_SIZE,
+  	.ddr_recv_base	= (u32)ICP_DDR_PSAP_BASEADDR,
+  	.ddr_recv_size	= ICP_DDR_PSAP_SIZE,
+  	.max_channel_cnt= CHANNEL_AP2PS_MAXID,
+};
+
+static struct resource icp_ps_resources[] = {
+	[0] = {
+		.start	= ICP_AP2PS_INT,
+		.end	= ICP_AP2PS_INT,
+		.flags	= IORESOURCE_IRQ,
+	},
+	[1] = {
+		.start	= (u32)ZX29_ICP_APPS_REG,
+		.end	= (u32)ZX29_ICP_APPS_REG + 0x30,
+		.flags	= IORESOURCE_MEM,
+		.name 	= "icp",
+	},
+};
+
+/* AP <--> m0 */
+static struct platform_device zx29_icp_m0_device = {
+	.name		= "icp",
+	.id			= 0,
+	.resource	= icp_m0_resources,
+	.num_resources	= ARRAY_SIZE(icp_m0_resources),
+	.dev = {
+		.platform_data = &rpmsg_m0_platform_data,
+	},
+};
+
+/* AP <--> ps */
+static struct platform_device zx29_icp_ps_device = {
+	.name		= "icp",
+	.id			= 1,
+	.resource	= icp_ps_resources,
+	.num_resources	= ARRAY_SIZE(icp_ps_resources),
+	.dev = {
+		.platform_data = &rpmsg_ps_platform_data,
+	},
+};
+#endif
+
+/* --------------------------------------------------------------------
+ *	WDT -- ap watchdog timer
+* -------------------------------------------------------------------- */
+#ifdef CONFIG_ZX29_WATCHDOG
+static struct resource wdt_res[] = {
+	[0] = {
+		.start	= (u32)ZX_AP_WDT_BASE,
+		.end	= (u32)ZX_AP_WDT_BASE + SZ_4K - 1,
+		.flags  = IORESOURCE_MEM,
+	},
+	[1] = {
+		.start = WDT_INT,
+		.end   = WDT_INT,
+		.flags = IORESOURCE_IRQ,
+	},
+};
+static struct platform_device zx29_wdt_device = {
+	.name = "zx29_ap_wdt",
+	.id = 0,
+	.resource = wdt_res,
+	.num_resources	= ARRAY_SIZE(wdt_res),
+};
+#endif
+
+#ifdef CONFIG_LEDS_GPIO
+
+struct gpio_led leds[]={
+	{
+		.name = "modem_r_led",
+		.pin_select = 0,/*gpio*/
+		.gpio = PIN_LED_MODEM_RED,
+		.func = LED_MODEM_RED_FUNC_SEL,
+		.active_low = 0,
+	},
+	#ifdef CONFIG_MIN_VERSION
+	{
+		.name = "modem_g_led",	
+			.pin_select = 0,/*gpio*/
+		.gpio = PIN_LED_MODEM_GREEN,
+		.func = LED_MODEM_GREEN_FUNC_SEL,
+		.active_low = 0,
+	},
+	{
+		.name = "modem_b_led",
+		.pin_select = 0,/*gpio*/
+		.gpio = PIN_LED_MODEM_BLUE,
+		.func = LED_MODEM_BLUE_FUNC_SEL,
+		.active_low = 0,
+	},
+	#endif
+#if 0
+	{
+		.name = "sms_led",
+		.pin_select = 0,/*gpio*/
+		.gpio = PIN_LED_SMS,
+		.func = LED_SMS_FUNC_SEL,
+		.active_low = 0,
+	},
+#endif
+	{
+		.name = "wifi_led",	
+		.pin_select = 0,/*gpio*/
+		.gpio = PIN_LED_WIFI,
+		.func = LED_WIFI_FUNC_SEL,
+		.active_low = 0,
+	},
+	{
+		.name = "battery_25_led",			
+		.pin_select = 0,/*gpio*/
+		.gpio = PIN_LED_BATTARY_RED,
+		.func = LED_BATTARY_RED_FUNC_SEL,
+		.active_low = 0,
+		.default_state=LEDS_GPIO_DEFSTATE_ON,
+	},
+	{
+		.name = "battery_75_led",
+		.pin_select = 0,/*gpio*/
+		.gpio = PIN_LED_BATTARY_GREEN,
+		.func = LED_BATTARY_GREEN_SEL,
+		.active_low = 0,
+		//.hw_timer = 1,
+		//.retain_state_suspended = 1,
+	},
+	{
+		.name = "battery_50_led",
+		.pin_select = 0,/*gpio*/
+		.gpio = PIN_LED_BATTARY_BLUE,
+		.func = LED_BATTARY_BLUE_SEL,
+		.active_low = 0,
+		//.hw_timer = 1,
+		//.retain_state_suspended = 1,
+	},
+	{
+		.name = "battery_100_led",
+		.pin_select = 0,/*gpio*/
+		.gpio = ZX29_GPIO_28,
+		.func = GPIO28_GPIO28,
+		.active_low = 0,
+		//.hw_timer = 1,
+		//.retain_state_suspended = 1,
+	}
+	/*,
+	{
+		.name = "sink1",
+		.pin_select = 1,
+		//.gpio = PIN_LED_BATTARY_GREEN,
+		//.func = LED_BATTARY_GREEN_SEL,
+		.active_low = 0,
+		//.hw_timer = 1,
+		//.retain_state_suspended = 1,
+	}*/
+	
+};
+
+extern  int  platform_gpio_blink_set(unsigned pin_sel,unsigned gpio, int state,
+			unsigned long *delay_on, unsigned long *delay_off);
+
+static struct gpio_led_platform_data leds_data =
+{
+	.num_leds =sizeof(leds)/sizeof(leds[0]) ,
+	.leds = leds,
+	.gpio_blink_set=platform_gpio_blink_set,
+
+};
+
+static struct platform_device leds_device =
+{
+	.name		= "leds-gpio",
+	.id		= 1,
+	.dev		= {
+		.platform_data	= &leds_data,
+	},
+};
+#endif
+
+
+#ifdef CONFIG_KEYBOARD_ZX_INT
+/* --------------------------------------------------------------------
+ *  Keypad (power_on, ufi, ufi_reset) for ufi
+ * -------------------------------------------------------------------- */
+static struct gpio_keys_button zx29_keypad_int[] = {
+	#if 1
+	{
+		.active_low	= 1,				/*ÊÇ·ñµÍµçƽÓÐЧ¡£1: °´ÏÂΪµÍµçƽ  0: °´ÏÂΪ¸ßµçƽ*/
+		.desc       = "kpd_power",
+		.code       = KEY_POWER         /* power: 116 */,
+		.use_pmu_pwron = 1,             /*true: use pmu pwron interrupt fase: use zx297520v2 ext int*/
+		/*
+		// unnecessary for the situation of (.use_pmu_pwron = 1)
+		.gpio		= PIN_KPD_POWER,
+		.gpio_sel_gpio = KPD_POWER_FUNC_GPIO,
+		.gpio_sel_int = KPD_POWER_FUNC_INT,
+		*/
+    },
+	#endif
+
+	#if 0
+	{
+		.gpio		= ZX29_GPIO_53,
+		.active_low	= 1,
+		.desc       = "kpd_wps",
+		.code       = KEY_KPEQUAL,       /* wps: 117 */
+		.gpio_sel_gpio = GPIO53_GPIO53,
+		.gpio_sel_int = GPIO53_EXT_INT6,
+    },
+	#endif
+
+    #if 1
+	{
+		.gpio		= ZX29_GPIO_53,
+		.active_low	= 1,
+		.desc       = "kpd_reset",
+		.code       = KEY_KPPLUSMINUS,   /* reset: 118 */
+		.gpio_sel_gpio = GPIO53_GPIO53,
+		.gpio_sel_int = GPIO53_EXT_INT6,
+    },
+	#endif
+};
+
+static struct gpio_keys_platform_data zx29_keypad_int_data = {
+	.buttons	= zx29_keypad_int,
+	.nbuttons	= ARRAY_SIZE(zx29_keypad_int),
+};
+
+static struct platform_device zx29_keypad_int_device ={
+	.name 	= 	"zx29_keypad_int",
+	.id 	=	-1,
+	.dev	= 	{
+		.platform_data = &zx29_keypad_int_data,
+	}
+};
+#endif
+
+#ifdef CONFIG_KEYBOARD_ZX_5x6
+static struct zx29_5x6_keypad_platform_data zx29_5x6_keypad_data = {
+	.key_map = {
+		{11,  12,  13,  14,  15,  16},
+		{21,  22,  23,  24,  25,  26},
+		{31,  32,  33,  34,  35,  36},
+		{41,  42,  43,  44,  45,  46},
+		{51,  52,  53,  54,  55,  56}
+	},
+	.pin_col_row = {83, 84, 85, 86},
+};
+
+static struct resource kpd5x6_resources[] = {
+	{
+		.start	= KEYPAD_INT,
+		.end	= KEYPAD_INT,
+		.flags	= IORESOURCE_IRQ,
+	},
+};
+
+static struct platform_device zx29_5x6_keypad_device ={
+	.name 	= 	"zx29_keypad",
+	.id 	=	0,
+	.resource		= kpd5x6_resources,
+	.num_resources	= ARRAY_SIZE(kpd5x6_resources),
+	.dev	= {
+        .platform_data = &zx29_5x6_keypad_data,
+    }
+};
+#endif
+
+#ifdef CONFIG_NET_ZX29_GMAC
+/* gmac*/
+#if 0
+static struct resource gmac_resources[] = {
+	[0] = {
+		.start	= ZX_GMAC_BASE,
+		.end	= ZX_GMAC_BASE + SZ_8K - 1,
+		.flags	= IORESOURCE_MEM,
+	},
+	[1] = {
+		.start	= GMAC_INT,
+		.end	= GMAC_INT,
+		.flags	= IORESOURCE_IRQ,
+	},
+};
+#endif
+#if 1
+static struct resource zx29_gmac_resources[] = {
+	[0] = {
+		.start	= ZX_GMAC_BASE,
+		.end	= ZX_GMAC_BASE + SZ_8K - 1,
+		.flags	= IORESOURCE_MEM,
+	},
+#if 0
+	[1] = {
+		.name   = "gmac_int",
+		.start	= GMAC_INT,
+		.end	= GMAC_INT,
+		.flags	= IORESOURCE_IRQ,
+	},
+	[2] = {
+		.name   = "phy_int",
+		.start	= GMACPHY_INT,
+		.end	= GMACPHY_INT,
+		.flags	= IORESOURCE_IRQ,
+	},
+#endif
+};
+#endif
+static struct platform_device zx29_gmac_device = {
+	.name		= "zx29_gmac",
+	.id		= 0,
+	.resource	= zx29_gmac_resources,
+	.num_resources	= ARRAY_SIZE(zx29_gmac_resources),
+	.dev	 = {
+			.platform_data = NULL,
+		    }
+};
+#endif
+
+#ifdef CONFIG_CHARGER_AW3215
+static struct  aw3215_platform_data aw3215_charger_platform = {
+	.gpio_chgen = ZX29_GPIO_27,
+	.gpio_chgen_gpio_sel = GPIO27_GPIO27,
+	.gpio_chgin = ZX29_GPIO_125,
+	.gpio_chgin_fun_sel = GPIO125_EXT_INT14,
+	.gpio_chgin_gpio_sel =GPIO125_GPIO125 ,
+	.gpio_chgstate = ZX29_GPIO_51,
+	.gpio_chgstate_fun_sel = GPIO51_EXT_INT4,
+	.gpio_chgstate_gpio_sel = GPIO51_GPIO51,
+	.gpio_chgstate2 = ZX29_GPIO_50,
+	.gpio_chgstate2_fun_sel = GPIO50_EXT_INT3,
+	.gpio_chgstate2_gpio_sel = GPIO50_GPIO50,
+	.gpio_dischg_en = ZX29_GPIO_119,
+	.gpio_dischg_en_gpio_sel = GPIO119_GPIO119,
+	.gpio_5v_out_in = ZX29_GPIO_36,
+	.gpio_5v_out_in_gpio_sel = GPIO36_GPIO36,
+};
+
+static struct platform_device zx29_charger_device = {
+	.name		= "aw3215-charger",
+	.id		= 0,
+	.dev	 = {
+			.platform_data = &aw3215_charger_platform,
+		    }
+};
+#endif
+
+#ifdef CONFIG_TCPC_RT1711H
+static struct platform_device rt_pd_manager = {
+	.name		= "rt-pd-manager",
+	.id		= 0
+};
+#endif
+
+#ifdef CONFIG_DWC_DEVICE_GPIO_CHARGER
+static struct platform_device zx29_usb_detect_device = {
+	.name		= "usb_detect",
+	.id		= 0,
+};
+#endif
+
+/* --------------------------------------------------------------------
+ *	----------  for  solution integration department ---------   end
+* -------------------------------------------------------------------- */
+
+
+/*
+ *  device tab used by board_init()
+ */
+struct platform_device *zx29_device_table[] __initdata={
+/* --------------------------------------------------------------------
+ *	----------  for  solution integration department ---------   start
+* -------------------------------------------------------------------- */
+#ifdef CONFIG_SERIAL_ZX29_UART
+	//&zx29_uart0_device,
+	&zx29_uart1_device,
+	//&zx29_uart2_device,
+#endif
+#ifdef CONFIG_MTD_NAND_DENALI
+	&zx29_device_nand,
+#endif
+#ifdef CONFIG_DWC_OTG_USB
+	&zx29_usb0_device,
+#endif
+#ifdef CONFIG_DWC_DEVICE_GPIO_CHARGER
+	&zx29_usb_detect_device,
+#endif
+#ifdef CONFIG_USB_DWC_OTG_HCD
+	&zx29_usb1_device,
+#endif
+#ifdef CONFIG_MTD_ZXIC_SPIFC
+	&zx29_device_spi_nand,
+#endif
+
+#ifdef CONFIG_SPI_ZXIC_NOR
+	&zx29_device_spi_nor,
+#endif
+
+
+#ifdef CONFIG_ZX29_DMA
+	&zx29_dma_device,
+#endif
+
+#ifdef CONFIG_MMC_ZX29
+#ifdef CONFIG_XR_WLAN
+    //&zx29_sdmmc1_device,
+#else
+    &zx29_sdmmc0_device,
+    //&zx29_sdmmc1_device,
+#endif
+#endif
+
+#ifdef CONFIG_I2C_ZX29
+
+#ifdef zx29_pmic_i2c
+	&zx29_pmic_i2c_device,
+#endif
+
+#ifdef zx29_I2C0
+	&zx29_i2c0_device,
+#endif
+
+#endif
+
+#ifdef CONFIG_SPI_ZX29
+	&zx29_ssp0_device,
+#endif
+
+#ifdef CONFIG_RPM_ZX29
+	&zx29_icp_m0_device,
+	&zx29_icp_ps_device,
+#endif
+
+#ifdef CONFIG_ZX29_WATCHDOG
+	&zx29_wdt_device,
+#endif
+
+#ifdef CONFIG_KEYBOARD_ZX_5x6
+	&zx29_5x6_keypad_device,
+#endif
+
+#ifdef CONFIG_KEYBOARD_ZX_INT
+    &zx29_keypad_int_device,
+#endif
+
+#ifdef CONFIG_CHARGER_AW3215
+       &zx29_charger_device,
+#endif
+
+#ifdef CONFIG_LEDS_GPIO
+       &leds_device,
+#endif
+
+#ifdef CONFIG_NET_ZX29_GMAC
+ 	&zx29_gmac_device,
+#endif
+
+#if (defined CONFIG_SND_SOC_ZX_I2S) || (defined CONFIG_SND_SOC_ZX_I2S_MODULE)
+#ifdef zx29_I2S0
+	&zx29_i2s0_device,
+#endif
+#ifdef zx29_I2S1
+	&zx29_i2s1_device,
+#endif
+#endif
+
+#if (defined CONFIG_SND_SOC_ZX_VOICE) || (defined CONFIG_SND_SOC_ZX_VOICE_MODULE)
+	&voice_asoc_device,
+#endif
+
+#if (defined CONFIG_SND_SOC_ZX_PCM) || (defined CONFIG_SND_SOC_ZX_PCM_MODULE)
+	&zx29_asoc_dma,
+#endif
+#if (defined CONFIG_SND_SOC_ZX297520V3) || (defined CONFIG_SND_SOC_ZX297520V3_MODULE)
+	&zx29_audio,
+#endif
+
+#ifdef CONFIG_TCPC_RT1711H
+   &rt_pd_manager,
+#endif
+};
+
+unsigned int zx29_device_table_num=ARRAY_SIZE(zx29_device_table);
+
+#if (defined CONFIG_SPI_ZX29) || (defined CONFIG_SPI_GPIO)
+struct zx29_lcd_platform_data lead_lcd_platform = {
+	.spi_dcx_gpio = PIN_SPI_DCX,
+	.spi_dcx_gpio_fun_sel = SPI_DCX_FUNC_SEL,
+	.lcd_blg_gpio = PIN_LCD_BLG,
+	.lcd_blg_gpio_fun_sel = LCD_BLG_FUNC_SEL,
+	.lcd_rst_gpio = PIN_LCD_RST,
+	.lcd_rst_gpio_fun_sel =LCD_RST_FUNC_SEL,
+};
+
+static const struct spi_config_chip lead_lcd_chip_info = {
+	.com_mode = DMA_TRANSFER,
+	.iface = SPI_INTERFACE_MOTOROLA_SPI,
+	.hierarchy = SPI_MASTER,
+	.slave_tx_disable = 1,//DO_NOT_DRIVE_TX
+	.rx_lev_trig = SPI_RX_4_OR_MORE_ELEM,
+	.tx_lev_trig = SPI_TX_4_OR_MORE_EMPTY_LOC,
+//	.ctrl_len = SSP_BITS_8,
+//	.wait_state = SSP_MWIRE_WAIT_ZERO,
+//	.duplex = SSP_MICROWIRE_CHANNEL_FULL_DUPLEX,
+//	.cs_control = null_cs_control,
+};
+static struct spi_board_info zx29_spi_devices[] = {
+#ifdef CONFIG_FB_LEADT15DS26
+    {
+        .modalias 	    = "lead_t15ds26",
+        .bus_num 	    = 0,
+        .chip_select 	= 0,
+        .max_speed_hz	= 13000000,
+        .mode		    = SPI_MODE_3,
+        .platform_data 	= &lead_lcd_platform,
+        .controller_data = &lead_lcd_chip_info,
+    },
+#endif
+};
+void __init spi_add_devices(void)
+{
+	unsigned  devices_num = ARRAY_SIZE(zx29_spi_devices);
+    int ret = 0;
+	printk("spi_register_board_info success,devices_num=%d\n",devices_num);
+	if (devices_num){
+		ret = spi_register_board_info(zx29_spi_devices, devices_num);
+		printk("spi_register_board_info success,ret=%d\n",ret);
+		if(ret)
+			BUG();
+	}
+}
+#endif
+
+#ifdef CONFIG_CHARGER_ZX234502
+
+#define ZX234502_BAT_VOLTAGE_LEN  21
+
+struct zx234502_bat_calibration zx234502_bat_volage_charge[]=
+{
+	{4100,100}, {4090,95}, {4080,90}, {4070,85}, {4060,80}, {4050,75},
+	{4012,70}, {3973,65}, {3935,60}, {3896,55}, {3860,50}, {3817,45},
+	{3775,40}, {3733,35}, {3692,30}, {3650,25}, {3610,20}, {3570,15},
+	{3530,12}, {3590,10}, {3450,5}
+};
+
+struct zx234502_bat_calibration zx234502_bat_volage_discharge[]=
+{
+	{4100,100}, {4090,95}, {4080,90}, {4070,85}, {4060,80}, {4050,75},
+	{4012,70}, {3973,65}, {3935,60}, {3896,55}, {3860,50}, {3817,45},
+	{3775,40}, {3733,35}, {3692,30}, {3650,25}, {3610,20}, {3570,15},
+	{3530,12}, {3590,10}, {3450,5}
+};
+
+static struct  zx234502_platform_data zx234502_charger_platform = {
+	.gpio_int		=	PIN_CHARGE_INT,  //gpio55
+	.gpio_int_fun_sel = CHARGE_INT_FUNC_SEL,
+	.charging         =  &zx234502_bat_volage_charge,
+	.charging_size = ZX234502_BAT_VOLTAGE_LEN,
+	.discharging      =  &zx234502_bat_volage_discharge,
+	.discharging_size = ZX234502_BAT_VOLTAGE_LEN,
+	.ts_flag = TRUE,
+	.boost_flag = FALSE,
+	.boost_cur_gpio1 = PIN_CHARGE_BOOST_GPIO1,/*GPIO39*/
+	.boost_gpio1_fun_sel = CHARGE_BOOST_GPIO1_FUNC_SEL,
+	.boost_cur_gpio2 = PIN_CHARGE_BOOST_GPIO2,/*GPIO40*/
+	.boost_gpio2_fun_sel = CHARGE_BOOST_GPIO2_FUNC_SEL,
+	.boost_cur_gpio3 = PIN_CHARGE_BOOST_GPIO3,/*GPIO41*/
+	.boost_gpio3_fun_sel = CHARGE_BOOST_GPIO3_FUNC_SEL,
+	.boost_loadswitch_gpio = PIN_CHARGE_BOOST_LOADSWITCH,/*GPIO38*/
+	.boost_loadswitch_fun_sel = CHARGE_BOOST_LOADSWITCH_FUNC_SEL,
+};
+
+#endif
+
+#ifdef CONFIG_CHARGER_SGM41513
+
+#define SGM41513_BAT_VOLTAGE_LEN  21
+
+struct sgm41513_bat_calibration sgm41513_bat_volage_charge[]=
+{
+	{4100,100}, {4090,95}, {4080,90}, {4070,85}, {4060,80}, {4050,75},
+	{4012,70}, {3973,65}, {3935,60}, {3896,55}, {3860,50}, {3817,45},
+	{3775,40}, {3733,35}, {3692,30}, {3650,25}, {3610,20}, {3570,15},
+	{3530,12}, {3590,10}, {3450,5}
+};
+
+struct sgm41513_bat_calibration sgm41513_bat_volage_discharge[]=
+{
+	{4100,100}, {4090,95}, {4080,90}, {4070,85}, {4060,80}, {4050,75},
+	{4012,70}, {3973,65}, {3935,60}, {3896,55}, {3860,50}, {3817,45},
+	{3775,40}, {3733,35}, {3692,30}, {3650,25}, {3610,20}, {3570,15},
+	{3530,12}, {3590,10}, {3450,5}
+};
+
+static struct  sgm41513_platform_data sgm41513_charger_platform = {
+	.gpio_int		=	PIN_CHARGE_INT,  //gpio55
+	.gpio_int_fun_sel = CHARGE_INT_FUNC_SEL,
+	.charging         =  &sgm41513_bat_volage_charge,
+	.charging_size = SGM41513_BAT_VOLTAGE_LEN,
+	.discharging      =  &sgm41513_bat_volage_discharge,
+	.discharging_size = SGM41513_BAT_VOLTAGE_LEN,
+	.ts_flag = FALSE,
+	.boost_flag = TRUE,
+};
+
+#endif
+
+#ifdef CONFIG_TCPC_RT1711H
+static struct tcpc_desc rt1711h_tcpc_desc = {
+.role_def = 3,
+.rp_lvl = 1,
+.vconn_supply = 1,
+.notifier_supply_num = 0,
+.name = "type_c_port0",
+};
+
+static struct rt1711_chip rt1711h_platform = {
+    .irq_gpio     =   ZX29_GPIO_48,
+	.irq_gpio_fun_sel = GPIO48_EXT_INT1,
+	.tcpc_desc    =   &rt1711h_tcpc_desc,
+};
+#endif
+#ifdef CONFIG_TSC_ZX29
+u32 ts_temp_value_table[TS_ADC_TEMP_NUMBER][TS_ADC_TEMP_VOLTAGE_NUMBER]={
+{30,31,32,33,34,35,36,37,38,39,
+ 40,41,42,43,44,45,46,47,48,49,
+ 50,51,52,53,54,55,56,57,58,59,
+ 60,61,62,63,64,65,66,67,68,69,
+ 70,71,72,73,74,75,76,77,78,79,
+ 80,81,82,83,84,85,86,87,88,89,
+ 90,91,92,93,94,95,96,97,98,99,
+ 100,101,102,103,104,105,106,107,108,109,
+ 110,111,112,113,114,115,116,117,118,119,
+ 120,121,122,123,124,125},
+
+{
+ 1422,1408,1395,1381,1367,1353,1338,1323,1308,1293,
+ 1278,1262,1247,1231,1215,1199,1183,1166,1149,1133,
+ 1116,1100,1083,1066,1049,1032,1015,998,981,965,
+ 948,931,915,898,882,865,849,833,816,801,
+ 785,769,754,739,723,708,694,679,665,650,
+ 636,623,610,596,583,570,558,545,532,521,
+ 509,498,486,475,464,454,443,432,423,412,
+ 402,394,384,375,367,358,350,341,333,326,
+ 317,310,302,295,289,282,275,268,262,256,
+ 250,242,239,233,227,222 }
+};
+volatile u32 ts_adc_flag=2;// 2:adc2,others:adc1
+#endif
+#if 1
+/*
+ *  I2C  device tab used by board_init()
+ */
+#ifdef CONFIG_MFD_ZX234290_I2C
+static struct  zx234290_board zx234290_platform = {
+	.irq_gpio_num	    =	PIN_PMU_INT, //EX0_INT,
+    .irq_gpio_func      =   PMU_INT_FUNC_SEL,
+	.pshold_gpio_num    =   PIN_PMU_PSHOLD,
+	.pshold_gpio_func   =   PMU_PSHOLD_FUNC_SEL,
+	.irq_base	= 	ENT_ZX234290_IRQ_BASE,
+};
+#endif
+
+static struct i2c_board_info zx29_i2c0_devices[] = {
+#ifdef CONFIG_MFD_ZX234290_I2C
+	[0]={
+		I2C_BOARD_INFO("zx234290", 0x12),
+		.irq		= EX0_INT,
+		.platform_data 	= &zx234290_platform,
+	},
+#endif
+
+};
+
+static struct i2c_board_info zx29_i2c1_devices[] = {
+#ifdef CONFIG_CHARGER_ZX234502
+		{
+			I2C_BOARD_INFO("zx234502-charger", 0x13),
+			//.irq		= EX5_INT,
+			.platform_data	= &zx234502_charger_platform,
+		},
+#endif
+#if (defined CONFIG_SND_SOC_ZX297520V3) || (defined CONFIG_SND_SOC_ZX297520V3_MODULE)
+		{
+			I2C_BOARD_INFO(CODEC_NAME, CODEC_ADDR),
+			.platform_data 	= ZX29_SND_CODEC_PDATA, //&snd_codec_pdata,
+		},
+#endif
+#ifdef CONFIG_CAMERA_DRV
+		{
+			I2C_BOARD_INFO("gc6133-sensor", 0x40),
+		},
+#endif
+#ifdef CONFIG_INPUT_TOUCHSCREEN
+		{
+			I2C_BOARD_INFO("touchscreen", 0x38),
+		},
+#endif
+#ifdef CONFIG_CHARGER_SGM41513
+		{
+			I2C_BOARD_INFO("sgm41513-charger", 0x1A),
+			//.irq		= EX3_INT,
+			.platform_data	= &sgm41513_charger_platform,
+		},
+#endif
+#ifdef CONFIG_TCPC_RT1711H
+		{
+			I2C_BOARD_INFO("rt1711h", 0x4E),
+			//.irq		= EX1_INT,
+			.platform_data	= &rt1711h_platform,
+		},
+#endif
+
+};
+
+void __init i2c_add_devices(void)
+{
+	unsigned  devices_num = 0;
+    int ret = 0;
+
+	/*
+	  *i2c devices on bus 0
+	  */
+	devices_num = ARRAY_SIZE(zx29_i2c0_devices);
+	if (devices_num){
+		ret = i2c_register_board_info(0,zx29_i2c0_devices, devices_num);
+		if(ret)
+			BUG();
+	}
+
+	/*
+	  *i2c devices on bus 1
+	  */
+	devices_num = ARRAY_SIZE(zx29_i2c1_devices);
+	if (devices_num){
+		ret = i2c_register_board_info(1,zx29_i2c1_devices, devices_num);
+		if(ret)
+			BUG();
+	}
+}
+#endif
diff --git a/lynq/R305/V4/ap/os/linux/linux-3.4.x/drivers/power/sgm41513_charger.c b/lynq/R305/V4/ap/os/linux/linux-3.4.x/drivers/power/sgm41513_charger.c
new file mode 100755
index 0000000..795a832
--- /dev/null
+++ b/lynq/R305/V4/ap/os/linux/linux-3.4.x/drivers/power/sgm41513_charger.c
@@ -0,0 +1,2604 @@
+/*
+ * Driver for the TI sgm41513 battery charger.
+ *
+ * Author: Mark A. Greer <mgreer@animalcreek.com>
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+ */
+
+#include <linux/module.h>
+#include <linux/interrupt.h>
+#include <linux/delay.h>
+#include <linux/of_irq.h>
+#include <linux/of_device.h>
+#include <linux/pm_runtime.h>
+#include <linux/power_supply.h>
+#include <linux/gpio.h>
+#include <linux/i2c.h>
+#include <linux/irq.h>
+#include <linux/kthread.h>
+//#include <linux/mutex.h>
+#include <linux/semaphore.h>
+
+#include <linux/power/sgm41513_charger.h>
+#include <linux/mfd/zx234290.h>
+
+#include <mach/gpio.h>
+#include <mach/pcu.h>
+#include <mach/zx29_usb.h>
+#include <linux/workqueue.h>
+
+#include <linux/slab.h>
+#include <linux/debugfs.h>
+#include <asm/uaccess.h>
+
+#define DBG_CHARGE 1
+//*
+extern int get_typec_role(void);
+extern set_typec_try_role(int type);
+//*/
+
+static int ce_enabled = 0;
+/*
+ * The FAULT register is latched by the sgm41513 (except for NTC_FAULT)
+ * so the first read after a fault returns the latched value and subsequent
+ * reads return the current value.  In order to return the fault status
+ * to the user, have the interrupt handler save the reg's value and retrieve
+ * it in the appropriate health/status routine.  Each routine has its own
+ * flag indicating whether it should use the value stored by the last run
+ * of the interrupt handler or do an actual reg read.  That way each routine
+ * can report back whatever fault may have occured.
+ */
+struct sgm41513_dev_info {
+	struct i2c_client		*client;
+	struct device			*dev;
+	struct power_supply		charger;
+	struct power_supply		battery;
+	struct power_supply     boost;
+	char					model_name[I2C_NAME_SIZE];
+	kernel_ulong_t			model;
+	unsigned int			gpio_int;
+	unsigned int			irq;
+	struct mutex			bs_reg_lock;
+	bool			first_time; /*let the first reset do not ask mmi*/
+	bool			charger_health_valid;
+	bool			battery_health_valid;
+	bool			battery_status_valid;
+	u8				reg09;
+	u8				cbis_curr_reg;
+	u8              pis_curr_reg;
+	u8              cfis_curr_reg;
+
+	u8				ciis_pre_reg;
+	u8				pre_reg09;
+	u8              pis_pre_reg;
+	u8              cfis_pre_reg;
+	u8				watchdog;
+	u8				boost_online_flag;
+	struct delayed_work		boostWorkStruct ;
+	struct delayed_work charge_monitor_work;
+	struct workqueue_struct *boostQueue;
+	struct semaphore		chgirq_sem;
+	struct task_struct		*chg_irq_thread;
+	u16 boostcount;
+	
+	struct sgm41513_platform_data *pdata;
+    //unsigned int    chg_type;
+};
+
+//struct sgm41513_platform_data *g_platform_data = NULL;
+struct sgm41513_dev_info *g_bdi = NULL;
+
+/* REG01[2:0] (ISET_DCIN) in mAh */
+static const int sgm41513_in_ilimit_values[] = {
+   150,  450,  850,  1000,  1500,  2000, 2500, 3000
+};
+/* REG01[6:3] (VINDPM) in mVh */
+static const int sgm41513_vindpm_values[] = {
+   3880,  3960,  4040,  4120,  
+   4200,4280, 4360, 4440,
+   4520,4600, 4680, 4760,
+   4840,4920, 5000, 5080,
+};
+
+/*
+ * The tables below provide a 2-way mapping for the value that goes in
+ * the register field and the real-world value that it represents.
+ * The index of the array is the value that goes in the register; the
+ * number at that index in the array is the real-world value that it
+ * represents.
+ */
+/* REG02[7:2] (ISETA) in mAh */
+static const int sgm41513_isc_ichg_values[] = {
+	 512,  576,  640,  704,  768,  832,  896,  960,
+	1024, 1088, 1152, 1216, 1280, 1344, 1408, 1472,
+	1536, 1600, 1664, 1728, 1792, 1856, 1920, 1984,
+	2048, 2112, 2176, 2240, 2304, 2368, 2432, 2496,
+	2560, 2624, 2688, 2752, 2816, 2880, 2944, 3008,
+	3072, 3136, 3200, 3264, 3328, 3392, 3456, 3520,
+	3584, 3648, 3712, 3776, 3840, 3904, 3968, 4032,
+	4096, 4160, 4224, 4288, 4352, 4416, 4480, 4544
+};
+
+/* REG04[3:1] (VSETA) in mV */
+static const int sgm41513_cvc_vseta_values[] = {
+	4100, 4150, 4200, 4250, 4300, 4350, 4400, 4450,
+};
+
+/* REG02[7:5] (VSYS_MIN) in mV */
+static const int sgm41513_vsc_sysmin_values[] = {
+	3100, 3200, 3300, 3400, 3500, 3600, 3700,3800
+};
+static int stopchg_flag = 0;
+/*
+ * Return the index in 'tbl' of greatest value that is less than or equal to
+ * 'val'.  The index range returned is 0 to 'tbl_size' - 1.  Assumes that
+ * the values in 'tbl' are sorted from smallest to largest and 'tbl_size'
+ * is less than 2^8.
+ */
+static u8 sgm41513_find_idx(const int tbl[], int tbl_size, int v)
+{
+	int i;
+
+	for (i = 1; i < tbl_size; i++)
+		if (v < tbl[i])
+			break;
+
+	return i - 1;
+}
+
+/* Basic driver I/O routines */
+
+static int sgm41513_read(struct sgm41513_dev_info *bdi, u8 reg, u8 *data)
+{
+	int ret;
+
+	ret = i2c_smbus_read_byte_data(bdi->client, reg);
+	if (ret < 0)
+		return ret;
+
+	*data = ret;
+	return 0;
+}
+
+static int sgm41513_write(struct sgm41513_dev_info *bdi, u8 reg, u8 data)
+{
+	printk("cy: sgm41513_write reg %02x, value %02x\n", reg, data);
+	return i2c_smbus_write_byte_data(bdi->client, reg, data);
+}
+
+static int sgm41513_read_mask(struct sgm41513_dev_info *bdi, u8 reg,
+		u8 mask, u8 shift, u8 *data)
+{
+	u8 v;
+	int ret;
+
+	ret = sgm41513_read(bdi, reg, &v);
+	if (ret < 0)
+		return ret;
+
+	v &= mask;
+	v >>= shift;
+	*data = v;
+
+	return 0;
+}
+
+static int sgm41513_write_mask(struct sgm41513_dev_info *bdi, u8 reg,
+		u8 mask, u8 shift, u8 data)
+{
+	u8 v;
+	int ret;
+
+	ret = sgm41513_read(bdi, reg, &v);
+	if (ret < 0)
+		return ret;
+
+	v &= ~mask;
+	v |= ((data << shift) & mask);
+
+	return sgm41513_write(bdi, reg, v);
+}
+
+static int sgm41513_get_field_val(struct sgm41513_dev_info *bdi,
+		u8 reg, u8 mask, u8 shift,
+		const int tbl[], int tbl_size,
+		int *val)
+{
+	u8 v;
+	int ret;
+
+	ret = sgm41513_read_mask(bdi, reg, mask, shift, &v);
+	if (ret < 0)
+		return ret;
+
+	v = (v >= tbl_size) ? (tbl_size - 1) : v;
+	*val = tbl[v];
+
+	return 0;
+}
+
+static int sgm41513_set_field_val(struct sgm41513_dev_info *bdi,
+		u8 reg, u8 mask, u8 shift,
+		const int tbl[], int tbl_size,
+		int val)
+{
+	u8 idx;
+
+	idx = sgm41513_find_idx(tbl, tbl_size, val);
+
+	return sgm41513_write_mask(bdi, reg, mask, shift, idx);
+}
+
+//#ifdef CONFIG_SYSFS
+#if 0
+/*
+ * There are a numerous options that are configurable on the sgm41513
+ * that go well beyond what the power_supply properties provide access to.
+ * Provide sysfs access to them so they can be examined and possibly modified
+ * on the fly.  They will be provided for the charger power_supply object only
+ * and will be prefixed by 'f_' to make them easier to recognize.
+ */
+
+struct sgm41513_sysfs_field_info {
+	struct device_attribute	attr;
+	u8	reg;
+	u8	mask;
+	u8	shift;
+};
+
+
+#define SGM41513_SYSFS_FIELD(_name, r, f, m, store)			\
+{									\
+	.attr	= __ATTR(f_##_name, m, sgm41513_sysfs_show, store),	\
+	.reg	= SGM41513_REG_##r,					\
+	.mask	= SGM41513_REG_##r##_##f##_MASK,				\
+	.shift	= SGM41513_REG_##r##_##f##_SHIFT,			\
+}
+
+#define SGM41513_SYSFS_FIELD_RW(_name, r, f)				\
+		SGM41513_SYSFS_FIELD(_name, r, f, S_IWUSR | S_IRUGO,	\
+				sgm41513_sysfs_store)
+
+#define SGM41513_SYSFS_FIELD_RO(_name, r, f)				\
+		SGM41513_SYSFS_FIELD(_name, r, f, S_IRUGO, NULL)
+
+static ssize_t sgm41513_sysfs_show(struct device *dev,
+		struct device_attribute *attr, char *buf);
+static ssize_t sgm41513_sysfs_store(struct device *dev,
+		struct device_attribute *attr, const char *buf, size_t count);
+
+
+/* On i386 ptrace-abi.h defines SS that breaks the macro calls below. */
+//#undef SS
+
+static struct sgm41513_sysfs_field_info sgm41513_sysfs_field_tbl[] = {
+			/*	sysfs name	reg	field in reg */
+	SGM41513_SYSFS_FIELD_RW(chg_reset,		MS,	CHGRST),
+	SGM41513_SYSFS_FIELD_RW(pmuon,		MS,	PMUON),
+	SGM41513_SYSFS_FIELD_RW(en_ship,		MS,	ENSHIP),
+	SGM41513_SYSFS_FIELD_RW(en_otg,		MS,	ENOTG),
+	SGM41513_SYSFS_FIELD_RW(chg_config,	MS,	ENCHG),
+	SGM41513_SYSFS_FIELD_RW(en_powerbank,		MS,	PWRBNK),
+	SGM41513_SYSFS_FIELD_RW(insus,		MS,	INSUS),
+	SGM41513_SYSFS_FIELD_RW(in_limit,	ISC,	ISET_DCIN),
+	SGM41513_SYSFS_FIELD_RW(vsys_min,		VSC,	VSYS_MIN),
+	SGM41513_SYSFS_FIELD_RW(ichg,	CCC,	ISETA),
+	SGM41513_SYSFS_FIELD_RW(force_ichg_50pct,		CCC,	ICHG_50PCT),
+	SGM41513_SYSFS_FIELD_RW(iprechg,		CVC,	IPRECHG),
+	SGM41513_SYSFS_FIELD_RW(vbat_full,		CVC,	VBAT),
+	SGM41513_SYSFS_FIELD_RW(vpre_to_fast, 	CVC,	VBATFC),
+	SGM41513_SYSFS_FIELD_RW(en_timer,		CTC,	EN_TIMER),
+	SGM41513_SYSFS_FIELD_RW(en_2timer,		CTC,	EN_2XTIMER),
+	SGM41513_SYSFS_FIELD_RW(stopchg_flag,		OTGC,	OTGV),
+	SGM41513_SYSFS_FIELD_RW(iotg_limit,		OTGC,	OTGI_LIM),
+	SGM41513_SYSFS_FIELD_RW(ents_otg,	OTGC,	ENTS_OTG),
+	SGM41513_SYSFS_FIELD_RO(en_therm,	THR,	EN_THERM),
+	SGM41513_SYSFS_FIELD_RW(therm_threshold,	THR,	THERM_THLD),	
+	SGM41513_SYSFS_FIELD_RW(en_2det, THR,	EN_2DET),
+	SGM41513_SYSFS_FIELD_RW(en_1det, THR,	EN_1DET),
+	SGM41513_SYSFS_FIELD_RW(en_jeita,	THR,	EN_JEITA),
+	SGM41513_SYSFS_FIELD_RW(en_ilimitdj,	THR,	EN_ILIMITDJ),
+	SGM41513_SYSFS_FIELD_RW(tscold,		TS,	COLD),
+	SGM41513_SYSFS_FIELD_RW(tscool,	TS,	COOL),
+	SGM41513_SYSFS_FIELD_RW(tswarm,	TS,	WARM),
+	SGM41513_SYSFS_FIELD_RW(tshot,	TS,	HOT),
+	SGM41513_SYSFS_FIELD_RW(ntcdet,	PTS,NTCDET),
+	SGM41513_SYSFS_FIELD_RW(int_clear, CIIS,	INT),
+	SGM41513_SYSFS_FIELD_RO(ciis_reg,	CIIS,	ALL),
+	SGM41513_SYSFS_FIELD_RW(mask_chgrun,	CIIM,	MASK_CHGRUN),
+	SGM41513_SYSFS_FIELD_RW(mask_inlimit,	CIIM,	MASK_INLIMIT),
+	SGM41513_SYSFS_FIELD_RW(mask_thr,	CIIM,	MASK_THR),
+	SGM41513_SYSFS_FIELD_RW(mask_ts,	CIIM,	MASK_TS),
+	SGM41513_SYSFS_FIELD_RW(mask_dcdet,	CIIM,	MASK_DCDET),
+	SGM41513_SYSFS_FIELD_RO(cbis_reg,	CBIS,	ALL),
+	SGM41513_SYSFS_FIELD_RW(mask_pg,	CBIM,	MASK_DCIN_PG),
+	SGM41513_SYSFS_FIELD_RW(mask_batlow,	CBIM,	MASK_BATLOW),
+	SGM41513_SYSFS_FIELD_RW(mask_nobat,	CBIM,	MASK_NOBAT),
+	SGM41513_SYSFS_FIELD_RW(mask_eoc,	CBIM,	MASK_EOC),
+	SGM41513_SYSFS_FIELD_RW(mask_timer,	CBIM,	MASK_SAFE_TIMER),
+	SGM41513_SYSFS_FIELD_RW(mask_otg_fault,		CBIM,	MASK_OTG_FAULT),
+	SGM41513_SYSFS_FIELD_RO(pis_reg,	PIS,	ALL),
+	SGM41513_SYSFS_FIELD_RW(mask_pwron_it,	PIM,	MASK_POWERON_IT),
+	SGM41513_SYSFS_FIELD_RW(mask_pwron_lp, PIM,	MASK_POWERON_LP),
+	SGM41513_SYSFS_FIELD_RO(cfis_reg,	CFIS,	ALL),			
+	SGM41513_SYSFS_FIELD_RO(version_info,	VER,	INFO),	
+};
+
+static struct attribute *
+	sgm41513_sysfs_attrs[ARRAY_SIZE(sgm41513_sysfs_field_tbl) + 1];
+
+static const struct attribute_group sgm41513_sysfs_attr_group = {
+	.attrs = sgm41513_sysfs_attrs,
+};
+
+static void sgm41513_sysfs_init_attrs(void)
+{
+	int i, limit = ARRAY_SIZE(sgm41513_sysfs_field_tbl);
+
+	for (i = 0; i < limit; i++)
+		sgm41513_sysfs_attrs[i] = &sgm41513_sysfs_field_tbl[i].attr.attr;
+
+	sgm41513_sysfs_attrs[limit] = NULL; /* Has additional entry for this */
+}
+
+static struct sgm41513_sysfs_field_info *sgm41513_sysfs_field_lookup(
+		const char *name)
+{
+	int i, limit = ARRAY_SIZE(sgm41513_sysfs_field_tbl);
+
+	for (i = 0; i < limit; i++)
+		if (!strcmp(name, sgm41513_sysfs_field_tbl[i].attr.attr.name))
+			break;
+
+	if (i >= limit)
+		return NULL;
+
+	return &sgm41513_sysfs_field_tbl[i];
+}
+
+static ssize_t sgm41513_sysfs_show(struct device *dev,
+		struct device_attribute *attr, char *buf)
+{
+	struct power_supply *psy = dev_get_drvdata(dev);
+	struct sgm41513_dev_info *bdi =
+			container_of(psy, struct sgm41513_dev_info, charger);
+	struct sgm41513_sysfs_field_info *info;
+	int ret;
+	u8 v;
+
+	info = sgm41513_sysfs_field_lookup(attr->attr.name);
+	if (!info)
+		return -EINVAL;
+
+	ret = sgm41513_read_mask(bdi, info->reg, info->mask, info->shift, &v);
+	if (ret)
+		return ret;
+
+	return scnprintf(buf, PAGE_SIZE, "%hhx\n", v);
+}
+
+static ssize_t sgm41513_sysfs_store(struct device *dev,
+		struct device_attribute *attr, const char *buf, size_t count)
+{
+	struct power_supply *psy = dev_get_drvdata(dev);
+	struct sgm41513_dev_info *bdi =
+			container_of(psy, struct sgm41513_dev_info, charger);
+	struct sgm41513_sysfs_field_info *info;
+	int ret;
+	u8 v;
+
+	info = sgm41513_sysfs_field_lookup(attr->attr.name);
+	if (!info)
+		return -EINVAL;
+
+	ret = kstrtou8(buf, 0, &v);
+	if (ret < 0)
+		return ret;
+
+	ret = sgm41513_write_mask(bdi, info->reg, info->mask, info->shift, v);
+	if (ret)
+		return ret;
+
+	return count;
+}
+
+static int sgm41513_sysfs_create_group(struct sgm41513_dev_info *bdi)
+{
+	sgm41513_sysfs_init_attrs();
+
+	return sysfs_create_group(&bdi->charger.dev->kobj,
+			&sgm41513_sysfs_attr_group);
+}
+
+static void sgm41513_sysfs_remove_group(struct sgm41513_dev_info *bdi)
+{
+	sysfs_remove_group(&bdi->charger.dev->kobj, &sgm41513_sysfs_attr_group);
+}
+#else
+static int sgm41513_sysfs_create_group(struct sgm41513_dev_info *bdi)
+{
+	return 0;
+}
+
+static inline void sgm41513_sysfs_remove_group(struct sgm41513_dev_info *bdi) {}
+#endif
+
+#if 0
+/*set the Vsys min*/
+static int sgm41513_set_vsys_min(struct sgm41513_dev_info *bdi,const union power_supply_propval *val)
+{
+	return sgm41513_set_field_val(bdi, SGM41513_REG_VSC,
+			SGM41513_REG_VSC_VSYS_MIN_MASK, SGM41513_REG_VSC_VSYS_MIN_SHIFT,
+			sgm41513_cvc_vseta_values,
+			ARRAY_SIZE(sgm41513_cvc_vseta_values), val->intval);	
+	//return 0
+}
+#endif
+
+//#define func_trace() do{printk("cy: functrace %s:%d\n", __func__, __LINE__);}while(0)
+#define func_trace() do{}while(0)
+
+static int sgm41513_register_reset(struct sgm41513_dev_info *bdi)
+{
+	int ret, limit = 100;
+	u8 v;
+
+	func_trace();
+	/* Reset the registers */
+	ret = sgm41513_write_mask(bdi, SGM41513_REG08,SGM41513_REG0B_REGRST_MASK,SGM41513_REG0B_REGRST_SHIFT,0x1);
+	if (ret < 0)
+		return ret;
+
+	/* Reset bit will be cleared by hardware so poll until it is */
+	do
+    	{
+		ret = sgm41513_read_mask(bdi, SGM41513_REG08,SGM41513_REG0B_REGRST_MASK,SGM41513_REG0B_REGRST_SHIFT,&v);
+		if (ret < 0)
+			return ret;
+
+		if (!v)
+			break;
+
+		udelay(10);
+	} while (--limit);
+
+	func_trace();
+	if (!limit)
+		return -EIO;
+
+	return 0;
+}
+
+
+/* Charger power supply property routines */
+
+extern void typec_pwr_role_set1(void);
+static void dump_sgm_regs(struct i2c_client *client);
+static int sgm41513_charger_get_charge_type(struct sgm41513_dev_info *bdi,union power_supply_propval *val)
+{
+	printk("cy: sgm41513_charger_get_charge_type 1\n");
+	val->intval = bdi->charger.type;
+	//set_typec_try_role(1);
+	//typec_pwr_role_set1();
+	return 0;
+}
+
+static int sgm41513_charger_get_status(struct sgm41513_dev_info *bdi,union power_supply_propval *val)
+{
+	u8 v=0, vbus_stat=0, chrg_stat=0, pg_stat=0;
+	int status=POWER_SUPPLY_STATUS_UNKNOWN;
+	int ret=0;
+
+	printk("cy: sgm41513_charger_get_status 3\n");
+	//dump_sgm_regs(bdi->client);
+	//set_typec_try_role(0);
+	//typec_pwr_role_set1();
+	//ret = get_adc1_voltage();
+	
+	ret = sgm41513_read(bdi, SGM41513_REG08, &v);
+	if (ret < 0 )
+	{
+		printk("cy: read reg 08 error\n");
+		return -EIO;
+	}
+
+	vbus_stat = ((v&SGM41513_REG08_VBUS_STAT_MASK) >> SGM41513_REG08_VBUS_STAT_SHIFT);
+	chrg_stat = ((v&SGM41513_REG08_CHRG_STAT_MASK) >> SGM41513_REG08_CHRG_STAT_SHIFT);
+	pg_stat = ((v&SGM41513_REG08_PG_STAT_MASK) >> SGM41513_REG08_PG_STAT_SHIFT);
+
+	if (vbus_stat == 0 || vbus_stat == 7 || (chrg_stat == 0 && pg_stat == 0))
+	{
+		status = POWER_SUPPLY_STATUS_DISCHARGING;
+	}
+	else if(chrg_stat == 1 || chrg_stat == 2)
+	{
+		status = POWER_SUPPLY_STATUS_CHARGING;
+	}
+	else if(chrg_stat == 0)
+	{
+		status = POWER_SUPPLY_STATUS_NOT_CHARGING;
+	}
+	else if(chrg_stat == 3)
+	{
+		status = POWER_SUPPLY_STATUS_FULL;
+	}
+
+	if (!ret)
+		val->intval = status;
+
+	printk("cy: sgm41513_charger_get_status exit\n");
+	return ret;
+}
+
+static int sgm41513_charger_get_health(struct sgm41513_dev_info *bdi,union power_supply_propval *val)
+{
+	u8 ciis_reg=0, cbis_reg=0, cfis_reg=0;
+	int health=0, ret=0;
+
+	func_trace();
+	//mutex_lock(&bdi->bs_reg_lock);
+
+#if 0
+	if (bdi->charger_health_valid) {
+		bdi->charger_health_valid = false;
+		cbis_reg = bdi->cbis_curr_reg;
+		ciis_reg = bdi->ciis_curr_reg;
+		cfis_reg = bdi->cfis_curr_reg;
+		mutex_unlock(&bdi->bs_reg_lock);
+	} else {
+		mutex_unlock(&bdi->bs_reg_lock);
+
+		ret = sgm41513_read(bdi, SGM41513_REG_CIIS, &ciis_reg);
+		if (ret < 0)
+			return ret;
+		ret = sgm41513_read(bdi, SGM41513_REG_CBIS, &cbis_reg);
+		if (ret < 0)
+			return ret;
+		ret = sgm41513_read(bdi, SGM41513_REG_CFIS, &cfis_reg);
+		if (ret < 0)
+			return ret;
+
+		printk(KERN_INFO "sgm41513_charger_get_health REG_0xa=0x%x,REG_0xc=0x%x,REG_0x10=0x%x.\n",ciis_reg,cbis_reg,cfis_reg);	
+
+	}
+
+	if (cbis_reg & SGM41513_REG_CBIS_OTG_FAULT_MASK) {
+		/*
+		 * This could be over-current or over-voltage but there's
+		 * no way to tell which.  Return 'OVERVOLTAGE' since there
+		 * isn't an 'OVERCURRENT' value defined that we can return
+		 * even if it was over-current.
+		 */
+		health = POWER_SUPPLY_HEALTH_OVERVOLTAGE;
+	} 
+	else if(cbis_reg & SGM41513_REG_CBIS_SAFE_TIMER_MASK) {	
+		health = POWER_SUPPLY_HEALTH_SAFETY_TIMER_EXPIRE;
+	}
+	else if(cbis_reg & SGM41513_REG_CBIS_DCIN_PG_MASK) {	
+		health = POWER_SUPPLY_HEALTH_GOOD;
+	}
+	else if(ciis_reg & (SGM41513_REG_CIIS_INLIMIT_MASK|SGM41513_REG_CIIS_THERM_MASK)) {	
+		health = POWER_SUPPLY_HEALTH_UNSPEC_FAILURE;
+	}
+	else if(cfis_reg & SGM41513_REG_CFIS_THSD_MASK){
+		health = POWER_SUPPLY_HEALTH_OVERHEAT;	/*the chip hot error*/
+	}
+	else{	
+		health = POWER_SUPPLY_HEALTH_UNKNOWN;
+    }
+	
+	val->intval = health;
+
+#endif
+	val->intval = POWER_SUPPLY_HEALTH_GOOD;
+	return 0;
+}
+
+int sgm41513_charger_get_online(struct sgm41513_dev_info *bdi,union power_supply_propval *val)
+{
+	u8 v;
+	int ret;
+
+	ret = sgm41513_read_mask(bdi, SGM41513_REG08,SGM41513_REG08_VBUS_STAT_MASK,
+							SGM41513_REG08_VBUS_STAT_SHIFT, &v);
+	if (ret < 0)
+		return ret;
+
+	val->intval = (v != 0 && v != 7);
+	return 0;
+}EXPORT_SYMBOL (sgm41513_charger_get_online);
+
+#if 0
+static int sgm41513_charger_get_current(struct sgm41513_dev_info *bdi,union power_supply_propval *val)
+{
+	int curr, ret;
+
+	ret = sgm41513_get_field_val(bdi, SGM41513_REG_ISC,
+			SGM41513_REG_ISC_ISET_DCIN_MASK, SGM41513_REG_ISC_ISET_DCIN_SHIFT,
+			sgm41513_in_ilimit_values,
+			ARRAY_SIZE(sgm41513_in_ilimit_values), &curr);
+	if (ret < 0)
+		return ret;
+
+	val->intval = curr;
+	return 0;
+}
+
+static int sgm41513_charger_get_current_max(struct sgm41513_dev_info *bdi,union power_supply_propval *val)
+{
+	int idx = ARRAY_SIZE(sgm41513_in_ilimit_values) - 1;
+
+	val->intval = sgm41513_in_ilimit_values[idx];
+	return 0;
+}
+
+static int sgm41513_charger_get_voltage(struct sgm41513_dev_info *bdi,union power_supply_propval *val)
+{
+#if 0
+	int voltage, ret;
+	ret = sgm41513_get_field_val(bdi, SGM41513_REG_CVC,
+			SGM41513_REG_CVC_VBAT_MASK, SGM41513_REG_CVC_VBAT_SHIFT,
+			sgm41513_cvc_vseta_values,
+			ARRAY_SIZE(sgm41513_cvc_vseta_values), &voltage);
+	if (ret < 0)
+		return ret;
+
+	val->intval = voltage;
+#endif
+return 0;
+}
+#endif
+
+static int sgm41513_charger_get_charger_enabled(struct sgm41513_dev_info *bdi,union power_supply_propval *val)
+{
+	u8 charger_enabled;
+	int ret;
+
+	func_trace();
+	
+	ret = sgm41513_read_mask(bdi,SGM41513_REG00,
+			SGM41513_REG00_EN_HIZ_MASK, 
+			SGM41513_REG00_EN_HIZ_SHIFT, &charger_enabled);
+	if (ret < 0)
+		return ret;
+	if (charger_enabled == 1)
+	{
+		val->intval = 0;
+		return 0;
+	}
+
+	printk("cy: sgm41513_charger_get_charger_enabled\n");
+	ret = sgm41513_read_mask(bdi, SGM41513_REG01,
+			SGM41513_REG01_CHG_CONFIG_MASK,
+			SGM41513_REG01_CHG_CONFIG_SHIFT, &charger_enabled);
+	if (ret < 0)
+		return ret;
+
+	val->intval = (charger_enabled && ce_enabled);
+	func_trace();
+	return 0;
+}
+
+static int sgm41513_charger_get_voltage_max(struct sgm41513_dev_info *bdi,union power_supply_propval *val)
+{
+	int voltage, ret;
+
+	func_trace();
+	ret = sgm41513_read_mask(bdi, SGM41513_REG04,
+			SGM41513_REG04_VREG_MASK, SGM41513_REG04_VREG_SHIFT,
+			 &voltage);
+	if (ret < 0)
+		return ret;
+
+	if (voltage == 15)
+		val->intval = 4350;
+	else
+		val->intval = voltage *32 + 3856;
+	func_trace();
+	return 0;
+
+}
+
+#if 0
+static int sgm41513_charger_set_current(struct sgm41513_dev_info *bdi,union power_supply_propval *val)
+{
+	return sgm41513_set_field_val(bdi, SGM41513_REG_ISC,
+			SGM41513_REG_ISC_ISET_DCIN_MASK, SGM41513_REG_ISC_ISET_DCIN_MASK,
+			sgm41513_in_ilimit_values,
+			ARRAY_SIZE(sgm41513_in_ilimit_values), val->intval);
+	
+}
+#endif
+static int sgm41513_charger_set_voltage(struct sgm41513_dev_info *bdi,const union power_supply_propval *val)
+{
+	int n;
+	func_trace();
+	if (val->intval == 4350)
+		n =15;
+	else
+		n = (val->intval - 3856) / 32;
+	return sgm41513_write_mask(bdi, SGM41513_REG04,
+			SGM41513_REG04_VREG_MASK, SGM41513_REG04_VREG_SHIFT, n);
+}
+
+static int set_ce_gpio(int val)
+{
+	if (val > 0)
+	{
+		gpio_direction_output(120, 0);
+		ce_enabled = 1;
+	}
+	else
+	{
+		gpio_direction_output(120, 1);
+		ce_enabled = 0;
+	}
+}
+
+static int sgm41513_charger_set_charger_config(struct sgm41513_dev_info *bdi,const union power_supply_propval *val)
+{
+	int ret;
+	union power_supply_propval   enable_charge;
+	
+	printk("cy: sgm41513_charger_set_charger_config %d\n", val->intval);
+	if (val->intval){
+		enable_charge.intval = 1 ;
+		stopchg_flag = 1;
+		ret = sgm41513_write_mask(bdi, SGM41513_REG01,
+			SGM41513_REG01_OTG_CONFIG_MASK,
+			SGM41513_REG01_OTG_CONFIG_SHIFT,0);  
+		printk("mmi start chg\n");
+	}
+	else{
+		stopchg_flag = 2;
+		enable_charge.intval = 0 ;	
+		ret = sgm41513_write_mask(bdi, SGM41513_REG01,
+			SGM41513_REG01_OTG_CONFIG_MASK,
+			SGM41513_REG01_OTG_CONFIG_SHIFT,0);  
+		printk("mmi stop chg\n");
+	}
+
+	if (enable_charge.intval == 1)
+	{
+		ret = sgm41513_write_mask(bdi, SGM41513_REG00,
+			SGM41513_REG00_EN_HIZ_MASK, 
+			SGM41513_REG00_EN_HIZ_SHIFT, 0);
+	}
+
+	printk("cy: sgm41513_charger_set_charger_config 2\n");
+	 ret = sgm41513_write_mask(bdi, SGM41513_REG01,
+			SGM41513_REG01_CHG_CONFIG_MASK,
+			SGM41513_REG01_CHG_CONFIG_SHIFT, enable_charge.intval );  /*0:disable 1:enable*/
+
+	 set_ce_gpio(enable_charge.intval);
+	 
+	 return ret;
+}
+
+
+static int sgm41513_charger_get_property(struct power_supply *psy,enum power_supply_property psp, union power_supply_propval *val)
+{
+	struct sgm41513_dev_info *bdi = container_of(psy, struct sgm41513_dev_info, charger);
+	int ret;
+
+	func_trace();
+	//dev_dbg(bdi->dev, "prop: %d\n", psp);
+	dev_info(bdi->dev, "prop: %d\n", psp);
+
+	//pm_runtime_get_sync(bdi->dev);
+
+	switch (psp) {
+	case POWER_SUPPLY_PROP_PC1_AC2:
+		printk("cy: sgm41513_charger_get_property POWER_SUPPLY_PROP_PC1_AC2\n");
+		//ret =0;
+		//val->intval = POWER_SUPPLY_PCAC__PC;
+		ret = sgm41513_charger_get_charge_type(bdi, val);
+		break;
+	
+	case POWER_SUPPLY_PROP_STATUS:
+		printk("cy: sgm41513_charger_get_property POWER_SUPPLY_PROP_STATUS\n");
+		ret = sgm41513_charger_get_status(bdi, val);
+		break;
+	case POWER_SUPPLY_PROP_HEALTH:
+		printk("cy: sgm41513_charger_get_property POWER_SUPPLY_PROP_HEALTH\n");
+		ret = sgm41513_charger_get_health(bdi, val);
+		break;
+	case POWER_SUPPLY_PROP_ONLINE:
+		printk("cy: sgm41513_charger_get_property POWER_SUPPLY_PROP_ONLINE\n");
+		ret = sgm41513_charger_get_online(bdi, val);
+		break;
+
+	/*
+	case POWER_SUPPLY_PROP_CURRENT_NOW:
+		ret = sgm41513_charger_get_current(bdi, val);
+		break;
+
+	case POWER_SUPPLY_PROP_CURRENT_MAX:
+		ret = sgm41513_charger_get_current_max(bdi, val);
+		break;
+
+	case POWER_SUPPLY_PROP_VOLTAGE_NOW:
+		ret = sgm41513_charger_get_voltage(bdi, val);
+		break;
+*/
+	case POWER_SUPPLY_PROP_VOLTAGE_MAX:
+		printk("cy: sgm41513_charger_get_property POWER_SUPPLY_PROP_VOLTAGE_MAX\n");
+		ret = sgm41513_charger_get_voltage_max(bdi, val);
+		break;
+		
+	case POWER_SUPPLY_PROP_CHARGE_ENABLED:
+		printk("cy: sgm41513_charger_get_property POWER_SUPPLY_PROP_CHARGE_ENABLED\n");
+		ret = sgm41513_charger_get_charger_enabled(bdi, val);
+		break;
+	default:
+		printk("cy: sgm41513_charger_get_property default\n");
+		ret = -ENODATA;
+	}
+
+	//pm_runtime_put_sync(bdi->dev);
+	return ret;
+}
+
+static int sgm41513_charger_set_property(struct power_supply *psy,enum power_supply_property psp,
+		const union power_supply_propval *val)
+{
+	struct sgm41513_dev_info *bdi =
+			container_of(psy, struct sgm41513_dev_info, charger);
+	int ret;
+
+	func_trace();
+	//dev_dbg(bdi->dev, "prop: %d\n", psp);
+
+	printk("cy: sgm41513_charger_set_property %d \n", psp);
+	//pm_runtime_get_sync(bdi->dev);
+
+	switch (psp) {
+#if 0
+	case POWER_SUPPLY_PROP_CURRENT_NOW:
+		ret = sgm41513_charger_set_current(bdi, val);
+		break;
+#endif
+	case POWER_SUPPLY_PROP_VOLTAGE_MAX:
+		printk("cy: POWER_SUPPLY_PROP_VOLTAGE_MAX\n");
+		ret = sgm41513_charger_set_voltage(bdi, val);
+		break;
+
+	case POWER_SUPPLY_PROP_PD_IN_HARD_RESET:
+		printk("cy: POWER_SUPPLY_PROP_PD_IN_HARD_RESET %d\n", val->intval);
+		break;
+	case POWER_SUPPLY_PROP_PD_CURRENT_MAX:
+		printk("cy: POWER_SUPPLY_PROP_PD_CURRENT_MAX %d\n", val->intval);
+		break;
+	case POWER_SUPPLY_PROP_PD_VOLTAGE_MIN:
+		printk("cy: POWER_SUPPLY_PROP_PD_VOLTAGE_MIN %d\n", val->intval);
+		break;
+	case POWER_SUPPLY_PROP_PD_VOLTAGE_MAX:
+		printk("cy: POWER_SUPPLY_PROP_PD_VOLTAGE_MAX %d\n", val->intval);
+		break;
+	case POWER_SUPPLY_PROP_PD_ACTIVE:
+		printk("cy: POWER_SUPPLY_PROP_PD_ACTIVE %d\n", val->intval);
+		break;
+    	case POWER_SUPPLY_PROP_CHARGE_ENABLED:
+		printk("cy: POWER_SUPPLY_PROP_CHARGE_ENABLED\n");
+        	ret = sgm41513_charger_set_charger_config(bdi, val);			
+		power_supply_changed(&bdi->charger);
+        	break;
+	case POWER_SUPPLY_PROP_USB_OTG:
+		printk("cy: POWER_SUPPLY_PROP_USB_OTG\n");
+		ret = sgm41513_write_mask(bdi,SGM41513_REG01,
+			SGM41513_REG01_OTG_CONFIG_MASK,SGM41513_REG01_OTG_CONFIG_SHIFT,!!val->intval);
+		break;
+	default:
+		printk("cy: unkown\n");
+		ret = -EINVAL;
+	}
+
+	func_trace();
+	//pm_runtime_put_sync(bdi->dev);
+	return ret;
+}
+
+static int sgm41513_charger_property_is_writeable(struct power_supply *psy,enum power_supply_property psp)
+{
+	int ret;
+
+	func_trace();
+	switch (psp)
+    {
+    	//case POWER_SUPPLY_PROP_CURRENT_NOW:
+    	case POWER_SUPPLY_PROP_VOLTAGE_MAX:		
+		case POWER_SUPPLY_PROP_CHARGE_ENABLED:
+    		ret = 1;
+    		break;
+	    default:
+		    ret = 0;
+			break;
+	}
+
+	func_trace();
+	return ret;
+}
+
+static enum power_supply_property sgm41513_charger_properties[] = {
+	POWER_SUPPLY_PROP_PC1_AC2,
+	POWER_SUPPLY_PROP_STATUS,
+	POWER_SUPPLY_PROP_HEALTH,
+	POWER_SUPPLY_PROP_ONLINE,
+	//POWER_SUPPLY_PROP_CURRENT_NOW,
+	//POWER_SUPPLY_PROP_CURRENT_MAX,
+	//POWER_SUPPLY_PROP_VOLTAGE_NOW,
+	POWER_SUPPLY_PROP_VOLTAGE_MAX,
+	POWER_SUPPLY_PROP_CHARGE_ENABLED,
+};
+
+static char *sgm41513_charger_supplied_to[] = {
+	"main-battery",
+};
+
+static void sgm41513_charger_init(struct power_supply *charger)
+{
+	charger->name = "charger";
+	charger->type = POWER_SUPPLY_PCAC_UNKNOWN;
+	charger->properties = sgm41513_charger_properties;
+	charger->num_properties = ARRAY_SIZE(sgm41513_charger_properties);
+	charger->supplied_to = sgm41513_charger_supplied_to;
+	//charger->num_supplies = ARRAY_SIZE(sgm41513_charger_supplied_to);
+	charger->get_property = sgm41513_charger_get_property;
+	charger->set_property = sgm41513_charger_set_property;
+	charger->property_is_writeable = sgm41513_charger_property_is_writeable;
+}
+
+/* Battery power supply property routines */
+
+static int sgm41513_battery_get_health(struct sgm41513_dev_info *bdi,union power_supply_propval *val)
+{
+	u8 v;
+	int health, ret;
+
+	mutex_lock(&bdi->bs_reg_lock);
+	
+	if(true!=bdi->pdata->ts_flag){
+		val->intval = POWER_SUPPLY_HEALTH_UNKNOWN;
+		mutex_unlock(&bdi->bs_reg_lock);
+		return 0;
+	}
+
+	if (bdi->battery_health_valid) {
+		v = bdi->reg09;
+		bdi->battery_health_valid = false;
+	} else {
+
+		ret = sgm41513_read(bdi, SGM41513_REG09, &v);
+		if (ret < 0){	
+
+			mutex_unlock(&bdi->bs_reg_lock);
+			return ret;
+		}
+	}
+
+	if (v & SGM41513_REG09_BAT_FAULT_MASK) {
+		health = POWER_SUPPLY_HEALTH_OVERVOLTAGE;
+	} else {
+		v &= SGM41513_REG09_NTC_FAULT_MASK;
+		v >>= SGM41513_REG09_NTC_FAULT_SHIFT;
+
+		switch (v) {
+		case 0: /* Normal */
+			health = POWER_SUPPLY_HEALTH_GOOD;
+			break;
+		case 2: /* warm*/		
+			health = POWER_SUPPLY_HEALTH_WARM;
+			break;
+		case 6: /* Hot */		
+			health = POWER_SUPPLY_HEALTH_OVERHEAT;
+			break;
+		case 3:/* Cool*/
+			health = POWER_SUPPLY_HEALTH_COOL;
+			break;			
+		case 5: /* Cold */
+			health = POWER_SUPPLY_HEALTH_COLD;
+			break;
+		default:
+			health = POWER_SUPPLY_HEALTH_UNKNOWN;
+		}
+	}
+
+	val->intval = health;
+	mutex_unlock(&bdi->bs_reg_lock);
+	return 0;
+}
+
+static int sgm41513_battery_get_online(struct sgm41513_dev_info *bdi,union power_supply_propval *val)
+{
+	int ret;
+
+	ret = get_adc2_voltage();
+	printk("cy adc2 voltage %d\n", ret);
+	val->intval = (ret <= 1700);
+	return 0;
+}
+
+#if 1
+static int sgm41513_battery_get_capacity(struct sgm41513_dev_info *bdi,union power_supply_propval *val)
+{
+	int ret;
+    uint volt;
+	int bat_levl = 0;
+	int i =0;
+	//union power_supply_propval * online;
+	struct sgm41513_bat_calibration *calibration;
+
+	//sgm41513_charger_get_online(bdi,online);
+
+	
+	u8 v;
+	ret = sgm41513_read_mask(bdi, SGM41513_REG08,SGM41513_REG08_CHRG_STAT_MASK,
+							SGM41513_REG08_CHRG_STAT_SHIFT, &v);
+	if(v == 1 || v == 2)
+		calibration = bdi->pdata->charging;
+	else
+		calibration = bdi->pdata->discharging;		
+//#ifdef CONFIG_ZX234290_ADC						
+	volt = get_battery_voltage();
+//#endif
+	if (volt > calibration[0].voltage) {
+		bat_levl = calibration[0].level;
+	} else {
+		for (i = 0; calibration[i+1].voltage >= 0; i++) {
+			if (volt <= calibration[i].voltage &&
+					volt >= calibration[i+1].voltage) {
+				/* interval found - interpolate within range */
+				bat_levl = calibration[i].level -
+					((calibration[i].voltage - volt) *
+					(calibration[i].level -
+					calibration[i+1].level)) /
+					(calibration[i].voltage -
+					calibration[i+1].voltage);
+				break;
+			}
+		}
+	}
+	
+	val->intval = bat_levl;
+	//return 0;
+	
+	return ret;
+}
+#endif
+
+static int sgm41513_battery_set_online(struct sgm41513_dev_info *bdi,const union power_supply_propval *val)
+{
+	union power_supply_propval online;
+	sgm41513_battery_get_online(bdi, &online);
+
+	return online.intval == val->intval ? 0 : -1;
+}
+
+
+static int sgm41513_battery_get_property(struct power_supply *psy,enum power_supply_property psp, union power_supply_propval *val)
+{
+	struct sgm41513_dev_info *bdi =
+			container_of(psy, struct sgm41513_dev_info, battery);
+	int ret;
+
+	//dev_dbg(bdi->dev, "prop: %d\n", psp);
+
+	//pm_runtime_get_sync(bdi->dev);
+
+	func_trace();
+	switch (psp) {
+		
+	case POWER_SUPPLY_PROP_HEALTH:
+		ret = sgm41513_battery_get_health(bdi, val);
+		break;
+	case POWER_SUPPLY_PROP_ONLINE:
+		ret = sgm41513_battery_get_online(bdi, val);
+		break;
+
+	case POWER_SUPPLY_PROP_TEMP:					
+		val->intval = get_adc2_voltage();
+		ret = 0;			
+		break;
+
+	case POWER_SUPPLY_PROP_VOLTAGE_NOW:
+		//#ifdef CONFIG_ZX234290_ADC						
+		val->intval = get_adc1_voltage() - 15;
+		ret = 0;
+		break;
+#if 1
+	case POWER_SUPPLY_PROP_CAPACITY:
+		ret = sgm41513_battery_get_capacity(bdi, val);
+		break;
+#endif
+	default:
+		ret = -ENODATA;
+	}
+
+	func_trace();
+	//pm_runtime_put_sync(bdi->dev);
+	return ret;
+}
+
+static int sgm41513_battery_set_property(struct power_supply *psy,enum power_supply_property psp,
+		const union power_supply_propval *val)
+{
+	struct sgm41513_dev_info *bdi =
+			container_of(psy, struct sgm41513_dev_info, battery);
+	int ret;
+
+	func_trace();
+	//dev_dbg(bdi->dev, "prop: %d\n", psp);
+
+	//pm_runtime_put_sync(bdi->dev);
+
+	switch (psp) {
+	case POWER_SUPPLY_PROP_ONLINE:
+		ret = sgm41513_battery_set_online(bdi, val);
+		break;
+	default:
+		ret = -EINVAL;
+	}
+
+	func_trace();
+	//pm_runtime_put_sync(bdi->dev);
+	return ret;
+}
+
+static int sgm41513_battery_property_is_writeable(struct power_supply *psy,enum power_supply_property psp)
+{
+	int ret;
+
+	func_trace();
+	switch (psp) {
+	case POWER_SUPPLY_PROP_ONLINE:
+		ret = 1;
+		break;
+	default:
+		ret = 0;
+	}
+
+	func_trace();
+	return ret;
+}
+
+static enum power_supply_property sgm41513_battery_properties[] = {
+	POWER_SUPPLY_PROP_HEALTH,
+	POWER_SUPPLY_PROP_ONLINE,
+	POWER_SUPPLY_PROP_TEMP,
+	POWER_SUPPLY_PROP_VOLTAGE_NOW,
+	POWER_SUPPLY_PROP_CAPACITY,
+};
+
+static void sgm41513_battery_init(struct power_supply *battery)
+{
+	battery->name = "battery";
+	battery->type = POWER_SUPPLY_PCAC_UNKNOWN;
+	battery->properties = sgm41513_battery_properties;
+	battery->num_properties = ARRAY_SIZE(sgm41513_battery_properties);
+	battery->get_property = sgm41513_battery_get_property;
+	battery->set_property = sgm41513_battery_set_property;
+	battery->property_is_writeable = sgm41513_battery_property_is_writeable;
+}
+
+
+static int sgm41513_boost_get_online(struct sgm41513_dev_info *bdi,union power_supply_propval *val)
+{	
+
+	func_trace();
+	val->intval  = bdi->boost_online_flag;
+	func_trace();
+	return 0;
+}
+
+
+static int sgm41513_boost_get_current_now(struct sgm41513_dev_info *bdi,union power_supply_propval *val)
+{
+	val->intval = 2850;		
+	return 0;
+}
+
+#if 0
+static int sgm41513_boost_get_current_max(struct sgm41513_dev_info *bdi, union power_supply_propval *val)
+{
+	val->intval = 2850;		
+    return 0;
+}
+#endif
+static int sgm41513_boost_set_charge_enable(struct sgm41513_dev_info *bdi,const union power_supply_propval *val)
+{	
+	int ret;
+	printk("cy: sgm41513_boost_set_charge_enable\n");
+	//set_typec_try_role(2);
+	ret = sgm41513_write_mask(bdi,SGM41513_REG01,
+		SGM41513_REG01_OTG_CONFIG_MASK,SGM41513_REG01_OTG_CONFIG_SHIFT,!!val->intval);
+
+	return ret;
+}
+
+static int sgm41513_boost_set_current_now(struct sgm41513_dev_info *bdi,const union power_supply_propval *val)
+{
+	return  0;
+}
+
+static int sgm41513_boost_get_property(struct power_supply *psy,enum power_supply_property psp, union power_supply_propval *val)
+{
+	struct sgm41513_dev_info *bdi =
+			container_of(psy, struct sgm41513_dev_info, boost);
+	int ret;
+
+	func_trace();
+	//dev_dbg(bdi->dev, "prop: %d\n", psp);
+
+	//pm_runtime_get_sync(bdi->dev);
+
+	switch (psp) {
+	case POWER_SUPPLY_PROP_ONLINE:
+		ret = sgm41513_boost_get_online(bdi, val);
+		break;
+	case POWER_SUPPLY_PROP_CURRENT_NOW:
+		ret = sgm41513_boost_get_current_now(bdi, val);
+        break;
+	#if 0
+	case POWER_SUPPLY_PROP_CURRENT_MAX:
+		ret = sgm41513_boost_get_current_max(bdi, val);
+        break;
+	#endif
+	default:
+		ret = -ENODATA;
+	}
+
+	func_trace();
+	//pm_runtime_put_sync(bdi->dev);
+	return ret;
+}
+
+static int sgm41513_boost_set_property(struct power_supply *psy,enum power_supply_property psp,
+		const  union power_supply_propval *val)
+{
+	struct sgm41513_dev_info *bdi =
+			container_of(psy, struct sgm41513_dev_info, boost);
+	int ret;
+
+	func_trace();
+	//dev_dbg(bdi->dev, "prop: %d\n", psp);
+
+	//pm_runtime_put_sync(bdi->dev);
+
+	switch (psp) {
+	case POWER_SUPPLY_PROP_BOOST_ENABLE:
+		ret = sgm41513_boost_set_charge_enable(bdi, val);
+		break;
+	case POWER_SUPPLY_PROP_CURRENT_NOW:
+		ret = sgm41513_boost_set_current_now(bdi, val);
+		break;
+
+	default:
+		ret = -EINVAL;
+	}
+
+	func_trace();
+	//pm_runtime_put_sync(bdi->dev);
+	return ret;
+}
+
+static int sgm41513_boost_property_is_writeable(struct power_supply *psy,enum power_supply_property psp)
+{
+	int ret;
+
+	func_trace();
+	switch (psp) {
+	case POWER_SUPPLY_PROP_BOOST_ENABLE:
+	case POWER_SUPPLY_PROP_CURRENT_NOW:
+		ret = 1;
+		break;
+	default:
+		ret = 0;
+	}
+
+	func_trace();
+	return ret;
+}
+
+static enum power_supply_property sgm41513_boost_properties[] = {
+	POWER_SUPPLY_PROP_ONLINE,
+	POWER_SUPPLY_PROP_CURRENT_NOW,
+	//WER_SUPPLY_PROP_CURRENT_MAX,
+	POWER_SUPPLY_PROP_BOOST_ENABLE,
+};
+
+static void sgm41513_boost_init(struct power_supply *boost)
+{
+	#ifdef  DBG_CHARGE
+	//printk(KERN_INFO "sgm41513_boost_init =%x.\n",boost);
+	#endif
+	boost->name = "boost";
+	boost->type = POWER_SUPPLY_PCAC_UNKNOWN;
+	boost->properties = sgm41513_boost_properties;
+	boost->num_properties = ARRAY_SIZE(sgm41513_boost_properties);
+	boost->get_property = sgm41513_boost_get_property;
+	boost->set_property = sgm41513_boost_set_property;
+	boost->property_is_writeable = sgm41513_boost_property_is_writeable;
+}
+
+
+static int sgm41513_charger_gpio_config(struct device *dev,int pin,gpio_func_id func_sel,char *name)
+{
+	int ret = -1;
+	
+	func_trace();
+	if (gpio_is_valid(pin)){
+		ret = gpio_request(pin, name);
+		if (ret){
+			dev_err(dev, "cannot get [%s] gpio\n",name);
+			return -1;
+		}
+		ret = zx29_gpio_config(pin,func_sel);	
+		if(ret){
+			dev_err(dev, "cannot config [%s] gpio\n",name);
+			gpio_free(pin);
+			return -1;
+		}
+	}
+	
+	func_trace();
+	return 0;
+}
+
+#if 0
+//zx234500_charger_gpio_config_input
+static void sgm41513_charger_gpio_config_input(struct device *dev,int gpio,gpio_func_id func_sel,char *str)	
+{
+	if(sgm41513_charger_gpio_config(dev,gpio,func_sel,str)!=0)
+		return;	
+	zx29_gpio_set_direction(gpio,GPIO_IN);
+	zx29_gpio_input_data(gpio);
+}
+#endif
+
+//zx234500_charger_gpio_config_output
+static int  sgm41513_charger_gpio_config_output(struct device *dev,int gpio,gpio_func_id func_sel,char *str,int value2)	
+{
+	func_trace();
+	if(sgm41513_charger_gpio_config(dev,gpio,func_sel,str)!=0)
+		return -1;
+	zx29_gpio_set_direction(gpio,GPIO_OUT);
+	zx29_gpio_output_data(gpio,value2);
+
+	func_trace();
+	return 0;
+}
+
+static int sgm41513_boost_gpio_init(struct device *dev, struct sgm41513_platform_data *pdata)
+{
+	int ret = -1;
+
+	func_trace();
+	return 0;	
+}
+
+static void sgm41513_boost_gpio_uninit(struct sgm41513_platform_data *pdata)
+{    
+	func_trace();
+	func_trace();
+}
+
+/*
+		when BAT goes under BAEdet(3.4V) or CHGRST set 1
+		Group B(A1,A2,A3,A4,A5,A7) registers will reset
+		call this function in init or dcin
+*/
+static int sgm41513_charger_config_groupB_Regs(struct sgm41513_dev_info *bdi)
+{
+	int ret;
+	return 0;//@todo cy add
+
+#if 0
+	/*set VINDPM to 4.52V*/
+	ret = sgm41513_write_mask(bdi,SGM41513_REG_ISC,
+				   SGM41513_REG_ISC_VINDPM_MASK,
+				   SGM41513_REG_ISC_VINDPM_SHIFT,
+				   0x8);
+	/*set VSETA to 4.2V*/
+	ret += sgm41513_write_mask(bdi,SGM41513_REG_CVC,
+				   SGM41513_REG_CVC_VBAT_MASK,
+				   SGM41513_REG_CVC_VBAT_SHIFT,
+				   0x2);
+
+	/*disable the timer*/
+	ret += sgm41513_write_mask(bdi,SGM41513_REG_CTC,
+				   SGM41513_REG_CTC_EN_TIMER_MASK,
+				   SGM41513_REG_CTC_EN_TIMER_SHIFT,
+				   0x0);
+	/*disable the 2*timer*/
+	ret += sgm41513_write_mask(bdi,SGM41513_REG_CTC,
+				   SGM41513_REG_CTC_EN_2XTIMER_MASK,
+				   SGM41513_REG_CTC_EN_2XTIMER_SHIFT,
+				   0x0);
+	/*set CVCOMP to 20mV*/
+	ret += sgm41513_write_mask(bdi,SGM41513_REG_CTC,
+				   SGM41513_REG_CTC_CVCOMP_MASK,
+				   SGM41513_REG_CTC_CVCOMP_SHIFT,
+				   0x4);
+
+
+	/*disable the JETTA*/
+	ret += sgm41513_write_mask(bdi,SGM41513_REG_THR,
+					SGM41513_REG_THR_EN_JEITA_MASK,
+					SGM41513_REG_THR_EN_JEITA_SHIFT,
+					0x0);
+
+	/*set the temprator   cool */
+	/*00:0	01:5  10:10  11:15*/
+	ret += sgm41513_write_mask(bdi,SGM41513_REG_TS,
+					SGM41513_REG_TS_COOL_MASK,
+					SGM41513_REG_TS_COOL_SHIFT,
+					0x0);
+
+	if (ret < 0){
+		goto out;
+	}
+
+	return 0;
+
+	out:
+		//pm_runtime_put_sync(bdi->dev);
+		dev_err(bdi->dev, "sgm41513_charger_groupB_config ERROR: %d\n", ret);
+		return ret;
+
+#endif
+}
+
+static int sgm41513_hw_init(struct sgm41513_dev_info *bdi)
+{
+	u8 v;
+	int i, voltage;
+	int ret=0;
+
+	func_trace();
+	union power_supply_propval voltage_val = {0};
+
+#ifdef DBG_CHARGE
+	//set pshold1 1,just for test
+	//gpio_request(ZX29_GPIO_51, "pshold1");
+	//zx29_gpio_config(ZX29_GPIO_51, GPIO51_GPIO51);
+	//zx29_gpio_set_direction(ZX29_GPIO_51, GPIO_OUT);
+	//zx29_gpio_output_data(ZX29_GPIO_51, 1);
+#endif 
+	//pm_runtime_get_sync(bdi->dev);
+	
+	ret = sgm41513_write_mask(bdi,SGM41513_REG0B,
+		SGM41513_REG0B_REGRST_MASK,
+		SGM41513_REG0B_REGRST_SHIFT,
+		0x1);
+	if (ret < 0){
+		pr_err("cy: line %d ret %d\n", __LINE__, ret);
+		goto out;
+	}
+	pr_err("cy: line %d ret %d\n", __LINE__, ret);
+
+/*
+	ret = sgm41513_write_mask(bdi,SGM41513_REG06,
+		SGM41513_REG06_OVP_MASK,
+		SGM41513_REG06_OVP_SHIFT,
+		0x1);
+	if (ret < 0){
+		pr_err("cy: line %d ret %d\n", __LINE__, ret);
+		goto out;
+	}
+*/
+	/*
+	ret = sgm41513_write_mask(bdi,SGM41513_REG01,
+		SGM41513_REG01_CHG_CONFIG_MASK,
+		SGM41513_REG01_CHG_CONFIG_SHIFT,
+		0x0);
+		*/
+
+	ret = sgm41513_write_mask(bdi,SGM41513_REG03,
+		SGM41513_REG03_ITERM_MASK,
+		SGM41513_REG03_ITERM_SHIFT,
+		0xd);
+	if (ret < 0){
+		pr_err("cy: line %d ret %d\n", __LINE__, ret);
+		//goto out;
+	}
+
+	dump_sgm_regs(bdi->client);
+
+	pr_err("cy: line %d ret %d\n", __LINE__, ret);
+	/* First check that the device really is what its supposed to be */
+	ret = sgm41513_read_mask(bdi, SGM41513_REG0B,
+			SGM41513_REG0B_PN_MASK,
+			SGM41513_REG0B_PN_SHIFT,
+			&v);
+	
+	if (ret < 0){
+		pr_err("cy: line %d ret %d\n", __LINE__, ret);
+	    	goto out;
+	}
+
+	printk(KERN_INFO "sgm41513_hw_init:sgm41513-charger version reg: 0x%x\n", v);
+	//ret = sgm41513_write_mask(bdi, SGM41513_REG01, SGM41513_REG01_OTG_CONFIG_MASK, SGM41513_REG01_OTG_CONFIG_SHIFT, 0x1);
+
+	if (ret < 0){
+		pr_err("cy: line %d ret %d\n", __LINE__, ret);
+	}
+	/*
+	if (v != bdi->model) {
+		ret = -ENODEV;
+		goto out;
+	}
+	*/
+	voltage_val.intval = 4400;
+	ret = sgm41513_charger_set_voltage(bdi,&voltage_val);
+	if (ret < 0){
+		pr_err("cy: line %d ret %d\n", __LINE__, ret);
+		goto out;
+	}
+
+	/*disable the timer*/
+	ret = sgm41513_write_mask(bdi,SGM41513_REG05,
+		SGM41513_REG05_EN_TIMER_MASK,
+		SGM41513_REG05_EN_TIMER_SHIFT,
+		0x0);
+	if (ret < 0){
+		pr_err("cy: line %d ret %d\n", __LINE__, ret);
+		goto out;
+	}
+	
+	ret = sgm41513_write_mask(bdi,SGM41513_REG02,
+		SGM41513_REG02_BOOST_LIM_MASK,
+		SGM41513_REG02_BOOST_LIM_SHIFT,
+		0x1);
+	if (ret < 0){
+		pr_err("cy: line %d ret %d\n", __LINE__, ret);
+		goto out;
+	}
+	
+	ret = sgm41513_write_mask(bdi,SGM41513_REG02,
+		SGM41513_REG02_ICHG_MASK,
+		SGM41513_REG02_ICHG_SHIFT,
+		0x34);
+	if (ret < 0){
+		pr_err("cy: line %d ret %d\n", __LINE__, ret);
+		goto out;
+	}
+	
+	dump_sgm_regs(bdi->client);
+	printk("cy: get_adc1_voltage %d\n", ret);
+	voltage = get_adc1_voltage();
+	//*
+	if (voltage < 3800) {
+		set_typec_try_role(0); // try dongle
+	} else {
+		set_typec_try_role(1);
+	}
+	func_trace();
+	//*/
+
+	//disable watchdog for temp @todo
+	ret = sgm41513_write_mask(bdi,SGM41513_REG05, SGM41513_REG05_WATCHDOG_MASK, 
+			SGM41513_REG05_WATCHDOG_SHIFT, 0x0);
+	
+    return 0;
+
+out:
+	//pm_runtime_put_sync(bdi->dev);
+	dev_err(bdi->dev, "sgm41513_hw_init err: %d\n", ret);
+	return ret;
+}
+
+
+static irqreturn_t sgm41513_charger_irq_primary_handler(int irq, struct sgm41513_dev_info *bdi)
+{
+	func_trace();
+	disable_irq_nosync(irq);
+	//pcu_int_clear(irq);
+	pcu_clr_irq_pending(irq);
+	
+	up(&bdi->chgirq_sem);
+	func_trace();
+	return IRQ_HANDLED;
+}
+
+static irqreturn_t sgm41513_irq_handler_thread(void *data)
+{
+	struct sgm41513_dev_info *bdi = data;
+	bool charger_changed_flag = false;
+	bool battery_changed_flag = false;
+	bool boost_changed_flag = false;
+	int ret;
+	u8 ms;
+	struct sched_param param = { .sched_priority = 2 };
+	param.sched_priority= 31;
+	func_trace();
+	sched_setscheduler(current, SCHED_FIFO, &param);
+
+	while(1)
+	{
+		down(&bdi->chgirq_sem);
+		//pm_runtime_get_sync(bdi->dev);
+		mutex_lock(&bdi->bs_reg_lock);
+		bdi->pre_reg09=bdi->reg09;
+		bdi->pis_pre_reg=bdi->pis_curr_reg;
+		bdi->cfis_pre_reg = bdi->cfis_curr_reg;
+		
+		//printk(KERN_INFO"sgm41513_irq_handler_thread\n");
+		
+		
+#if 0
+		ret = sgm41513_read(bdi, SGM41513_REG_MS, &ms);
+		if (ret < 0) {		
+			dev_err(bdi->dev, "Can't read MS reg: %d\n", ret);
+			mutex_unlock(&bdi->bs_reg_lock);
+			goto out;
+		}
+		//printk("sgm41513 MS reg is %d",ms);
+		
+		ret = sgm41513_read(bdi, SGM41513_REG_CBIS, &bdi->cbis_curr_reg);
+		if (ret < 0) {		
+			dev_err(bdi->dev, "Can't read CBIS reg: %d\n", ret);
+			mutex_unlock(&bdi->bs_reg_lock);
+			goto out;
+		}
+
+		
+		ret = sgm41513_read(bdi, SGM41513_REG_PIS, &bdi->pis_curr_reg);
+		if (ret < 0) {
+			dev_err(bdi->dev, "Can't read PIS reg: %d\n", ret);
+			mutex_unlock(&bdi->bs_reg_lock);
+			goto out;
+		}
+
+		ret = sgm41513_read(bdi, SGM41513_REG_CIIS, &bdi->ciis_curr_reg);
+		if (ret < 0) {
+			dev_err(bdi->dev, "Can't read CIIS reg: %d\n", ret);
+			mutex_unlock(&bdi->bs_reg_lock);
+			goto out;
+		}
+		printk("cbis_reg: 0x%02x, pis_reg: 0x%02x, ciis_reg: 0x%02x\n", 
+		                  bdi->cbis_curr_reg, bdi->pis_curr_reg, bdi->ciis_curr_reg);
+		/*clear the A10 int*/
+		ret = sgm41513_write_mask(bdi, SGM41513_REG_CIIS,SGM41513_REG_CIIS_INT_MASK,SGM41513_REG_CIIS_INT_SHIFT,0);
+		
+		if (ret < 0) {
+			printk(KERN_INFO"chg clear int failed 1\n");
+			ret = sgm41513_write_mask(bdi, SGM41513_REG_CIIS,SGM41513_REG_CIIS_INT_MASK,SGM41513_REG_CIIS_INT_SHIFT,0);
+			if (ret < 0) {
+				printk(KERN_INFO"chg clear int failed 2\n");
+				ret = sgm41513_write_mask(bdi, SGM41513_REG_CIIS,SGM41513_REG_CIIS_INT_MASK,SGM41513_REG_CIIS_INT_SHIFT,0);
+				if (ret < 0) {	
+					printk(KERN_INFO"chg clear int failed 3\n");
+				}
+				else{
+					printk(KERN_INFO"chg clear int failed ok 3\n");
+					//panic(0);
+				}		
+			}
+			else{
+				printk(KERN_INFO"chg clear int failed ok 2\n");
+			}
+		}
+			
+		if(bdi->cbis_curr_reg != bdi->cbis_pre_reg){
+			if ((bdi->cbis_curr_reg & SGM41513_REG_CBIS_DCIN_PG_MASK) != (bdi->cbis_pre_reg & SGM41513_REG_CBIS_DCIN_PG_MASK)) {
+				if(bdi->cbis_curr_reg & SGM41513_REG_CBIS_DCIN_PG_MASK){			
+					//sgm41513_hw_init(bdi);
+					printk(KERN_INFO"chg usb in\n");
+					dwc_otg_chg_inform(0);/*usb in*/
+
+					ret = sgm41513_charger_config_groupB_Regs(bdi);
+					if(ret)
+					{
+						printk(KERN_INFO"chg config groupB Regs failed\n");
+					}
+					// ret = sgm41513_write_mask(bdi,SGM41513_REG_MS,SGM41513_REG_MS_PMUON_MASK,SGM41513_REG_MS_PMUON_SHIFT,0x1);
+				}
+				else{
+					printk(KERN_INFO"chg usb out\n");
+					dwc_otg_chg_inform(1);/*usb out*/
+					bdi->charger.type = POWER_SUPPLY_PCAC_UNKNOWN;
+					// ret = sgm41513_write_mask(bdi,SGM41513_REG_MS,SGM41513_REG_MS_PMUON_MASK,SGM41513_REG_MS_PMUON_SHIFT,0x0);
+				}
+			}
+			charger_changed_flag = true;
+		}
+
+		if(true == bdi->pdata->boost_flag){
+			if (bdi->pis_curr_reg != bdi->pis_pre_reg) {	
+				if(bdi->pis_curr_reg & SGM41513_REG_PIS_POWERON_IT_MASK){			
+					queue_delayed_work(g_bdi->boostQueue,&bdi->boostWorkStruct,2000);	
+				}		
+				boost_changed_flag = true;
+				bdi->boost_online_flag = 1;
+			}
+		}
+		
+		if (bdi->ciis_curr_reg != bdi->ciis_pre_reg) {	
+			if(true == bdi->pdata->ts_flag){		
+				if((bdi->ciis_curr_reg & SGM41513_REG_CIIS_TS_METER_MASK) != (bdi->ciis_pre_reg & SGM41513_REG_CIIS_TS_METER_MASK)){
+#ifdef DBG_CHARGE
+					switch((bdi->ciis_curr_reg&SGM41513_REG_CIIS_TS_METER_MASK )>>SGM41513_REG_CIIS_TS_METER_SHIFT){		
+					case 0:
+#ifdef DBG_CHARGE
+						printk(KERN_INFO"chg bat temp nomrmal\n");
+#endif
+						break;
+					case SGM41513_REG_CISS_TS_WARM:/*warm*/	
+					/*in warm state,stop boost*/
+#ifdef DBG_CHARGE
+					printk(KERN_INFO"chg bat temp warm \n");
+#endif
+					break;
+					case SGM41513_REG_CISS_TS_COOL:/*cool*/
+						/*in cool state,stop boost*/
+#ifdef DBG_CHARGE
+						printk(KERN_INFO"chg bat  temp cool\n");
+#endif
+						//chg_disable.intval = 1;
+						//pwrbnk_enable.intval = 0;
+						//sgm41513_charger_set_charger_config(bdi,&chg_disable);
+						//sgm41513_boost_set_charge_enable(bdi, &pwrbnk_enable);
+						break;
+					case 3:/*hot*/ 
+						/*in hot state,charger chip auto off*/
+						printk(KERN_INFO"chg bat temp hot \n");
+						break;
+					case 6:/*cold*/	
+						/*in cold state,charger chip auto off*/
+						printk(KERN_INFO"chg bat temp cold\n");
+						break;
+					default:
+						printk(KERN_INFO"chg bat temp unkonw\n");
+						break;	
+					}	
+#endif
+				}
+			}
+			battery_changed_flag = true;	
+		}
+		bdi->charger_health_valid = true;/****?***/
+		bdi->battery_health_valid = true;/****?***/
+		bdi->battery_status_valid = true;/****?***/
+
+		mutex_unlock(&bdi->bs_reg_lock);
+
+		/*
+		 * Sometimes sgm41513 gives a steady trickle of interrupts even
+		 * though the watchdog timer is turned off and neither the STATUS
+		 * nor FAULT registers have changed.  Weed out these sprurious
+		 * interrupts so userspace isn't alerted for no reason.
+		 * In addition, the chip always generates an interrupt after
+		 * register reset so we should ignore that one (the very first
+		 * interrupt received).
+		 */
+		//if (charger_changed_flag && !bdi->first_time) 
+		if (charger_changed_flag ) 
+			power_supply_changed(&bdi->charger);
+		//if (battery_changed_flag && !bdi->first_time) 
+		if (battery_changed_flag) 
+			power_supply_changed(&bdi->battery);
+		if (true == bdi->pdata->boost_flag){		
+			//if (boost_changed_flag && !bdi->first_time) 
+			if (boost_changed_flag ) 
+			power_supply_changed(&bdi->boost);
+		}
+		
+		bdi->first_time = false;
+
+	out:
+		//pm_runtime_put_sync(bdi->dev);
+		
+		dev_dbg(bdi->dev, "read reg:cbis_reg: 0x%02x, pis_reg: 0x%02x, ciis_reg: 0x%02x\n", 
+		                  bdi->cbis_curr_reg, bdi->pis_curr_reg, bdi->ciis_curr_reg);
+		
+		enable_irq(bdi->irq);
+#endif
+	}
+	func_trace();
+	return 0;
+}
+
+
+static int sgm41513_setup_pdata(struct sgm41513_dev_info *bdi,
+		struct sgm41513_platform_data *pdata)
+{
+	int ret;
+
+	func_trace();
+#if 0
+	if (!gpio_is_valid(pdata->gpio_int))
+		return -1;
+
+	ret = gpio_request(pdata->gpio_int, dev_name(bdi->dev));
+	if (ret < 0)
+		return -1;
+
+	ret = gpio_direction_input(pdata->gpio_int);
+	if (ret < 0)
+		goto out;
+
+	bdi->irq = gpio_to_irq(pdata->gpio_int);
+	if (!bdi->irq)
+		goto out;
+#endif
+	
+	bdi->irq = gpio_to_irq(pdata->gpio_int);
+	#ifdef  DBG_CHARGE
+	printk(KERN_INFO"sgm41513_setup_pdata irq= %d\n",bdi->irq);
+	#endif
+	/*Ñ¡Ôñ´Ë¸´Óù¦ÄÜΪÖжϹ¦ÄÜ*/
+	ret = zx29_gpio_config(pdata->gpio_int,pdata->gpio_int_fun_sel);/********GPIO11:0 /EXT_INT:5*******/
+	if (ret < 0){
+		printk(KERN_INFO"sgm41513 zx29_gpio_config error int= %d,fun= %d\n",pdata->gpio_int,pdata->gpio_int_fun_sel);		
+		return -1;
+	}
+
+	zx29_gpio_set_inttype(pdata->gpio_int,IRQ_TYPE_EDGE_FALLING/*IRQ_TYPE_EDGE_RISING*/);  //INT_POSEDGE
+	zx29_gpio_pd_pu_set(pdata->gpio_int, IO_CFG_PULL_DISABLE);
+
+	bdi->gpio_int = pdata->gpio_int;
+	//pcu_int_clear(bdi->irq);
+	pcu_clr_irq_pending(bdi->irq);
+	func_trace();
+	return 0;
+#if 0
+out:
+	gpio_free(pdata->gpio_int);
+	return -1;
+#endif
+
+}
+
+
+static int sgm41513_init_state(struct sgm41513_dev_info *bdi)
+{
+	u8 cfis_reg,pis_reg,cbis_reg,ciis_reg;
+	int ret;
+
+	printk(KERN_INFO "sgm41513_init_state start.\n");
+
+#if 0
+	ret = sgm41513_read(bdi, SGM41513_REG_CBIS, &cbis_reg);
+	if (ret < 0){
+		printk(KERN_INFO "charger:init state:Can't read CBIS reg: 0x%x\n", cbis_reg);
+		return ret;
+	}
+
+	ret = sgm41513_read(bdi, SGM41513_REG_PIS, &pis_reg);
+	if (ret < 0) {
+		printk(KERN_INFO "charger:init Power On /PMID state:Can't read PIS reg: %d\n", ret);
+		return ret;
+	}
+	
+	ret = sgm41513_read(bdi, SGM41513_REG_CFIS, &cfis_reg);
+	if (ret < 0) {
+		printk(KERN_INFO "charger:init Power On /PMID state:Can't read CFIS reg: %d\n", ret);
+		return ret;
+	}
+
+	ret = sgm41513_read(bdi, SGM41513_REG_CIIS, &ciis_reg);
+	if (ret < 0) {
+		printk(KERN_INFO "charger:init Power On /PMID state:Can't read CISS reg: %d\n", ret);
+		return ret;
+	}
+
+	mutex_lock(&bdi->bs_reg_lock);
+	#ifdef DBG_CHARGE
+	printk(KERN_INFO "sgm41513_init_state get lock  ok.\n");
+	#endif
+	bdi->cbis_curr_reg= cbis_reg;
+	bdi->pis_curr_reg= pis_reg;
+	bdi->cfis_curr_reg= cfis_reg;
+	bdi->ciis_curr_reg = ciis_reg;
+	bdi->charger.type = POWER_SUPPLY_TYPE_UNKNOWN;
+	
+	if(bdi->cbis_curr_reg & SGM41513_REG_CBIS_DCIN_PG_MASK){			
+		printk(KERN_INFO"send ap usb in message\n");
+		dwc_otg_chg_inform(0);/*usb in*/
+	}
+	else{
+		printk(KERN_INFO"send ap usb out message\n");
+		dwc_otg_chg_inform(0);/*usb out*/	
+	}
+	#ifdef DBG_CHARGE
+	if(bdi->cbis_curr_reg & BIT(5))
+		printk(KERN_INFO "no batterty.\n");
+	else
+		printk(KERN_INFO " baterry installed.\n");
+	#endif
+	mutex_unlock(&bdi->bs_reg_lock);
+#ifdef DBG_CHARGE
+	printk(KERN_INFO "sgm41513_init_state:cfis_reg10=0x%x,pis_reg0E=0x%x,cbis_reg0C=0x%x,ciis_reg0A=0x%x.\n",cfis_reg,pis_reg,cbis_reg,ciis_reg);
+#endif
+
+#endif
+	return 0;
+}
+
+
+static void sgm41513_boost_workstruct_callback(struct work_struct *work )
+{	
+	func_trace();
+	uint vol_curr = 0;
+	#ifdef DBG_CHARGE
+	u8 mainset;
+	#endif
+	struct sgm41513_dev_info *bdi =
+			container_of(work, struct sgm41513_dev_info, boostWorkStruct);	
+	vol_curr = get_adc2_voltage();/*get boost current*/
+	#ifdef DBG_CHARGE
+	printk(KERN_INFO"boost current is %d in\n",vol_curr);
+	sgm41513_read(bdi, 0, &mainset);
+	printk(KERN_INFO"powerbank is %d in\n",mainset);
+	printk(KERN_INFO"workqueue test\n");
+	#endif
+	if (vol_curr < SGM41513_BOOST_V_LIMIT)/*50mV*/{
+		bdi->boostcount++;
+	}
+	if(bdi->boostcount > 3){
+		bdi->boostcount = 0;	
+		bdi->boost_online_flag = 0;
+		power_supply_changed(&bdi->boost);
+		cancel_delayed_work_sync(&bdi->boostWorkStruct);
+	}
+	else{
+		bdi->boost_online_flag = 1;
+		queue_delayed_work(bdi->boostQueue,&bdi->boostWorkStruct,2000);		
+	}
+	func_trace();
+
+}
+
+static T_TYPE_USB_DETECT g_chg_type = 0;
+void sgm41513_charge_typedet(T_TYPE_USB_DETECT chg_type)
+{
+	int ret;
+	union power_supply_propval val = {.intval = 0};
+	#ifdef DBG_CHARGE
+	printk(KERN_INFO"charge type is %d in\n",chg_type);
+	#endif
+	func_trace();
+	g_chg_type  = chg_type;
+#if 1
+	if(TYPE_ADAPTER == chg_type){
+		
+		printk(KERN_INFO"chg type is TYPE_ADAPTER\n");
+		//gpio_direction_output(120, 0);
+		//ce_enabled = 1;
+		val.intval = 1;
+		 /*set the DCIN Current = 2.4A*/
+		ret = sgm41513_write_mask(g_bdi,SGM41513_REG00,
+					   SGM41513_REG00_IINDPM_MASK,
+					   SGM41513_REG00_IINDPM_SHIFT,
+					   0x17);
+		if (ret < 0){
+			printk(KERN_INFO"write REG_00 fault\n");
+		}
+		g_bdi->charger.type = POWER_SUPPLY_PCAC__AC;
+		dump_sgm_regs(g_bdi->client);
+		sgm41513_charger_set_charger_config(g_bdi, &val);
+	}
+	
+	else {
+		//ret = get_typec_role();
+		//printk(KERN_INFO"chgage type is TYPE_PC %d\n", ret);
+		gpio_direction_output(120, 1);
+		ce_enabled = 0;
+		
+		 /*set the DCIN Current = 450mA*/
+		ret = sgm41513_write_mask(g_bdi,SGM41513_REG00,
+					   SGM41513_REG00_IINDPM_MASK,
+					   SGM41513_REG00_IINDPM_SHIFT,
+					   0x4);
+		if (ret < 0){
+			printk(KERN_INFO"write REG_01 fault\n");
+		}
+
+		/*
+		voltage = get_adc1_voltage();
+		if (voltage > 3500) {
+			ret = sgm41513_write_mask(bdi,SGM41513_REG00, SGM41513_REG00_EN_HIZ_MASK, 
+				SGM41513_REG00_EN_HIZ_SHIFT, 0x1);
+		}
+		*/
+		g_bdi->charger.type = POWER_SUPPLY_PCAC__PC;
+		dump_sgm_regs(g_bdi->client);
+	}
+		
+		//#ifdef CONFIG_CHARGER_SGM41513_EVB
+#if 0
+		 /*set the DCIN Current = 2A*/
+		ret = sgm41513_write_mask(g_bdi,SGM41513_REG_ISC,
+					   SGM41513_REG_ISC_ISET_DCIN_MASK,
+					   SGM41513_REG_ISC_ISET_DCIN_SHIFT,
+					   0x5);
+		if (ret < 0){
+			printk(KERN_INFO"write REG_01 fault\n");
+		}
+		#endif
+
+		
+
+#endif
+}
+
+
+#if defined(CONFIG_DEBUG_FS)
+static ssize_t debugfs_regs_write(struct file *file, const char __user *buf,size_t nbytes, loff_t *ppos)
+{
+	unsigned int val1, val2;
+	u8 reg, value;
+	int ret;
+	char *kern_buf;
+	struct seq_file	*s = file->private_data;
+	struct sgm41513_dev_info *sgm41513 = s->private;
+
+	func_trace();
+	kern_buf = kzalloc(nbytes, GFP_KERNEL);
+
+	if (!kern_buf) {
+		printk(KERN_INFO "sgm41513_charger: Failed to allocate buffer\n");
+		return -ENOMEM;
+	}
+
+	if (copy_from_user(kern_buf, (void  __user *)buf, nbytes)) {
+		kfree(kern_buf);
+		return -ENOMEM;
+	}
+	printk(KERN_INFO "%s input str=%s,nbytes=%d \n", __func__, kern_buf,nbytes);	
+	
+	ret = sscanf(kern_buf, "%x:%x", &val1, &val2);
+	if (ret < 2 || val1 > SGM41513_REG_MAX ) {
+		printk(KERN_INFO "sgm41513_charger: failed to read user buf, ret=%d, input 0x%x:0x%x\n",
+				ret, val1, val2);
+		kfree(kern_buf);
+		return -EINVAL;
+	}
+	kfree(kern_buf);
+
+	reg = val1 & 0xff;
+	value = val2 & 0xff;
+	printk(KERN_INFO "%s input %x,%x; reg=%x,value=%x\n", __func__, val1, val2, reg, value);	
+	ret = sgm41513_write(sgm41513,reg, value);
+
+	func_trace();
+	return ret ? ret : nbytes;
+}
+
+static int debugfs_regs_show(struct seq_file *s, void *v)
+{
+	int i;
+	u8 value[SGM41513_REG_MAX];
+	int ret=0;
+	int curr = 0;
+	struct sgm41513_dev_info *sgm41513 = s->private;
+
+	func_trace();
+	for (i = 0; i < SGM41513_REG_MAX; i++){
+		ret = sgm41513_read(sgm41513, i, &(value[i]));
+		
+		if(ret){			
+			printk(KERN_INFO "%s err=%d, break\n", __func__, ret);	
+			seq_printf(s, "%s err=%d, break", __func__, ret);
+			return ret;
+		}
+	}
+
+	for (i = 0; i < SGM41513_REG_MAX; i++) {	
+		if((i+1)%9 == 0)
+			seq_printf(s, "\n");	
+		
+		seq_printf(s, "[0x%x]%02x ", i, value[i]);				
+	}
+	/*charger type*/
+	if(sgm41513->charger.type ==POWER_SUPPLY_PCAC__PC){
+		seq_printf(s, "charger type is  PC\n");
+	}
+	else if(sgm41513->charger.type ==POWER_SUPPLY_PCAC__AC){
+		seq_printf(s, "charger type is  AC\n");
+	}
+	else
+	seq_printf(s, "charger type is  unknow = %d\n",sgm41513->charger.type);
+
+	/*stopchg_flag*/
+	/*
+	if(1==stopchg_flag){
+		seq_printf(s, "mmi set charger enable,the charger state = %d\n",!(value[SGM41513_REG_MS]&SGM41513_REG_MS_INSUS_MASK));
+	}
+	else if(2==stopchg_flag){
+		seq_printf(s, "mmi set charger disable,the charger state = %d\n",!(value[SGM41513_REG_MS]&SGM41513_REG_MS_INSUS_MASK));
+	}
+	else
+		seq_printf(s, "mmi never set the charger ,the charger state = %d\n",!(value[SGM41513_REG_MS]&SGM41513_REG_MS_INSUS_MASK));
+		*/
+
+	/*charge current*/
+	/*
+	ret = sgm41513_get_field_val(sgm41513, SGM41513_REG_ISC,
+		SGM41513_REG_ISC_ISET_DCIN_MASK, SGM41513_REG_ISC_ISET_DCIN_SHIFT,
+		sgm41513_in_ilimit_values,
+		ARRAY_SIZE(sgm41513_in_ilimit_values), &curr);
+	
+	if (ret < 0)
+		return ret;
+		*/
+	seq_printf(s, "the charger current now  = %dmA\n",curr);
+
+
+	func_trace();
+	return ret;
+}
+
+#define DEBUGFS_FILE_ENTRY(name) \  
+static int debugfs_##name##_open(struct inode *inode, struct file *file) \  
+{\  
+return single_open(file, debugfs_##name##_show, inode->i_private); \  
+}\  
+\  
+static const struct file_operations debugfs_##name##_fops = { \  
+.owner= THIS_MODULE, \  
+.open= debugfs_##name##_open, \  
+.write=debugfs_##name##_write, \
+.read= seq_read, \  
+.llseek= seq_lseek, \  
+.release= single_release, \  
+}  
+
+DEBUGFS_FILE_ENTRY(regs);
+
+static struct dentry *g_charger_root;
+
+static void debugfs_charger_init(struct sgm41513_dev_info  *sgm41513)
+{
+	struct dentry *root;
+	struct dentry *node;		
+	int i;
+	
+	if(!sgm41513)
+		return;
+
+	//create root
+	root = debugfs_create_dir("charger_zx29", NULL);
+	if (!root)	{	
+		dev_err(&sgm41513->dev, "debugfs_create_dir err=%d\n", IS_ERR(root));
+		goto err;
+	}
+
+	//print regs;
+	node = debugfs_create_file("regs", S_IRUGO | S_IWUGO, root, sgm41513,  &debugfs_regs_fops);
+	if (!node){
+		dev_err(&sgm41513->dev, "debugfs_create_dir err=%d\n", IS_ERR(node));
+		goto err;
+	}
+	
+	g_charger_root = (void *)root;
+	return;
+err:
+	dev_err(&sgm41513->dev, "debugfs_charger_init err\n");
+}
+
+#endif
+
+
+static void dump_sgm_regs(struct i2c_client *client)
+{
+	int i, ret;
+    printk("cy:sgm reg:");
+	for(i=0;i<=0xf;i++)
+    {
+        ret = i2c_smbus_read_byte_data(client, i);
+        if (ret >=0)
+        {
+                printk("%d - %02x\t", i, ret);
+        }
+		else
+		{
+			printk("cy:sgm reg %d error\n");
+		}
+    }
+    printk("\n");
+}
+
+static void charger_monitor_work_func(struct work_struct *work)
+{
+	int ret = 0;
+	struct sgm41513_dev_info * bdi = NULL;
+	struct delayed_work *charge_monitor_work = NULL;
+	union power_supply_propval val = {.intval = 4100};
+	//static u8 last_chg_method = 0;
+	u8 last_curr = -1;
+	u8 need_curr = -1;
+
+	charge_monitor_work = container_of(work, struct delayed_work, work);
+	if(charge_monitor_work == NULL) {
+		pr_err("Cann't get charge_monitor_work\n");
+		return ;
+	}
+	bdi = container_of(charge_monitor_work, struct sgm41513_dev_info, charge_monitor_work);
+	if(bdi == NULL) {
+		pr_err("Cann't get sgm \n");
+		return ;
+	}
+	
+	ret = sgm41513_read_mask(bdi,SGM41513_REG02,
+		SGM41513_REG02_ICHG_MASK,
+		SGM41513_REG02_ICHG_SHIFT,
+		&last_curr);
+
+	ret = get_adc2_voltage();
+	pr_err("%s voltage %d\n",__func__, ret);
+	if (ret >1284 || ret < 422){ // bellow 0 deg or above 60 deg, curr set to 0
+		need_curr = 0x0;
+		printk("cy: need 0\n");
+	} else if (ret > 1057) { // above 0 deg and bellow 15 deg, curr set to 500mA
+		need_curr = 0x1f;
+		printk("cy: need 1f\n");
+	} else if (ret > 623 && ret <= 1057) { // above 15 deg and bellow 45 dec, curr set to 2A
+		need_curr = 0x34;
+		printk("cy: need 34\n");
+	} else if (ret >= 422 && ret <= 623) { // above 45 deg and bellow 60 dec, curr set to 1A, max vol set to 4.1V
+		need_curr = 0x27;
+		printk("cy: need 27\n");
+		sgm41513_charger_set_voltage(bdi, &val);
+	}
+	else {
+		need_curr = -1;
+		printk("cy: unkown condition\n");
+	}
+	printk("cy: last_curr %d, need_curr %d\n",last_curr, need_curr);
+	if (need_curr != -1 && last_curr != need_curr)
+	{
+		ret = sgm41513_write_mask(bdi,SGM41513_REG02,
+			SGM41513_REG02_ICHG_MASK,
+			SGM41513_REG02_ICHG_SHIFT,
+			need_curr);
+		last_curr = need_curr;
+	}
+	dump_sgm_regs(bdi->client);
+OUT:	
+	schedule_delayed_work(&bdi->charge_monitor_work, 10*HZ);
+}
+
+static int sgm41513_probe(struct i2c_client *client, const struct i2c_device_id *id)
+{
+	struct i2c_adapter *adapter = to_i2c_adapter(client->dev.parent);
+	struct device *dev = &client->dev;
+	struct sgm41513_platform_data *pdata = client->dev.platform_data;
+	struct sgm41513_dev_info *bdi;
+	int ret;
+	int i;  /*when err try 3 times*/
+	u8 v;
+	//use for other 
+	//g_platform_data= client->dev.platform_data;
+
+	printk(KERN_INFO "charger probe.\n");
+
+	//zx29_gpio_set_direction(120,GPIO_OUT);
+	//zx29_gpio_output_data(120,1);
+	//ret = gpio_direction_output(120, 0);
+        //printk("cy: set derection %d\n", ret);
+
+	dump_sgm_regs(client);
+	if (!i2c_check_functionality(adapter, I2C_FUNC_SMBUS_BYTE_DATA)) {
+		dev_err(dev, "No support for SMBUS_BYTE_DATA\n");
+		return -ENODEV;
+	}
+
+	bdi = devm_kzalloc(dev, sizeof(*bdi), GFP_KERNEL);
+	if (!bdi) {
+		dev_err(dev, "Can't alloc bdi struct\n");
+		return -ENOMEM;
+	}
+	bdi->pdata = pdata;
+	bdi->client = client;
+	bdi->dev = dev;
+	bdi->model = id->driver_data;
+	strncpy(bdi->model_name, id->name, sizeof(bdi->model_name)-1);
+	mutex_init(&bdi->bs_reg_lock);
+	bdi->first_time = true;
+	bdi->charger_health_valid = false;
+	bdi->battery_health_valid = false;
+	bdi->battery_status_valid = false;
+
+	g_bdi = bdi;
+
+	i2c_set_clientdata(client, bdi);
+
+	if (dev->of_node)
+		ret = 0;//sgm41513_setup_dt(bdi);
+	else
+		ret = sgm41513_setup_pdata(bdi, pdata);
+
+	if (ret) {
+		dev_err(dev, "Can't get irq info\n");
+		return -EINVAL;
+	}
+#ifdef DBG_CHARGE
+	printk(KERN_INFO "hwinit.\n");
+#endif
+	//pm_runtime_enable(dev);
+	//pm_runtime_resume(dev);
+	i = 0;
+	do{	
+		ret = sgm41513_hw_init(bdi);
+		if (ret < 0) {
+			printk(KERN_INFO "sgm41513_probe Hardware init failed times = %d\n",(i+1));
+			i++;
+		}
+		else
+			break;
+		
+	}while(i<3);	
+
+#ifdef DBG_CHARGE
+	printk(KERN_INFO "sgm41513_probe sgm41513_hw_init ok.\n");
+#endif
+#ifdef CONFIG_CHARGER_SGM41513_EVB
+	 /*set the DCIN Current = 2A*/
+	/*
+	ret = sgm41513_write_mask(g_bdi,SGM41513_REG_ISC,
+				   SGM41513_REG_ISC_ISET_DCIN_MASK,
+				   SGM41513_REG_ISC_ISET_DCIN_SHIFT,
+				   0x5);
+	if (ret < 0){
+		printk(KERN_INFO"write REG_01 fault\n");
+	}
+	*/
+#endif
+	ret = sgm41513_charger_config_groupB_Regs(bdi);
+	if (ret < 0) {
+		printk(KERN_INFO "groupB config faild.\n");
+	}
+
+	sgm41513_charger_init(&bdi->charger);
+
+	printk("cy: power_supply_register begin\n");
+	ret = power_supply_register(dev, &bdi->charger);
+	printk("cy: power_supply_register end\n");
+	if (ret) {
+		dev_err(dev, "Can't register charger\n");
+		goto out2;
+	}
+	printk(KERN_INFO "sgm41513_probe power_supply_register charger ok.\n");
+
+	sgm41513_battery_init(&bdi->battery);
+
+	ret = power_supply_register(dev, &bdi->battery);
+	if (ret) {
+		dev_err(dev, "Can't register battery\n");
+		goto out3;
+	}
+	printk(KERN_INFO "sgm41513_probe power_supply_register battery ok.\n");
+	
+	if(true == pdata->boost_flag){
+		sgm41513_boost_init(&bdi->boost);
+		ret = power_supply_register(dev, &bdi->boost);
+		if (ret) {
+			dev_err(dev, "Can't register boost\n");
+			goto out4;
+		}
+		
+		ret = sgm41513_boost_gpio_init(dev,pdata);	
+		if (ret) {
+			dev_err(dev, "Can't register boost 2\n");
+			goto out4;
+		}
+	#ifdef DBG_CHARGE
+		printk(KERN_INFO "sgm41513_boost_gpio_init.\n");
+	#endif
+	    
+		bdi->boostQueue = create_workqueue("sgm41513boost");
+		
+		INIT_DELAYED_WORK(&bdi->boostWorkStruct,sgm41513_boost_workstruct_callback);
+		INIT_DELAYED_WORK(&bdi->charge_monitor_work, charger_monitor_work_func);
+		
+		schedule_delayed_work(&bdi->charge_monitor_work,100);
+		//queue_delayed_work(bdi->boostQueue,&bdi->boostWorkStruct,20000);
+	#ifdef DBG_CHARGE
+		printk(KERN_INFO "setup_workqueue.\n");
+	#endif
+	}
+#if 0
+//#ifdef CONFIG_SYSFS
+	ret = sgm41513_sysfs_create_group(bdi);
+	if (ret) {
+		dev_err(dev, "Can't create sysfs entries\n");
+		goto out5;
+	}
+#endif
+	dwc_chg_Regcallback(sgm41513_charge_typedet);/*register for usb*/
+	
+	sema_init(&bdi->chgirq_sem, 0);
+	
+	ret = sgm41513_init_state(bdi);
+	if(ret)
+	{
+		dev_err(dev, "sgm41513 init state error.\n");	
+		goto out1;
+	}
+	
+	bdi->chg_irq_thread = kthread_run(sgm41513_irq_handler_thread, bdi, "sgm41513-chgirq");
+	BUG_ON(IS_ERR(bdi->chg_irq_thread));
+	
+	ret = request_irq(bdi->irq, sgm41513_charger_irq_primary_handler,IRQF_NO_THREAD, "sgm41513-charger", bdi);
+	if (ret < 0) {
+		dev_err(dev, "Can't set up irq handler\n");	
+		goto out1;
+	}
+	irq_set_irq_wake(bdi->irq, 1);
+	
+	/*clear all int*/
+	/*
+	ret = sgm41513_write_mask(bdi,SGM41513_REG_CIIS,SGM41513_REG_CIIS_INT_MASK,SGM41513_REG_CIIS_INT_SHIFT,0x0);
+	if (ret == 0) {
+		printk(KERN_INFO "clear int ok \n");
+	}
+	*/
+
+
+#if defined(CONFIG_DEBUG_FS)
+	debugfs_charger_init(bdi);
+#endif
+
+	/*
+	ret = gpio_request(125, "gpio_usb_det");
+        if (ret < 0)
+                return 0;
+
+        //zx29_gpio_pd_pu_set(125, IO_CFG_PULL_DISABLE);
+        zx29_gpio_pd_pu_set(125, IO_CFG_PULL_DOWN);
+        #if 0
+        ret = zx29_gpio_config(pdata->gpio_chgin, pdata->gpio_chgin_gpio_sel);
+        if (ret < 0)
+                goto error;
+        #endif
+        ret = gpio_direction_input(125);
+        if (ret < 0)
+                return 0;
+
+        mdelay(20);
+        ret = gpio_get_value(125);
+	printk("cy: 125 gpio %d\n", ret);
+
+	dwc_otg_chg_inform(!ret);
+	*/
+
+	ret = sgm41513_read_mask(bdi, SGM41513_REG08,
+			SGM41513_REG08_VBUS_STAT_MASK,
+			SGM41513_REG08_VBUS_STAT_SHIFT,
+			&v);
+
+	if (ret >= 0) {
+		printk("cy: vbus stat %d \n", v);
+		//dwc_otg_chg_inform(!v);
+	}
+
+
+#ifdef DBG_CHARGE
+	printk(KERN_INFO "sgm41513_probe end.\n");
+#endif
+
+	return 0;
+#if 0
+out5:
+	sgm41513_sysfs_remove_group(bdi);
+#endif
+out4:
+	power_supply_unregister(&bdi->boost);
+out3:
+	power_supply_unregister(&bdi->battery);
+out2:
+	//pm_runtime_disable(dev);
+	power_supply_unregister(&bdi->charger);
+out1:
+	if (bdi->gpio_int)
+		gpio_free(bdi->gpio_int);
+	dwc_chg_Regcallback(NULL);/*unregister for usb*/
+
+	return ret;
+}
+
+static int sgm41513_remove(struct i2c_client *client)
+{
+	struct sgm41513_dev_info *bdi = i2c_get_clientdata(client);
+	struct sgm41513_platform_data *pdata = client->dev.platform_data;
+
+	if(!bdi)	
+		return -EINVAL;
+
+	//pm_runtime_get_sync(bdi->dev);
+	sgm41513_register_reset(bdi);
+	//pm_runtime_put_sync(bdi->dev);
+
+	sgm41513_sysfs_remove_group(bdi);
+	power_supply_unregister(&bdi->battery);
+	power_supply_unregister(&bdi->charger);
+	if(true == pdata->boost_flag)
+		power_supply_unregister(&bdi->boost);
+	pm_runtime_disable(bdi->dev);
+
+	if (bdi->gpio_int)
+		gpio_free(bdi->gpio_int);
+	sgm41513_boost_gpio_uninit(pdata);
+
+	if(bdi->boostQueue)
+		destroy_workqueue(bdi->boostQueue);
+	
+#if defined(CONFIG_DEBUG_FS)
+	if(g_charger_root){
+		printk(KERN_INFO "sgm41513_device_exit:debugfs_remove_recursive \n");
+		debugfs_remove_recursive(g_charger_root);
+	}
+#endif
+
+	return 0;
+}
+
+static int sgm41513_suspend(struct i2c_client *not_use, pm_message_t mesg)
+{
+	
+	disable_irq_nosync(g_bdi->irq);
+	return 0;
+	
+}
+
+static int sgm41513_resume(struct i2c_client *not_use)
+{
+	
+	enable_irq(g_bdi->irq);
+	return 0;
+	
+}
+/*
+ * Only support the sgm41513 right now.  The bq24192, bq24192i, and bq24193
+ * are similar but not identical so the driver needs to be extended to
+ * support them.
+ */
+static const struct i2c_device_id sgm41513_i2c_ids[] = {
+	{ "sgm41513-charger", SGM41513_REG_VERS },
+	{ },
+};
+
+static struct i2c_driver sgm41513_driver = {
+	.probe		= sgm41513_probe,
+	.remove		= sgm41513_remove,
+	.id_table	= sgm41513_i2c_ids,
+	.driver = {
+		.name		= "sgm41513-charger",
+		.owner		= THIS_MODULE,
+	},
+		.suspend	= sgm41513_suspend,
+	.resume		= sgm41513_resume,
+};
+static int __init sgm41513_i2c_init(void)
+{
+	int ret;
+
+	pr_err("cy: sgm41513_i2c_init 333\n");
+	//disable charge
+	//zx29_gpio_set_direction(120,GPIO_OUT);
+	//zx29_gpio_output_data(120,1);
+	//ret = gpio_direction_output(120, 0);
+	//printk("cy: set derection %d\n", ret);
+	ret = i2c_add_driver(&sgm41513_driver);
+	if (ret != 0)
+		pr_err("Failed to register visionox_i2c_driver : %d\n", ret);
+
+	return ret;
+}
+/* init early so consumer devices can complete system boot */
+module_init(sgm41513_i2c_init);
+
+static void __exit sgm41513_i2c_exit(void)
+{
+	i2c_del_driver(&sgm41513_driver);
+}
+module_exit(sgm41513_i2c_exit);
+
+MODULE_LICENSE("GPL");
+MODULE_AUTHOR("Mark A. Greer <mgreer@animalcreek.com>");
+MODULE_ALIAS("i2c:sgm41513-charger");
+MODULE_DESCRIPTION("TI SGM41513 Charger Driver");
diff --git a/lynq/R305/V4/ap/os/linux/linux-3.4.x/include/linux/power/sgm41513_charger.h b/lynq/R305/V4/ap/os/linux/linux-3.4.x/include/linux/power/sgm41513_charger.h
new file mode 100644
index 0000000..251dcaf
--- /dev/null
+++ b/lynq/R305/V4/ap/os/linux/linux-3.4.x/include/linux/power/sgm41513_charger.h
@@ -0,0 +1,228 @@
+/*
+ * Platform data for the TI sgm41513 battery charger driver.
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+ */
+
+#ifndef _SGM41513_CHARGER_H_
+#define _SGM41513_CHARGER_H_
+
+#include <linux/bitops.h>
+#include <mach/gpio.h>
+
+typedef void                VOID;
+#define SGM41513_BOOST_V_LIMIT					10
+
+#define SGM41513_REG00						0x00
+#define SGM41513_REG00_EN_HIZ_MASK			BIT(7)
+#define SGM41513_REG00_EN_HIZ_SHIFT			7
+
+#define SGM41513_REG00_EN_ICHG_MON_MASK		(BIT(6)|BIT(5))
+#define SGM41513_REG00_EN_ICHG_MON_SHIFT		5
+
+#define SGM41513_REG00_IINDPM_MASK			(BIT(4)|BIT(3)|BIT(2)|BIT(1)|BIT(0))
+#define SGM41513_REG00_IINDPM_SHIFT			0
+
+
+#define SGM41513_REG01						0x01
+#define SGM41513_REG01_PFM_DIS_MASK			BIT(7)
+#define SGM41513_REG01_PFM_DIS_SHIFT			7
+
+#define SGM41513_REG01_WD_RST_MASK			BIT(6)
+#define SGM41513_REG01_WD_RST_SHIFT			6
+
+#define SGM41513_REG01_OTG_CONFIG_MASK		BIT(5)
+#define SGM41513_REG01_OTG_CONFIG_SHIFT		5
+
+#define SGM41513_REG01_CHG_CONFIG_MASK		BIT(4)
+#define SGM41513_REG01_CHG_CONFIG_SHIFT		4
+
+#define SGM41513_REG01_SYS_MIN_MASK			(BIT(3)|BIT(2)|BIT(1))
+#define SGM41513_REG01_SYS_MIN_SHIFT			1
+
+#define SGM41513_REG01_MIN_BAT_SEL_MASK		BIT(0)
+#define SGM41513_REG01_MIN_BAT_SEL_SHIFT		0
+
+
+#define SGM41513_REG02						0x02
+#define SGM41513_REG02_BOOST_LIM_MASK		BIT(7)
+#define SGM41513_REG02_BOOST_LIM_SHIFT			7
+
+#define SGM41513_REG02_Q1_FULLON_MASK		BIT(6)
+#define SGM41513_REG02_Q1_FULLON_SHIFT			6
+
+#define SGM41513_REG02_ICHG_MASK			(BIT(5)|BIT(4)|BIT(3)|BIT(2)|BIT(1)|BIT(0))
+#define SGM41513_REG02_ICHG_SHIFT				0
+
+
+#define SGM41513_REG03						0x03
+#define SGM41513_REG03_IPRECHG_MASK			(BIT(7)|BIT(6)|BIT(5)|BIT(4))
+#define SGM41513_REG03_IPRECHG_SHIFT			4
+
+#define SGM41513_REG03_ITERM_MASK			(BIT(3)|BIT(2)|BIT(1)|BIT(0))
+#define SGM41513_REG03_ITERM_SHIFT				0
+
+
+#define SGM41513_REG04						0x04
+#define SGM41513_REG04_VREG_MASK			(BIT(7)|BIT(6)|BIT(5)|BIT(4)|BIT(3))
+#define SGM41513_REG04_VREG_SHIFT				3
+
+#define SGM41513_REG04_TOPOFF_TIMER_MASK	(BIT(2)|BIT(1))
+#define SGM41513_REG04_TOPOFF_TIMER_SHIFT		1
+
+#define SGM41513_REG04_VRECHG_MASK			BIT(0)
+#define SGM41513_REG04_VRECHG_SHIFT			0
+
+
+#define SGM41513_REG05						0x05
+#define SGM41513_REG05_EN_TERM_MASK			BIT(7)
+#define SGM41513_REG05_EN_TERM_SHIFT			7
+
+#define SGM41513_REG05_ITERM_TIMER_MASK		BIT(6)
+#define SGM41513_REG05_ITERM_TIMER_SHIFT		6
+
+#define SGM41513_REG05_WATCHDOG_MASK		(BIT(5)|BIT(4))
+#define SGM41513_REG05_WATCHDOG_SHIFT			4
+
+#define SGM41513_REG05_EN_TIMER_MASK		BIT(3)
+#define SGM41513_REG05_EN_TIMER_SHIFT			3
+
+#define SGM41513_REG05_CHG_TIMER_MASK		BIT(2)
+#define SGM41513_REG05_CHG_TIMER_SHIFT			2
+
+#define SGM41513_REG05_TREG_MASK			BIT(1)
+#define SGM41513_REG05_TREG_SHIFT				1
+
+#define SGM41513_REG05_JEITA_ISET_L_MASK	BIT(0)
+#define SGM41513_REG05_JEITA_ISET_L_SHIFT		0
+
+
+#define SGM41513_REG06						0x06
+#define SGM41513_REG06_OVP_MASK				(BIT(7)|BIT(6))
+#define SGM41513_REG06_OVP_SHIFT				6
+
+#define SGM41513_REG06_BOOSTV_MASK			(BIT(5)|BIT(4))
+#define SGM41513_REG06_BOOSTV_SHIFT			4
+
+#define SGM41513_REG06_VINDPM_MASK			(BIT(3)|BIT(2)|BIT(1)|BIT(0))
+#define SGM41513_REG06_VINDPM_SHIFT			0
+
+
+#define SGM41513_REG07						0x07
+#define SGM41513_REG07_IINDET_EN_MASK		BIT(7)
+#define SGM41513_REG07_IINDET_EN_SHIFT			7
+
+#define SGM41513_REG07_TMR2X_EN_MASK		BIT(6)
+#define SGM41513_REG07_TMR2X_EN_SHIFT			6
+
+#define SGM41513_REG07_BATFET_DIS_MASK		BIT(5)
+#define SGM41513_REG07_BATFET_DIS_SHIFT		5
+
+#define SGM41513_REG07_JEITA_VSET_H_MASK	BIT(4)
+#define SGM41513_REG07_JEITA_VSET_H_SHIFT		4
+
+#define SGM41513_REG07_BATFET_DLY_MASK		BIT(3)
+#define SGM41513_REG07_BATFET_DLY_SHIFT		3
+
+#define SGM41513_REG07_BATFET_RST_EN_MASK	BIT(3)
+#define SGM41513_REG07_BATFET_RST_EN_SHIFT		3
+
+
+#define SGM41513_REG08						0x08
+#define SGM41513_REG08_VBUS_STAT_MASK		(BIT(7)|BIT(6)|BIT(5))
+#define SGM41513_REG08_VBUS_STAT_SHIFT			5
+
+#define SGM41513_REG08_CHRG_STAT_MASK		(BIT(4)|BIT(3))
+#define SGM41513_REG08_CHRG_STAT_SHIFT			3
+
+#define SGM41513_REG08_PG_STAT_MASK			BIT(2)
+#define SGM41513_REG08_PG_STAT_SHIFT			2
+
+
+#define SGM41513_REG09						0x09
+#define SGM41513_REG09_WATCHDOG_FAULT_MASK	BIT(7)
+#define SGM41513_REG09_WATCHDOG_FAULT_SHIFT		7
+
+#define SGM41513_REG09_BOOST_FAULT_MASK		BIT(6)
+#define SGM41513_REG09_BOOST_FAULT_SHIFT		6
+
+#define SGM41513_REG09_CHRG_FAULT_MASK		(BIT(5)|BIT(4))
+#define SGM41513_REG09_CHRG_FAULT_SHIFT			4
+
+#define SGM41513_REG09_BAT_FAULT_MASK		BIT(3)
+#define SGM41513_REG09_BAT_FAULT_SHIFT			3
+
+#define SGM41513_REG09_NTC_FAULT_MASK		(BIT(2)|BIT(1)|BIT(0))
+#define SGM41513_REG09_NTC_FAULT_SHIFT			0
+
+
+#define SGM41513_REG0A						0x0A
+
+
+#define SGM41513_REG0B						0x0B  /*record the version info*/
+#define SGM41513_REG0B_REGRST_MASK			BIT(7)
+#define SGM41513_REG0B_REGRST_SHIFT				7
+
+#define SGM41513_REG0B_PN_MASK				(BIT(6)|BIT(5)|BIT(4)|BIT(3))
+#define SGM41513_REG0B_PN_SHIFT					3
+
+#define SGM41513_REG_VERS						0x03
+
+#define SGM41513_REG_MAX						0x10
+
+struct sgm41513_bat_calibration{
+	short voltage; /* in mV - specify -1 for end of list */
+	short level; /*in percent(0..100%)*/
+};
+
+struct sgm41513_platform_data {
+	unsigned int	gpio_int;	/* GPIO pin that's connected to INT# */
+	gpio_func_id 	gpio_int_fun_sel;
+	
+	//unsigned int capacity; /* total capacity in uAh */
+	struct sgm41513_bat_calibration *charging;
+	int charging_size;
+	struct sgm41513_bat_calibration  *discharging;
+	int	discharging_size;
+	bool	ts_flag;
+	bool	boost_flag;
+	unsigned int	boost_cur_gpio1;
+	gpio_func_id	boost_gpio1_fun_sel;
+	
+	unsigned int	boost_cur_gpio2;
+	gpio_func_id	boost_gpio2_fun_sel;
+	
+	unsigned int	boost_cur_gpio3;
+	gpio_func_id	boost_gpio3_fun_sel;
+	
+	unsigned int	boost_loadswitch_gpio;
+	gpio_func_id	boost_loadswitch_fun_sel;
+};
+
+typedef signed int SINT32;
+typedef unsigned int UINT32;
+
+typedef enum _T_plug_in
+{
+	NOTHING,
+	COMPUTER,
+	CHARGER
+}plug_in;
+
+typedef enum _T_UsbHal_ConnectMessage
+{
+    CONNECTED_TO_HOST = 0x10,  /**< Host connect detected */
+    DISCONNECTED_FROM_HOST,   /**< Host disconnect detected */
+    CONNECTED_TO_DEVICE,  /**< Function connect detected */
+    DISCONNECTED_FROM_DEVICE,  /**< Function disconnect detected */
+    CHECK_CONNECT_MODE,
+    CHECK_CONNECT_QUICK_POWER_ON,
+    RECONNECT_TO_HOST
+}T_UsbHal_ConnectMessage;
+
+VOID USBRef_Detect(VOID *buf, UINT32 len);
+
+
+#endif
diff --git a/lynq/R305/V4/ap/project/zx297520v3/prj_cpe_min/config/normal/config.linux b/lynq/R305/V4/ap/project/zx297520v3/prj_cpe_min/config/normal/config.linux
new file mode 100755
index 0000000..32c2702
--- /dev/null
+++ b/lynq/R305/V4/ap/project/zx297520v3/prj_cpe_min/config/normal/config.linux
@@ -0,0 +1,2125 @@
+#
+# Automatically generated file; DO NOT EDIT.
+# Linux/arm 3.4.110 Kernel Configuration
+#
+CONFIG_ARM=y
+CONFIG_SYS_SUPPORTS_APM_EMULATION=y
+CONFIG_GENERIC_GPIO=y
+# CONFIG_ARCH_USES_GETTIMEOFFSET is not set
+CONFIG_GENERIC_CLOCKEVENTS=y
+CONFIG_KTIME_SCALAR=y
+CONFIG_HAVE_PROC_CPU=y
+CONFIG_STACKTRACE_SUPPORT=y
+CONFIG_HAVE_LATENCYTOP_SUPPORT=y
+CONFIG_LOCKDEP_SUPPORT=y
+CONFIG_TRACE_IRQFLAGS_SUPPORT=y
+CONFIG_HARDIRQS_SW_RESEND=y
+CONFIG_GENERIC_IRQ_PROBE=y
+CONFIG_RWSEM_GENERIC_SPINLOCK=y
+CONFIG_ARCH_HAS_CPUFREQ=y
+CONFIG_ARCH_HAS_CPU_IDLE_WAIT=y
+CONFIG_GENERIC_HWEIGHT=y
+CONFIG_GENERIC_CALIBRATE_DELAY=y
+CONFIG_NEED_DMA_MAP_STATE=y
+CONFIG_VECTORS_BASE=0xffff0000
+# CONFIG_ARM_PATCH_PHYS_VIRT is not set
+CONFIG_NEED_MACH_MEMORY_H=y
+CONFIG_GENERIC_BUG=y
+CONFIG_DEFCONFIG_LIST="/lib/modules/$UNAME_RELEASE/.config"
+CONFIG_HAVE_IRQ_WORK=y
+
+#
+# General setup
+#
+CONFIG_EXPERIMENTAL=y
+CONFIG_BROKEN_ON_SMP=y
+CONFIG_INIT_ENV_ARG_LIMIT=32
+CONFIG_CROSS_COMPILE=""
+CONFIG_LOCALVERSION=""
+# CONFIG_LOCALVERSION_AUTO is not set
+CONFIG_HAVE_KERNEL_GZIP=y
+CONFIG_HAVE_KERNEL_LZMA=y
+CONFIG_HAVE_KERNEL_XZ=y
+CONFIG_HAVE_KERNEL_LZO=y
+CONFIG_KERNEL_GZIP=y
+# CONFIG_KERNEL_LZMA is not set
+# CONFIG_KERNEL_XZ is not set
+# CONFIG_KERNEL_LZO is not set
+CONFIG_DEFAULT_HOSTNAME="DEMO"
+CONFIG_SWAP=y
+CONFIG_SYSVIPC=y
+CONFIG_SYSVIPC_SYSCTL=y
+# CONFIG_POSIX_MQUEUE is not set
+# CONFIG_BSD_PROCESS_ACCT is not set
+# CONFIG_FHANDLE is not set
+# CONFIG_TASKSTATS is not set
+# CONFIG_AUDIT is not set
+CONFIG_HAVE_GENERIC_HARDIRQS=y
+
+#
+# IRQ subsystem
+#
+CONFIG_GENERIC_HARDIRQS=y
+CONFIG_GENERIC_IRQ_SHOW=y
+CONFIG_IRQ_DOMAIN=y
+# CONFIG_IRQ_DOMAIN_DEBUG is not set
+CONFIG_IRQ_FORCED_THREADING=y
+
+#
+# RCU Subsystem
+#
+CONFIG_TINY_PREEMPT_RCU=y
+CONFIG_PREEMPT_RCU=y
+# CONFIG_TREE_RCU_TRACE is not set
+CONFIG_RCU_BOOST=y
+CONFIG_RCU_BOOST_PRIO=1
+CONFIG_RCU_BOOST_DELAY=500
+# CONFIG_IKCONFIG is not set
+CONFIG_LOG_BUF_SHIFT=15
+# CONFIG_CHECKPOINT_RESTORE is not set
+# CONFIG_NAMESPACES is not set
+# CONFIG_SCHED_AUTOGROUP is not set
+# CONFIG_SYSFS_DEPRECATED is not set
+# CONFIG_RELAY is not set
+# CONFIG_BLK_DEV_INITRD is not set
+CONFIG_CC_OPTIMIZE_FOR_SIZE=y
+CONFIG_SYSCTL=y
+CONFIG_ANON_INODES=y
+CONFIG_PANIC_TIMEOUT=0
+CONFIG_EXPERT=y
+# CONFIG_UID16 is not set
+CONFIG_SYSCTL_SYSCALL=y
+CONFIG_KALLSYMS=y
+CONFIG_HOTPLUG=y
+CONFIG_PRINTK=y
+CONFIG_BUG=y
+# CONFIG_ELF_CORE is not set
+# CONFIG_BASE_FULL is not set
+CONFIG_FUTEX=y
+CONFIG_EPOLL=y
+# CONFIG_SIGNALFD is not set
+# CONFIG_TIMERFD is not set
+# CONFIG_EVENTFD is not set
+# CONFIG_SHMEM is not set
+# CONFIG_AIO is not set
+CONFIG_EMBEDDED=y
+CONFIG_HAVE_PERF_EVENTS=y
+CONFIG_PERF_USE_VMALLOC=y
+
+#
+# Kernel Performance Events And Counters
+#
+# CONFIG_PERF_EVENTS is not set
+# CONFIG_PERF_COUNTERS is not set
+# CONFIG_VM_EVENT_COUNTERS is not set
+# CONFIG_COMPAT_BRK is not set
+# CONFIG_SLAB is not set
+CONFIG_SLOB=y
+CONFIG_SLOB_OPT=y
+CONFIG_PROFILING=y
+CONFIG_HAVE_OPROFILE=y
+# CONFIG_KPROBES is not set
+# CONFIG_JUMP_LABEL is not set
+CONFIG_HAVE_KPROBES=y
+CONFIG_HAVE_KRETPROBES=y
+CONFIG_HAVE_REGS_AND_STACK_ACCESS_API=y
+CONFIG_HAVE_CLK=y
+CONFIG_HAVE_DMA_API_DEBUG=y
+CONFIG_HAVE_ARCH_JUMP_LABEL=y
+
+#
+# GCOV-based kernel profiling
+#
+# CONFIG_GCOV_KERNEL is not set
+CONFIG_HAVE_GENERIC_DMA_COHERENT=y
+CONFIG_RT_MUTEXES=y
+CONFIG_BASE_SMALL=1
+CONFIG_MODULES=y
+CONFIG_MODULE_FORCE_LOAD=y
+CONFIG_MODULE_UNLOAD=y
+# CONFIG_MODULE_FORCE_UNLOAD is not set
+# CONFIG_MODVERSIONS is not set
+# CONFIG_MODULE_SRCVERSION_ALL is not set
+CONFIG_BLOCK=y
+# CONFIG_LBDAF is not set
+# CONFIG_BLK_DEV_BSG is not set
+# CONFIG_BLK_DEV_BSGLIB is not set
+# CONFIG_BLK_DEV_INTEGRITY is not set
+
+#
+# Partition Types
+#
+# CONFIG_PARTITION_ADVANCED is not set
+# CONFIG_MSDOS_PARTITION is not set
+
+#
+# IO Schedulers
+#
+CONFIG_IOSCHED_NOOP=y
+CONFIG_IOSCHED_DEADLINE=y
+# CONFIG_IOSCHED_CFQ is not set
+CONFIG_DEFAULT_DEADLINE=y
+# CONFIG_DEFAULT_NOOP is not set
+CONFIG_DEFAULT_IOSCHED="deadline"
+# CONFIG_INLINE_SPIN_TRYLOCK is not set
+# CONFIG_INLINE_SPIN_TRYLOCK_BH is not set
+# CONFIG_INLINE_SPIN_LOCK is not set
+# CONFIG_INLINE_SPIN_LOCK_BH is not set
+# CONFIG_INLINE_SPIN_LOCK_IRQ is not set
+# CONFIG_INLINE_SPIN_LOCK_IRQSAVE is not set
+# CONFIG_INLINE_SPIN_UNLOCK_BH is not set
+# CONFIG_INLINE_SPIN_UNLOCK_IRQ is not set
+# CONFIG_INLINE_SPIN_UNLOCK_IRQRESTORE is not set
+# CONFIG_INLINE_READ_TRYLOCK is not set
+# CONFIG_INLINE_READ_LOCK is not set
+# CONFIG_INLINE_READ_LOCK_BH is not set
+# CONFIG_INLINE_READ_LOCK_IRQ is not set
+# CONFIG_INLINE_READ_LOCK_IRQSAVE is not set
+# CONFIG_INLINE_READ_UNLOCK is not set
+# CONFIG_INLINE_READ_UNLOCK_BH is not set
+# CONFIG_INLINE_READ_UNLOCK_IRQ is not set
+# CONFIG_INLINE_READ_UNLOCK_IRQRESTORE is not set
+# CONFIG_INLINE_WRITE_TRYLOCK is not set
+# CONFIG_INLINE_WRITE_LOCK is not set
+# CONFIG_INLINE_WRITE_LOCK_BH is not set
+# CONFIG_INLINE_WRITE_LOCK_IRQ is not set
+# CONFIG_INLINE_WRITE_LOCK_IRQSAVE is not set
+# CONFIG_INLINE_WRITE_UNLOCK is not set
+# CONFIG_INLINE_WRITE_UNLOCK_BH is not set
+# CONFIG_INLINE_WRITE_UNLOCK_IRQ is not set
+# CONFIG_INLINE_WRITE_UNLOCK_IRQRESTORE is not set
+# CONFIG_MUTEX_SPIN_ON_OWNER is not set
+CONFIG_FREEZER=y
+
+#
+# System Type
+#
+CONFIG_MMU=y
+# CONFIG_ARCH_INTEGRATOR is not set
+# CONFIG_ARCH_REALVIEW is not set
+# CONFIG_ARCH_VERSATILE is not set
+# CONFIG_ARCH_VEXPRESS is not set
+# CONFIG_ARCH_AT91 is not set
+# CONFIG_ARCH_BCMRING is not set
+# CONFIG_ARCH_HIGHBANK is not set
+# CONFIG_ARCH_CLPS711X is not set
+# CONFIG_ARCH_CNS3XXX is not set
+# CONFIG_ARCH_GEMINI is not set
+# CONFIG_ARCH_PRIMA2 is not set
+# CONFIG_ARCH_EBSA110 is not set
+# CONFIG_ARCH_EP93XX is not set
+# CONFIG_ARCH_FOOTBRIDGE is not set
+# CONFIG_ARCH_MXC is not set
+# CONFIG_ARCH_MXS is not set
+# CONFIG_ARCH_NETX is not set
+# CONFIG_ARCH_H720X is not set
+# CONFIG_ARCH_IOP13XX is not set
+# CONFIG_ARCH_IOP32X is not set
+# CONFIG_ARCH_IOP33X is not set
+# CONFIG_ARCH_IXP23XX is not set
+# CONFIG_ARCH_IXP2000 is not set
+# CONFIG_ARCH_IXP4XX is not set
+# CONFIG_ARCH_DOVE is not set
+# CONFIG_ARCH_KIRKWOOD is not set
+# CONFIG_ARCH_LPC32XX is not set
+# CONFIG_ARCH_MV78XX0 is not set
+# CONFIG_ARCH_ORION5X is not set
+# CONFIG_ARCH_MMP is not set
+# CONFIG_ARCH_KS8695 is not set
+# CONFIG_ARCH_W90X900 is not set
+# CONFIG_ARCH_TEGRA is not set
+# CONFIG_ARCH_PICOXCELL is not set
+# CONFIG_ARCH_PNX4008 is not set
+# CONFIG_ARCH_PXA is not set
+# CONFIG_ARCH_MSM is not set
+# CONFIG_ARCH_SHMOBILE is not set
+# CONFIG_ARCH_RPC is not set
+# CONFIG_ARCH_SA1100 is not set
+# CONFIG_ARCH_S3C24XX is not set
+# CONFIG_ARCH_S3C64XX is not set
+# CONFIG_ARCH_S5P64X0 is not set
+# CONFIG_ARCH_S5PC100 is not set
+# CONFIG_ARCH_S5PV210 is not set
+# CONFIG_ARCH_EXYNOS is not set
+# CONFIG_ARCH_SHARK is not set
+# CONFIG_ARCH_U300 is not set
+# CONFIG_ARCH_U8500 is not set
+# CONFIG_ARCH_NOMADIK is not set
+# CONFIG_ARCH_DAVINCI is not set
+# CONFIG_ARCH_OMAP is not set
+# CONFIG_PLAT_SPEAR is not set
+# CONFIG_ARCH_VT8500 is not set
+# CONFIG_ARCH_ZYNQ is not set
+# CONFIG_ARCH_ZX297510 is not set
+# CONFIG_ARCH_ZX297520V2 is not set
+CONFIG_ARCH_ZX297520V3=y
+# CONFIG_GPIO_PCA953X is not set
+
+#
+# System MMU
+#
+CONFIG_ZX29_TIMER_HZ=200
+CONFIG_ZX_RAM_CONSOLE=y
+CONFIG_ZX_PM_DEBUG=y
+# CONFIG_ZX_PM_DEBUG_TIME is not set
+CONFIG_AXI_FREQ=y
+
+#
+# ZX297520V3 Board Type
+#
+# CONFIG_ARCH_ZX297520V3_EVB is not set
+# CONFIG_ARCH_ZX297520V3_MDL is not set
+# CONFIG_ARCH_ZX297520V3_MIFI is not set
+CONFIG_ARCH_ZX297520V3_UFI=y
+# CONFIG_ARCH_ZX297520V3_PHONE is not set
+# CONFIG_ARCH_ZX297520V3_FWP is not set
+# CONFIG_ARCH_ZX297520V3_WATCH is not set
+# CONFIG_ARCH_ZX297520V3_CPE is not set
+# CONFIG_ARCH_ZX297520V3_CPE_SWITCH is not set
+# CONFIG_ARCH_ZX297520V3_POC is not set
+# CONFIG_ARCH_ZX297520V3_FPGA is not set
+# CONFIG_ARCH_ZX297520V3_CAP is not set
+CONFIG_MIN_VERSION=y
+# CONFIG_MIN_8M_VERSION is not set
+# CONFIG_MODEM_CODE_IS_MAPPING is not set
+CONFIG_PLAT_ZTE=y
+CONFIG_STACK_SIZE=y
+
+#
+# Processor Type
+#
+CONFIG_CPU_V7=y
+CONFIG_CPU_32v6K=y
+CONFIG_CPU_32v7=y
+CONFIG_CPU_ABRT_EV7=y
+CONFIG_CPU_PABRT_V7=y
+CONFIG_CPU_CACHE_V7=y
+CONFIG_CPU_CACHE_VIPT=y
+CONFIG_CPU_COPY_V6=y
+CONFIG_CPU_TLB_V7=y
+CONFIG_CPU_HAS_ASID=y
+CONFIG_CPU_CP15=y
+CONFIG_CPU_CP15_MMU=y
+
+#
+# Processor Features
+#
+# CONFIG_ARM_LPAE is not set
+# CONFIG_ARCH_PHYS_ADDR_T_64BIT is not set
+CONFIG_ARM_THUMB=y
+# CONFIG_ARM_THUMBEE is not set
+# CONFIG_SWP_EMULATE is not set
+# CONFIG_CPU_ICACHE_DISABLE is not set
+# CONFIG_CPU_DCACHE_DISABLE is not set
+# CONFIG_CPU_BPREDICT_DISABLE is not set
+# CONFIG_CACHE_L2X0 is not set
+CONFIG_ARM_L1_CACHE_SHIFT_6=y
+CONFIG_ARM_L1_CACHE_SHIFT=6
+CONFIG_ARM_DMA_MEM_BUFFERABLE=y
+CONFIG_ARM_NR_BANKS=8
+CONFIG_CPU_HAS_PMU=y
+CONFIG_MULTI_IRQ_HANDLER=y
+# CONFIG_ARM_ERRATA_430973 is not set
+# CONFIG_ARM_ERRATA_458693 is not set
+# CONFIG_ARM_ERRATA_460075 is not set
+CONFIG_ARM_ERRATA_720789=y
+CONFIG_ARM_ERRATA_743622=y
+CONFIG_ARM_ERRATA_751472=y
+CONFIG_ARM_ERRATA_754322=y
+# CONFIG_ARM_ERRATA_775420 is not set
+# CONFIG_FIQ_DEBUGGER is not set
+
+#
+# Bus support
+#
+# CONFIG_PCI_SYSCALL is not set
+# CONFIG_ARCH_SUPPORTS_MSI is not set
+# CONFIG_PCCARD is not set
+
+#
+# Kernel Features
+#
+CONFIG_TICK_ONESHOT=y
+# CONFIG_NO_HZ is not set
+CONFIG_HIGH_RES_TIMERS=y
+CONFIG_GENERIC_CLOCKEVENTS_BUILD=y
+CONFIG_VMSPLIT_3G=y
+# CONFIG_VMSPLIT_2G is not set
+# CONFIG_VMSPLIT_1G is not set
+CONFIG_ARCH_NR_GPIO=0
+CONFIG_PREEMPT=y
+CONFIG_PREEMPT_RT_BASE=y
+# CONFIG_PREEMPT_NONE is not set
+# CONFIG_PREEMPT_VOLUNTARY is not set
+# CONFIG_PREEMPT__LL is not set
+# CONFIG_PREEMPT_RTB is not set
+CONFIG_PREEMPT_RT_FULL=y
+CONFIG_PREEMPT_COUNT=y
+CONFIG_HZ=200
+CONFIG_THUMB2_KERNEL=y
+CONFIG_ARM_ASM_UNIFIED=y
+CONFIG_AEABI=y
+# CONFIG_ARCH_SPARSEMEM_DEFAULT is not set
+# CONFIG_ARCH_SELECT_MEMORY_MODEL is not set
+CONFIG_HAVE_ARCH_PFN_VALID=y
+CONFIG_SELECT_MEMORY_MODEL=y
+CONFIG_FLATMEM_MANUAL=y
+CONFIG_FLATMEM=y
+CONFIG_FLAT_NODE_MEM_MAP=y
+CONFIG_HAVE_MEMBLOCK=y
+CONFIG_PAGEFLAGS_EXTENDED=y
+CONFIG_SPLIT_PTLOCK_CPUS=4
+CONFIG_COMPACTION=y
+CONFIG_MIGRATION=y
+# CONFIG_PHYS_ADDR_T_64BIT is not set
+CONFIG_ZONE_DMA_FLAG=0
+CONFIG_VIRT_TO_BUS=y
+# CONFIG_KSM is not set
+CONFIG_DEFAULT_MMAP_MIN_ADDR=4096
+CONFIG_NEED_PER_CPU_KM=y
+# CONFIG_CLEANCACHE is not set
+CONFIG_RAMDUMP=y
+CONFIG_RAMDUMP_TRANS_SERVER=y
+# CONFIG_TRANS_WITH_COLLECT is not set
+CONFIG_RAMDUMP_ABNORMAL_EXIT_TASK=y
+# CONFIG_KERNEL_GLOBAL_DEBUG is not set
+# CONFIG_MEM_TRACKER is not set
+# CONFIG_LIMIT_PAGE_CACHE is not set
+# CONFIG_DEBUG_SLAB_MARK is not set
+# CONFIG_DEBUG_SLAB_MARK_HEAD is not set
+# CONFIG_DEBUG_SLOB_MARK_HEAD is not set
+CONFIG_FORCE_MAX_ZONEORDER=11
+CONFIG_ALIGNMENT_TRAP=y
+# CONFIG_UACCESS_WITH_MEMCPY is not set
+# CONFIG_SECCOMP is not set
+# CONFIG_CC_STACKPROTECTOR is not set
+# CONFIG_DEPRECATED_PARAM_STRUCT is not set
+# CONFIG_ARM_FLUSH_CONSOLE_ON_RESTART is not set
+# CONFIG_THREAD_DEBUG is not set
+# CONFIG_INT_DEBUG is not set
+
+#
+# Boot options
+#
+# CONFIG_USE_OF is not set
+CONFIG_ZBOOT_ROM_TEXT=0x10000000
+CONFIG_ZBOOT_ROM_BSS=0x20040000
+# CONFIG_ZBOOT_ROM is not set
+CONFIG_CMDLINE="root=/dev/mtdblock5 ro rootfstype=jffs2"
+# CONFIG_CMDLINE_FROM_BOOTLOADER is not set
+CONFIG_CMDLINE_EXTEND=y
+# CONFIG_CMDLINE_FORCE is not set
+CONFIG_SYSTEM_NORMAL=y
+# CONFIG_SYSTEM_RECOVERY is not set
+# CONFIG_SYSTEM_CAP is not set
+# CONFIG_CPPS_KO is not set
+# CONFIG_BOOT_WITHOUT_UBOOT is not set
+# CONFIG_XIP_KERNEL is not set
+# CONFIG_KEXEC is not set
+# CONFIG_CRASH_DUMP is not set
+# CONFIG_AUTO_ZRELADDR is not set
+
+#
+# CPU Power Management
+#
+
+#
+# CPU Frequency scaling
+#
+CONFIG_CPU_FREQ=y
+CONFIG_CPU_FREQ_TABLE=y
+# CONFIG_CPU_FREQ_STAT is not set
+# CONFIG_CPU_FREQ_DEFAULT_GOV_PERFORMANCE is not set
+# CONFIG_CPU_FREQ_DEFAULT_GOV_POWERSAVE is not set
+# CONFIG_CPU_FREQ_DEFAULT_GOV_USERSPACE is not set
+CONFIG_CPU_FREQ_DEFAULT_GOV_ONDEMAND=y
+# CONFIG_CPU_FREQ_DEFAULT_GOV_CONSERVATIVE is not set
+# CONFIG_CPU_FREQ_DEFAULT_GOV_INTERACTIVE is not set
+CONFIG_CPU_FREQ_GOV_PERFORMANCE=y
+CONFIG_CPU_FREQ_GOV_POWERSAVE=y
+CONFIG_CPU_FREQ_GOV_USERSPACE=y
+CONFIG_CPU_FREQ_GOV_ONDEMAND=y
+CONFIG_CPU_FREQ_GOV_INTERACTIVE=y
+CONFIG_CPU_FREQ_GOV_CONSERVATIVE=y
+#
+# ARM CPU frequency scaling drivers
+#
+# CONFIG_ARM_EXYNOS4210_CPUFREQ is not set
+# CONFIG_ARM_EXYNOS4X12_CPUFREQ is not set
+# CONFIG_ARM_EXYNOS5250_CPUFREQ is not set
+CONFIG_CPU_IDLE=y
+CONFIG_CPU_IDLE_GOV_LADDER=y
+# CONFIG_ARCH_NEEDS_CPU_IDLE_COUPLED is not set
+
+#
+# Floating point emulation
+#
+
+#
+# At least one emulation must be selected
+#
+# CONFIG_VFP is not set
+
+#
+# Userspace binary formats
+#
+CONFIG_BINFMT_ELF=y
+CONFIG_ARCH_BINFMT_ELF_RANDOMIZE_PIE=y
+# CONFIG_HAVE_AOUT is not set
+# CONFIG_BINFMT_MISC is not set
+
+#
+# Power management options
+#
+CONFIG_SUSPEND=y
+CONFIG_SUSPEND_FREEZER=y
+CONFIG_HAS_WAKELOCK=y
+CONFIG_WAKELOCK=y
+CONFIG_PM_SLEEP=y
+CONFIG_PM_AUTOSLEEP=y
+CONFIG_PM_WAKELOCKS=y
+CONFIG_PM_WAKELOCKS_LIMIT=100
+# CONFIG_PM_WAKELOCKS_GC is not set
+CONFIG_PM_RUNTIME=y
+CONFIG_PM=y
+CONFIG_PM_DEBUG=y
+# CONFIG_PM_ADVANCED_DEBUG is not set
+# CONFIG_PM_TEST_SUSPEND is not set
+CONFIG_CAN_PM_TRACE=y
+# CONFIG_APM_EMULATION is not set
+CONFIG_PM_CLK=y
+CONFIG_CPU_PM=y
+CONFIG_SUSPEND_TIME=y
+CONFIG_ARCH_SUSPEND_POSSIBLE=y
+CONFIG_ARM_CPU_SUSPEND=y
+CONFIG_NET=y
+
+#
+# Networking options
+#
+CONFIG_PACKET=y
+CONFIG_UNIX=y
+# CONFIG_UNIX_DIAG is not set
+CONFIG_XFRM=y
+CONFIG_XFRM_USER=y
+CONFIG_XFRM_SUB_POLICY=y
+CONFIG_XFRM_MIGRATE=y
+CONFIG_XFRM_STATISTICS=y
+CONFIG_NET_KEY=y
+# CONFIG_NET_KEY_MIGRATE is not set
+CONFIG_NETCTL=y
+CONFIG_INET=y
+CONFIG_IP_MULTICAST=y
+CONFIG_IP_ADVANCED_ROUTER=y
+# CONFIG_IP_FIB_TRIE_STATS is not set
+CONFIG_IP_MULTIPLE_TABLES=y
+# CONFIG_IP_ROUTE_MULTIPATH is not set
+# CONFIG_IP_ROUTE_VERBOSE is not set
+CONFIG_IP_ROUTE_CLASSID=y
+# CONFIG_IP_PNP is not set
+# CONFIG_NET_IPIP is not set
+# CONFIG_NET_IPGRE_DEMUX is not set
+CONFIG_IP_MROUTE=y
+CONFIG_IP_MROUTE_MULTIPLE_TABLES=y
+# CONFIG_IP_PIMSM_V1 is not set
+# CONFIG_IP_PIMSM_V2 is not set
+# CONFIG_ARPD is not set
+# CONFIG_SYN_COOKIES is not set
+# CONFIG_INET_AH is not set
+CONFIG_INET_ESP=y
+# CONFIG_INET_IPCOMP is not set
+# CONFIG_INET_XFRM_TUNNEL is not set
+CONFIG_INET_TUNNEL=y
+CONFIG_INET_XFRM_MODE_TRANSPORT=y
+CONFIG_INET_XFRM_MODE_TUNNEL=y
+CONFIG_INET_XFRM_MODE_BEET=y
+CONFIG_INET_LRO=y
+CONFIG_INET_DIAG=y
+CONFIG_INET_TCP_DIAG=y
+# CONFIG_INET_UDP_DIAG is not set
+# CONFIG_TCP_CONG_ADVANCED is not set
+CONFIG_TCP_CONG_CUBIC=y
+CONFIG_DEFAULT_TCP_CONG="cubic"
+# CONFIG_TCP_MD5SIG is not set
+CONFIG_IPV6=y
+# CONFIG_IPV6_PRIVACY is not set
+CONFIG_IPV6_ROUTER_PREF=y
+CONFIG_IPV6_ROUTE_INFO=y
+CONFIG_IPV6_OPTIMISTIC_DAD=y
+# CONFIG_INET6_AH is not set
+CONFIG_INET6_ESP=y
+# CONFIG_INET6_IPCOMP is not set
+# CONFIG_IPV6_MIP6 is not set
+# CONFIG_INET6_XFRM_TUNNEL is not set
+CONFIG_INET6_TUNNEL=y
+CONFIG_INET6_XFRM_MODE_TRANSPORT=y
+CONFIG_INET6_XFRM_MODE_TUNNEL=y
+CONFIG_INET6_XFRM_MODE_BEET=y
+# CONFIG_INET6_XFRM_MODE_ROUTEOPTIMIZATION is not set
+CONFIG_IPV6_SIT=y
+# CONFIG_IPV6_SIT_6RD is not set
+CONFIG_IPV6_NDISC_NODETYPE=y
+CONFIG_IPV6_TUNNEL=y
+CONFIG_IPV6_MULTIPLE_TABLES=y
+CONFIG_IPV6_SUBTREES=y
+CONFIG_IPV6_MROUTE=y
+CONFIG_IPV6_MROUTE_MULTIPLE_TABLES=y
+CONFIG_IPV6_PIMSM_V2=y
+CONFIG_ANDROID_PARANOID_NETWORK=y
+CONFIG_NET_ACTIVITY_STATS=y
+# CONFIG_NETWORK_SECMARK is not set
+# CONFIG_NETWORK_PHY_TIMESTAMPING is not set
+CONFIG_NETFILTER=y
+# CONFIG_NETFILTER_DEBUG is not set
+CONFIG_NETFILTER_ADVANCED=y
+CONFIG_BRIDGE_NETFILTER=y
+
+#
+# Core Netfilter Configuration
+#
+CONFIG_NETFILTER_NETLINK=y
+CONFIG_NETFILTER_NETLINK_ACCT=y
+CONFIG_NETFILTER_NETLINK_QUEUE=y
+# CONFIG_NETFILTER_NETLINK_LOG is not set
+CONFIG_NF_CONNTRACK=y
+CONFIG_WEBSTR_FILTER=y
+CONFIG_NF_CONNTRACK_MARK=y
+CONFIG_NF_CONNTRACK_PROCFS=y
+# CONFIG_NF_CONNTRACK_EVENTS is not set
+# CONFIG_NF_CONNTRACK_TIMEOUT is not set
+# CONFIG_NF_CONNTRACK_TIMESTAMP is not set
+# CONFIG_NF_CT_PROTO_DCCP is not set
+CONFIG_NF_CT_PROTO_GRE=y
+# CONFIG_NF_CT_PROTO_SCTP is not set
+# CONFIG_NF_CT_PROTO_UDPLITE is not set
+# CONFIG_NF_CONNTRACK_AMANDA is not set
+# CONFIG_NF_CONNTRACK_FTP is not set
+# CONFIG_NF_CONNTRACK_H323 is not set
+# CONFIG_NF_CONNTRACK_IRC is not set
+# CONFIG_NF_CONNTRACK_NETBIOS_NS is not set
+# CONFIG_NF_CONNTRACK_SNMP is not set
+CONFIG_NF_CONNTRACK_PPTP=y
+# CONFIG_NF_CONNTRACK_SANE is not set
+# CONFIG_NF_CONNTRACK_SIP is not set
+CONFIG_NF_CONNTRACK_TFTP=y
+CONFIG_NF_CT_NETLINK=y
+# CONFIG_NF_CT_NETLINK_TIMEOUT is not set
+# CONFIG_NETFILTER_TPROXY is not set
+CONFIG_NETFILTER_XTABLES=y
+
+#
+# Xtables combined modules
+#
+CONFIG_NETFILTER_XT_MARK=y
+# CONFIG_NETFILTER_XT_CONNMARK is not set
+
+#
+# Xtables targets
+#
+# CONFIG_NETFILTER_XT_TARGET_CHECKSUM is not set
+CONFIG_NETFILTER_XT_TARGET_CLASSIFY=y
+# CONFIG_NETFILTER_XT_TARGET_CONNMARK is not set
+# CONFIG_NETFILTER_XT_TARGET_CT is not set
+CONFIG_NETFILTER_XT_TARGET_DSCP=y
+CONFIG_NETFILTER_XT_TARGET_HL=y
+# CONFIG_NETFILTER_XT_TARGET_IDLETIMER is not set
+# CONFIG_NETFILTER_XT_TARGET_LED is not set
+# CONFIG_NETFILTER_XT_TARGET_LOG is not set
+CONFIG_NETFILTER_XT_TARGET_MARK=y
+# CONFIG_NETFILTER_XT_TARGET_NFLOG is not set
+# CONFIG_NETFILTER_XT_TARGET_NFQUEUE is not set
+# CONFIG_NETFILTER_XT_TARGET_NOTRACK is not set
+# CONFIG_NETFILTER_XT_TARGET_RATEEST is not set
+# CONFIG_NETFILTER_XT_TARGET_TEE is not set
+# CONFIG_NETFILTER_XT_TARGET_TRACE is not set
+CONFIG_NETFILTER_XT_TARGET_TCPMSS=y
+# CONFIG_NETFILTER_XT_TARGET_TCPOPTSTRIP is not set
+
+#
+# Xtables matches
+#
+# CONFIG_NETFILTER_XT_MATCH_ADDRTYPE is not set
+# CONFIG_NETFILTER_XT_MATCH_CLUSTER is not set
+# CONFIG_NETFILTER_XT_MATCH_COMMENT is not set
+# CONFIG_NETFILTER_XT_MATCH_CONNBYTES is not set
+# CONFIG_NETFILTER_XT_MATCH_CONNLIMIT is not set
+# CONFIG_NETFILTER_XT_MATCH_CONNMARK is not set
+CONFIG_NETFILTER_XT_MATCH_CONNTRACK=y
+# CONFIG_NETFILTER_XT_MATCH_CPU is not set
+# CONFIG_NETFILTER_XT_MATCH_DCCP is not set
+# CONFIG_NETFILTER_XT_MATCH_DEVGROUP is not set
+CONFIG_NETFILTER_XT_MATCH_DSCP=y
+# CONFIG_NETFILTER_XT_MATCH_ECN is not set
+# CONFIG_NETFILTER_XT_MATCH_ESP is not set
+# CONFIG_NETFILTER_XT_MATCH_HASHLIMIT is not set
+# CONFIG_NETFILTER_XT_MATCH_HELPER is not set
+# CONFIG_NETFILTER_XT_MATCH_HL is not set
+CONFIG_NETFILTER_XT_MATCH_IPRANGE=y
+CONFIG_NETFILTER_XT_MATCH_LENGTH=y
+CONFIG_NETFILTER_XT_MATCH_LIMIT=y
+CONFIG_NETFILTER_XT_MATCH_MAC=y
+CONFIG_NETFILTER_XT_MATCH_MARK=y
+# CONFIG_NETFILTER_XT_MATCH_MULTIPORT is not set
+# CONFIG_NETFILTER_XT_MATCH_NFACCT is not set
+# CONFIG_NETFILTER_XT_MATCH_OSF is not set
+# CONFIG_NETFILTER_XT_MATCH_OWNER is not set
+CONFIG_NETFILTER_XT_MATCH_POLICY=y
+# CONFIG_NETFILTER_XT_MATCH_PHYSDEV is not set
+# CONFIG_NETFILTER_XT_MATCH_PKTTYPE is not set
+# CONFIG_NETFILTER_XT_MATCH_QUOTA is not set
+# CONFIG_NETFILTER_XT_MATCH_QUOTA2 is not set
+# CONFIG_NETFILTER_XT_MATCH_RATEEST is not set
+# CONFIG_NETFILTER_XT_MATCH_REALM is not set
+# CONFIG_NETFILTER_XT_MATCH_RECENT is not set
+# CONFIG_NETFILTER_XT_MATCH_SCTP is not set
+CONFIG_NETFILTER_XT_MATCH_STATE=y
+# CONFIG_NETFILTER_XT_MATCH_STATISTIC is not set
+CONFIG_NETFILTER_XT_MATCH_STRING=y
+CONFIG_NETFILTER_XT_MATCH_TCPMSS=y
+# CONFIG_NETFILTER_XT_MATCH_TIME is not set
+# CONFIG_NETFILTER_XT_MATCH_U32 is not set
+# CONFIG_IP_SET is not set
+# CONFIG_IP_VS is not set
+
+#
+# IP: Netfilter Configuration
+#
+CONFIG_NF_DEFRAG_IPV4=y
+CONFIG_NF_CONNTRACK_IPV4=y
+CONFIG_NF_CONNTRACK_PROC_COMPAT=y
+# CONFIG_IP_NF_QUEUE is not set
+CONFIG_IP_NF_IPTABLES=y
+# CONFIG_IP_NF_MATCH_AH is not set
+# CONFIG_IP_NF_MATCH_ECN is not set
+# CONFIG_IP_NF_MATCH_RPFILTER is not set
+# CONFIG_IP_NF_MATCH_TTL is not set
+CONFIG_IP_NF_FILTER=y
+CONFIG_IP_NF_TARGET_REJECT=y
+# CONFIG_IP_NF_TARGET_REJECT_SKERR is not set
+# CONFIG_IP_NF_TARGET_ULOG is not set
+CONFIG_NF_NAT=y
+CONFIG_NF_NAT_NEEDED=y
+CONFIG_IP_NF_TARGET_MASQUERADE=y
+CONFIG_IP_NF_TARGET_NETMAP=y
+CONFIG_IP_NF_TARGET_REDIRECT=y
+CONFIG_TSP_FASTBIH=y
+CONFIG_NF_NAT_PROTO_GRE=y
+# CONFIG_NF_NAT_FTP is not set
+# CONFIG_NF_NAT_IRC is not set
+CONFIG_NF_NAT_TFTP=y
+# CONFIG_NF_NAT_AMANDA is not set
+CONFIG_NF_NAT_PPTP=y
+# CONFIG_NF_NAT_H323 is not set
+# CONFIG_NF_NAT_SIP is not set
+CONFIG_IP_NF_MANGLE=y
+# CONFIG_IP_NF_TARGET_CLUSTERIP is not set
+# CONFIG_IP_NF_TARGET_ECN is not set
+CONFIG_IP_NF_TARGET_TTL=y
+CONFIG_IP_NF_RAW=y
+# CONFIG_IP_NF_ARPTABLES is not set
+
+#
+# IPv6: Netfilter Configuration
+#
+CONFIG_NF_DEFRAG_IPV6=y
+CONFIG_NF_CONNTRACK_IPV6=y
+# CONFIG_IP6_NF_QUEUE is not set
+CONFIG_IP6_NF_IPTABLES=y
+# CONFIG_IP6_NF_MATCH_AH is not set
+# CONFIG_IP6_NF_MATCH_EUI64 is not set
+CONFIG_IP6_NF_MATCH_FRAG=y
+CONFIG_IP6_NF_MATCH_OPTS=y
+# CONFIG_IP6_NF_MATCH_HL is not set
+CONFIG_IP6_NF_MATCH_IPV6HEADER=y
+# CONFIG_IP6_NF_MATCH_MH is not set
+# CONFIG_IP6_NF_MATCH_RPFILTER is not set
+# CONFIG_IP6_NF_MATCH_RT is not set
+# CONFIG_IP6_NF_TARGET_HL is not set
+CONFIG_IP6_NF_FILTER=y
+# CONFIG_IP6_NF_TARGET_REJECT is not set
+CONFIG_IP6_NF_MANGLE=y
+# CONFIG_IP6_NF_RAW is not set
+CONFIG_BRIDGE_NF_EBTABLES=y
+CONFIG_BRIDGE_EBT_BROUTE=y
+CONFIG_BRIDGE_EBT_T_FILTER=y
+# CONFIG_BRIDGE_EBT_T_NAT is not set
+# CONFIG_BRIDGE_EBT_802_3 is not set
+# CONFIG_BRIDGE_EBT_AMONG is not set
+# CONFIG_BRIDGE_EBT_ARP is not set
+CONFIG_BRIDGE_EBT_IP=y
+# CONFIG_BRIDGE_EBT_IP6 is not set
+# CONFIG_BRIDGE_EBT_LIMIT is not set
+CONFIG_BRIDGE_EBT_MARK=y
+# CONFIG_BRIDGE_EBT_PKTTYPE is not set
+# CONFIG_BRIDGE_EBT_STP is not set
+# CONFIG_BRIDGE_EBT_VLAN is not set
+# CONFIG_BRIDGE_EBT_ARPREPLY is not set
+# CONFIG_BRIDGE_EBT_DNAT is not set
+CONFIG_BRIDGE_EBT_MARK_T=y
+# CONFIG_BRIDGE_EBT_REDIRECT is not set
+# CONFIG_BRIDGE_EBT_SNAT is not set
+# CONFIG_BRIDGE_EBT_LOG is not set
+# CONFIG_BRIDGE_EBT_ULOG is not set
+# CONFIG_BRIDGE_EBT_NFLOG is not set
+# CONFIG_IP_DCCP is not set
+# CONFIG_IP_SCTP is not set
+# CONFIG_RDS is not set
+# CONFIG_TIPC is not set
+CONFIG_ATM=y
+# CONFIG_ATM_CLIP is not set
+# CONFIG_ATM_LANE is not set
+# CONFIG_ATM_BR2684 is not set
+# CONFIG_L2TP is not set
+CONFIG_STP=y
+CONFIG_BRIDGE=y
+CONFIG_BRIDGE_IGMP_SNOOPING=y
+# CONFIG_NET_DSA is not set
+CONFIG_VLAN_8021Q=y
+# CONFIG_VLAN_8021Q_GVRP is not set
+# CONFIG_DECNET is not set
+CONFIG_LLC=y
+# CONFIG_LLC2 is not set
+# CONFIG_IPX is not set
+# CONFIG_ATALK is not set
+# CONFIG_X25 is not set
+# CONFIG_LAPB is not set
+# CONFIG_ECONET is not set
+# CONFIG_WAN_ROUTER is not set
+# CONFIG_PHONET is not set
+# CONFIG_IEEE802154 is not set
+CONFIG_NET_SCHED=y
+
+#
+# Queueing/Scheduling
+#
+CONFIG_NET_SCH_CBQ=y
+CONFIG_NET_SCH_HTB=y
+CONFIG_NET_SCH_HFSC=y
+CONFIG_NET_SCH_ATM=y
+CONFIG_NET_SCH_PRIO=y
+# CONFIG_NET_SCH_MULTIQ is not set
+CONFIG_NET_SCH_RED=y
+# CONFIG_NET_SCH_SFB is not set
+CONFIG_NET_SCH_SFQ=y
+CONFIG_NET_SCH_TEQL=y
+CONFIG_NET_SCH_TBF=y
+CONFIG_NET_SCH_GRED=y
+CONFIG_NET_SCH_DSMARK=y
+CONFIG_NET_SCH_NETEM=y
+CONFIG_NET_SCH_DRR=y
+# CONFIG_NET_SCH_MQPRIO is not set
+# CONFIG_NET_SCH_CHOKE is not set
+# CONFIG_NET_SCH_QFQ is not set
+CONFIG_NET_SCH_INGRESS=y
+# CONFIG_NET_SCH_PLUG is not set
+
+#
+# Classification
+#
+CONFIG_NET_CLS=y
+CONFIG_NET_CLS_BASIC=y
+CONFIG_NET_CLS_TCINDEX=y
+CONFIG_NET_CLS_ROUTE4=y
+CONFIG_NET_CLS_FW=y
+CONFIG_NET_CLS_U32=y
+CONFIG_CLS_U32_PERF=y
+CONFIG_CLS_U32_MARK=y
+CONFIG_NET_CLS_RSVP=y
+CONFIG_NET_CLS_RSVP6=y
+# CONFIG_NET_CLS_FLOW is not set
+CONFIG_NET_EMATCH=y
+CONFIG_NET_EMATCH_STACK=32
+# CONFIG_NET_EMATCH_CMP is not set
+# CONFIG_NET_EMATCH_NBYTE is not set
+CONFIG_NET_EMATCH_U32=y
+# CONFIG_NET_EMATCH_META is not set
+CONFIG_NET_EMATCH_TEXT=y
+CONFIG_NET_CLS_ACT=y
+CONFIG_NET_ACT_POLICE=y
+CONFIG_NET_ACT_GACT=y
+# CONFIG_GACT_PROB is not set
+# CONFIG_NET_ACT_MIRRED is not set
+CONFIG_NET_ACT_IPT=y
+# CONFIG_NET_ACT_NAT is not set
+CONFIG_NET_ACT_PEDIT=y
+# CONFIG_NET_ACT_SIMP is not set
+CONFIG_NET_ACT_SKBEDIT=y
+# CONFIG_NET_ACT_CSUM is not set
+CONFIG_NET_CLS_IND=y
+CONFIG_NET_SCH_FIFO=y
+# CONFIG_DCB is not set
+# CONFIG_BATMAN_ADV is not set
+# CONFIG_OPENVSWITCH is not set
+CONFIG_BQL=y
+CONFIG_HAVE_BPF_JIT=y
+# CONFIG_BPF_JIT is not set
+
+#
+# Network testing
+#
+# CONFIG_NET_PKTGEN is not set
+CONFIG_SPEED_OPT=y
+# CONFIG_SPEED_OPT_STATIC_POOL is not set
+CONFIG_SPEED_OPT_DYNAMIC_POOL=y
+# CONFIG_HAMRADIO is not set
+# CONFIG_CAN is not set
+# CONFIG_IRDA is not set
+# CONFIG_BT is not set
+# CONFIG_AF_RXRPC is not set
+CONFIG_FIB_RULES=y
+CONFIG_WIRELESS=y
+CONFIG_WEXT_CORE=y
+CONFIG_WEXT_PROC=y
+CONFIG_CFG80211=y
+CONFIG_NL80211_TESTMODE=y
+# CONFIG_CFG80211_DEVELOPER_WARNINGS is not set
+# CONFIG_CFG80211_REG_DEBUG is not set
+CONFIG_CFG80211_DEFAULT_PS=y
+CONFIG_CFG80211_DEBUGFS=y
+CONFIG_CFG80211_INTERNAL_REGDB=y
+CONFIG_CFG80211_WEXT=y
+CONFIG_WIRELESS_EXT_SYSFS=y
+# CONFIG_LIB80211 is not set
+# CONFIG_CFG80211_ALLOW_RECONNECT is not set
+CONFIG_MAC80211=y
+CONFIG_MAC80211_HAS_RC=y
+# CONFIG_MAC80211_RC_PID is not set
+CONFIG_MAC80211_RC_MINSTREL=y
+CONFIG_MAC80211_RC_MINSTREL_HT=y
+CONFIG_MAC80211_RC_DEFAULT_MINSTREL=y
+CONFIG_MAC80211_RC_DEFAULT="minstrel_ht"
+# CONFIG_MAC80211_MESH is not set
+# CONFIG_MAC80211_LEDS is not set
+CONFIG_MAC80211_DEBUGFS=y
+# CONFIG_MAC80211_DEBUG_MENU is not set
+# CONFIG_WIMAX is not set
+CONFIG_RFKILL=y
+CONFIG_RFKILL_PM=y
+CONFIG_RFKILL_LEDS=y
+# CONFIG_RFKILL_INPUT is not set
+# CONFIG_RFKILL_GPIO is not set
+# CONFIG_NET_9P is not set
+# CONFIG_CAIF is not set
+# CONFIG_CEPH_LIB is not set
+# CONFIG_NFC is not set
+
+#
+# Device Drivers
+#
+
+#
+# Generic Driver Options
+#
+CONFIG_UEVENT_HELPER_PATH="/sbin/hotplug"
+# CONFIG_DEVTMPFS is not set
+CONFIG_STANDALONE=y
+CONFIG_PREVENT_FIRMWARE_BUILD=y
+CONFIG_FW_LOADER=y
+CONFIG_FIRMWARE_IN_KERNEL=y
+CONFIG_EXTRA_FIRMWARE=""
+# CONFIG_DEBUG_DRIVER is not set
+# CONFIG_DEBUG_DEVRES is not set
+# CONFIG_SYS_HYPERVISOR is not set
+# CONFIG_GENERIC_CPU_DEVICES is not set
+# CONFIG_DMA_SHARED_BUFFER is not set
+# CONFIG_SYNC is not set
+CONFIG_ZX_PM_SUSPEND=y
+CONFIG_ZX_AUTOSLEEP=y
+# CONFIG_CONNECTOR is not set
+CONFIG_MTD=y
+# CONFIG_MTD_TESTS is not set
+# CONFIG_MTD_REDBOOT_PARTS is not set
+CONFIG_MTD_CMDLINE_PARTS=y
+# CONFIG_MTD_AFS_PARTS is not set
+# CONFIG_MTD_AR7_PARTS is not set
+
+#
+# User Modules And Translation Layers
+#
+CONFIG_MTD_CHAR=y
+CONFIG_MTD_BLKDEVS=y
+CONFIG_MTD_BLOCK=y
+# CONFIG_FTL is not set
+# CONFIG_NFTL is not set
+CONFIG_PARTS_GUARD=y
+CONFIG_MTD_ADAPTER=y
+# CONFIG_INFTL is not set
+# CONFIG_RFD_FTL is not set
+# CONFIG_SSFDC is not set
+# CONFIG_SM_FTL is not set
+# CONFIG_MTD_OOPS is not set
+# CONFIG_MTD_SWAP is not set
+
+#
+# RAM/ROM/Flash chip drivers
+#
+# CONFIG_MTD_CFI is not set
+# CONFIG_MTD_JEDECPROBE is not set
+CONFIG_MTD_MAP_BANK_WIDTH_1=y
+CONFIG_MTD_MAP_BANK_WIDTH_2=y
+CONFIG_MTD_MAP_BANK_WIDTH_4=y
+# CONFIG_MTD_MAP_BANK_WIDTH_8 is not set
+# CONFIG_MTD_MAP_BANK_WIDTH_16 is not set
+# CONFIG_MTD_MAP_BANK_WIDTH_32 is not set
+CONFIG_MTD_CFI_I1=y
+CONFIG_MTD_CFI_I2=y
+# CONFIG_MTD_CFI_I4 is not set
+# CONFIG_MTD_CFI_I8 is not set
+CONFIG_MTD_RAM=y
+# CONFIG_MTD_ROM is not set
+# CONFIG_MTD_ABSENT is not set
+
+#
+# Mapping drivers for chip access
+#
+CONFIG_MTD_COMPLEX_MAPPINGS=y
+CONFIG_MTD_PHYSMAP=y
+# CONFIG_MTD_PHYSMAP_COMPAT is not set
+# CONFIG_MTD_GPIO_ADDR is not set
+CONFIG_MTD_PLATRAM=y
+# CONFIG_MTD_LATCH_ADDR is not set
+
+#
+# Self-contained MTD device drivers
+#
+# CONFIG_MTD_SLRAM is not set
+# CONFIG_MTD_PHRAM is not set
+# CONFIG_MTD_MTDRAM is not set
+# CONFIG_MTD_BLOCK2MTD is not set
+
+#
+# Disk-On-Chip Device Drivers
+#
+# CONFIG_MTD_DOCG3 is not set
+# CONFIG_MTD_NAND_IDS is not set
+# CONFIG_MTD_NAND is not set
+# CONFIG_MTD_ONENAND is not set
+CONFIG_MTD_SPI_NOR=y
+CONFIG_MTD_SPI_NOR_USE_4K_SECTORS=y
+CONFIG_SPI_ZXIC_NOR=y
+CONFIG_ZX297520V3_UFI_MINI_32K_NOR=y
+
+#
+# LPDDR flash memory drivers
+#
+CONFIG_MTD_LPDDR=y
+CONFIG_MTD_QINFO_PROBE=y
+CONFIG_MTD_UBI=y
+CONFIG_MTD_UBI_WL_THRESHOLD=4096
+CONFIG_MTD_UBI_BEB_RESERVE=3
+# CONFIG_MTD_UBI_GLUEBI is not set
+# CONFIG_MTD_UBI_DEBUG is not set
+# CONFIG_PARPORT is not set
+CONFIG_BLK_DEV=y
+# CONFIG_BLK_DEV_COW_COMMON is not set
+CONFIG_BLK_DEV_LOOP=y
+CONFIG_BLK_DEV_LOOP_MIN_COUNT=8
+# CONFIG_BLK_DEV_CRYPTOLOOP is not set
+
+#
+# DRBD disabled because PROC_FS, INET or CONNECTOR not selected
+#
+# CONFIG_BLK_DEV_NBD is not set
+CONFIG_BLK_DEV_RAM=y
+CONFIG_BLK_DEV_RAM_COUNT=16
+CONFIG_BLK_DEV_RAM_SIZE=16384
+# CONFIG_BLK_DEV_XIP is not set
+# CONFIG_CDROM_PKTCDVD is not set
+# CONFIG_ATA_OVER_ETH is not set
+# CONFIG_MG_DISK is not set
+# CONFIG_BLK_DEV_RBD is not set
+
+#
+# Misc devices
+#
+# CONFIG_SENSORS_LIS3LV02D is not set
+# CONFIG_AD525X_DPOT is not set
+# CONFIG_ATMEL_PWM is not set
+# CONFIG_ICS932S401 is not set
+# CONFIG_ENCLOSURE_SERVICES is not set
+# CONFIG_APDS9802ALS is not set
+# CONFIG_ISL29003 is not set
+# CONFIG_ISL29020 is not set
+# CONFIG_SENSORS_TSL2550 is not set
+# CONFIG_SENSORS_BH1780 is not set
+# CONFIG_SENSORS_BH1770 is not set
+# CONFIG_SENSORS_APDS990X is not set
+# CONFIG_HMC6352 is not set
+# CONFIG_SENSORS_AK8975 is not set
+# CONFIG_DS1682 is not set
+# CONFIG_UID_STAT is not set
+# CONFIG_BMP085 is not set
+# CONFIG_USB_SWITCH_FSA9480 is not set
+# CONFIG_WL127X_RFKILL is not set
+# CONFIG_C2PORT is not set
+
+#
+# EEPROM support
+#
+# CONFIG_EEPROM_AT24 is not set
+# CONFIG_EEPROM_LEGACY is not set
+# CONFIG_EEPROM_MAX6875 is not set
+# CONFIG_EEPROM_93CX6 is not set
+# CONFIG_IWMC3200TOP is not set
+
+#
+# Texas Instruments shared transport line discipline
+#
+# CONFIG_TI_ST is not set
+# CONFIG_SENSORS_LIS3_I2C is not set
+
+#
+# Altera FPGA firmware download module
+#
+# CONFIG_ALTERA_STAPL is not set
+
+#
+# SCSI device support
+#
+CONFIG_SCSI_MOD=y
+# CONFIG_RAID_ATTRS is not set
+# CONFIG_SCSI is not set
+# CONFIG_SCSI_DMA is not set
+# CONFIG_SCSI_NETLINK is not set
+# CONFIG_ATA is not set
+# CONFIG_MD is not set
+CONFIG_NETDEVICES=y
+CONFIG_NET_CORE=y
+# CONFIG_BONDING is not set
+# CONFIG_DUMMY is not set
+# CONFIG_EQUALIZER is not set
+# CONFIG_MII is not set
+# CONFIG_IFB is not set
+# CONFIG_NET_TEAM is not set
+# CONFIG_MACVLAN is not set
+# CONFIG_NETPOLL is not set
+# CONFIG_NET_POLL_CONTROLLER is not set
+CONFIG_TUN=y
+# CONFIG_VETH is not set
+CONFIG_ATM_DRIVERS=y
+# CONFIG_ATM_DUMMY is not set
+# CONFIG_ATM_TCP is not set
+
+#
+# CAIF transport drivers
+#
+# CONFIG_ETHERNET is not set
+# CONFIG_NET_ZX29_GMAC is not set
+# CONFIG_PHYLIB is not set
+# CONFIG_IP175L_PHY is not set
+# CONFIG_RTK8306E_PHY is not set
+CONFIG_PPP=y
+CONFIG_PPP_BSDCOMP=y
+CONFIG_PPP_DEFLATE=y
+# CONFIG_PPP_FILTER is not set
+CONFIG_PPP_MPPE=y
+# CONFIG_PPP_MULTILINK is not set
+# CONFIG_PPPOATM is not set
+CONFIG_PPPOE=y
+# CONFIG_PPPOLAC is not set
+# CONFIG_PPPOPNS is not set
+CONFIG_PPP_ASYNC=y
+# CONFIG_PPP_SYNC_TTY is not set
+# CONFIG_SLIP is not set
+CONFIG_SLHC=y
+CONFIG_WLAN=y
+# CONFIG_LIBERTAS_THINFIRM is not set
+# CONFIG_MAC80211_HWSIM is not set
+# CONFIG_WIFI_CONTROL_FUNC is not set
+# CONFIG_ATH_COMMON is not set
+# CONFIG_B43 is not set
+# CONFIG_B43LEGACY is not set
+CONFIG_RTL_NONE=y
+# CONFIG_RTL8192CD is not set
+# CONFIG_RTL8189E is not set
+# CONFIG_MIFI_WIFI is not set
+# CONFIG_RTL_92E_SUPPORT is not set
+# CONFIG_RTL_88E_SUPPORT is not set
+# CONFIG_RTL_WIFI is not set
+# CONFIG_RTL_11R_SUPPORT is not set
+# CONFIG_RTL_WPA3_SUPPORT is not set
+# CONFIG_RTL_WIFI_WPA2 is not set
+# CONFIG_BRCMFMAC is not set
+# CONFIG_HOSTAP is not set
+# CONFIG_IWM is not set
+# CONFIG_LIBERTAS is not set
+# CONFIG_P54_COMMON is not set
+# CONFIG_RT2X00 is not set
+# CONFIG_WL1251 is not set
+# CONFIG_WL12XX_MENU is not set
+# CONFIG_MWIFIEX is not set
+# CONFIG_RDAWFMAC is not set
+# CONFIG_ESP8089 is not set
+# CONFIG_XR_WLAN is not set
+# CONFIG_SSV6X5X is not set
+CONFIG_AIC8800=y
+
+CONFIG_AIC8800_SDIO_TX_AGGR=y
+CONFIG_AIC8800_SDIO_RX_AGGR=y
+#
+# Enable WiMAX (Networking options) to see the WiMAX drivers
+#
+# CONFIG_WAN is not set
+# CONFIG_7510_DDR_AP_NET is not set
+CONFIG_NET_ZX29_AT=y
+CONFIG_PS_NET=y
+# CONFIG_ISDN is not set
+
+#
+# Input device support
+#
+CONFIG_INPUT=y
+# CONFIG_INPUT_FF_MEMLESS is not set
+# CONFIG_INPUT_POLLDEV is not set
+# CONFIG_INPUT_SPARSEKMAP is not set
+
+#
+# Userland interfaces
+#
+# CONFIG_INPUT_MOUSEDEV is not set
+# CONFIG_INPUT_JOYDEV is not set
+CONFIG_INPUT_EVDEV=y
+# CONFIG_INPUT_EVBUG is not set
+# CONFIG_INPUT_KEYRESET is not set
+
+#
+# Input Device Drivers
+#
+CONFIG_INPUT_KEYBOARD=y
+# CONFIG_KEYBOARD_ADP5588 is not set
+# CONFIG_KEYBOARD_ADP5589 is not set
+# CONFIG_KEYBOARD_ATKBD is not set
+# CONFIG_KEYBOARD_QT1070 is not set
+# CONFIG_KEYBOARD_QT2160 is not set
+# CONFIG_KEYBOARD_LKKBD is not set
+# CONFIG_KEYBOARD_GPIO is not set
+# CONFIG_KEYBOARD_TCA6416 is not set
+# CONFIG_KEYBOARD_TCA8418 is not set
+# CONFIG_KEYBOARD_MATRIX is not set
+# CONFIG_KEYBOARD_LM8323 is not set
+# CONFIG_KEYBOARD_MAX7359 is not set
+# CONFIG_KEYBOARD_MCS is not set
+# CONFIG_KEYBOARD_MPR121 is not set
+# CONFIG_KEYBOARD_NEWTON is not set
+# CONFIG_KEYBOARD_OPENCORES is not set
+# CONFIG_KEYBOARD_SAMSUNG is not set
+# CONFIG_KEYBOARD_STOWAWAY is not set
+# CONFIG_KEYBOARD_SUNKBD is not set
+# CONFIG_KEYBOARD_OMAP4 is not set
+# CONFIG_KEYBOARD_XTKBD is not set
+# CONFIG_KEYBOARD_ZX297510 is not set
+CONFIG_KEYBOARD_ZX_INT=y
+# CONFIG_KEYBOARD_ZX_4x4 is not set
+# CONFIG_KEYBOARD_ZX_5x6 is not set
+# CONFIG_INPUT_MOUSE is not set
+# CONFIG_INPUT_JOYSTICK is not set
+# CONFIG_INPUT_TABLET is not set
+# CONFIG_INPUT_TOUCHSCREEN is not set
+# CONFIG_INPUT_MISC is not set
+
+#
+# Hardware I/O ports
+#
+# CONFIG_SERIO is not set
+# CONFIG_GAMEPORT is not set
+
+#
+# Character devices
+#
+# CONFIG_VT is not set
+CONFIG_UNIX98_PTYS=y
+# CONFIG_DEVPTS_MULTIPLE_INSTANCES is not set
+CONFIG_LEGACY_PTYS=y
+CONFIG_LEGACY_PTY_COUNT=5
+# CONFIG_SERIAL_NONSTANDARD is not set
+# CONFIG_N_GSM is not set
+# CONFIG_TRACE_SINK is not set
+CONFIG_DEVMEM=y
+# CONFIG_DEVKMEM is not set
+
+#
+# Serial drivers
+#
+# CONFIG_SERIAL_8250 is not set
+
+#
+# Non-8250 serial port support
+#
+CONFIG_SERIAL_CORE=y
+CONFIG_SERIAL_CORE_CONSOLE=y
+# CONFIG_SERIAL_TIMBERDALE is not set
+# CONFIG_SERIAL_ALTERA_JTAGUART is not set
+# CONFIG_SERIAL_ALTERA_UART is not set
+# CONFIG_SERIAL_XILINX_PS_UART is not set
+# CONFIG_SERIAL_ZX297502_UART is not set
+# CONFIG_SERIAL_ZX297510_UART is not set
+CONFIG_SERIAL_ZX29_UART=y
+CONFIG_SERIAL_ZX29_UART_CONSOLE=y
+CONFIG_UART_CONSOLE_ID=1
+# CONFIG_TTY_PRINTK is not set
+# CONFIG_HVC_DCC is not set
+# CONFIG_IPMI_HANDLER is not set
+CONFIG_HW_RANDOM=y
+# CONFIG_HW_RANDOM_TIMERIOMEM is not set
+# CONFIG_R3964 is not set
+# CONFIG_RAW_DRIVER is not set
+# CONFIG_TCG_TPM is not set
+# CONFIG_DCC_TTY is not set
+# CONFIG_RAMOOPS is not set
+CONFIG_I2C=y
+CONFIG_I2C_BOARDINFO=y
+CONFIG_I2C_COMPAT=y
+CONFIG_I2C_CHARDEV=y
+# CONFIG_I2C_MUX is not set
+CONFIG_I2C_HELPER_AUTO=y
+
+#
+# I2C Hardware Bus support
+#
+
+#
+# I2C system bus drivers (mostly embedded / system-on-chip)
+#
+# CONFIG_I2C_DESIGNWARE_PLATFORM is not set
+# CONFIG_I2C_GPIO is not set
+# CONFIG_I2C_OCORES is not set
+# CONFIG_I2C_PCA_PLATFORM is not set
+# CONFIG_I2C_PXA_PCI is not set
+# CONFIG_I2C_SIMTEC is not set
+# CONFIG_I2C_XILINX is not set
+CONFIG_I2C_ZX29=y
+
+#
+# External I2C/SMBus adapter drivers
+#
+# CONFIG_I2C_PARPORT_LIGHT is not set
+# CONFIG_I2C_TAOS_EVM is not set
+
+#
+# Other I2C/SMBus bus drivers
+#
+# CONFIG_I2C_STUB is not set
+# CONFIG_I2C_DEBUG_CORE is not set
+# CONFIG_I2C_DEBUG_ALGO is not set
+# CONFIG_I2C_DEBUG_BUS is not set
+# CONFIG_SPI is not set
+# CONFIG_HSI is not set
+
+#
+# PPS support
+#
+# CONFIG_PPS is not set
+
+#
+# PPS generators support
+#
+
+#
+# PTP clock support
+#
+
+#
+# Enable Device Drivers -> PPS to see the PTP clock options.
+#
+CONFIG_ARCH_REQUIRE_GPIOLIB=y
+CONFIG_GPIOLIB=y
+# CONFIG_DEBUG_GPIO is not set
+CONFIG_GPIO_SYSFS=y
+
+#
+# Memory mapped GPIO drivers:
+#
+# CONFIG_GPIO_GENERIC_PLATFORM is not set
+CONFIG_GPIO_ZX29=y
+
+#
+# I2C GPIO expanders:
+#
+# CONFIG_GPIO_MAX7300 is not set
+# CONFIG_GPIO_MAX732X is not set
+# CONFIG_GPIO_PCF857X is not set
+# CONFIG_GPIO_SX150X is not set
+# CONFIG_GPIO_ADP5588 is not set
+
+#
+# PCI GPIO expanders:
+#
+
+#
+# SPI GPIO expanders:
+#
+# CONFIG_GPIO_MCP23S08 is not set
+
+#
+# AC97 GPIO expanders:
+#
+
+#
+# MODULbus GPIO expanders:
+#
+# CONFIG_W1 is not set
+CONFIG_POWER_SUPPLY=y
+CONFIG_POWER_SUPPLY_DEBUG=y
+CONFIG_CHARGER_AW3215=y
+#CONFIG_CHARGER_SGM41513 is not set
+# CONFIG_HWMON is not set
+# CONFIG_THERMAL is not set
+CONFIG_WATCHDOG=y
+CONFIG_WATCHDOG_CORE=y
+# CONFIG_WATCHDOG_NOWAYOUT is not set
+
+#
+# Watchdog Device Drivers
+#
+# CONFIG_SOFT_WATCHDOG is not set
+# CONFIG_DW_WATCHDOG is not set
+# CONFIG_MAX63XX_WATCHDOG is not set
+CONFIG_ZX29_WATCHDOG=y
+# CONFIG_ZX29_WDT_TEST is not set
+CONFIG_WATCHDOG_RESTART=y
+CONFIG_SSB_POSSIBLE=y
+
+#
+# Sonics Silicon Backplane
+#
+# CONFIG_SSB is not set
+CONFIG_BCMA_POSSIBLE=y
+
+#
+# Broadcom specific AMBA
+#
+# CONFIG_BCMA is not set
+
+#
+# Multifunction device drivers
+#
+CONFIG_MFD_CORE=y
+# CONFIG_MFD_88PM860X is not set
+# CONFIG_MFD_SM501 is not set
+# CONFIG_MFD_ASIC3 is not set
+# CONFIG_HTC_EGPIO is not set
+# CONFIG_HTC_PASIC3 is not set
+# CONFIG_HTC_I2CPLD is not set
+# CONFIG_TPS6105X is not set
+# CONFIG_TPS65010 is not set
+# CONFIG_TPS6507X is not set
+# CONFIG_MFD_TPS65217 is not set
+# CONFIG_MFD_TPS6586X is not set
+# CONFIG_MFD_TPS65910 is not set
+# CONFIG_MFD_TPS65912_I2C is not set
+CONFIG_MFD_ZX234290=y
+CONFIG_MFD_ZX234290_I2C=y
+# CONFIG_TWL4030_CORE is not set
+# CONFIG_TWL6040_CORE is not set
+# CONFIG_MFD_STMPE is not set
+# CONFIG_MFD_TC3589X is not set
+# CONFIG_MFD_TMIO is not set
+# CONFIG_MFD_T7L66XB is not set
+# CONFIG_MFD_TC6387XB is not set
+# CONFIG_MFD_TC6393XB is not set
+# CONFIG_PMIC_DA903X is not set
+# CONFIG_MFD_DA9052_I2C is not set
+# CONFIG_PMIC_ADP5520 is not set
+# CONFIG_MFD_MAX8925 is not set
+# CONFIG_MFD_MAX8997 is not set
+# CONFIG_MFD_MAX8998 is not set
+# CONFIG_MFD_S5M_CORE is not set
+# CONFIG_MFD_WM8400 is not set
+# CONFIG_MFD_WM831X_I2C is not set
+# CONFIG_MFD_WM8350_I2C is not set
+# CONFIG_MFD_WM8994 is not set
+# CONFIG_MFD_PCF50633 is not set
+# CONFIG_ABX500_CORE is not set
+# CONFIG_MFD_WL1273_CORE is not set
+# CONFIG_MFD_TPS65090 is not set
+# CONFIG_MFD_AAT2870_CORE is not set
+# CONFIG_MFD_RC5T583 is not set
+# CONFIG_REGULATOR is not set
+# CONFIG_MEDIA_SUPPORT is not set
+
+#
+# Graphics support
+#
+# CONFIG_DRM is not set
+# CONFIG_ION is not set
+# CONFIG_VGASTATE is not set
+# CONFIG_VIDEO_OUTPUT_CONTROL is not set
+# CONFIG_FB is not set
+# CONFIG_EXYNOS_VIDEO is not set
+# CONFIG_BACKLIGHT_LCD_SUPPORT is not set
+# CONFIG_SOUND is not set
+# CONFIG_HID_SUPPORT is not set
+# CONFIG_USB_ARCH_HAS_OHCI is not set
+# CONFIG_USB_ARCH_HAS_EHCI is not set
+# CONFIG_USB_ARCH_HAS_XHCI is not set
+CONFIG_USB_SUPPORT=y
+CONFIG_USB_COMMON=y
+CONFIG_USB_ARCH_HAS_HCD=y
+# CONFIG_USB is not set
+# CONFIG_USB_OTG_WHITELIST is not set
+# CONFIG_USB_OTG_BLACKLIST_HUB is not set
+CONFIG_DWC_OTG_USB=y
+CONFIG_DWC_DEVICE_ONLY=y
+CONFIG_DWC_DEVICE_GPIO_CHARGER=y
+
+#
+# NOTE: USB_STORAGE depends on SCSI but BLK_DEV_SD may
+#
+CONFIG_USB_GADGET=y
+# CONFIG_USB_GADGET_DEBUG is not set
+# CONFIG_USB_GADGET_DEBUG_FILES is not set
+# CONFIG_USB_GADGET_DEBUG_FS is not set
+CONFIG_USB_GADGET_VBUS_DRAW=2
+CONFIG_USB_GADGET_STORAGE_NUM_BUFFERS=2
+CONFIG_USB_NONE=y
+# CONFIG_USB_FUSB300 is not set
+# CONFIG_USB_R8A66597 is not set
+# CONFIG_USB_MV_UDC is not set
+# CONFIG_USB_M66592 is not set
+# CONFIG_USB_NET2272 is not set
+CONFIG_USB_GADGET_NONE=y
+# CONFIG_USB_ZERO is not set
+# CONFIG_USB_ETH is not set
+# CONFIG_USB_G_NCM is not set
+# CONFIG_USB_GADGETFS is not set
+# CONFIG_USB_FUNCTIONFS is not set
+# CONFIG_USB_FILE_STORAGE is not set
+# CONFIG_USB_MASS_STORAGE is not set
+# CONFIG_USB_G_SERIAL is not set
+# CONFIG_USB_G_PRINTER is not set
+# CONFIG_USB_CDC_COMPOSITE is not set
+# CONFIG_USB_G_ACM_MS is not set
+# CONFIG_USB_G_MULTI is not set
+# CONFIG_USB_G_HID is not set
+# CONFIG_USB_G_DBGP is not set
+
+#
+# OTG and related infrastructure
+#
+# CONFIG_USB_GPIO_VBUS is not set
+# CONFIG_USB_ULPI is not set
+# CONFIG_NOP_USB_XCEIV is not set
+CONFIG_MMC=y
+# CONFIG_MMC_DEBUG is not set
+CONFIG_MMC_UNSAFE_RESUME=y
+# CONFIG_MMC_CLKGATE is not set
+# CONFIG_MMC_EMBEDDED_SDIO is not set
+# CONFIG_MMC_PARANOID_SD_INIT is not set
+
+#
+# MMC/SD/SDIO Card Drivers
+#
+CONFIG_MMC_BLOCK=y
+CONFIG_MMC_BLOCK_MINORS=8
+CONFIG_MMC_BLOCK_BOUNCE=y
+# CONFIG_MMC_BLOCK_DEFERRED_RESUME is not set
+# CONFIG_SDIO_UART is not set
+# CONFIG_MMC_TEST is not set
+
+#
+# MMC/SD/SDIO Host Controller Drivers
+#
+# CONFIG_MMC_SDHCI is not set
+# CONFIG_MMC_SDHCI_PXAV3 is not set
+# CONFIG_MMC_SDHCI_PXAV2 is not set
+# CONFIG_MMC_DW is not set
+CONFIG_MMC_DW_IDMAC=y
+CONFIG_MMC_ZX29=y
+CONFIG_MMC_ZX29_PLTFM=y
+# CONFIG_MMC_ZX29_EDMAC is not set
+# CONFIG_MEMSTICK is not set
+CONFIG_NEW_LEDS=y
+CONFIG_LEDS_CLASS=y
+
+#
+# LED drivers
+#
+# CONFIG_LEDS_LM3530 is not set
+# CONFIG_LEDS_PCA9532 is not set
+CONFIG_LEDS_GPIO=y
+# CONFIG_LEDS_LP3944 is not set
+# CONFIG_LEDS_LP5521 is not set
+# CONFIG_LEDS_LP5523 is not set
+# CONFIG_LEDS_PCA955X is not set
+# CONFIG_LEDS_PCA9633 is not set
+# CONFIG_LEDS_BD2802 is not set
+# CONFIG_LEDS_LT3593 is not set
+# CONFIG_LEDS_RENESAS_TPU is not set
+# CONFIG_LEDS_TCA6507 is not set
+# CONFIG_LEDS_ZX297520UFI is not set
+# CONFIG_LEDS_OT200 is not set
+CONFIG_LEDS_TRIGGERS=y
+
+#
+# LED Triggers
+#
+CONFIG_LEDS_TRIGGER_TIMER=y
+# CONFIG_LEDS_TRIGGER_HEARTBEAT is not set
+# CONFIG_LEDS_TRIGGER_BACKLIGHT is not set
+# CONFIG_LEDS_TRIGGER_GPIO is not set
+# CONFIG_LEDS_TRIGGER_DEFAULT_ON is not set
+
+#
+# iptables trigger is under Netfilter config (LED target)
+#
+# CONFIG_ACCESSIBILITY is not set
+CONFIG_RTC_LIB=y
+CONFIG_RTC_CLASS=y
+CONFIG_RTC_HCTOSYS=y
+CONFIG_RTC_HCTOSYS_DEVICE="rtc0"
+# CONFIG_RTC_DEBUG is not set
+
+#
+# RTC interfaces
+#
+CONFIG_RTC_INTF_SYSFS=y
+CONFIG_RTC_INTF_PROC=y
+CONFIG_RTC_INTF_DEV=y
+# CONFIG_RTC_INTF_DEV_UIE_EMUL is not set
+# CONFIG_RTC_DRV_TEST is not set
+
+#
+# I2C RTC drivers
+#
+# CONFIG_RTC_DRV_DS1307 is not set
+# CONFIG_RTC_DRV_DS1374 is not set
+# CONFIG_RTC_DRV_DS1672 is not set
+# CONFIG_RTC_DRV_DS3232 is not set
+# CONFIG_RTC_DRV_MAX6900 is not set
+# CONFIG_RTC_DRV_RS5C372 is not set
+# CONFIG_RTC_DRV_ISL1208 is not set
+# CONFIG_RTC_DRV_ISL12022 is not set
+# CONFIG_RTC_DRV_X1205 is not set
+# CONFIG_RTC_DRV_PCF8563 is not set
+# CONFIG_RTC_DRV_PCF8583 is not set
+# CONFIG_RTC_DRV_M41T80 is not set
+# CONFIG_RTC_DRV_BQ32K is not set
+# CONFIG_RTC_DRV_S35390A is not set
+# CONFIG_RTC_DRV_FM3130 is not set
+# CONFIG_RTC_DRV_RX8581 is not set
+# CONFIG_RTC_DRV_RX8025 is not set
+# CONFIG_RTC_DRV_EM3027 is not set
+# CONFIG_RTC_DRV_RV3029C2 is not set
+
+#
+# SPI RTC drivers
+#
+
+#
+# Platform RTC drivers
+#
+# CONFIG_RTC_DRV_CMOS is not set
+# CONFIG_RTC_DRV_DS1286 is not set
+# CONFIG_RTC_DRV_DS1511 is not set
+# CONFIG_RTC_DRV_DS1553 is not set
+# CONFIG_RTC_DRV_DS1742 is not set
+# CONFIG_RTC_DRV_STK17TA8 is not set
+# CONFIG_RTC_DRV_M48T86 is not set
+# CONFIG_RTC_DRV_M48T35 is not set
+# CONFIG_RTC_DRV_M48T59 is not set
+# CONFIG_RTC_DRV_MSM6242 is not set
+# CONFIG_RTC_DRV_BQ4802 is not set
+# CONFIG_RTC_DRV_RP5C01 is not set
+# CONFIG_RTC_DRV_V3020 is not set
+
+#
+# on-CPU RTC drivers
+#
+# CONFIG_RTC_ZX297510 is not set
+CONFIG_RTC_ZX234290=y
+CONFIG_DMADEVICES=y
+CONFIG_DMADEVICES_DEBUG=y
+# CONFIG_DMADEVICES_VDEBUG is not set
+
+#
+# DMA Devices
+#
+CONFIG_ZX29_DMA=y
+# CONFIG_DW_DMAC is not set
+# CONFIG_TIMB_DMA is not set
+CONFIG_DMA_ENGINE=y
+
+#
+# DMA Clients
+#
+# CONFIG_ASYNC_TX_DMA is not set
+# CONFIG_DMATEST is not set
+# CONFIG_AUXDISPLAY is not set
+# CONFIG_UIO is not set
+
+#
+# Virtio drivers
+#
+# CONFIG_VIRTIO_BALLOON is not set
+# CONFIG_VIRTIO_MMIO is not set
+
+#
+# Microsoft Hyper-V guest support
+#
+CONFIG_STAGING=y
+# CONFIG_ECHO is not set
+# CONFIG_RTLLIB is not set
+# CONFIG_IIO is not set
+CONFIG_ZRAM=y
+CONFIG_ZRAM_DEBUG=y
+CONFIG_ZSMALLOC=y
+# CONFIG_FT1000 is not set
+
+#
+# Speakup console speech
+#
+# CONFIG_TOUCHSCREEN_CLEARPAD_TM1217 is not set
+# CONFIG_TOUCHSCREEN_SYNAPTICS_I2C_RMI4 is not set
+# CONFIG_STAGING_MEDIA is not set
+
+#
+# Android
+#
+# CONFIG_ANDROID is not set
+# CONFIG_PHONE is not set
+
+#
+# ZX297510 USB PROXY
+#
+CONFIG_USB_PROXY=y
+
+#
+# ZX297520 volte driver
+#
+# CONFIG_VOLTE_DRV is not set
+
+#
+# ZX297520V3 camera driver
+#
+# CONFIG_CAMERA_DRV is not set
+
+#
+# ZX297520 amr driver
+#
+# CONFIG_AMR_DRV is not set
+
+#
+# ZX297520 voice driver
+#
+# CONFIG_VOICE_DRV is not set
+
+#
+# ZX297520 voice buffer driver
+#
+# CONFIG_VOICE_BUFFER_DRV is not set
+
+#
+# ZX297520 audiomix driver
+#
+# CONFIG_AUDIOMIX_DRV is not set
+CONFIG_CLKDEV_LOOKUP=y
+
+#
+# Hardware Spinlock drivers
+#
+CONFIG_IOMMU_SUPPORT=y
+
+#
+# Remoteproc drivers (EXPERIMENTAL)
+#
+
+#
+# Rpmsg drivers (EXPERIMENTAL)
+#
+# CONFIG_VIRT_DRIVERS is not set
+# CONFIG_PM_DEVFREQ is not set
+# CONFIG_RPM_ZX29 is not set
+CONFIG_TSC_ZX29=y
+# CONFIG_DDR_ZX29 is not set
+# CONFIG_OS_EXTEND is not set
+# CONFIG_SI3217X is not set
+# CONFIG_SI3218X is not set
+CONFIG_CPNV=y
+CONFIG_CPPS_INIT2=y
+# CONFIG_SLIC_TW is not set
+# CONFIG_CP_USE_SOFT_DTMF_DETECT is not set
+
+#
+# File systems
+#
+# CONFIG_EXT2_FS is not set
+# CONFIG_EXT3_FS is not set
+# CONFIG_EXT4_FS is not set
+# CONFIG_REISERFS_FS is not set
+# CONFIG_JFS_FS is not set
+# CONFIG_XFS_FS is not set
+# CONFIG_BTRFS_FS is not set
+# CONFIG_NILFS2_FS is not set
+# CONFIG_FS_POSIX_ACL is not set
+CONFIG_FILE_LOCKING=y
+CONFIG_FSNOTIFY=y
+# CONFIG_DNOTIFY is not set
+CONFIG_INOTIFY_USER=y
+# CONFIG_FANOTIFY is not set
+# CONFIG_QUOTA is not set
+# CONFIG_QUOTACTL is not set
+# CONFIG_AUTOFS4_FS is not set
+# CONFIG_FUSE_FS is not set
+
+#
+# Caches
+#
+# CONFIG_FSCACHE is not set
+
+#
+# CD-ROM/DVD Filesystems
+#
+# CONFIG_ISO9660_FS is not set
+# CONFIG_UDF_FS is not set
+
+#
+# DOS/FAT/NT Filesystems
+#
+# CONFIG_MSDOS_FS is not set
+# CONFIG_VFAT_FS is not set
+# CONFIG_NTFS_FS is not set
+
+#
+# Pseudo filesystems
+#
+CONFIG_PROC_FS=y
+CONFIG_PROC_SYSCTL=y
+CONFIG_PROC_PAGE_MONITOR=y
+CONFIG_SYSFS=y
+# CONFIG_HUGETLB_PAGE is not set
+# CONFIG_CONFIGFS_FS is not set
+CONFIG_MISC_FILESYSTEMS=y
+# CONFIG_ADFS_FS is not set
+# CONFIG_AFFS_FS is not set
+# CONFIG_HFS_FS is not set
+# CONFIG_HFSPLUS_FS is not set
+# CONFIG_BEFS_FS is not set
+# CONFIG_BFS_FS is not set
+# CONFIG_EFS_FS is not set
+CONFIG_JFFS2_FS=y
+CONFIG_JFFS2_FS_DEBUG=0
+# CONFIG_JFFS2_FS_WRITEBUFFER is not set
+# CONFIG_JFFS2_SUMMARY is not set
+# CONFIG_JFFS2_FS_XATTR is not set
+CONFIG_JFFS2_COMPRESSION_OPTIONS=y
+# CONFIG_JFFS2_ZLIB is not set
+# CONFIG_JFFS2_LZO is not set
+CONFIG_JFFS2_LZMA=y
+# CONFIG_JFFS2_RTIME is not set
+# CONFIG_JFFS2_RUBIN is not set
+# CONFIG_JFFS2_CMODE_NONE is not set
+CONFIG_JFFS2_CMODE_PRIORITY=y
+# CONFIG_JFFS2_CMODE_SIZE is not set
+# CONFIG_JFFS2_CMODE_FAVOURLZO is not set
+# CONFIG_UBIFS_FS is not set
+# CONFIG_LOGFS is not set
+# CONFIG_CRAMFS is not set
+CONFIG_SQUASHFS=y
+# CONFIG_SQUASHFS_XATTR is not set
+# CONFIG_SQUASHFS_ZLIB is not set
+# CONFIG_SQUASHFS_LZO is not set
+CONFIG_SQUASHFS_XZ=y
+# CONFIG_SQUASHFS_4K_DEVBLK_SIZE is not set
+CONFIG_SQUASHFS_EMBEDDED=y
+CONFIG_SQUASHFS_FRAGMENT_CACHE_SIZE=1
+# CONFIG_VXFS_FS is not set
+# CONFIG_MINIX_FS is not set
+# CONFIG_OMFS_FS is not set
+# CONFIG_HPFS_FS is not set
+# CONFIG_QNX4FS_FS is not set
+# CONFIG_QNX6FS_FS is not set
+# CONFIG_ROMFS_FS is not set
+# CONFIG_PSTORE is not set
+# CONFIG_SYSV_FS is not set
+# CONFIG_UFS_FS is not set
+# CONFIG_NETWORK_FILESYSTEMS is not set
+CONFIG_NLS=y
+CONFIG_NLS_DEFAULT=""
+# CONFIG_NLS_CODEPAGE_437 is not set
+# CONFIG_NLS_CODEPAGE_737 is not set
+# CONFIG_NLS_CODEPAGE_775 is not set
+# CONFIG_NLS_CODEPAGE_850 is not set
+# CONFIG_NLS_CODEPAGE_852 is not set
+# CONFIG_NLS_CODEPAGE_855 is not set
+# CONFIG_NLS_CODEPAGE_857 is not set
+# CONFIG_NLS_CODEPAGE_860 is not set
+# CONFIG_NLS_CODEPAGE_861 is not set
+# CONFIG_NLS_CODEPAGE_862 is not set
+# CONFIG_NLS_CODEPAGE_863 is not set
+# CONFIG_NLS_CODEPAGE_864 is not set
+# CONFIG_NLS_CODEPAGE_865 is not set
+# CONFIG_NLS_CODEPAGE_866 is not set
+# CONFIG_NLS_CODEPAGE_869 is not set
+# CONFIG_NLS_CODEPAGE_936 is not set
+# CONFIG_NLS_CODEPAGE_950 is not set
+# CONFIG_NLS_CODEPAGE_932 is not set
+# CONFIG_NLS_CODEPAGE_949 is not set
+# CONFIG_NLS_CODEPAGE_874 is not set
+# CONFIG_NLS_ISO8859_8 is not set
+# CONFIG_NLS_CODEPAGE_1250 is not set
+# CONFIG_NLS_CODEPAGE_1251 is not set
+CONFIG_NLS_ASCII=y
+# CONFIG_NLS_ISO8859_1 is not set
+# CONFIG_NLS_ISO8859_2 is not set
+# CONFIG_NLS_ISO8859_3 is not set
+# CONFIG_NLS_ISO8859_4 is not set
+# CONFIG_NLS_ISO8859_5 is not set
+# CONFIG_NLS_ISO8859_6 is not set
+# CONFIG_NLS_ISO8859_7 is not set
+# CONFIG_NLS_ISO8859_9 is not set
+# CONFIG_NLS_ISO8859_13 is not set
+# CONFIG_NLS_ISO8859_14 is not set
+# CONFIG_NLS_ISO8859_15 is not set
+# CONFIG_NLS_KOI8_R is not set
+# CONFIG_NLS_KOI8_U is not set
+# CONFIG_NLS_UTF8 is not set
+
+#
+# Kernel hacking
+#
+CONFIG_PRINTK_TIME=y
+CONFIG_DEFAULT_MESSAGE_LOGLEVEL=4
+CONFIG_ENABLE_WARN_DEPRECATED=y
+CONFIG_ENABLE_MUST_CHECK=y
+CONFIG_FRAME_WARN=1024
+# CONFIG_MAGIC_SYSRQ is not set
+# CONFIG_STRIP_ASM_SYMS is not set
+# CONFIG_UNUSED_SYMBOLS is not set
+CONFIG_DEBUG_FS=y
+CONFIG_HEADERS_CHECK=y
+# CONFIG_DEBUG_SECTION_MISMATCH is not set
+CONFIG_DEBUG_KERNEL=y
+# CONFIG_LOCKUP_DETECTOR is not set
+# CONFIG_HARDLOCKUP_DETECTOR_NMI is not set
+# CONFIG_HARDLOCKUP_DETECTOR_OTHER_CPU is not set
+# CONFIG_HARDLOCKUP_DETECTOR is not set
+# CONFIG_DETECT_HUNG_TASK is not set
+# CONFIG_SCHED_DEBUG is not set
+# CONFIG_SCHEDSTATS is not set
+# CONFIG_TIMER_STATS is not set
+# CONFIG_DEBUG_OBJECTS is not set
+# CONFIG_DEBUG_KMEMLEAK is not set
+# CONFIG_DEBUG_PREEMPT is not set
+# CONFIG_DEBUG_RT_MUTEXES is not set
+# CONFIG_RT_MUTEX_TESTER is not set
+# CONFIG_DEBUG_SPINLOCK is not set
+# CONFIG_DEBUG_MUTEXES is not set
+# CONFIG_DEBUG_LOCK_ALLOC is not set
+# CONFIG_PROVE_LOCKING is not set
+# CONFIG_SPARSE_RCU_POINTER is not set
+# CONFIG_LOCK_STAT is not set
+# CONFIG_DEBUG_ATOMIC_SLEEP is not set
+# CONFIG_DEBUG_LOCKING_API_SELFTESTS is not set
+# CONFIG_STACKTRACE is not set
+# CONFIG_DEBUG_STACK_USAGE is not set
+# CONFIG_DEBUG_KOBJECT is not set
+# CONFIG_DEBUG_BUGVERBOSE is not set
+CONFIG_DEBUG_INFO=y
+# CONFIG_DEBUG_INFO_REDUCED is not set
+CONFIG_DEBUG_VM=y
+# CONFIG_DEBUG_WRITECOUNT is not set
+# CONFIG_DEBUG_MEMORY_INIT is not set
+# CONFIG_DEBUG_LIST is not set
+# CONFIG_TEST_LIST_SORT is not set
+# CONFIG_DEBUG_SG is not set
+# CONFIG_DEBUG_NOTIFIERS is not set
+# CONFIG_DEBUG_CREDENTIALS is not set
+# CONFIG_BOOT_PRINTK_DELAY is not set
+# CONFIG_RCU_TORTURE_TEST is not set
+# CONFIG_RCU_TRACE is not set
+# CONFIG_BACKTRACE_SELF_TEST is not set
+# CONFIG_DEBUG_BLOCK_EXT_DEVT is not set
+# CONFIG_DEBUG_FORCE_WEAK_PER_CPU is not set
+# CONFIG_LKDTM is not set
+# CONFIG_FAULT_INJECTION is not set
+# CONFIG_LATENCYTOP is not set
+# CONFIG_DEBUG_PAGEALLOC is not set
+CONFIG_HAVE_FUNCTION_TRACER=y
+CONFIG_HAVE_DYNAMIC_FTRACE=y
+CONFIG_HAVE_FTRACE_MCOUNT_RECORD=y
+CONFIG_HAVE_C_RECORDMCOUNT=y
+CONFIG_TRACING_SUPPORT=y
+# CONFIG_FTRACE is not set
+# CONFIG_BUILD_DOCSRC is not set
+# CONFIG_DYNAMIC_DEBUG is not set
+# CONFIG_DMA_API_DEBUG is not set
+# CONFIG_ATOMIC64_SELFTEST is not set
+# CONFIG_SAMPLES is not set
+CONFIG_HAVE_ARCH_KGDB=y
+# CONFIG_KGDB is not set
+# CONFIG_TEST_KSTRTOX is not set
+# CONFIG_STRICT_DEVMEM is not set
+CONFIG_ARM_UNWIND=y
+CONFIG_DEBUG_USER=y
+CONFIG_DEBUG_RODATA=y
+# CONFIG_DEBUG_RODATA_TEST is not set
+# CONFIG_DEBUG_LL is not set
+CONFIG_ACCURATE_CPU_PERCENT=y
+CONFIG_IRQ_STACK=y
+
+#
+# Security options
+#
+# CONFIG_KEYS is not set
+# CONFIG_SECURITY_DMESG_RESTRICT is not set
+# CONFIG_SECURITY is not set
+# CONFIG_SECURITYFS is not set
+CONFIG_DEFAULT_SECURITY_DAC=y
+CONFIG_DEFAULT_SECURITY=""
+CONFIG_CRYPTO=y
+
+#
+# Crypto core or helper
+#
+CONFIG_CRYPTO_ALGAPI=y
+CONFIG_CRYPTO_ALGAPI2=y
+CONFIG_CRYPTO_AEAD=y
+CONFIG_CRYPTO_AEAD2=y
+CONFIG_CRYPTO_BLKCIPHER=y
+CONFIG_CRYPTO_BLKCIPHER2=y
+CONFIG_CRYPTO_HASH=y
+CONFIG_CRYPTO_HASH2=y
+CONFIG_CRYPTO_RNG=y
+CONFIG_CRYPTO_RNG2=y
+CONFIG_CRYPTO_PCOMP2=y
+CONFIG_CRYPTO_MANAGER=y
+CONFIG_CRYPTO_MANAGER2=y
+# CONFIG_CRYPTO_USER is not set
+CONFIG_CRYPTO_MANAGER_DISABLE_TESTS=y
+# CONFIG_CRYPTO_GF128MUL is not set
+CONFIG_CRYPTO_NULL=y
+CONFIG_CRYPTO_WORKQUEUE=y
+# CONFIG_CRYPTO_CRYPTD is not set
+CONFIG_CRYPTO_AUTHENC=y
+# CONFIG_CRYPTO_TEST is not set
+
+#
+# Authenticated Encryption with Associated Data
+#
+# CONFIG_CRYPTO_CCM is not set
+# CONFIG_CRYPTO_GCM is not set
+# CONFIG_CRYPTO_SEQIV is not set
+
+#
+# Block modes
+#
+CONFIG_CRYPTO_CBC=y
+# CONFIG_CRYPTO_CTR is not set
+# CONFIG_CRYPTO_CTS is not set
+CONFIG_CRYPTO_ECB=y
+# CONFIG_CRYPTO_LRW is not set
+# CONFIG_CRYPTO_PCBC is not set
+# CONFIG_CRYPTO_XTS is not set
+
+#
+# Hash modes
+#
+CONFIG_CRYPTO_HMAC=y
+# CONFIG_CRYPTO_XCBC is not set
+# CONFIG_CRYPTO_VMAC is not set
+
+#
+# Digest
+#
+CONFIG_CRYPTO_CRC32C=y
+# CONFIG_CRYPTO_GHASH is not set
+# CONFIG_CRYPTO_MD4 is not set
+CONFIG_CRYPTO_MD5=y
+# CONFIG_CRYPTO_MICHAEL_MIC is not set
+# CONFIG_CRYPTO_RMD128 is not set
+# CONFIG_CRYPTO_RMD160 is not set
+# CONFIG_CRYPTO_RMD256 is not set
+# CONFIG_CRYPTO_RMD320 is not set
+CONFIG_CRYPTO_SHA1=y
+CONFIG_CRYPTO_SHA256=y
+CONFIG_CRYPTO_SHA512=y
+# CONFIG_CRYPTO_TGR192 is not set
+# CONFIG_CRYPTO_WP512 is not set
+
+#
+# Ciphers
+#
+CONFIG_CRYPTO_AES=y
+# CONFIG_CRYPTO_ANUBIS is not set
+CONFIG_CRYPTO_ARC4=y
+# CONFIG_CRYPTO_BLOWFISH is not set
+# CONFIG_CRYPTO_CAMELLIA is not set
+# CONFIG_CRYPTO_CAST5 is not set
+# CONFIG_CRYPTO_CAST6 is not set
+CONFIG_CRYPTO_DES=y
+# CONFIG_CRYPTO_FCRYPT is not set
+# CONFIG_CRYPTO_KHAZAD is not set
+# CONFIG_CRYPTO_SALSA20 is not set
+# CONFIG_CRYPTO_SEED is not set
+# CONFIG_CRYPTO_SERPENT is not set
+# CONFIG_CRYPTO_TEA is not set
+CONFIG_CRYPTO_TWOFISH=y
+CONFIG_CRYPTO_TWOFISH_COMMON=y
+
+#
+# Compression
+#
+CONFIG_CRYPTO_DEFLATE=y
+# CONFIG_CRYPTO_ZLIB is not set
+CONFIG_CRYPTO_LZO=y
+
+#
+# Random Number Generation
+#
+CONFIG_CRYPTO_ANSI_CPRNG=y
+# CONFIG_CRYPTO_USER_API_HASH is not set
+# CONFIG_CRYPTO_USER_API_SKCIPHER is not set
+CONFIG_CRYPTO_HW=y
+# CONFIG_BINARY_PRINTF is not set
+
+#
+# Library routines
+#
+CONFIG_BITREVERSE=y
+CONFIG_GENERIC_PCI_IOMAP=y
+CONFIG_GENERIC_IO=y
+CONFIG_CRC_CCITT=y
+CONFIG_CRC16=y
+# CONFIG_CRC_T10DIF is not set
+CONFIG_CRC_ITU_T=y
+CONFIG_CRC32=y
+# CONFIG_CRC32_SELFTEST is not set
+CONFIG_CRC32_SLICEBY8=y
+# CONFIG_CRC32_SLICEBY4 is not set
+# CONFIG_CRC32_SARWATE is not set
+# CONFIG_CRC32_BIT is not set
+# CONFIG_CRC7 is not set
+# CONFIG_LIBCRC32C is not set
+# CONFIG_CRC8 is not set
+CONFIG_ZLIB_INFLATE=y
+CONFIG_ZLIB_DEFLATE=y
+CONFIG_LZO_COMPRESS=y
+CONFIG_LZO_DECOMPRESS=y
+CONFIG_XZ_DEC=y
+CONFIG_XZ_DEC_X86=y
+CONFIG_XZ_DEC_POWERPC=y
+CONFIG_XZ_DEC_IA64=y
+CONFIG_XZ_DEC_ARM=y
+CONFIG_XZ_DEC_ARMTHUMB=y
+CONFIG_XZ_DEC_SPARC=y
+CONFIG_XZ_DEC_BCJ=y
+# CONFIG_XZ_DEC_TEST is not set
+CONFIG_LZMA_COMPRESS=y
+CONFIG_LZMA_DECOMPRESS=y
+CONFIG_TEXTSEARCH=y
+CONFIG_TEXTSEARCH_KMP=y
+CONFIG_TEXTSEARCH_BM=y
+CONFIG_TEXTSEARCH_FSM=y
+CONFIG_HAS_IOMEM=y
+CONFIG_HAS_IOPORT=y
+CONFIG_HAS_DMA=y
+CONFIG_DQL=y
+CONFIG_NLATTR=y
+CONFIG_AVERAGE=y
+# CONFIG_CORDIC is not set
+CONFIG_TCPC_CLASS=y
+# CONFIG_USB_POWER_DELIVERY is not set
+CONFIG_TCPC_RT1711H=y
+CONFIG_USB_PD_VBUS_STABLE_TOUT=125
+CONFIG_PD_DBG_INFO=y
+
diff --git a/lynq/R305/V4/boot/common/src/uboot/board/zte/zx297520v3/zx297520v3_ufi_mini.c b/lynq/R305/V4/boot/common/src/uboot/board/zte/zx297520v3/zx297520v3_ufi_mini.c
new file mode 100755
index 0000000..584cb2d
--- /dev/null
+++ b/lynq/R305/V4/boot/common/src/uboot/board/zte/zx297520v3/zx297520v3_ufi_mini.c
@@ -0,0 +1,632 @@
+/*********************************************************************
+ Copyright 2016 by	ZIXC Corporation.
+*
+* FileName::	zx297520.c
+* File Mark:
+* Description:
+* Others:
+* Version:	 v1.0
+* Author:	zhouqi
+* Date:	  2014-1-15
+
+* History 1:
+*	  Date:
+*	  Version:
+*	  Author:
+*	  Modification:
+* History 2:
+**********************************************************************/
+
+#include <common.h>
+#include <errno.h>
+#include <nand.h>
+#include <asm/arch/nand.h>
+#include <asm/arch/hardware.h>
+#include <asm/arch/uart.h>
+#include <asm/arch/lsp_crpm.h>
+#include <power.h>
+#include <partition_table.h>
+
+#include <mmc.h>
+#include <dwmmc.h>
+#include <boot_mode.h>
+#include <load_image.h>
+#include <zx234290.h>
+#include <charge.h>
+//#include <led.h>
+#include <lcd.h>
+#include <peripheral.h>
+#include "board.h"
+
+#include <drvs_gpio.h>
+
+#include <asm/arch/gmac.h>
+#include <command.h>
+#include <version.h>
+#include <secure_verify.h>
+#include <asm/arch/efuse.h>
+
+#include "cmd_downver.h"
+#include <../drivers/dma/zx29_dma.h>
+
+#include <watchdog.h>
+#include <linux/mtd/partitions.h>
+
+
+#define RET_BOOT_READY		1
+
+DECLARE_GLOBAL_DATA_PTR;
+
+#if	TIME_DEBUG
+#define time_debug_reset(fmt)	fmt = get_timer(0)
+#define time_debug_printf(fmt, val)	printf(fmt ,get_timer(val))
+#else
+#define time_debug_reset(fmt)
+#define time_debug_printf(fmt, val)
+#endif	/* TIME_DEBUG */
+
+typedef struct {
+	int 	(*Init)(void);
+	char	func_name[20];
+}sys_init_func_t;
+
+extern boot_reason_t g_boot_reason;
+extern uint32_t g_gmac_init_flag;
+extern uint32_t g_gmac_init_overtime;
+extern unsigned char g_ddr_size_flag;
+
+unsigned int g_uiDebugLevel = UBOOT_NOTICE;
+unsigned int g_sys_kernel_sdram_size = CONFIG_SYS_SDRAM32_A9_SIZE;
+
+
+#ifndef CFG_TEMP_ADDR
+#define CFG_TEMP_ADDR	0x22000000
+#endif
+
+#define reg32(addr)			(*(volatile unsigned long *)(addr))
+
+#define UDELAY_PARAM_1SEC	(100000/3)
+
+/* DebugLevel - Controlled at compile time
+ * UBOOT_ERR	-> Noncritical error conditions.
+ * UBOOT_WARN	-> Warning conditions that should be taken care of.
+ * UBOOT_NOTICE -> Normal, but significant events.
+ * UBOOT_DBG	-> Informational messages that require no action.
+ * UBOOT_INFO	-> Debugging messages, output if the developer enabled debugging.
+ */
+//unsigned int g_uiDebugLevel = UBOOT_NOTICE;
+extern int copy_ddr_allbin(void);
+
+/*******************************************************************************
+ * Function:	board_init
+ * Description:
+ * Parameters:
+ *	 Input:
+ *
+ *	 Output:
+ *
+ * Returns:
+ *
+ *
+ * Others:
+ ********************************************************************************/
+int board_init(void)
+{
+	return 0;
+}
+
+/*******************************************************************************
+ * Function:	dram_init_banksize
+ * Description:
+ * Parameters:
+ *	 Input:
+ *
+ *	 Output:
+ *
+ * Returns:
+ *
+ *
+ * Others:
+ ********************************************************************************/
+void dram_init_banksize(void)
+{
+	gd->bd->bi_dram[0].start = PHYS_SDRAM_1;
+	gd->bd->bi_dram[0].size = PHYS_SDRAM_1_SIZE;
+}
+
+/*******************************************************************************
+ * Function:	dram_init
+ * Description:
+ * Parameters:
+ *	 Input:
+ *
+ *	 Output:
+ *
+ * Returns:
+ *
+ *
+ * Others:
+ ********************************************************************************/
+int dram_init(void)
+{
+	gd->ram_size = get_ram_size((long *)CONFIG_SYS_SDRAM_BASE,
+				PHYS_SDRAM_1_SIZE);
+
+	return 0;
+}
+
+/*******************************************************************************
+ * Function:	checkboard
+ * Description:
+ * Parameters:
+ *	 Input:
+ *
+ *	 Output:
+ *
+ * Returns:
+ *
+ *
+ * Others:
+ ********************************************************************************/
+int checkboard(void)
+{
+#ifdef CONFIG_DISPLAY_BOARDINFO
+	printf("Board: ZX297520V3\n");
+#endif
+
+	return 0;
+}
+
+void clear_iram(uint32_t addr, uint32_t len)
+{
+	uint32_t i = 0;
+	for(i = addr; i < addr + len; i+=4)
+	{
+		writel(0x0, i);
+	}
+}
+
+void clear_tmp_buf(void)
+{
+	clear_iram(CONFIG_SYS_SDRAM_TEMP_BASE, 0x800);
+}
+
+void set_sim_power(void)
+{
+    zDrvGpio_PullUpDown(GPIO49, GPIO_PULL_UP);
+    zDrvGpio_SetFunc(GPIO49,GPIO49_GPIO49);
+    zDrvGpio_SetDirection(GPIO49,GPIO_IN);
+
+    zDrvGpio_PullUpDown(GPIO35, 0);
+    zDrvGpio_SetFunc(GPIO35,GPIO35_GPIO35);
+    zDrvGpio_SetDirection(GPIO35, GPIO_OUT);
+
+    if (read_sim_flag())
+    {
+	    zDrvGpio_SetOutputValue(GPIO35,GPIO_HIGH);
+    }
+    else
+    {
+	    zDrvGpio_SetOutputValue(GPIO35, GPIO_LOW);
+    }
+}
+
+/*
+ * EC: 616000510470
+ */
+static int mdl_poweron(void)
+{
+	pmu_pull_on_ps_hold();
+
+    zDrvGpio_PullUpDown(GPIO119, 0);
+    zDrvGpio_SetFunc(GPIO119,GPIO119_GPIO119);
+    zDrvGpio_SetDirection(GPIO119,GPIO_OUT);
+    zDrvGpio_SetOutputValue(GPIO119,GPIO_LOW);
+
+    zDrvGpio_PullUpDown(GPIO120, 0);
+    //gpio_set_reuse(PS_HOLD_PIN, 0);
+    zDrvGpio_SetFunc(GPIO120,GPIO120_GPIO120);
+    zDrvGpio_SetDirection(GPIO120,GPIO_OUT);
+    zDrvGpio_SetOutputValue(GPIO120,GPIO_LOW);
+
+	
+    zDrvGpio_PullUpDown(GPIO27, 0);
+    zDrvGpio_SetFunc(GPIO27,GPIO27_GPIO27);
+    zDrvGpio_SetDirection(GPIO27,GPIO_OUT);
+    zDrvGpio_SetOutputValue(GPIO27,GPIO_LOW);
+
+    //you.chen@20250708 temp support switch card by Analog Switch IC -- begin
+    //zDrvGpio_PullUpDown(GPIO49, GPIO_PULL_UP);
+    //zDrvGpio_SetFunc(GPIO49,GPIO49_GPIO49);
+    //zDrvGpio_SetDirection(GPIO49,GPIO_IN);
+
+    //zDrvGpio_PullUpDown(GPIO35, 0);
+    //zDrvGpio_SetFunc(GPIO35,GPIO35_GPIO35);
+    //zDrvGpio_SetDirection(GPIO35, GPIO_OUT);
+
+    //if (read_sim_flag())
+    //{
+	    //zDrvGpio_SetOutputValue(GPIO35,GPIO_HIGH);
+    //}
+    //else
+    //{
+	    //zDrvGpio_SetOutputValue(GPIO35, GPIO_LOW);
+    //}
+    //you.chen@20250708 temp support switch card by Analog Switch IC -- end
+
+    zDrvGpio_PullUpDown(GPIO52, GPIO_PULL_DOWN);
+    zDrvGpio_SetFunc(GPIO52,GPIO52_GPIO52);
+    zDrvGpio_SetDirection(GPIO52,GPIO_IN);
+
+    zDrvGpio_PullUpDown(GPIO125, GPIO_PULL_DOWN);
+    zDrvGpio_SetFunc(GPIO125,GPIO125_GPIO125);
+    zDrvGpio_SetDirection(GPIO125,GPIO_IN);
+
+    zDrvGpio_PullUpDown(GPIO36, 0);
+    zDrvGpio_SetFunc(GPIO36,GPIO36_GPIO36);
+    zDrvGpio_SetDirection(GPIO36, GPIO_OUT);
+    if (GPIO_HIGH == zDrvGpio_GetInputValue(GPIO125))
+    {
+	    zDrvGpio_SetOutputValue(GPIO36,GPIO_HIGH);
+    }
+    else
+    {
+	    zDrvGpio_SetOutputValue(GPIO36, GPIO_LOW);
+    }
+
+    zDrvGpio_PullUpDown(GPIO121, 0);
+    zDrvGpio_SetFunc(GPIO121,GPIO121_GPIO121);
+    zDrvGpio_SetDirection(GPIO121,GPIO_OUT);
+    zDrvGpio_SetOutputValue(GPIO121,GPIO_HIGH);
+	return 0;
+}
+
+static int gmac_download_init(void)
+{
+	int ret = 0;
+
+	get_gmac_init_flag();
+	BOOT_PRINTF(UBOOT_DBG, "get_gmac_init_flag = 0x%x, read_gmac_init_flag = 0x%x.\n", get_gmac_init_flag(), read_gmac_init_flag());
+	if(1 == read_gmac_init_flag())
+	{
+		BOOT_PRINTF(UBOOT_NOTICE, "gmac init overtime[%ds].....$$$$$$$$$$$$$$\n", read_gmac_init_overtime());
+
+		puts("Net:	");
+		eth_initialize(gd->bd);
+
+		if (run_command ("downver allbins", 0) >= 0)
+		{
+			ret = copy_ddr_allbin();
+			if(ret != 0)
+			{
+				BOOT_PRINTF(UBOOT_ERR, "net load write from ddr to nand FAILED !!!\n");
+			}
+		}
+		else
+		{
+			BOOT_PRINTF(UBOOT_ERR, "run_command downver allbins FAILED !!!\n");
+		}
+	}
+
+	return 0;
+}
+
+static int test_env_entry(void)
+{
+	/* Ó²¼þ²âÊÔ */
+#if CONFIG_HARDWARE_TEST
+	hardware_test();
+#endif
+
+#if CONFIG_MUTUAL_DEBUG	//ÖÃ1Ö®ºó¾Í¿ÉÒÔ½øÈëUBoot¿ØÖÆÌ¨ÃüÁîÐÐ
+	for (;;)
+	{
+		main_loop();
+	}
+#endif
+
+	return 0;
+}
+
+static int boot_reason_init(void)
+{
+	int ret = 0;
+	unsigned int amt_flag = 0;
+	unsigned int key_times = 0;
+	unsigned int *poweron_type = (unsigned int *)POWERON_TYPE_ADDR;	 //ÁÙʱʹÓÃ
+
+	BOOT_PRINTF(UBOOT_DBG, "Normal mode.\n");
+
+	amt_flag = readl(POWERON_TYPE_ADDR);
+	BOOT_PRINTF(UBOOT_NOTICE, "VALUE = 0x%x!\n", amt_flag);
+	if(amt_flag == AMT_MODE_FLAG)
+	{
+		BOOT_PRINTF(UBOOT_NOTICE, "AMT VALUE = AMT_MODE_FLAG!\n");
+		g_boot_reason = RB_AMT;
+	}
+	else
+	{
+		ret = get_boot_reason();
+		if(ret != 0)
+		{
+			BOOT_PRINTF(UBOOT_ERR, "get boot reason ERROR !!!\n");
+			/* TBD: Error Return. */
+		}
+	}
+
+	if(read_fota_update_flag() == FOTA_RECOVERY)
+	{
+		*poweron_type = POWER_ON_FOTA;
+	}
+	else if(read_fota_update_flag() == FOTA_LOCALUPDATE)
+	{
+		*poweron_type = POWER_ON_LOCALUPDATE;
+	}
+	else if(g_boot_reason == RB_AMT)
+	{
+		*poweron_type = POWER_ON_AMT;
+	}
+	else if(g_boot_reason == RB_PRODUCTION)
+	{
+		*poweron_type = POWER_ON_PRODUCTION;
+	}
+	else if((g_boot_reason & 0xF0) == ZX234290_WDT_RST_FLAG)
+	{
+		*poweron_type = g_boot_reason & 0x0F;
+	}
+	else if(g_boot_reason == RB_RESET_NOMAL)
+	{
+		*poweron_type = POWER_ON_NORMAL;
+	}
+	else if(g_boot_reason == RB_RTC)
+	{
+		*poweron_type = POWER_ON_RTC; //POWER_ON_NORMAL;
+	}
+	else if(g_boot_reason == RB_RESET_EXCEPT)
+	{
+		*poweron_type = POWER_ON_EXCEPTRESET;
+	}
+	else if(g_boot_reason == RB_POWER_BOOST_IN)
+	{
+		*poweron_type = POWER_ON_BOOST_IN;
+	}
+	else if(g_boot_reason == RB_RESET_ALARM)
+	{
+		*poweron_type = POWER_ON_NORMAL;
+	}
+	else
+	{
+		*poweron_type = POWER_ON_NORMAL;
+	}
+	BOOT_PRINTF(UBOOT_NOTICE, "poweron_type=0x%x.\n", *poweron_type);
+	zx234290_write_flag(ZX234290_WDT_RST_FLAG | *poweron_type);
+
+	return 0;
+}
+
+static int boot_prepare(void)
+{
+
+#if 1
+	zx234290_set_softon(1);
+#else
+	zx234290_set_softon(0);
+	pmu_pull_off_ps_hold();
+#endif
+
+	return 0;
+}
+
+static int boot_entry(void)
+{
+	int ret = 0;
+	unsigned int poweron_type = reg32(POWERON_TYPE_ADDR);	 //ÁÙʱʹÓÃ
+
+	g_ddr_size_flag = CHIP_DDR_IS_32M;
+
+	switch (poweron_type) {
+
+	case POWER_ON_LOCALUPDATE:
+		break;
+	case POWER_ON_FOTA:
+		BOOT_PRINTF(UBOOT_NOTICE, "Fota entry!\n");
+		if(g_ddr_size_flag == CHIP_DDR_IS_32M)
+		{
+			g_sys_kernel_sdram_size = CONFIG_SYS_SDRAM32_RECOVERY_A9_SIZE;
+		}
+		else if(g_ddr_size_flag == CHIP_DDR_IS_64M)
+		{
+			g_sys_kernel_sdram_size = CONFIG_SYS_SDRAM64_RECOVERY_A9_SIZE;
+		}
+		else if(g_ddr_size_flag == CHIP_DDR_IS_128M)
+		{
+			g_sys_kernel_sdram_size = CONFIG_SYS_SDRAM128_RECOVERY_A9_SIZE;
+		}		
+		else
+		{
+			g_sys_kernel_sdram_size = CONFIG_SYS_SDRAM256_RECOVERY_A9_SIZE;
+		}
+		
+		ret = fs_load_arm_image_linux(ARM_RECOVERY_USERDATA_IMAGE);	/*FOTA-UPDATE*/
+		break;
+	default:
+		BOOT_PRINTF(UBOOT_NOTICE, "Normal entry!\n");
+		if(g_ddr_size_flag == CHIP_DDR_IS_32M)
+		{
+			g_sys_kernel_sdram_size = CONFIG_SYS_SDRAM32_A9_SIZE;
+		}
+		else if(g_ddr_size_flag == CHIP_DDR_IS_64M)
+
+		{
+			g_sys_kernel_sdram_size = CONFIG_SYS_SDRAM64_A9_SIZE;
+		}
+		else if(g_ddr_size_flag == CHIP_DDR_IS_128M)
+		{
+			g_sys_kernel_sdram_size = CONFIG_SYS_SDRAM128_A9_SIZE;
+		}
+		else
+		{
+			g_sys_kernel_sdram_size = CONFIG_SYS_SDRAM256_A9_SIZE;
+		}
+		ret = fs_load_m0_image();
+		ret += fs_load_zsp_image();
+		ret += fs_load_arm_image_linux(ARM_APP_IMAGE);
+		break;
+	}
+
+#if VERSION_RELEASE
+	if( ret != 0 )
+	{
+		BOOT_PRINTF(UBOOT_ERR, "load images ERROR !!!\n");
+	}
+#endif
+
+	return 0;
+}
+
+static const sys_init_func_t uboot_init_func_tbl[] =
+{
+	{mdl_poweron,			"pull on pshold"},
+	{wdt_get_reboot_reason,	"wdt_reboot"},
+	{dma_init,				"dma"},
+	{i2c_init,				"i2c"},
+	{peripheral_init,		"peri"},
+	{nand_init,				"nand"},
+	{partition_init,		"partition"},	
+	{gmac_download_init,	"gmac"},
+	{test_env_entry,		"test"},
+	{efuse_init,			"efuse"},
+	{nvrw_flag_init,		"nvrw_flag"},
+	{boot_reason_init,		"boot_reason"},
+	{wdt_init,				"wdt"},
+	{boot_prepare,			"boot_prepare"},
+	{NULL,					{}}
+};
+
+static const sys_init_func_t tboot_init_func_tbl[] =
+{
+	{wdt_get_reboot_reason,	"wdt_reboot"},
+	{dma_init,				"dma"},
+	{i2c_init,				"i2c"},
+	{peripheral_init,		"peri"},
+	{nand_init,				"nand"},
+	{NULL,					{}}
+};
+
+int uboot_init_func(void)
+{
+	unsigned int dev_index;
+	int ret;
+
+	BOOT_PRINTF(UBOOT_NOTICE, "go into uboot init func\n");
+
+	for (dev_index = 0; (uboot_init_func_tbl[dev_index].Init != NULL); dev_index++)
+	{
+		ret = uboot_init_func_tbl[dev_index].Init();
+
+		if (ret < 0) {
+			BOOT_PRINTF(UBOOT_ERR, "uboot init %s fail, ret = %d\n",
+				uboot_init_func_tbl[dev_index].func_name, ret);
+			BUG();
+			return ret;
+		} else {
+			BOOT_PRINTF(UBOOT_NOTICE, "uboot init %s success\n",
+				uboot_init_func_tbl[dev_index].func_name);
+		}
+	}
+
+	return SUCCESS;
+}
+
+int tboot_init_func(void)
+{
+	unsigned int dev_index;
+	int ret;
+
+	BOOT_PRINTF(UBOOT_NOTICE, "go into tboot init func\n");
+
+	for (dev_index = 0; (tboot_init_func_tbl[dev_index].Init != NULL); dev_index++)
+	{
+		ret = tboot_init_func_tbl[dev_index].Init();
+		if (ret < 0) {
+			BOOT_PRINTF(UBOOT_ERR, "tboot init %s fail, ret = %d\n",
+				tboot_init_func_tbl[dev_index].func_name, ret);
+			BUG();
+			return ret;
+		} else {
+			BOOT_PRINTF(UBOOT_NOTICE, "tboot init %s success\n",
+				tboot_init_func_tbl[dev_index].func_name);
+		}
+	}
+
+	return SUCCESS;
+}
+
+#if defined(CONFIG_I2S0_TO_32K)
+void i2s_to_32k(void)
+{
+	REG32(LSP_CRPM_BASE + 0x58) = 0x01000075;
+	REG32(LSP_CRPM_BASE + 0x5C) = 0x00010319;
+	REG32(PIN_MUX_CTRL_PD_BASE) &= ~(0x3 << 15);
+	REG32(PIN_MUX_CTRL_PD_BASE) |= (0x1 << 15);
+	REG32(PAD_CTRL_AO_BASE + 0x30) |= (0x1);
+}
+#endif
+
+#if defined(CONFIG_I2S1_TO_32K)	
+void i2s_to_32k(void)
+{
+	REG32(LSP_CRPM_BASE + 0x60) = 0x01000075;
+	REG32(LSP_CRPM_BASE + 0x64) = 0x00010319;
+	REG32(PIN_MUX_CTRL_PD_BASE) &= ~(0x3 << 15);
+	REG32(PIN_MUX_CTRL_PD_BASE) |= (0x2 << 15);
+	REG32(PAD_CTRL_AO_BASE + 0x30) |= (0x1);
+}
+#endif
+
+/*******************************************************************************
+ * Function:	sys_entry
+ * Description: ϵͳÖ÷Á÷³Ì
+ * Parameters:
+ *	 Input:
+ *
+ *	 Output:
+ *
+ * Returns:
+ *
+ *
+ * Others:
+ ********************************************************************************/
+void sys_entry(void)
+{
+
+	BOOT_PRINTF(UBOOT_NOTICE, "sys_entry ...\n");
+
+#if defined(CONFIG_I2S0_TO_32K) || defined(CONFIG_I2S1_TO_32K)
+		i2s_to_32k();
+#endif	
+
+	switch (get_load_mode()) {
+	case TLOAD_MODE:
+		tboot_init_func();
+		run_command("downloader", 0);
+		break;
+	case ZLOAD_MODE:
+		uboot_init_func();
+		boot_entry();
+		//clear_tmp_buf();
+		break;
+	default:
+		break;
+	}
+
+	add_partition_to_bootargs();
+	for (;;)
+	{
+		main_loop();
+	}
+
+	hang();
+	/* NOTREACHED - no way out of command loop except booting */
+}
+