add prj_mifi_min_aic8800dw
Change-Id: I8dfb5282d9f51358e08bb1e4f90ca912c9d15295
diff --git a/Makefile b/Makefile
index 8f1db97..ad1926a 100644
--- a/Makefile
+++ b/Makefile
@@ -3,7 +3,7 @@
PACK_PRJ ?= prj_cpe
RF_TYPE ?= 230A
DCXO ?= yes
-PRJ_PATH ?= lynq/CPE
+PATH_PRJ ?= lynq/CPE
.PHONY:all
all:copy boot ap pack
@@ -22,10 +22,11 @@
make -C ap/project/zx297520v3/$(AP_PRJ)/build/ normal2 RF_TYPE=$(RF_TYPE) DCXO=$(DCXO)
.PHONY:copy
copy:
- cp -rf $(PRJ_PATH)/* .
+ cp -rf $(PATH_PRJ)/* .
.PHONY:help
help:
- @echo example : make or make AP_PRJ=prj_cpe_min BOOT_PRJ=ufi_mini.
+ @echo example prj_cpe_min : make or make AP_PRJ=prj_cpe_min BOOT_PRJ=ufi_mini PACK_PRJ=prj_cpe PATH_PRJ=lynq/CPE
+ @echo example prj_mifi_min_aic8800dw : make AP_PRJ=prj_mifi_min_aic8800dw BOOT_PRJ=mifi_mini_64 PATH_PRJ=lynq/MIFI/ PACK_PRJ=prj_mifi
@echo The default value of AP_PRJ is prj_cpe_min. The following values are optional :
@ls ap/project/zx297520v3/*/ -d | xargs -I {} basename "{}" | tr '\n' ' '
@echo
@@ -33,4 +34,12 @@
@echo The default value of BOOT_PRJ is ufi_mini. The following values are optional :
@ls boot/prj/zx297520v3/*/ -d | xargs -I {} basename "{}" | tr '\n' ' '
@echo
+ @echo
+ @echo The default value of PACK_PRJ is prj_cpe. The following values are optional :
+ @ls allbins/zx297520v3/*/ -d | xargs -I {} basename "{}" | tr '\n' ' '
+ @echo
+ @echo
+ @echo The default value of PATH_PRJ is lynq/CPE. The following values are optional :
+ @ls lynq/*/ -d | tr '\n' ' '
+ @echo
diff --git a/allbins/zx297520v3/prj_mifi/scripts_linux/AllInOneImage.ini b/allbins/zx297520v3/prj_mifi/scripts_linux/AllInOneImage.ini
new file mode 100755
index 0000000..cc4e2c3
--- /dev/null
+++ b/allbins/zx297520v3/prj_mifi/scripts_linux/AllInOneImage.ini
@@ -0,0 +1,29 @@
+[GeneralSetting]
+;0:NorFlash; 1:NandFlash; 2:emmc; 3:sata
+storage_type=1
+is_nv_coalition=1
+TLoaderAddr=0x80000
+
+[Output]
+FilePath=7520V3SC_MIFI.bin
+
+[TLoader]
+FilePath=../allbins/tloader.bin
+
+[TBoot]
+FilePath=../allbins/tboot.bin
+
+[Partition]
+FilePath=../allbins/partition.bin
+
+[ProductInfo]
+FilePath=../allbins/product.ini
+
+[Image]
+../allbins/ap_imagefs.img
+../allbins/ap_resource.img
+../allbins/ap_userdata.img
+../allbins/ap_rootfs.img
+../allbins/uboot.bin
+../allbins/uboot-mirr.bin
+../allbins/zloader.bin
diff --git a/allbins/zx297520v3/prj_mifi/scripts_linux/AllInOneImage_f231.ini b/allbins/zx297520v3/prj_mifi/scripts_linux/AllInOneImage_f231.ini
new file mode 100755
index 0000000..20a1922
--- /dev/null
+++ b/allbins/zx297520v3/prj_mifi/scripts_linux/AllInOneImage_f231.ini
@@ -0,0 +1,29 @@
+[GeneralSetting]
+;0:NorFlash; 1:NandFlash; 2:emmc; 3:sata
+storage_type=1
+is_nv_coalition=1
+TLoaderAddr=0x80000
+
+[Output]
+FilePath=7520V3SC_MIFI_F231.bin
+
+[TLoader]
+FilePath=../allbins_f231/tloader.bin
+
+[TBoot]
+FilePath=../allbins_f231/tboot.bin
+
+[Partition]
+FilePath=../allbins_f231/partition.bin
+
+[ProductInfo]
+FilePath=../allbins_f231/product.ini
+
+[Image]
+../allbins_f231/ap_imagefs.img
+../allbins_f231/ap_resource.img
+../allbins_f231/ap_userdata.img
+../allbins_f231/ap_rootfs.img
+../allbins_f231/uboot.bin
+../allbins_f231/uboot-mirr.bin
+../allbins_f231/zloader.bin
diff --git a/allbins/zx297520v3/prj_mifi/scripts_linux/AllInOneImage_min.ini b/allbins/zx297520v3/prj_mifi/scripts_linux/AllInOneImage_min.ini
new file mode 100755
index 0000000..7d7aa64
--- /dev/null
+++ b/allbins/zx297520v3/prj_mifi/scripts_linux/AllInOneImage_min.ini
@@ -0,0 +1,29 @@
+[GeneralSetting]
+;0:NorFlash; 1:NandFlash; 2:emmc; 3:sata
+storage_type=1
+is_nv_coalition=1
+TLoaderAddr=0x80000
+
+[Output]
+FilePath=7520V3SC_MIFI_min.bin
+
+[TLoader]
+FilePath=../allbins_min/tloader.bin
+
+[TBoot]
+FilePath=../allbins_min/tboot.bin
+
+[Partition]
+FilePath=../allbins_min/partition.bin
+
+[ProductInfo]
+FilePath=../allbins_min/product.ini
+
+[Image]
+../allbins_min/ap_imagefs.img
+;../allbins_min/ap_resource.img
+../allbins_min/ap_userdata.img
+../allbins_min/ap_rootfs.img
+../allbins_min/uboot.bin
+;../allbins_min/uboot-mirr.bin
+../allbins_min/zloader.bin
diff --git a/allbins/zx297520v3/prj_mifi/scripts_linux/AllInOneImage_min_aic8800dw_dcxo.ini b/allbins/zx297520v3/prj_mifi/scripts_linux/AllInOneImage_min_aic8800dw_dcxo.ini
new file mode 100755
index 0000000..88bdcca
--- /dev/null
+++ b/allbins/zx297520v3/prj_mifi/scripts_linux/AllInOneImage_min_aic8800dw_dcxo.ini
@@ -0,0 +1,29 @@
+[GeneralSetting]
+;0:NorFlash; 1:NandFlash; 2:emmc; 3:sata
+storage_type=1
+is_nv_coalition=1
+TLoaderAddr=0x80000
+
+[Output]
+FilePath=7520V3SC_MIFI_min_aic8800dw_dcxo.bin
+
+[TLoader]
+FilePath=../allbins_min_aic8800dw_dcxo/tloader.bin
+
+[TBoot]
+FilePath=../allbins_min_aic8800dw_dcxo/tboot.bin
+
+[Partition]
+FilePath=../allbins_min_aic8800dw_dcxo/partition.bin
+
+[ProductInfo]
+FilePath=../allbins_min_aic8800dw_dcxo/product.ini
+
+[Image]
+../allbins_min_aic8800dw_dcxo/ap_imagefs.img
+../allbins_min_aic8800dw_dcxo/ap_resource.img
+../allbins_min_aic8800dw_dcxo/ap_userdata.img
+../allbins_min_aic8800dw_dcxo/ap_rootfs.img
+../allbins_min_aic8800dw_dcxo/uboot.bin
+../allbins_min_aic8800dw_dcxo/uboot-mirr.bin
+../allbins_min_aic8800dw_dcxo/zloader.bin
diff --git a/allbins/zx297520v3/prj_mifi/scripts_linux/AllInOneImage_min_sv6158_dcxo.ini b/allbins/zx297520v3/prj_mifi/scripts_linux/AllInOneImage_min_sv6158_dcxo.ini
new file mode 100755
index 0000000..c97590f
--- /dev/null
+++ b/allbins/zx297520v3/prj_mifi/scripts_linux/AllInOneImage_min_sv6158_dcxo.ini
@@ -0,0 +1,29 @@
+[GeneralSetting]
+;0:NorFlash; 1:NandFlash; 2:emmc; 3:sata
+storage_type=1
+is_nv_coalition=1
+TLoaderAddr=0x80000
+
+[Output]
+FilePath=7520V3SC_MIFI_min_sv6158_dcxo.bin
+
+[TLoader]
+FilePath=../allbins_min_sv6158_dcxo/tloader.bin
+
+[TBoot]
+FilePath=../allbins_min_sv6158_dcxo/tboot.bin
+
+[Partition]
+FilePath=../allbins_min_sv6158_dcxo/partition.bin
+
+[ProductInfo]
+FilePath=../allbins_min_sv6158_dcxo/product.ini
+
+[Image]
+../allbins_min_sv6158_dcxo/ap_imagefs.img
+;../allbins_min_sv6158_dcxo/ap_resource.img
+../allbins_min_sv6158_dcxo/ap_userdata.img
+../allbins_min_sv6158_dcxo/ap_rootfs.img
+../allbins_min_sv6158_dcxo/uboot.bin
+;../allbins_min_sv6158_dcxo/uboot-mirr.bin
+../allbins_min_sv6158_dcxo/zloader.bin
diff --git a/allbins/zx297520v3/prj_mifi/scripts_linux/AllInOneImage_min_xr819.ini b/allbins/zx297520v3/prj_mifi/scripts_linux/AllInOneImage_min_xr819.ini
new file mode 100755
index 0000000..4fb47e1
--- /dev/null
+++ b/allbins/zx297520v3/prj_mifi/scripts_linux/AllInOneImage_min_xr819.ini
@@ -0,0 +1,29 @@
+[GeneralSetting]
+;0:NorFlash; 1:NandFlash; 2:emmc; 3:sata
+storage_type=1
+is_nv_coalition=1
+TLoaderAddr=0x80000
+
+[Output]
+FilePath=7520V3SC_MIFI_min_xr819.bin
+
+[TLoader]
+FilePath=../allbins_min_xr819/tloader.bin
+
+[TBoot]
+FilePath=../allbins_min_xr819/tboot.bin
+
+[Partition]
+FilePath=../allbins_min_xr819/partition.bin
+
+[ProductInfo]
+FilePath=../allbins_min_xr819/product.ini
+
+[Image]
+../allbins_min_xr819/ap_imagefs.img
+;../allbins_min_xr819/ap_resource.img
+../allbins_min_xr819/ap_userdata.img
+../allbins_min_xr819/ap_rootfs.img
+../allbins_min_xr819/uboot.bin
+;../allbins_min_xr819/uboot-mirr.bin
+../allbins_min_xr819/zloader.bin
diff --git a/allbins/zx297520v3/prj_mifi/scripts_linux/AllInOneImage_min_xr819_dcxo.ini b/allbins/zx297520v3/prj_mifi/scripts_linux/AllInOneImage_min_xr819_dcxo.ini
new file mode 100755
index 0000000..9ebe110
--- /dev/null
+++ b/allbins/zx297520v3/prj_mifi/scripts_linux/AllInOneImage_min_xr819_dcxo.ini
@@ -0,0 +1,29 @@
+[GeneralSetting]
+;0:NorFlash; 1:NandFlash; 2:emmc; 3:sata
+storage_type=1
+is_nv_coalition=1
+TLoaderAddr=0x80000
+
+[Output]
+FilePath=7520V3SC_MIFI_min_xr819_dcxo.bin
+
+[TLoader]
+FilePath=../allbins_min_xr819_dcxo/tloader.bin
+
+[TBoot]
+FilePath=../allbins_min_xr819_dcxo/tboot.bin
+
+[Partition]
+FilePath=../allbins_min_xr819_dcxo/partition.bin
+
+[ProductInfo]
+FilePath=../allbins_min_xr819_dcxo/product.ini
+
+[Image]
+../allbins_min_xr819_dcxo/ap_imagefs.img
+;../allbins_min_xr819_dcxo/ap_resource.img
+../allbins_min_xr819_dcxo/ap_userdata.img
+../allbins_min_xr819_dcxo/ap_rootfs.img
+../allbins_min_xr819_dcxo/uboot.bin
+;../allbins_min_xr819_dcxo/uboot-mirr.bin
+../allbins_min_xr819_dcxo/zloader.bin
diff --git a/allbins/zx297520v3/prj_mifi/scripts_linux/FsImage.ini b/allbins/zx297520v3/prj_mifi/scripts_linux/FsImage.ini
new file mode 100755
index 0000000..0c7b2db
--- /dev/null
+++ b/allbins/zx297520v3/prj_mifi/scripts_linux/FsImage.ini
@@ -0,0 +1,20 @@
+
+;NV合并
+[FS]
+Count=1
+fs0=../allbins/ap_imagefs.img
+fs1=../allbins/ap_nvrofs.img
+
+
+[fs0]
+../allbins/ap_cpuap.bin
+../allbins/ap_recovery.bin
+../allbins/evb_cpuphy.bin
+../allbins/evb_cpurpm.img
+../allbins/nvrwall.bin
+../allbins/nvrwoall.bin
+
+[fs1]
+
+../allbins/nvroall.bin
+../allbins/nvrowall.bin
diff --git a/allbins/zx297520v3/prj_mifi/scripts_linux/FsImage_f231.ini b/allbins/zx297520v3/prj_mifi/scripts_linux/FsImage_f231.ini
new file mode 100755
index 0000000..6f25382
--- /dev/null
+++ b/allbins/zx297520v3/prj_mifi/scripts_linux/FsImage_f231.ini
@@ -0,0 +1,20 @@
+
+;NV合并
+[FS]
+Count=1
+fs0=../allbins_f231/ap_imagefs.img
+fs1=../allbins_f231/ap_nvrofs.img
+
+
+[fs0]
+../allbins_f231/ap_cpuap.bin
+../allbins_f231/ap_recovery.bin
+../allbins_f231/evb_cpuphy.bin
+../allbins_f231/evb_cpurpm.img
+../allbins_f231/nvrwall.bin
+../allbins_f231/nvrwoall.bin
+
+[fs1]
+
+../allbins_f231/nvroall.bin
+../allbins_f231/nvrowall.bin
diff --git a/allbins/zx297520v3/prj_mifi/scripts_linux/FsImage_min.ini b/allbins/zx297520v3/prj_mifi/scripts_linux/FsImage_min.ini
new file mode 100755
index 0000000..0093f6b
--- /dev/null
+++ b/allbins/zx297520v3/prj_mifi/scripts_linux/FsImage_min.ini
@@ -0,0 +1,20 @@
+
+;NV合并
+[FS]
+Count=1
+fs0=../allbins_min/ap_imagefs.img
+fs1=../allbins_min/ap_nvrofs.img
+
+
+[fs0]
+../allbins_min/ap_cpuap.bin
+../allbins_min/ap_recovery.bin
+../allbins_min/evb_cpuphy.bin
+../allbins_min/evb_cpurpm.img
+../allbins_min/nvrwall.bin
+../allbins_min/nvrwoall.bin
+
+[fs1]
+
+../allbins_min/nvroall.bin
+../allbins_min/nvrowall.bin
diff --git a/allbins/zx297520v3/prj_mifi/scripts_linux/FsImage_min_aic8800dw_dcxo.ini b/allbins/zx297520v3/prj_mifi/scripts_linux/FsImage_min_aic8800dw_dcxo.ini
new file mode 100755
index 0000000..c28dad4
--- /dev/null
+++ b/allbins/zx297520v3/prj_mifi/scripts_linux/FsImage_min_aic8800dw_dcxo.ini
@@ -0,0 +1,20 @@
+
+;NV合并
+[FS]
+Count=1
+fs0=../allbins_min_aic8800dw_dcxo/ap_imagefs.img
+fs1=../allbins_min_aic8800dw_dcxo/ap_nvrofs.img
+
+
+[fs0]
+../allbins_min_aic8800dw_dcxo/ap_cpuap.bin
+../allbins_min_aic8800dw_dcxo/ap_recovery.bin
+../allbins_min_aic8800dw_dcxo/evb_cpuphy.bin
+../allbins_min_aic8800dw_dcxo/evb_cpurpm.img
+../allbins_min_aic8800dw_dcxo/nvrwall.bin
+../allbins_min_aic8800dw_dcxo/nvrwoall.bin
+
+[fs1]
+
+../allbins_min_aic8800dw_dcxo/nvroall.bin
+../allbins_min_aic8800dw_dcxo/nvrowall.bin
diff --git a/allbins/zx297520v3/prj_mifi/scripts_linux/FsImage_min_sv6158_dcxo.ini b/allbins/zx297520v3/prj_mifi/scripts_linux/FsImage_min_sv6158_dcxo.ini
new file mode 100755
index 0000000..631ce78
--- /dev/null
+++ b/allbins/zx297520v3/prj_mifi/scripts_linux/FsImage_min_sv6158_dcxo.ini
@@ -0,0 +1,20 @@
+
+;NV合并
+[FS]
+Count=1
+fs0=../allbins_min_sv6158_dcxo/ap_imagefs.img
+fs1=../allbins_min_sv6158_dcxo/ap_nvrofs.img
+
+
+[fs0]
+../allbins_min_sv6158_dcxo/ap_cpuap.bin
+../allbins_min_sv6158_dcxo/ap_recovery.bin
+../allbins_min_sv6158_dcxo/evb_cpuphy.bin
+../allbins_min_sv6158_dcxo/evb_cpurpm.img
+../allbins_min_sv6158_dcxo/nvrwall.bin
+../allbins_min_sv6158_dcxo/nvrwoall.bin
+
+[fs1]
+
+../allbins_min_sv6158_dcxo/nvroall.bin
+../allbins_min_sv6158_dcxo/nvrowall.bin
diff --git a/allbins/zx297520v3/prj_mifi/scripts_linux/FsImage_min_xr819.ini b/allbins/zx297520v3/prj_mifi/scripts_linux/FsImage_min_xr819.ini
new file mode 100755
index 0000000..6b01047
--- /dev/null
+++ b/allbins/zx297520v3/prj_mifi/scripts_linux/FsImage_min_xr819.ini
@@ -0,0 +1,20 @@
+
+;NV合并
+[FS]
+Count=1
+fs0=../allbins_min_xr819/ap_imagefs.img
+fs1=../allbins_min_xr819/ap_nvrofs.img
+
+
+[fs0]
+../allbins_min_xr819/ap_cpuap.bin
+../allbins_min_xr819/ap_recovery.bin
+../allbins_min_xr819/evb_cpuphy.bin
+../allbins_min_xr819/evb_cpurpm.img
+../allbins_min_xr819/nvrwall.bin
+../allbins_min_xr819/nvrwoall.bin
+
+[fs1]
+
+../allbins_min_xr819/nvroall.bin
+../allbins_min_xr819/nvrowall.bin
diff --git a/allbins/zx297520v3/prj_mifi/scripts_linux/FsImage_min_xr819_dcxo.ini b/allbins/zx297520v3/prj_mifi/scripts_linux/FsImage_min_xr819_dcxo.ini
new file mode 100755
index 0000000..bde0663
--- /dev/null
+++ b/allbins/zx297520v3/prj_mifi/scripts_linux/FsImage_min_xr819_dcxo.ini
@@ -0,0 +1,20 @@
+
+;NV合并
+[FS]
+Count=1
+fs0=../allbins_min_xr819_dcxo/ap_imagefs.img
+fs1=../allbins_min_xr819_dcxo/ap_nvrofs.img
+
+
+[fs0]
+../allbins_min_xr819_dcxo/ap_cpuap.bin
+../allbins_min_xr819_dcxo/ap_recovery.bin
+../allbins_min_xr819_dcxo/evb_cpuphy.bin
+../allbins_min_xr819_dcxo/evb_cpurpm.img
+../allbins_min_xr819_dcxo/nvrwall.bin
+../allbins_min_xr819_dcxo/nvrwoall.bin
+
+[fs1]
+
+../allbins_min_xr819_dcxo/nvroall.bin
+../allbins_min_xr819_dcxo/nvrowall.bin
diff --git a/allbins/zx297520v3/prj_mifi/scripts_linux/Image b/allbins/zx297520v3/prj_mifi/scripts_linux/Image
new file mode 100755
index 0000000..f631954
--- /dev/null
+++ b/allbins/zx297520v3/prj_mifi/scripts_linux/Image
Binary files differ
diff --git a/allbins/zx297520v3/prj_mifi/scripts_linux/Makefile b/allbins/zx297520v3/prj_mifi/scripts_linux/Makefile
new file mode 100644
index 0000000..164ffeb
--- /dev/null
+++ b/allbins/zx297520v3/prj_mifi/scripts_linux/Makefile
@@ -0,0 +1,4 @@
+.PHONY:pack
+pack:
+ ./copybin_mifi.sh
+ ./merge.sh
diff --git a/allbins/zx297520v3/prj_mifi/scripts_linux/NVRWInOneImage.ini b/allbins/zx297520v3/prj_mifi/scripts_linux/NVRWInOneImage.ini
new file mode 100755
index 0000000..8790cf9
--- /dev/null
+++ b/allbins/zx297520v3/prj_mifi/scripts_linux/NVRWInOneImage.ini
@@ -0,0 +1,21 @@
+
+;NV合并
+[NVIMAGE]
+;NvroPath=modem_nvro.bin
+NvrwPath=../allbins/nvrwall.bin
+
+[NVRO]
+;举例..\..\..\zx297520\nv\CA_3M_BX\amtComm_nvro_0x00000000.bin
+
+[NVRW]
+;举例..\..\..\zx297520\nv\CA_3M_BX\at_nvrw_0x00022000.bin
+../allbins/ati_nvrw_0x00000800.bin
+../allbins/at_nvrw_0x00001000.bin
+../allbins/drv_nvrw_0x00012000.bin
+../allbins/phycfg_nvrw_0x00001400.bin
+../allbins/psPriData_nvrw_0x00002000.bin
+../allbins/psPubData_nvrw_0x00001C00.bin
+../allbins/Ref_nvrw_0x26C00.bin
+../allbins/tsp_nvrw_0x00000000.bin
+;../allbins/voice_nvrw_0x00016000.bin
+
diff --git a/allbins/zx297520v3/prj_mifi/scripts_linux/NVRWInOneImage_f231.ini b/allbins/zx297520v3/prj_mifi/scripts_linux/NVRWInOneImage_f231.ini
new file mode 100755
index 0000000..a670d3d
--- /dev/null
+++ b/allbins/zx297520v3/prj_mifi/scripts_linux/NVRWInOneImage_f231.ini
@@ -0,0 +1,21 @@
+
+;NV合并
+[NVIMAGE]
+;NvroPath=modem_nvro.bin
+NvrwPath=../allbins_f231/nvrwall.bin
+
+[NVRO]
+;举例..\..\..\zx297520\nv\CA_3M_BX\amtComm_nvro_0x00000000.bin
+
+[NVRW]
+;举例..\..\..\zx297520\nv\CA_3M_BX\at_nvrw_0x00022000.bin
+../allbins_f231/ati_nvrw_0x00000800.bin
+../allbins_f231/at_nvrw_0x00001000.bin
+../allbins_f231/drv_nvrw_0x00012000.bin
+../allbins_f231/phycfg_nvrw_0x00001400.bin
+../allbins_f231/psPriData_nvrw_0x00002000.bin
+../allbins_f231/psPubData_nvrw_0x00001C00.bin
+../allbins_f231/Ref_nvrw_0x26C00.bin
+../allbins_f231/tsp_nvrw_0x00000000.bin
+;../allbins_f231/voice_nvrw_0x00016000.bin
+
diff --git a/allbins/zx297520v3/prj_mifi/scripts_linux/NVRWInOneImage_min.ini b/allbins/zx297520v3/prj_mifi/scripts_linux/NVRWInOneImage_min.ini
new file mode 100755
index 0000000..d2b9001
--- /dev/null
+++ b/allbins/zx297520v3/prj_mifi/scripts_linux/NVRWInOneImage_min.ini
@@ -0,0 +1,21 @@
+
+;NV合并
+[NVIMAGE]
+;NvroPath=modem_nvro.bin
+NvrwPath=../allbins_min/nvrwall.bin
+
+[NVRO]
+;举例..\..\..\zx297520\nv\CA_3M_BX\amtComm_nvro_0x00000000.bin
+
+[NVRW]
+;举例..\..\..\zx297520\nv\CA_3M_BX\at_nvrw_0x00022000.bin
+../allbins_min/ati_nvrw_0x00000800.bin
+../allbins_min/at_nvrw_0x00001000.bin
+../allbins_min/drv_nvrw_0x00012000.bin
+../allbins_min/phycfg_nvrw_0x00001400.bin
+../allbins_min/psPriData_nvrw_0x00002000.bin
+../allbins_min/psPubData_nvrw_0x00001C00.bin
+../allbins_min/Ref_nvrw_0x26C00.bin
+../allbins_min/tsp_nvrw_0x00000000.bin
+;../allbins_min/voice_nvrw_0x00016000.bin
+
diff --git a/allbins/zx297520v3/prj_mifi/scripts_linux/NVRWInOneImage_min_aic8800dw_dcxo.ini b/allbins/zx297520v3/prj_mifi/scripts_linux/NVRWInOneImage_min_aic8800dw_dcxo.ini
new file mode 100755
index 0000000..445bd73
--- /dev/null
+++ b/allbins/zx297520v3/prj_mifi/scripts_linux/NVRWInOneImage_min_aic8800dw_dcxo.ini
@@ -0,0 +1,21 @@
+
+;NV合并
+[NVIMAGE]
+;NvroPath=modem_nvro.bin
+NvrwPath=../allbins_min_aic8800dw_dcxo/nvrwall.bin
+
+[NVRO]
+;举例..\..\..\zx297520\nv\CA_3M_BX\amtComm_nvro_0x00000000.bin
+
+[NVRW]
+;举例..\..\..\zx297520\nv\CA_3M_BX\at_nvrw_0x00022000.bin
+../allbins_min_aic8800dw_dcxo/ati_nvrw_0x00000800.bin
+../allbins_min_aic8800dw_dcxo/at_nvrw_0x00001000.bin
+../allbins_min_aic8800dw_dcxo/drv_nvrw_0x00012000.bin
+../allbins_min_aic8800dw_dcxo/phycfg_nvrw_0x00001400.bin
+../allbins_min_aic8800dw_dcxo/psPriData_nvrw_0x00002000.bin
+../allbins_min_aic8800dw_dcxo/psPubData_nvrw_0x00001C00.bin
+../allbins_min_aic8800dw_dcxo/Ref_nvrw_0x26C00.bin
+../allbins_min_aic8800dw_dcxo/tsp_nvrw_0x00000000.bin
+;../allbins_min_aic8800dw_dcxo/voice_nvrw_0x00016000.bin
+
diff --git a/allbins/zx297520v3/prj_mifi/scripts_linux/NVRWInOneImage_min_sv6158_dcxo.ini b/allbins/zx297520v3/prj_mifi/scripts_linux/NVRWInOneImage_min_sv6158_dcxo.ini
new file mode 100755
index 0000000..97ad78a
--- /dev/null
+++ b/allbins/zx297520v3/prj_mifi/scripts_linux/NVRWInOneImage_min_sv6158_dcxo.ini
@@ -0,0 +1,21 @@
+
+;NV合并
+[NVIMAGE]
+;NvroPath=modem_nvro.bin
+NvrwPath=../allbins_min_sv6158_dcxo/nvrwall.bin
+
+[NVRO]
+;举例..\..\..\zx297520\nv\CA_3M_BX\amtComm_nvro_0x00000000.bin
+
+[NVRW]
+;举例..\..\..\zx297520\nv\CA_3M_BX\at_nvrw_0x00022000.bin
+../allbins_min_sv6158_dcxo/ati_nvrw_0x00000800.bin
+../allbins_min_sv6158_dcxo/at_nvrw_0x00001000.bin
+../allbins_min_sv6158_dcxo/drv_nvrw_0x00012000.bin
+../allbins_min_sv6158_dcxo/phycfg_nvrw_0x00001400.bin
+../allbins_min_sv6158_dcxo/psPriData_nvrw_0x00002000.bin
+../allbins_min_sv6158_dcxo/psPubData_nvrw_0x00001C00.bin
+../allbins_min_sv6158_dcxo/Ref_nvrw_0x26C00.bin
+../allbins_min_sv6158_dcxo/tsp_nvrw_0x00000000.bin
+;../allbins_min_sv6158_dcxo/voice_nvrw_0x00016000.bin
+
diff --git a/allbins/zx297520v3/prj_mifi/scripts_linux/NVRWInOneImage_min_xr819.ini b/allbins/zx297520v3/prj_mifi/scripts_linux/NVRWInOneImage_min_xr819.ini
new file mode 100755
index 0000000..157bc9e
--- /dev/null
+++ b/allbins/zx297520v3/prj_mifi/scripts_linux/NVRWInOneImage_min_xr819.ini
@@ -0,0 +1,21 @@
+
+;NV合并
+[NVIMAGE]
+;NvroPath=modem_nvro.bin
+NvrwPath=../allbins_min_xr819/nvrwall.bin
+
+[NVRO]
+;举例..\..\..\zx297520\nv\CA_3M_BX\amtComm_nvro_0x00000000.bin
+
+[NVRW]
+;举例..\..\..\zx297520\nv\CA_3M_BX\at_nvrw_0x00022000.bin
+../allbins_min_xr819/ati_nvrw_0x00000800.bin
+../allbins_min_xr819/at_nvrw_0x00001000.bin
+../allbins_min_xr819/drv_nvrw_0x00012000.bin
+../allbins_min_xr819/phycfg_nvrw_0x00001400.bin
+../allbins_min_xr819/psPriData_nvrw_0x00002000.bin
+../allbins_min_xr819/psPubData_nvrw_0x00001C00.bin
+../allbins_min_xr819/Ref_nvrw_0x26C00.bin
+../allbins_min_xr819/tsp_nvrw_0x00000000.bin
+;../allbins_min_xr819/voice_nvrw_0x00016000.bin
+
diff --git a/allbins/zx297520v3/prj_mifi/scripts_linux/NVRWInOneImage_min_xr819_dcxo.ini b/allbins/zx297520v3/prj_mifi/scripts_linux/NVRWInOneImage_min_xr819_dcxo.ini
new file mode 100755
index 0000000..ce8ece7
--- /dev/null
+++ b/allbins/zx297520v3/prj_mifi/scripts_linux/NVRWInOneImage_min_xr819_dcxo.ini
@@ -0,0 +1,21 @@
+
+;NV合并
+[NVIMAGE]
+;NvroPath=modem_nvro.bin
+NvrwPath=../allbins_min_xr819_dcxo/nvrwall.bin
+
+[NVRO]
+;举例..\..\..\zx297520\nv\CA_3M_BX\amtComm_nvro_0x00000000.bin
+
+[NVRW]
+;举例..\..\..\zx297520\nv\CA_3M_BX\at_nvrw_0x00022000.bin
+../allbins_min_xr819_dcxo/ati_nvrw_0x00000800.bin
+../allbins_min_xr819_dcxo/at_nvrw_0x00001000.bin
+../allbins_min_xr819_dcxo/drv_nvrw_0x00012000.bin
+../allbins_min_xr819_dcxo/phycfg_nvrw_0x00001400.bin
+../allbins_min_xr819_dcxo/psPriData_nvrw_0x00002000.bin
+../allbins_min_xr819_dcxo/psPubData_nvrw_0x00001C00.bin
+../allbins_min_xr819_dcxo/Ref_nvrw_0x26C00.bin
+../allbins_min_xr819_dcxo/tsp_nvrw_0x00000000.bin
+;../allbins_min_xr819_dcxo/voice_nvrw_0x00016000.bin
+
diff --git a/allbins/zx297520v3/prj_mifi/scripts_linux/NVRWOInOneImage.ini b/allbins/zx297520v3/prj_mifi/scripts_linux/NVRWOInOneImage.ini
new file mode 100755
index 0000000..3b0e730
--- /dev/null
+++ b/allbins/zx297520v3/prj_mifi/scripts_linux/NVRWOInOneImage.ini
@@ -0,0 +1,23 @@
+
+;NV合并
+[NVIMAGE]
+;NvroPath=modem_nvro.bin
+NvrwoPath=../allbins/nvrwoall.bin
+
+[NVRO]
+;举例..\..\..\zx297520\nv\CA_3M_BX\amtComm_nvro_0x00000000.bin
+
+[NVRWO]
+;举例..\..\..\zx297520\nv\CA_3M_BX\at_nvrw_0x00022000.bin
+../allbins/phycom_nvrwo_0x0002BC00.bin
+../allbins/phyGgeAmtUser_nvrwo_0x00003400.bin
+../allbins/phyGgeCom_nvrwo_0x0000EC00.bin
+../allbins/phyLteaAmtUser_nvrwo_0x00007800.bin
+../allbins/phyLteaCom_nvrwo_0x00012C00.bin
+../allbins/phyLtetxtable_nvrwo_0x0001BC00.bin
+../allbins/phyTdsAmtUser_nvrwo_0x00002800.bin
+../allbins/phyTdsCom_nvrwo_0x0000E400.bin
+../allbins/phyWcdmaAmtUser_nvrwo_0x00005000.bin
+../allbins/phyWcdmaCom_nvrwo_0x00012400.bin
+../allbins/zxRfM0_nvrwo_0x00016C00.bin
+
diff --git a/allbins/zx297520v3/prj_mifi/scripts_linux/NVRWOInOneImage_f231.ini b/allbins/zx297520v3/prj_mifi/scripts_linux/NVRWOInOneImage_f231.ini
new file mode 100755
index 0000000..b8b603a
--- /dev/null
+++ b/allbins/zx297520v3/prj_mifi/scripts_linux/NVRWOInOneImage_f231.ini
@@ -0,0 +1,23 @@
+
+;NV合并
+[NVIMAGE]
+;NvroPath=modem_nvro.bin
+NvrwoPath=../allbins_f231/nvrwoall.bin
+
+[NVRO]
+;举例..\..\..\zx297520\nv\CA_3M_BX\amtComm_nvro_0x00000000.bin
+
+[NVRWO]
+;举例..\..\..\zx297520\nv\CA_3M_BX\at_nvrw_0x00022000.bin
+../allbins_f231/phycom_nvrwo_0x0002BC00.bin
+../allbins_f231/phyGgeAmtUser_nvrwo_0x00003400.bin
+../allbins_f231/phyGgeCom_nvrwo_0x0000EC00.bin
+../allbins_f231/phyLteaAmtUser_nvrwo_0x00007800.bin
+../allbins_f231/phyLteaCom_nvrwo_0x00012C00.bin
+../allbins_f231/phyLtetxtable_nvrwo_0x0001BC00.bin
+../allbins_f231/phyTdsAmtUser_nvrwo_0x00002800.bin
+../allbins_f231/phyTdsCom_nvrwo_0x0000E400.bin
+../allbins_f231/phyWcdmaAmtUser_nvrwo_0x00005000.bin
+../allbins_f231/phyWcdmaCom_nvrwo_0x00012400.bin
+../allbins_f231/zxRfM0_nvrwo_0x00016C00.bin
+
diff --git a/allbins/zx297520v3/prj_mifi/scripts_linux/NVRWOInOneImage_min.ini b/allbins/zx297520v3/prj_mifi/scripts_linux/NVRWOInOneImage_min.ini
new file mode 100755
index 0000000..ebe1a9c
--- /dev/null
+++ b/allbins/zx297520v3/prj_mifi/scripts_linux/NVRWOInOneImage_min.ini
@@ -0,0 +1,23 @@
+
+;NV合并
+[NVIMAGE]
+;NvroPath=modem_nvro.bin
+NvrwoPath=../allbins_min/nvrwoall.bin
+
+[NVRO]
+;举例..\..\..\zx297520\nv\CA_3M_BX\amtComm_nvro_0x00000000.bin
+
+[NVRWO]
+;举例..\..\..\zx297520\nv\CA_3M_BX\at_nvrw_0x00022000.bin
+../allbins_min/phycom_nvrwo_0x0002BC00.bin
+../allbins_min/phyGgeAmtUser_nvrwo_0x00003400.bin
+../allbins_min/phyGgeCom_nvrwo_0x0000EC00.bin
+../allbins_min/phyLteaAmtUser_nvrwo_0x00007800.bin
+../allbins_min/phyLteaCom_nvrwo_0x00012C00.bin
+../allbins_min/phyLtetxtable_nvrwo_0x0001BC00.bin
+../allbins_min/phyTdsAmtUser_nvrwo_0x00002800.bin
+../allbins_min/phyTdsCom_nvrwo_0x0000E400.bin
+../allbins_min/phyWcdmaAmtUser_nvrwo_0x00005000.bin
+../allbins_min/phyWcdmaCom_nvrwo_0x00012400.bin
+../allbins_min/zxRfM0_nvrwo_0x00016C00.bin
+
diff --git a/allbins/zx297520v3/prj_mifi/scripts_linux/NVRWOInOneImage_min_aic8800dw_dcxo.ini b/allbins/zx297520v3/prj_mifi/scripts_linux/NVRWOInOneImage_min_aic8800dw_dcxo.ini
new file mode 100755
index 0000000..0b8ef3d
--- /dev/null
+++ b/allbins/zx297520v3/prj_mifi/scripts_linux/NVRWOInOneImage_min_aic8800dw_dcxo.ini
@@ -0,0 +1,23 @@
+
+;NV合并
+[NVIMAGE]
+;NvroPath=modem_nvro.bin
+NvrwoPath=../allbins_min_aic8800dw_dcxo/nvrwoall.bin
+
+[NVRO]
+;举例..\..\..\zx297520\nv\CA_3M_BX\amtComm_nvro_0x00000000.bin
+
+[NVRWO]
+;举例..\..\..\zx297520\nv\CA_3M_BX\at_nvrw_0x00022000.bin
+../allbins_min_aic8800dw_dcxo/phycom_nvrwo_0x0002BC00.bin
+../allbins_min_aic8800dw_dcxo/phyGgeAmtUser_nvrwo_0x00003400.bin
+../allbins_min_aic8800dw_dcxo/phyGgeCom_nvrwo_0x0000EC00.bin
+../allbins_min_aic8800dw_dcxo/phyLteaAmtUser_nvrwo_0x00007800.bin
+../allbins_min_aic8800dw_dcxo/phyLteaCom_nvrwo_0x00012C00.bin
+../allbins_min_aic8800dw_dcxo/phyLtetxtable_nvrwo_0x0001BC00.bin
+../allbins_min_aic8800dw_dcxo/phyTdsAmtUser_nvrwo_0x00002800.bin
+../allbins_min_aic8800dw_dcxo/phyTdsCom_nvrwo_0x0000E400.bin
+../allbins_min_aic8800dw_dcxo/phyWcdmaAmtUser_nvrwo_0x00005000.bin
+../allbins_min_aic8800dw_dcxo/phyWcdmaCom_nvrwo_0x00012400.bin
+../allbins_min_aic8800dw_dcxo/zxRfM0_nvrwo_0x00016C00.bin
+
diff --git a/allbins/zx297520v3/prj_mifi/scripts_linux/NVRWOInOneImage_min_sv6158_dcxo.ini b/allbins/zx297520v3/prj_mifi/scripts_linux/NVRWOInOneImage_min_sv6158_dcxo.ini
new file mode 100755
index 0000000..706381c
--- /dev/null
+++ b/allbins/zx297520v3/prj_mifi/scripts_linux/NVRWOInOneImage_min_sv6158_dcxo.ini
@@ -0,0 +1,23 @@
+
+;NV合并
+[NVIMAGE]
+;NvroPath=modem_nvro.bin
+NvrwoPath=../allbins_min_sv6158_dcxo/nvrwoall.bin
+
+[NVRO]
+;举例..\..\..\zx297520\nv\CA_3M_BX\amtComm_nvro_0x00000000.bin
+
+[NVRWO]
+;举例..\..\..\zx297520\nv\CA_3M_BX\at_nvrw_0x00022000.bin
+../allbins_min_sv6158_dcxo/phycom_nvrwo_0x0002BC00.bin
+../allbins_min_sv6158_dcxo/phyGgeAmtUser_nvrwo_0x00003400.bin
+../allbins_min_sv6158_dcxo/phyGgeCom_nvrwo_0x0000EC00.bin
+../allbins_min_sv6158_dcxo/phyLteaAmtUser_nvrwo_0x00007800.bin
+../allbins_min_sv6158_dcxo/phyLteaCom_nvrwo_0x00012C00.bin
+../allbins_min_sv6158_dcxo/phyLtetxtable_nvrwo_0x0001BC00.bin
+../allbins_min_sv6158_dcxo/phyTdsAmtUser_nvrwo_0x00002800.bin
+../allbins_min_sv6158_dcxo/phyTdsCom_nvrwo_0x0000E400.bin
+../allbins_min_sv6158_dcxo/phyWcdmaAmtUser_nvrwo_0x00005000.bin
+../allbins_min_sv6158_dcxo/phyWcdmaCom_nvrwo_0x00012400.bin
+../allbins_min_sv6158_dcxo/zxRfM0_nvrwo_0x00016C00.bin
+
diff --git a/allbins/zx297520v3/prj_mifi/scripts_linux/NVRWOInOneImage_min_xr819.ini b/allbins/zx297520v3/prj_mifi/scripts_linux/NVRWOInOneImage_min_xr819.ini
new file mode 100755
index 0000000..03c42cd
--- /dev/null
+++ b/allbins/zx297520v3/prj_mifi/scripts_linux/NVRWOInOneImage_min_xr819.ini
@@ -0,0 +1,23 @@
+
+;NV合并
+[NVIMAGE]
+;NvroPath=modem_nvro.bin
+NvrwoPath=../allbins_min_xr819/nvrwoall.bin
+
+[NVRO]
+;举例..\..\..\zx297520\nv\CA_3M_BX\amtComm_nvro_0x00000000.bin
+
+[NVRWO]
+;举例..\..\..\zx297520\nv\CA_3M_BX\at_nvrw_0x00022000.bin
+../allbins_min_xr819/phycom_nvrwo_0x0002BC00.bin
+../allbins_min_xr819/phyGgeAmtUser_nvrwo_0x00003400.bin
+../allbins_min_xr819/phyGgeCom_nvrwo_0x0000EC00.bin
+../allbins_min_xr819/phyLteaAmtUser_nvrwo_0x00007800.bin
+../allbins_min_xr819/phyLteaCom_nvrwo_0x00012C00.bin
+../allbins_min_xr819/phyLtetxtable_nvrwo_0x0001BC00.bin
+../allbins_min_xr819/phyTdsAmtUser_nvrwo_0x00002800.bin
+../allbins_min_xr819/phyTdsCom_nvrwo_0x0000E400.bin
+../allbins_min_xr819/phyWcdmaAmtUser_nvrwo_0x00005000.bin
+../allbins_min_xr819/phyWcdmaCom_nvrwo_0x00012400.bin
+../allbins_min_xr819/zxRfM0_nvrwo_0x00016C00.bin
+
diff --git a/allbins/zx297520v3/prj_mifi/scripts_linux/NVRWOInOneImage_min_xr819_dcxo.ini b/allbins/zx297520v3/prj_mifi/scripts_linux/NVRWOInOneImage_min_xr819_dcxo.ini
new file mode 100755
index 0000000..a875c8a
--- /dev/null
+++ b/allbins/zx297520v3/prj_mifi/scripts_linux/NVRWOInOneImage_min_xr819_dcxo.ini
@@ -0,0 +1,23 @@
+
+;NV合并
+[NVIMAGE]
+;NvroPath=modem_nvro.bin
+NvrwoPath=../allbins_min_xr819_dcxo/nvrwoall.bin
+
+[NVRO]
+;举例..\..\..\zx297520\nv\CA_3M_BX\amtComm_nvro_0x00000000.bin
+
+[NVRWO]
+;举例..\..\..\zx297520\nv\CA_3M_BX\at_nvrw_0x00022000.bin
+../allbins_min_xr819_dcxo/phycom_nvrwo_0x0002BC00.bin
+../allbins_min_xr819_dcxo/phyGgeAmtUser_nvrwo_0x00003400.bin
+../allbins_min_xr819_dcxo/phyGgeCom_nvrwo_0x0000EC00.bin
+../allbins_min_xr819_dcxo/phyLteaAmtUser_nvrwo_0x00007800.bin
+../allbins_min_xr819_dcxo/phyLteaCom_nvrwo_0x00012C00.bin
+../allbins_min_xr819_dcxo/phyLtetxtable_nvrwo_0x0001BC00.bin
+../allbins_min_xr819_dcxo/phyTdsAmtUser_nvrwo_0x00002800.bin
+../allbins_min_xr819_dcxo/phyTdsCom_nvrwo_0x0000E400.bin
+../allbins_min_xr819_dcxo/phyWcdmaAmtUser_nvrwo_0x00005000.bin
+../allbins_min_xr819_dcxo/phyWcdmaCom_nvrwo_0x00012400.bin
+../allbins_min_xr819_dcxo/zxRfM0_nvrwo_0x00016C00.bin
+
diff --git a/allbins/zx297520v3/prj_mifi/scripts_linux/bin/7za.exe b/allbins/zx297520v3/prj_mifi/scripts_linux/bin/7za.exe
new file mode 100755
index 0000000..7f6bf86
--- /dev/null
+++ b/allbins/zx297520v3/prj_mifi/scripts_linux/bin/7za.exe
Binary files differ
diff --git a/allbins/zx297520v3/prj_mifi/scripts_linux/bin/ap_imagefs.img b/allbins/zx297520v3/prj_mifi/scripts_linux/bin/ap_imagefs.img
new file mode 100755
index 0000000..33eee98
--- /dev/null
+++ b/allbins/zx297520v3/prj_mifi/scripts_linux/bin/ap_imagefs.img
Binary files differ
diff --git a/allbins/zx297520v3/prj_mifi/scripts_linux/bin/imagefs.tar b/allbins/zx297520v3/prj_mifi/scripts_linux/bin/imagefs.tar
new file mode 100644
index 0000000..5160c6b
--- /dev/null
+++ b/allbins/zx297520v3/prj_mifi/scripts_linux/bin/imagefs.tar
Binary files differ
diff --git a/allbins/zx297520v3/prj_mifi/scripts_linux/bin/imagefs.tgz b/allbins/zx297520v3/prj_mifi/scripts_linux/bin/imagefs.tgz
new file mode 100644
index 0000000..2569177
--- /dev/null
+++ b/allbins/zx297520v3/prj_mifi/scripts_linux/bin/imagefs.tgz
Binary files differ
diff --git a/allbins/zx297520v3/prj_mifi/scripts_linux/bin/imagefs/cpuap_00.lzma b/allbins/zx297520v3/prj_mifi/scripts_linux/bin/imagefs/cpuap_00.lzma
new file mode 100644
index 0000000..4a6385c
--- /dev/null
+++ b/allbins/zx297520v3/prj_mifi/scripts_linux/bin/imagefs/cpuap_00.lzma
Binary files differ
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@@ -0,0 +1 @@
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diff --git a/allbins/zx297520v3/prj_mifi/scripts_linux/bin/imagefs/nvrwall.bin b/allbins/zx297520v3/prj_mifi/scripts_linux/bin/imagefs/nvrwall.bin
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diff --git a/allbins/zx297520v3/prj_mifi/scripts_linux/bin/imagefs_tool/bin/mkfs.jffs2_lzma b/allbins/zx297520v3/prj_mifi/scripts_linux/bin/imagefs_tool/bin/mkfs.jffs2_lzma
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diff --git a/allbins/zx297520v3/prj_mifi/scripts_linux/bin/imagefs_tool/bin/pack_image.py b/allbins/zx297520v3/prj_mifi/scripts_linux/bin/imagefs_tool/bin/pack_image.py
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--- /dev/null
+++ b/allbins/zx297520v3/prj_mifi/scripts_linux/bin/imagefs_tool/bin/pack_image.py
@@ -0,0 +1,398 @@
+# -*- coding: utf-8 -*-
+import subprocess
+import argparse
+from subprocess import *
+import threading
+import time
+import ConfigParser
+import os,sys
+import commands
+import string
+import shutil
+import hashlib
+from collections import OrderedDict
+
+sys.path.append("../../../")
+Imagefs_name = ""
+compress_alg = ""
+partition_name = ""
+COMPRESS_ALG_LZMA = "lzma"
+FS_CMD_SPLIT_IMAGE = "split"
+FS_CMD_MERGE_BINS_FOR_UPLOAD = "merge"
+FS_CMD_PACK_IMAGE_MKJFFS2 = "mkjffs2"
+NVRWALL_FILE_NAME = "nvrwall.bin"
+NVRWALL_HASH_FILE = "nvrwall.hash"
+FOTA_FLAG_RENEW_IMGNAME = "ap_imagefs.img"
+CMD_PARTITION_SEPARATOR = ","
+SPLIT_EXE_PATH = "split"
+MINILZMA_EXE_PATH = "./minilzma"
+MINIUNLZMA_EXE_PATH = "./miniunlzma"
+MKFS_JFFS2_PATH = "./mkfs.jffs2_lzma"
+
+class si_subprocess (threading.Thread):
+ def __init__(self, threadID, name, procmd):
+ try:
+ threading.Thread.__init__(self)
+ self.threadID = threadID
+ self.name = name
+ self.p = subprocess.Popen(procmd, stdin = subprocess.PIPE, stdout = subprocess.PIPE, stderr = subprocess.PIPE, shell = False)
+ results = self.p.communicate()
+ if results:
+ print results
+ self.outlist = []
+ self.lock = threading.Lock()
+
+ except Exception as e:
+ print "Error %s" %e
+
+ def run(self):
+ try:
+ curline = self.p.stdout.readline()
+ while(curline):
+ self.lock.acquire()
+ self.outlist.append(curline)
+ self.lock.release()
+ curline = self.p.stdout.readline()
+ except Exception as e:
+ print "si_subprocess get excption"
+ raise e
+ finally:
+ print "Exiting " + self.name
+
+ def terminate(self):
+ self.p.kill()
+
+#***********************************************************************
+#Interface: gererate md5
+#Interface: read config file
+#Interface: check param is valid
+#***********************************************************************
+class special_handle_method(object):
+ def __init__(self):
+ pass
+
+ def file_md5_hexdigest(self, filename):
+ fmd5 = hashlib.md5()
+ f = open(filename, 'rb')
+ fmd5.update(f.read())
+ f.close()
+ return fmd5.hexdigest()
+
+ def read_configfile(self, configfile_path, field):
+ review = ConfigParser.ConfigParser()
+ review.read(configfile_path)
+ global partition_name
+ if review.has_option(partition_name, field) == False:
+ raise Exception('field of partition is not exist !',partition_name, field)
+ field_value = review.get(partition_name, field)
+ return field_value
+
+ def prepare_check_params(self, cmd_type, srcbins_path, product_ini_file, out_path):
+ if not os.path.isfile(product_ini_file):
+ raise Exception('check: Wrong input param,please check product_ini_file!',\
+ os.path.isfile(product_ini_file))
+
+ if cmd_type == FS_CMD_PACK_IMAGE_MKJFFS2:
+ image_path = os.path.dirname(out_path)
+ if srcbins_path == image_path:
+ raise Exception('when you mkjffs2, srcbins_path and out_path should be deferent!',image_path)
+ if (not os.path.isdir(srcbins_path)) or (not os.path.isdir(image_path)):
+ raise Exception('Wrong input param, please check srcbins_path out_path!',\
+ os.path.isdir(srcbins_path), os.path.isdir(image_path))
+
+ elif cmd_type == FS_CMD_SPLIT_IMAGE:
+ if (not os.path.isfile(srcbins_path)) or (not os.path.isdir(out_path)):
+ raise Exception('Wrong input param, please check srcbins_path out_path!',\
+ os.path.isfile(srcbins_path), os.path.isdir(out_path))
+
+ elif cmd_type == FS_CMD_MERGE_BINS_FOR_UPLOAD:
+ if (not os.path.isdir(srcbins_path)) or (not os.path.isfile(product_ini_file)):
+ raise Exception('Wrong input param, please check srcbins_path!',\
+ os.path.isdir(srcbins_path))
+
+#***********************************************************************
+#Interface: pack imagefs using mkjffs2
+#Interface: split bins
+#Interface: uncompress bins
+#Interface: merge bins for upload
+#Interface: compress bins
+#***********************************************************************
+class imagefs_operation(object):
+ def __init__(self):
+ pass
+
+ def opcmd_get_suffix(self):
+ if Imagefs_name.find("_") == -1:
+ suffix = Imagefs_name
+ else:
+ str_img = os.path.splitext(Imagefs_name)[0]
+ suffix = str_img.split("_")[-1]
+ return suffix
+
+ def opcmd_packimgfs_mkjffs2(self, srcbins_dir, configfile_path, out_dir):
+ handle = special_handle_method()
+ review = ConfigParser.ConfigParser()
+ review.read(configfile_path)
+ action_Image_cmd = handle.read_configfile(configfile_path, "mkfs_jffs2")
+ makejffs2_allinone_cmd = MKFS_JFFS2_PATH + " " + action_Image_cmd + " -d " + srcbins_dir + " -o " + out_dir
+ print "cmd is %s" %makejffs2_allinone_cmd
+ print "path %s" %os.getcwd()
+ os.system(makejffs2_allinone_cmd)
+ #si_subprocess(1, "file system pack thread", makejffs2_allinone_cmd)
+ print "Generating %s ok!"%out_dir
+
+ def opcmd_split_binfs(self, srcbins_dir, configfile_path, out_dir):
+ mycase = special_handle_method()
+ suffix = self.opcmd_get_suffix()
+ split_block_size = mycase.read_configfile(configfile_path, "split_block_size")
+ block_figure = mycase.read_configfile(configfile_path, "split_figure")
+ block_name = suffix + "_"
+ small_bin_file = os.path.join(out_dir, block_name)
+ split_Image_cmd = SPLIT_EXE_PATH + " -b " + split_block_size + " " + srcbins_dir + " -d -a " + block_figure + " " + small_bin_file
+ os.system(split_Image_cmd)
+ os.remove(srcbins_dir)
+
+ def opcmd_uncompress_bins(self, srcbins_dir):
+ suffix = self.opcmd_get_suffix()
+ if compress_alg == COMPRESS_ALG_LZMA:
+ #Miniunlzma -k -o E:\imagefs_tool_new\fs\cpuap_00 E:\imagefs_tool_new\fs\cpuap_00.lzma
+ lzmafiles = os.listdir(srcbins_dir)
+ if len(lzmafiles)==0:
+ raise Exception('uncompress binfiles error: srcdir is Null!')
+ for each in lzmafiles:
+ if (each.find("_") == -1) or (each.split("_")[0] != suffix) or (each.find(".lzma") == -1):
+ continue
+ bin_file = each.split(".lzma")[0]
+ bin_file = os.path.join(srcbins_dir, bin_file)
+ lzmabin_file = os.path.join(srcbins_dir, each)
+ unlzma_cmd = MINIUNLZMA_EXE_PATH + " -o " + bin_file + " " + lzmabin_file
+ os.system(unlzma_cmd)
+ #os.remove(lzmabin_file)
+
+ def opcmd_merge_bins_for_upload(self, srcbins_dir, out_dir):
+ suffix = self.opcmd_get_suffix()
+ if compress_alg == COMPRESS_ALG_LZMA:
+ path_list = os.listdir(srcbins_dir)
+ path_name = []
+ keyword = suffix + "_"
+ for i in path_list:
+ if (i.find(keyword) !=-1):
+ path_name.append(i.split("\n")[0])
+
+ if len(path_name)==0:
+ raise Exception('merge bins error: no src small bin file')
+ # sort
+ path_name.sort()
+
+ if os.path.exists(out_dir):
+ os.remove(out_dir)
+ for file_name in path_name:
+ # "a" zhuijia
+ fullname = os.path.join(srcbins_dir, file_name)
+ with open(fullname, "rb") as file_object:
+ file_info = file_object.read()
+ with open(out_dir, "ab") as f:
+ f.write(file_info)
+ print "fullname %s"%fullname
+ f.close()
+ file_object.close()
+ os.remove(fullname)
+
+ def opcmd_compress_bins(self, out_dir):
+ suffix = self.opcmd_get_suffix()
+ if compress_alg == COMPRESS_ALG_LZMA:
+ #ls cpuap_* | ..\bin\xargs -I {} ..\bin\minilzma -t 512 {}
+ members = os.listdir(out_dir)
+ key_word = suffix + "_"
+ for member in members:
+ smallbin_file = os.path.join(out_dir, member)
+ if ((member.find(key_word) != -1) and (member.find(".lzma") != -1)):
+ os.remove(smallbin_file)
+
+ members = os.listdir(out_dir)
+ for member in members:
+ if (member.find("_") == -1) or (member.split("_")[0] != suffix):
+ continue
+ member = member.split("\n")[0]
+ smallbin_file = os.path.join(out_dir, member)
+ lzma_cmd = MINILZMA_EXE_PATH + " -t " + lzma_dict + " " + smallbin_file
+ os.system(lzma_cmd)
+ #si_subprocess(4, "file lzma compress thread", lzma_cmd)
+
+#***********************************************************************
+#for 16M download
+#first: split big bin to small bins according to product.ini
+#second: using lzma alg to compress small bins
+#***********************************************************************
+def split_image_start(srcbins_dir, config_file_dir, out_dir):
+ try:
+ Instance = imagefs_operation()
+ if split_enable=="yes":
+ #Instance.check_bins_valid(srcbins_dir)
+ Instance.opcmd_split_binfs(srcbins_dir, config_file_dir, out_dir)
+ Instance.opcmd_compress_bins(out_dir)
+ print "Split and compress bins complete!"
+ else:
+ raise Exception('largefile_split_enable is no, please check!')
+
+ except Exception as e:
+ print "Error %s" %e
+
+#***********************************************************************
+#for 16M upload
+#first: uncompress small lzma bins
+#second: write all small bins to a big bin
+#***********************************************************************
+def merge_image_for_upload_start(srcbins_dir, combin_dir):
+ try:
+ #Instance.check_bins_valid(srcbins_dir)
+ if split_enable=="yes":
+ Instance = imagefs_operation()
+ print "----------uncompress begin---------------"
+ Instance.opcmd_uncompress_bins(srcbins_dir)
+ print "----------merge begin--------------------"
+ Instance.opcmd_merge_bins_for_upload(srcbins_dir, combin_dir)
+ print "Uncompress and merge bins complete!"
+ else:
+ pass
+ except Exception as e:
+ print "Error %s" %e
+
+#***********************************************************************
+#function：for mkjffs2 pack imagefs
+#first: check bins valid：
+#second: generate fotaflag and nvrwall.hash file
+#***********************************************************************
+def package_check_bins_valid(newbins_path, product_path):
+ bins_list = os.listdir(newbins_path)
+ nvrwall_file = os.path.join(newbins_path, NVRWALL_FILE_NAME)
+ if os.path.exists(product_path):
+ if os.path.exists(nvrwall_file):
+ md5_object = special_handle_method()
+ hash = md5_object.file_md5_hexdigest(nvrwall_file)
+ nvrwall_hash = os.path.join(newbins_path, NVRWALL_HASH_FILE)
+ if os.path.exists(nvrwall_hash) == True:
+ os.remove(nvrwall_hash)
+ with open(nvrwall_hash, "w+") as fp:
+ fp.write(hash)
+
+ if Imagefs_name == FOTA_FLAG_RENEW_IMGNAME:
+ fotaflag_path = os.path.join(newbins_path, "fotaflag")
+ if not os.path.exists(fotaflag_path):
+ with open(fotaflag_path, "wb+") as fotafp:
+ fotafp.write(b'\xFF' * 1024)
+ fotafp.close()
+ return "True"
+ else:
+ raise Exception('product config file not exist, please check!')
+
+#***********************************************************************
+#function：mkjffs2 code
+#first: check bins valid：fotaflag and hash
+#second: package all bins to imagfs using mkjffs2 exe
+#***********************************************************************
+def package_image_start(newbins_dir, product_dir, allinone_dir):
+ try:
+ if not os.path.exists(newbins_dir):
+ raise Exception('imgfs_dir not exist, please check!')
+ if not os.path.exists(product_dir):
+ raise Exception('product_dir not exist, please check!')
+ if not os.path.exists(os.path.dirname(allinone_dir)):
+ raise Exception('allinone_dir not exist, please check!')
+ package_check_bins_valid(newbins_dir, product_dir)
+ #mkjffs2
+ Instance = imagefs_operation()
+ Instance.opcmd_packimgfs_mkjffs2(newbins_dir, product_dir, allinone_dir)
+ except Exception as e:
+ print "Error %s" %e
+ #jp.end()
+
+#***********************************************************************
+#function：main fun
+#first: check params and read product.ini config file
+#second: support three kinds of command: mkjffs2\split\merge
+#***********************************************************************
+def main():
+ parser = argparse.ArgumentParser()
+
+ parser.add_argument('-d', '--srcdir', type=str, help="srcdir")
+ parser.add_argument('-c', '--cmd', type=str, help="cmd type")
+ parser.add_argument('-p', '--configfile', type=str, help="product.ini config file path")
+ parser.add_argument('-o', '--outdir', type=str, help='destination directory')
+ parser.add_argument('-r', '--keyword', type=str, help='read keyword from product.ini ')
+
+ args = parser.parse_args()
+ object = special_handle_method()
+ global partition_name
+
+ if (args.keyword != None and args.configfile != None):
+ key_word = unicode(args.keyword,'utf-8')
+ if (key_word.find(CMD_PARTITION_SEPARATOR) == -1):
+ print('Exception: key_word param error: usage [-h] [-d SRCDIR] [-c KEYWORD,PARTITION] [-p CONFIGFILE] [-o OUTDIR]')
+ return
+ key_name = key_word.split(CMD_PARTITION_SEPARATOR)[0]
+ partition_name = key_word.split(CMD_PARTITION_SEPARATOR)[1]
+ product_ini_file = unicode(args.configfile,'utf-8')
+ print object.read_configfile(product_ini_file, key_name)
+ return object.read_configfile(product_ini_file, key_name)
+
+ if (args.srcdir == None or args.cmd == None or args.configfile == None or args.outdir == None):
+ print(''' Exception: cmd:mkjffs2 usage:[-h] [-d SRCDIR] [-c CMD] [-p CONFIGFILE] [-o OUTDIR] \n
+ cmd:split or merge usage:[-h] [-d SRCDIR] [-c CMD,PARTITION] [-p CONFIGFILE] [-o OUTDIR]\n
+ keyword read from Product.ini usage:[-h] [-p CONFIGFILE] [-r KEYWORD,PARTITION]''')
+ return
+
+ srcbins_path = unicode(args.srcdir, 'utf-8')
+ cmd = unicode(args.cmd, 'utf-8')
+ out_path = unicode(args.outdir,'utf-8')
+ product_ini_file = unicode(args.configfile,'utf-8')
+
+ print "srcbins_path %s ^^^^^^^^" %srcbins_path
+ print "out_path %s ^^^^^^^^" %out_path
+ print "product config file %s ^^^^^^^^" %product_ini_file
+
+ global split_enable
+ global Imagefs_name
+
+ if cmd == FS_CMD_PACK_IMAGE_MKJFFS2:
+ Imagefs_name = os.path.basename(out_path)
+ if Imagefs_name.find("_") == -1:
+ partition_name = Imagefs_name
+ else:
+ str_img = os.path.splitext(Imagefs_name)[0]
+ partition_name = str_img.split("_")[-1]
+ object.prepare_check_params(cmd, srcbins_path, product_ini_file, out_path)
+ package_image_start(srcbins_path, product_ini_file, out_path)
+ return
+ else: #split/merge bins
+ if (cmd.find(CMD_PARTITION_SEPARATOR) == -1):
+ print('Exception: cmd param error: usage [-h] [-d SRCDIR] [-c CMD,PARTITION] [-p CONFIGFILE] [-o OUTDIR]')
+ return
+ cmd_type = cmd.split(CMD_PARTITION_SEPARATOR)[0]
+ partition_name = cmd.split(CMD_PARTITION_SEPARATOR)[1]
+ object.prepare_check_params(cmd_type, srcbins_path, product_ini_file, out_path)
+ split_enable = object.read_configfile(product_ini_file, "largefile_split_enable")
+ if split_enable == "yes":
+ global lzma_dict
+ global compress_alg
+ lzma_dict = object.read_configfile(product_ini_file, "lzma_dict")
+ compress_alg = object.read_configfile(product_ini_file, "compress_algorithm")
+ if compress_alg != COMPRESS_ALG_LZMA:
+ print "Exception: Now %s is not supported, please choose lzma as compress_algorithm!"%compress_alg
+ return
+
+ if cmd_type == FS_CMD_SPLIT_IMAGE:
+ Imagefs_name = os.path.basename(srcbins_path)
+ split_image_start(srcbins_path, product_ini_file, out_path)
+
+ elif cmd_type == FS_CMD_MERGE_BINS_FOR_UPLOAD:
+ Imagefs_name = os.path.basename(out_path)
+ merge_image_for_upload_start(srcbins_path, out_path)
+
+ else:
+ raise Exception('cmd type error, support three kind of cmds: split merge or mkjffs2, please check!')
+
+if __name__ == '__main__':
+ main()
+
+
diff --git a/allbins/zx297520v3/prj_mifi/scripts_linux/bin/imagefs_tool/bin/split.exe b/allbins/zx297520v3/prj_mifi/scripts_linux/bin/imagefs_tool/bin/split.exe
new file mode 100755
index 0000000..a8b15b4
--- /dev/null
+++ b/allbins/zx297520v3/prj_mifi/scripts_linux/bin/imagefs_tool/bin/split.exe
Binary files differ
diff --git a/allbins/zx297520v3/prj_mifi/scripts_linux/bin/imagefs_tool/bin/xargs.exe b/allbins/zx297520v3/prj_mifi/scripts_linux/bin/imagefs_tool/bin/xargs.exe
new file mode 100755
index 0000000..5305f5d
--- /dev/null
+++ b/allbins/zx297520v3/prj_mifi/scripts_linux/bin/imagefs_tool/bin/xargs.exe
Binary files differ
diff --git a/allbins/zx297520v3/prj_mifi/scripts_linux/bin/imagefs_tool/jffs2_extract/_hashlib.pyd b/allbins/zx297520v3/prj_mifi/scripts_linux/bin/imagefs_tool/jffs2_extract/_hashlib.pyd
new file mode 100755
index 0000000..7d25690
--- /dev/null
+++ b/allbins/zx297520v3/prj_mifi/scripts_linux/bin/imagefs_tool/jffs2_extract/_hashlib.pyd
Binary files differ
diff --git a/allbins/zx297520v3/prj_mifi/scripts_linux/bin/imagefs_tool/jffs2_extract/bz2.pyd b/allbins/zx297520v3/prj_mifi/scripts_linux/bin/imagefs_tool/jffs2_extract/bz2.pyd
new file mode 100755
index 0000000..4a5e564
--- /dev/null
+++ b/allbins/zx297520v3/prj_mifi/scripts_linux/bin/imagefs_tool/jffs2_extract/bz2.pyd
Binary files differ
diff --git a/allbins/zx297520v3/prj_mifi/scripts_linux/bin/imagefs_tool/jffs2_extract/jffs2_extract.exe b/allbins/zx297520v3/prj_mifi/scripts_linux/bin/imagefs_tool/jffs2_extract/jffs2_extract.exe
new file mode 100755
index 0000000..9443dca
--- /dev/null
+++ b/allbins/zx297520v3/prj_mifi/scripts_linux/bin/imagefs_tool/jffs2_extract/jffs2_extract.exe
Binary files differ
diff --git a/allbins/zx297520v3/prj_mifi/scripts_linux/bin/imagefs_tool/jffs2_extract/library.zip b/allbins/zx297520v3/prj_mifi/scripts_linux/bin/imagefs_tool/jffs2_extract/library.zip
new file mode 100755
index 0000000..c052bee
--- /dev/null
+++ b/allbins/zx297520v3/prj_mifi/scripts_linux/bin/imagefs_tool/jffs2_extract/library.zip
Binary files differ
diff --git a/allbins/zx297520v3/prj_mifi/scripts_linux/bin/imagefs_tool/jffs2_extract/lzo.pyd b/allbins/zx297520v3/prj_mifi/scripts_linux/bin/imagefs_tool/jffs2_extract/lzo.pyd
new file mode 100755
index 0000000..2dcd1fc
--- /dev/null
+++ b/allbins/zx297520v3/prj_mifi/scripts_linux/bin/imagefs_tool/jffs2_extract/lzo.pyd
Binary files differ
diff --git a/allbins/zx297520v3/prj_mifi/scripts_linux/bin/imagefs_tool/jffs2_extract/pylzma.pyd b/allbins/zx297520v3/prj_mifi/scripts_linux/bin/imagefs_tool/jffs2_extract/pylzma.pyd
new file mode 100755
index 0000000..5206524
--- /dev/null
+++ b/allbins/zx297520v3/prj_mifi/scripts_linux/bin/imagefs_tool/jffs2_extract/pylzma.pyd
Binary files differ
diff --git a/allbins/zx297520v3/prj_mifi/scripts_linux/bin/imagefs_tool/jffs2_extract/python27.dll b/allbins/zx297520v3/prj_mifi/scripts_linux/bin/imagefs_tool/jffs2_extract/python27.dll
new file mode 100755
index 0000000..cdd5d35
--- /dev/null
+++ b/allbins/zx297520v3/prj_mifi/scripts_linux/bin/imagefs_tool/jffs2_extract/python27.dll
Binary files differ
diff --git a/allbins/zx297520v3/prj_mifi/scripts_linux/bin/imagefs_tool/jffs2_extract/select.pyd b/allbins/zx297520v3/prj_mifi/scripts_linux/bin/imagefs_tool/jffs2_extract/select.pyd
new file mode 100755
index 0000000..dc50785
--- /dev/null
+++ b/allbins/zx297520v3/prj_mifi/scripts_linux/bin/imagefs_tool/jffs2_extract/select.pyd
Binary files differ
diff --git a/allbins/zx297520v3/prj_mifi/scripts_linux/bin/imagefs_tool/jffs2_extract/unicodedata.pyd b/allbins/zx297520v3/prj_mifi/scripts_linux/bin/imagefs_tool/jffs2_extract/unicodedata.pyd
new file mode 100755
index 0000000..9bd28c9
--- /dev/null
+++ b/allbins/zx297520v3/prj_mifi/scripts_linux/bin/imagefs_tool/jffs2_extract/unicodedata.pyd
Binary files differ
diff --git a/allbins/zx297520v3/prj_mifi/scripts_linux/bin/imagefs_tool/jffs2_extract/w9xpopen.exe b/allbins/zx297520v3/prj_mifi/scripts_linux/bin/imagefs_tool/jffs2_extract/w9xpopen.exe
new file mode 100755
index 0000000..ad17977
--- /dev/null
+++ b/allbins/zx297520v3/prj_mifi/scripts_linux/bin/imagefs_tool/jffs2_extract/w9xpopen.exe
Binary files differ
diff --git a/allbins/zx297520v3/prj_mifi/scripts_linux/bin/imagefs_tool/pack_image/_hashlib.pyd b/allbins/zx297520v3/prj_mifi/scripts_linux/bin/imagefs_tool/pack_image/_hashlib.pyd
new file mode 100755
index 0000000..7d25690
--- /dev/null
+++ b/allbins/zx297520v3/prj_mifi/scripts_linux/bin/imagefs_tool/pack_image/_hashlib.pyd
Binary files differ
diff --git a/allbins/zx297520v3/prj_mifi/scripts_linux/bin/imagefs_tool/pack_image/bz2.pyd b/allbins/zx297520v3/prj_mifi/scripts_linux/bin/imagefs_tool/pack_image/bz2.pyd
new file mode 100755
index 0000000..4a5e564
--- /dev/null
+++ b/allbins/zx297520v3/prj_mifi/scripts_linux/bin/imagefs_tool/pack_image/bz2.pyd
Binary files differ
diff --git a/allbins/zx297520v3/prj_mifi/scripts_linux/bin/imagefs_tool/pack_image/library.zip b/allbins/zx297520v3/prj_mifi/scripts_linux/bin/imagefs_tool/pack_image/library.zip
new file mode 100755
index 0000000..a6dab9d
--- /dev/null
+++ b/allbins/zx297520v3/prj_mifi/scripts_linux/bin/imagefs_tool/pack_image/library.zip
Binary files differ
diff --git a/allbins/zx297520v3/prj_mifi/scripts_linux/bin/imagefs_tool/pack_image/pack_image.exe b/allbins/zx297520v3/prj_mifi/scripts_linux/bin/imagefs_tool/pack_image/pack_image.exe
new file mode 100755
index 0000000..32b2eff
--- /dev/null
+++ b/allbins/zx297520v3/prj_mifi/scripts_linux/bin/imagefs_tool/pack_image/pack_image.exe
Binary files differ
diff --git a/allbins/zx297520v3/prj_mifi/scripts_linux/bin/imagefs_tool/pack_image/python27.dll b/allbins/zx297520v3/prj_mifi/scripts_linux/bin/imagefs_tool/pack_image/python27.dll
new file mode 100755
index 0000000..cdd5d35
--- /dev/null
+++ b/allbins/zx297520v3/prj_mifi/scripts_linux/bin/imagefs_tool/pack_image/python27.dll
Binary files differ
diff --git a/allbins/zx297520v3/prj_mifi/scripts_linux/bin/imagefs_tool/pack_image/select.pyd b/allbins/zx297520v3/prj_mifi/scripts_linux/bin/imagefs_tool/pack_image/select.pyd
new file mode 100755
index 0000000..dc50785
--- /dev/null
+++ b/allbins/zx297520v3/prj_mifi/scripts_linux/bin/imagefs_tool/pack_image/select.pyd
Binary files differ
diff --git a/allbins/zx297520v3/prj_mifi/scripts_linux/bin/imagefs_tool/pack_image/unicodedata.pyd b/allbins/zx297520v3/prj_mifi/scripts_linux/bin/imagefs_tool/pack_image/unicodedata.pyd
new file mode 100755
index 0000000..9bd28c9
--- /dev/null
+++ b/allbins/zx297520v3/prj_mifi/scripts_linux/bin/imagefs_tool/pack_image/unicodedata.pyd
Binary files differ
diff --git a/allbins/zx297520v3/prj_mifi/scripts_linux/bin/imagefs_tool/pack_image/w9xpopen.exe b/allbins/zx297520v3/prj_mifi/scripts_linux/bin/imagefs_tool/pack_image/w9xpopen.exe
new file mode 100755
index 0000000..ad17977
--- /dev/null
+++ b/allbins/zx297520v3/prj_mifi/scripts_linux/bin/imagefs_tool/pack_image/w9xpopen.exe
Binary files differ
diff --git a/allbins/zx297520v3/prj_mifi/scripts_linux/bin/mkjffs2.ap_cpuap.split.log b/allbins/zx297520v3/prj_mifi/scripts_linux/bin/mkjffs2.ap_cpuap.split.log
new file mode 100644
index 0000000..4cf7c9d
--- /dev/null
+++ b/allbins/zx297520v3/prj_mifi/scripts_linux/bin/mkjffs2.ap_cpuap.split.log
@@ -0,0 +1,4 @@
+srcbins_path ../../imagefs/ap_cpuap.bin ^^^^^^^^
+out_path ../../imagefs ^^^^^^^^
+product config file ../../product.ini ^^^^^^^^
+Split and compress bins complete!
diff --git a/allbins/zx297520v3/prj_mifi/scripts_linux/bin/mkjffs2.ap_recovery.split.log b/allbins/zx297520v3/prj_mifi/scripts_linux/bin/mkjffs2.ap_recovery.split.log
new file mode 100644
index 0000000..e27015f
--- /dev/null
+++ b/allbins/zx297520v3/prj_mifi/scripts_linux/bin/mkjffs2.ap_recovery.split.log
@@ -0,0 +1,4 @@
+srcbins_path ../../imagefs/ap_recovery.bin ^^^^^^^^
+out_path ../../imagefs ^^^^^^^^
+product config file ../../product.ini ^^^^^^^^
+Split and compress bins complete!
diff --git a/allbins/zx297520v3/prj_mifi/scripts_linux/bin/mkjffs2.bat b/allbins/zx297520v3/prj_mifi/scripts_linux/bin/mkjffs2.bat
new file mode 100755
index 0000000..1e602fe
--- /dev/null
+++ b/allbins/zx297520v3/prj_mifi/scripts_linux/bin/mkjffs2.bat
@@ -0,0 +1,39 @@
+@echo off
+
+cd /d %~dp0
+
+set dev=%1
+set indir=%2
+set outfile=%3
+set outfile1=%indir%
+set split_enable=no
+
+if exist %outfile1%.tar (
+ del %outfile1%.tar
+)
+if exist %outfile1%.tgz (
+ del %outfile1%.tgz
+)
+
+copy %indir%\product.ini product.ini
+del %indir%\product.ini
+
+
+for /f "usebackq tokens=1,2* delims==" %%i in (`readini.bat product.ini [imagefs] largefile_split_enable`) do set split_enable=%%j
+
+cd imagefs_tool\pack_image\
+
+if /i %split_enable%==yes (
+ ./pack_image.py -d ..\..\%indir%\ap_cpuap.bin -c "split" -p ..\..\product.ini -o ..\..\%indir% > ..\..\mkjffs2.ap_cpuap.split.log
+ ./pack_image.py -d ..\..\%indir%\evb_cpuphy.bin -c "split" -p ..\..\product.ini -o ..\..\%indir% > ..\..\mkjffs2.evb_cpuphy.split.log
+ ./pack_image.py -d ..\..\%indir%\ap_recovery.bin -c "split" -p ..\..\product.ini -o ..\..\%indir% > ..\..\mkjffs2.ap_recovery.split.log
+)
+
+./pack_image.py -d ..\..\%indir% -c "mkjffs2" -p ..\..\product.ini -o ..\..\%outfile% > ..\..\mkjffs2.%outfile%.log
+
+cd ..
+cd ..
+7za a -ttar %outfile1%.tar %indir%
+7za a -tgzip %outfile1%.tgz %outfile1%.tar
+
+
diff --git a/allbins/zx297520v3/prj_mifi/scripts_linux/bin/mkjffs2.evb_cpuphy.split.log b/allbins/zx297520v3/prj_mifi/scripts_linux/bin/mkjffs2.evb_cpuphy.split.log
new file mode 100644
index 0000000..d75749e
--- /dev/null
+++ b/allbins/zx297520v3/prj_mifi/scripts_linux/bin/mkjffs2.evb_cpuphy.split.log
@@ -0,0 +1,4 @@
+srcbins_path ../../imagefs/evb_cpuphy.bin ^^^^^^^^
+out_path ../../imagefs ^^^^^^^^
+product config file ../../product.ini ^^^^^^^^
+Split and compress bins complete!
diff --git a/allbins/zx297520v3/prj_mifi/scripts_linux/bin/mkjffs2.sh b/allbins/zx297520v3/prj_mifi/scripts_linux/bin/mkjffs2.sh
new file mode 100755
index 0000000..4dd8826
--- /dev/null
+++ b/allbins/zx297520v3/prj_mifi/scripts_linux/bin/mkjffs2.sh
@@ -0,0 +1,29 @@
+#!/bin/bash
+dev=$1
+indir=$2
+outfile=$3
+outfile1=$indir
+split_enable="yes"
+echo $indir
+echo $outfile
+curPath=$(readlink -f "$(dirname "$0")")
+echo $curPath
+mkfspath="/imagefs_tool/bin/"
+cd $curPath$mkfspath
+echo $curPath$mkfspath
+ap_cpuappath="/ap_cpuap.bin"
+evb_cpuphy="/evb_cpuphy.bin"
+ap_recovery="/ap_recovery.bin"
+split_enable=$(python ./pack_image.py -p ../../product.ini -r "largefile_split_enable,imagefs")
+if [ "$split_enable" = "yes" ];then
+python ./pack_image.py -d ../../$indir$ap_cpuappath -c "split,imagefs" -p ../../product.ini -o ../../$indir > ../../mkjffs2.ap_cpuap.split.log
+python ./pack_image.py -d ../../$indir$evb_cpuphy -c "split,imagefs" -p ../../product.ini -o ../../$indir > ../../mkjffs2.evb_cpuphy.split.log
+python ./pack_image.py -d ../../$indir$ap_recovery -c "split,imagefs" -p ../../product.ini -o ../../$indir > ../../mkjffs2.ap_recovery.split.log
+fi
+python ./pack_image.py -d ../../$indir -c "mkjffs2" -p ../../product.ini -o ../../$outfile
+cd ..
+cd ..
+fileType1=".tar"
+7za a -ttar $outfile1$fileType1 $indir
+fileType=".tgz"
+7za a -tgzip $outfile1$fileType $outfile1$fileType1
\ No newline at end of file
diff --git a/allbins/zx297520v3/prj_mifi/scripts_linux/bin/mkjffs2/cygwin1.dll b/allbins/zx297520v3/prj_mifi/scripts_linux/bin/mkjffs2/cygwin1.dll
new file mode 100755
index 0000000..3db37e7
--- /dev/null
+++ b/allbins/zx297520v3/prj_mifi/scripts_linux/bin/mkjffs2/cygwin1.dll
Binary files differ
diff --git a/allbins/zx297520v3/prj_mifi/scripts_linux/bin/mkjffs2/mkfs.jffs2.exe b/allbins/zx297520v3/prj_mifi/scripts_linux/bin/mkjffs2/mkfs.jffs2.exe
new file mode 100755
index 0000000..51fd1eb
--- /dev/null
+++ b/allbins/zx297520v3/prj_mifi/scripts_linux/bin/mkjffs2/mkfs.jffs2.exe
Binary files differ
diff --git a/allbins/zx297520v3/prj_mifi/scripts_linux/bin/product.ini b/allbins/zx297520v3/prj_mifi/scripts_linux/bin/product.ini
new file mode 100644
index 0000000..9497260
--- /dev/null
+++ b/allbins/zx297520v3/prj_mifi/scripts_linux/bin/product.ini
@@ -0,0 +1,13 @@
+[imagefs]
+largefile_split_enable=yes
+lzma_dict=512
+split_figure=2
+compress_algorithm=lzma
+split_block_size=262144
+mkfs_jffs2=-v -X lzma --pagesize=0x800 --eraseblock=0x8000 --little-endian --no-cleanmarkers --squash
+
+[nvrofs]
+mkfs_jffs2=-v -X lzma --pagesize=0x800 --eraseblock=0x8000 --little-endian --no-cleanmarkers --squash
+
+[resource]
+mkfs_jffs2=-v -X lzma --pagesize=0x800 --eraseblock=0x8000 --little-endian --no-cleanmarkers --squash
\ No newline at end of file
diff --git a/allbins/zx297520v3/prj_mifi/scripts_linux/bin/readini.bat b/allbins/zx297520v3/prj_mifi/scripts_linux/bin/readini.bat
new file mode 100755
index 0000000..7e793e5
--- /dev/null
+++ b/allbins/zx297520v3/prj_mifi/scripts_linux/bin/readini.bat
@@ -0,0 +1,47 @@
+@echo off
+
+set item=
+set filepath=
+set section=
+setlocal EnableDelayedExpansion
+if not "%~1"=="" (
+ set filepath=%1
+) else goto :file_err
+if not exist %filepath% goto :file_err
+if not "%~2"=="" (
+ set section=%2
+ if "!section:~0,1!"==""^" set section=!section:~1!
+ if "!section:~-1!"==""^" set section=!section:~0,-1!
+) else goto :section
+if not "%~3"=="" (
+ set item=%3
+ if "!item:~0,1!"==""^" set item=!item:~1!
+ if "!item:~-1!"==""^" set item=!item:~0,-1!
+)
+setlocal disableDelayedExpansion
+set ×ֶοªÊ¼=
+for /f "usebackq delims=[]" %%i in (`find /i "%section%" /n %filepath%`) do set ×ֶοªÊ¼=%%i
+for /f "usebackq tokens=1* delims== skip=%×ֶοªÊ¼%" %%i in (`type %filepath%`) do (
+ set a=%%i
+ setlocal EnableDelayedExpansion
+ if "!a:~0,1!"=="[" goto :eof
+ if not "!a:~0,1!"==";" (
+ setlocal disableDelayedExpansion
+ for /f "delims=;" %%x in ("%%i=%%j") do (
+ if not DEFINED item (echo %%x) else (if /i "%%i"=="%item%" echo %%x)
+ )
+ )
+)
+goto :eof
+
+:section
+setlocal disableDelayedExpansion
+for /f "usebackq delims== skip=2" %%i in (`find /i "[" %filepath%`) do echo %%i
+goto :eof
+
+:file_err
+setlocal disableDelayedExpansion
+echo.
+echo %1ÎļþδÕÒµ½»òδÊäÈë!
+echo.
+goto :eof
\ No newline at end of file
diff --git a/allbins/zx297520v3/prj_mifi/scripts_linux/bin/readini.sh b/allbins/zx297520v3/prj_mifi/scripts_linux/bin/readini.sh
new file mode 100755
index 0000000..7e793e5
--- /dev/null
+++ b/allbins/zx297520v3/prj_mifi/scripts_linux/bin/readini.sh
@@ -0,0 +1,47 @@
+@echo off
+
+set item=
+set filepath=
+set section=
+setlocal EnableDelayedExpansion
+if not "%~1"=="" (
+ set filepath=%1
+) else goto :file_err
+if not exist %filepath% goto :file_err
+if not "%~2"=="" (
+ set section=%2
+ if "!section:~0,1!"==""^" set section=!section:~1!
+ if "!section:~-1!"==""^" set section=!section:~0,-1!
+) else goto :section
+if not "%~3"=="" (
+ set item=%3
+ if "!item:~0,1!"==""^" set item=!item:~1!
+ if "!item:~-1!"==""^" set item=!item:~0,-1!
+)
+setlocal disableDelayedExpansion
+set ×ֶοªÊ¼=
+for /f "usebackq delims=[]" %%i in (`find /i "%section%" /n %filepath%`) do set ×ֶοªÊ¼=%%i
+for /f "usebackq tokens=1* delims== skip=%×ֶοªÊ¼%" %%i in (`type %filepath%`) do (
+ set a=%%i
+ setlocal EnableDelayedExpansion
+ if "!a:~0,1!"=="[" goto :eof
+ if not "!a:~0,1!"==";" (
+ setlocal disableDelayedExpansion
+ for /f "delims=;" %%x in ("%%i=%%j") do (
+ if not DEFINED item (echo %%x) else (if /i "%%i"=="%item%" echo %%x)
+ )
+ )
+)
+goto :eof
+
+:section
+setlocal disableDelayedExpansion
+for /f "usebackq delims== skip=2" %%i in (`find /i "[" %filepath%`) do echo %%i
+goto :eof
+
+:file_err
+setlocal disableDelayedExpansion
+echo.
+echo %1ÎļþδÕÒµ½»òδÊäÈë!
+echo.
+goto :eof
\ No newline at end of file
diff --git a/allbins/zx297520v3/prj_mifi/scripts_linux/copybin_mifi.bat b/allbins/zx297520v3/prj_mifi/scripts_linux/copybin_mifi.bat
new file mode 100755
index 0000000..ddfecff
--- /dev/null
+++ b/allbins/zx297520v3/prj_mifi/scripts_linux/copybin_mifi.bat
@@ -0,0 +1,44 @@
+@echo off
+
+
+set COPY_CURPATH=%cd%
+set COPY_TOPDIR=%COPY_CURPATH%\..\..\..\..
+set COPY_CHIP_NAME=zx297520v3
+set COPY_PRJ_NAME=prj_mifi
+set COPY_RPMBINPATH=%COPY_TOPDIR%\rpm\project\%COPY_CHIP_NAME%\bin\tos\modem_7520v3
+set COPY_CPUBINPATH=%COPY_TOPDIR%\allbins\%COPY_CHIP_NAME%\prj_evb\nv
+set COPY_PHYBINPATH=%COPY_TOPDIR%\cp\phy\bin\%COPY_CHIP_NAME%\merge_lte_220a1_bin\ps
+set COPY_NVBINPATH=%COPY_TOPDIR%\allbins\%COPY_CHIP_NAME%\%COPY_PRJ_NAME%\nv
+set COPY_ALLBINDIR=%COPY_TOPDIR%\allbins\%COPY_CHIP_NAME%\%COPY_PRJ_NAME%\allbins
+set COPY_OTHERBINDIR=%COPY_TOPDIR%\allbins\%COPY_CHIP_NAME%\%COPY_PRJ_NAME%\elf
+set COPY_PARTITIONDIR=%COPY_TOPDIR%\allbins\%COPY_CHIP_NAME%\%COPY_PRJ_NAME%\config
+set COPY_BOOT_DIR=%COPY_TOPDIR%\boot
+
+set COPY_INVALIDNV=amtComm_nvro_0x00000000.bin phyGgeAmtCali_nvro_0x00050000.bin ^
+ phyLteAmtCali_nvro_0x00008000.bin phyTdsAmtCali_nvro_0x00048000.bin ^
+ phyWcdmaAmtCali_nvro_0x00058000.bin phyLteaAmtCali_nvro_0x00078000.bin
+
+echo "Enter call copybin.bat!!!!"
+
+call :CopyFile %COPY_RPMBINPATH%\evb_cpurpm.img %COPY_ALLBINDIR%\
+call :CopyFile %COPY_PHYBINPATH%\evb_cpuphy.bin %COPY_ALLBINDIR%\
+call :CopyFile %COPY_CPUBINPATH%\ %COPY_ALLBINDIR%\
+call :CopyFile %COPY_CPUBINPATH%\merge_lte\ %COPY_ALLBINDIR%\
+if not exist %COPY_ALLBINDIR%\config mkdir %COPY_ALLBINDIR%\config
+xcopy /e /y %COPY_CPUBINPATH%\config %COPY_ALLBINDIR%\config
+call :CopyFile %COPY_NVBINPATH%\ %COPY_ALLBINDIR%\
+call :CopyFile %COPY_PARTITIONDIR%\ %COPY_ALLBINDIR%\
+
+
+call :CopyFile %COPY_RPMBINPATH%\evb_cpurpm.elf %COPY_OTHERBINDIR%\
+call :CopyFile %COPY_RPMBINPATH%\evb_cpurpm.map %COPY_OTHERBINDIR%\
+call :CopyFile %COPY_PHYBINPATH%\evb_cpuphy.map %COPY_OTHERBINDIR%\
+call :CopyFile %COPY_PHYBINPATH%\evb_cpuphy_out.7z %COPY_OTHERBINDIR%\
+
+for %%i in (%COPY_INVALIDNV%) do del %COPY_ALLBINDIR%\%%i /F
+
+goto :EOF
+
+:CopyFile
+copy %1 %2 /Y || echo "copy %1 to %2 failed!!!"
+goto :EOF
diff --git a/allbins/zx297520v3/prj_mifi/scripts_linux/copybin_mifi.sh b/allbins/zx297520v3/prj_mifi/scripts_linux/copybin_mifi.sh
new file mode 100755
index 0000000..4a099b0
--- /dev/null
+++ b/allbins/zx297520v3/prj_mifi/scripts_linux/copybin_mifi.sh
@@ -0,0 +1,78 @@
+#!/bin/bash
+COPY_CURPATH=$(pwd)
+COPY_TOPDIR="${COPY_CURPATH}/../../../.."
+# 设定芯片名称和项目名称
+COPY_CHIP_NAME="zx297520v3"
+COPY_PRJ_BOOTNAME="mifi_mini_64"
+COPY_PRJ_NAME="prj_mifi"
+COPY_PRJ_APNAME="prj_mifi_min_aic8800dw"
+RFTYPE="230A"
+DCXO="_dcxo"
+FLASH="_min"
+# 设定各个路径
+COPY_RPMBINPATH="${COPY_TOPDIR}/rpm/project/${COPY_CHIP_NAME}/bin/tos/modem_7520v3"
+COPY_CPUBINPATH="${COPY_TOPDIR}/allbins/${COPY_CHIP_NAME}/prj_evb/nv"
+COPY_CPUBIN_RF230A_PATH="${COPY_TOPDIR}/allbins/${COPY_CHIP_NAME}/prj_evb/nv_230a"
+COPY_PHYBINPATH="${COPY_TOPDIR}/cp/phy/bin/${COPY_CHIP_NAME}/merge_lte_230a_bin/ps${DCXO}"
+# COPY_PHYBINPATH="${COPY_TOPDIR}/cp/phy/bin/${COPY_CHIP_NAME}/merge_lte_230a_bin/ps_dcxo"
+COPY_NVBINPATH="${COPY_TOPDIR}/allbins/${COPY_CHIP_NAME}/${COPY_PRJ_NAME}/nv"
+COPY_MINNVBINPATH_DCXO="${COPY_TOPDIR}/allbins/${COPY_CHIP_NAME}/${COPY_PRJ_NAME}/nv${FLASH}_aic8800dw${DCXO}"
+COPY_ALLBINDIR="${COPY_TOPDIR}/allbins/${COPY_CHIP_NAME}/${COPY_PRJ_NAME}/allbins${FLASH}_aic8800dw${DCXO}"
+COPY_OTHERBINDIR="${COPY_TOPDIR}/allbins/${COPY_CHIP_NAME}/${COPY_PRJ_NAME}/elf${FLASH}_aic8800dw${DCXO}"
+COPY_PARTITIONDIR="${COPY_TOPDIR}/allbins/${COPY_CHIP_NAME}/${COPY_PRJ_NAME}/config${FLASH}_64"
+
+# COPY_MINNVBINPATH_DCXO="${COPY_TOPDIR}/allbins/${COPY_CHIP_NAME}/${COPY_PRJ_NAME}/nv_min_230a_dcxo"
+# COPY_ALLBINDIR="${COPY_TOPDIR}/allbins/${COPY_CHIP_NAME}/${COPY_PRJ_NAME}/allbins_min_230a_dcxo"
+# COPY_OTHERBINDIR="${COPY_TOPDIR}/allbins/${COPY_CHIP_NAME}/${COPY_PRJ_NAME}/elf_min_230a_dcxo"
+# COPY_PARTITIONDIR="${COPY_TOPDIR}/allbins/${COPY_CHIP_NAME}/${COPY_PRJ_NAME}/config_min"
+COPY_BOOT_DIR="${COPY_TOPDIR}/boot"
+echo "Enter call copybin.bat!!!!"
+
+
+cp $COPY_RPMBINPATH/evb_cpurpm.img $COPY_ALLBINDIR/
+cp $COPY_PHYBINPATH/evb_cpuphy.bin $COPY_ALLBINDIR/
+cp -r $COPY_CPUBINPATH/* $COPY_ALLBINDIR/
+cp -r $COPY_CPUBINPATH/merge_lte/* $COPY_ALLBINDIR/
+if [ ! -d $COPY_ALLBINDIR/config ];then
+ mkdir $COPY_ALLBINDIR/config
+fi
+cp -r $COPY_CPUBINPATH/config $COPY_ALLBINDIR/config
+cp -r $COPY_CPUBIN_RF230A_PATH/* $COPY_ALLBINDIR/
+cp -r $COPY_CPUBIN_RF230A_PATH/config $COPY_ALLBINDIR/config
+cp -r $COPY_NVBINPATH/* $COPY_ALLBINDIR/
+cp -r $COPY_MINNVBINPATH_DCXO/* $COPY_ALLBINDIR/
+cp -r $COPY_PARTITIONDIR/* $COPY_ALLBINDIR/
+#cp -r /work/v3t/nv_p42u21/partition.bin $COPY_ALLBINDIR/
+
+cp $COPY_RPMBINPATH/evb_cpurpm.elf ${COPY_OTHERBINDIR}/
+cp $COPY_RPMBINPATH/evb_cpurpm.map ${COPY_OTHERBINDIR}/
+cp $COPY_PHYBINPATH/evb_cpuphy.map ${COPY_OTHERBINDIR}/
+cp $COPY_PHYBINPATH/evb_cpuphy_out.7z ${COPY_OTHERBINDIR}/
+
+COPY_INVALIDNV="amtComm_nvro_0x00000000.bin phyGgeAmtCali_nvro_0x00050000.bin \
+ phyLteAmtCali_nvro_0x00008000.bin phyTdsAmtCali_nvro_0x00048000.bin \
+ phyWcdmaAmtCali_nvro_0x00058000.bin phyLteaAmtCali_nvro_0x00078000.bin"
+
+for file in $COPY_INVALIDNV_ARRAY; do
+ rm -f "$COPY_ALLBINDIR/$file"
+done
+
+cp -r ${COPY_TOPDIR}/ap/project/zx297520v3/${COPY_PRJ_APNAME}/bin/${RFTYPE}${DCXO}/allbins/* ${COPY_ALLBINDIR}/
+cp -r ${COPY_TOPDIR}/ap/project/zx297520v3/${COPY_PRJ_APNAME}/bin/${RFTYPE}${DCXO}/elfs/* ${COPY_OTHERBINDIR}/
+
+
+#boot allbins
+cp ${COPY_TOPDIR}/boot/prj/zx297520v3/${COPY_PRJ_BOOTNAME}/bin/dl_on/zloader.bin ${COPY_ALLBINDIR}/
+cp ${COPY_TOPDIR}/boot/prj/zx297520v3/${COPY_PRJ_BOOTNAME}/bin/uboot.bin ${COPY_ALLBINDIR}/
+cp ${COPY_TOPDIR}/boot/prj/zx297520v3/${COPY_PRJ_BOOTNAME}/bin/uboot-mirr.bin ${COPY_ALLBINDIR}/
+cp ${COPY_TOPDIR}/boot/prj/zx297520v3/${COPY_PRJ_BOOTNAME}/bin/tloader.bin ${COPY_ALLBINDIR}/
+cp ${COPY_TOPDIR}/boot/prj/zx297520v3/${COPY_PRJ_BOOTNAME}/bin/tboot.bin ${COPY_ALLBINDIR}/
+
+#boot elf
+cp ${COPY_TOPDIR}/boot/prj/zx297520v3/${COPY_PRJ_BOOTNAME}/bin/dl_on/z-load.map ${COPY_OTHERBINDIR}/
+cp ${COPY_TOPDIR}/boot/prj/zx297520v3/${COPY_PRJ_BOOTNAME}/bin/dl_on/z-load ${COPY_OTHERBINDIR}/
+cp ${COPY_TOPDIR}/boot/prj/zx297520v3/${COPY_PRJ_BOOTNAME}/bin/u-boot.map ${COPY_OTHERBINDIR}/
+cp ${COPY_TOPDIR}/boot/prj/zx297520v3/${COPY_PRJ_BOOTNAME}/bin/u-boot ${COPY_OTHERBINDIR}/
+cp ${COPY_TOPDIR}/boot/prj/zx297520v3/${COPY_PRJ_BOOTNAME}/bin/z-load.map ${COPY_OTHERBINDIR}/
+cp ${COPY_TOPDIR}/boot/prj/zx297520v3/${COPY_PRJ_BOOTNAME}/bin/z-load ${COPY_OTHERBINDIR}/
+
diff --git a/allbins/zx297520v3/prj_mifi/scripts_linux/copybin_mifi_f231.bat b/allbins/zx297520v3/prj_mifi/scripts_linux/copybin_mifi_f231.bat
new file mode 100755
index 0000000..c8c8e99
--- /dev/null
+++ b/allbins/zx297520v3/prj_mifi/scripts_linux/copybin_mifi_f231.bat
@@ -0,0 +1,46 @@
+@echo off
+
+
+set COPY_CURPATH=%cd%
+set COPY_TOPDIR=%COPY_CURPATH%\..\..\..\..
+set COPY_CHIP_NAME=zx297520v3
+set COPY_PRJ_NAME=prj_mifi
+set COPY_RPMBINPATH=%COPY_TOPDIR%\rpm\project\%COPY_CHIP_NAME%\bin\tos\modem_7520v3
+set COPY_CPUBINPATH=%COPY_TOPDIR%\allbins\%COPY_CHIP_NAME%\prj_evb\nv
+set COPY_PHYBINPATH=%COPY_TOPDIR%\cp\phy\bin\%COPY_CHIP_NAME%\merge_lte_220a1_bin\ps
+set COPY_NVBINPATH=%COPY_TOPDIR%\allbins\%COPY_CHIP_NAME%\%COPY_PRJ_NAME%\nv
+set COPY_NVBINPATH_F231=%COPY_TOPDIR%\allbins\%COPY_CHIP_NAME%\%COPY_PRJ_NAME%\nv_f231
+set COPY_ALLBINDIR=%COPY_TOPDIR%\allbins\%COPY_CHIP_NAME%\%COPY_PRJ_NAME%\allbins_f231
+set COPY_OTHERBINDIR=%COPY_TOPDIR%\allbins\%COPY_CHIP_NAME%\%COPY_PRJ_NAME%\elf_f231
+set COPY_PARTITIONDIR=%COPY_TOPDIR%\allbins\%COPY_CHIP_NAME%\%COPY_PRJ_NAME%\config
+set COPY_BOOT_DIR=%COPY_TOPDIR%\boot
+
+set COPY_INVALIDNV=amtComm_nvro_0x00000000.bin phyGgeAmtCali_nvro_0x00050000.bin ^
+ phyLteAmtCali_nvro_0x00008000.bin phyTdsAmtCali_nvro_0x00048000.bin ^
+ phyWcdmaAmtCali_nvro_0x00058000.bin phyLteaAmtCali_nvro_0x00078000.bin
+
+echo "Enter call copybin.bat!!!!"
+
+call :CopyFile %COPY_RPMBINPATH%\evb_cpurpm.img %COPY_ALLBINDIR%\
+call :CopyFile %COPY_PHYBINPATH%\evb_cpuphy.bin %COPY_ALLBINDIR%\
+call :CopyFile %COPY_CPUBINPATH%\ %COPY_ALLBINDIR%\
+call :CopyFile %COPY_CPUBINPATH%\merge_lte\ %COPY_ALLBINDIR%\
+if not exist %COPY_ALLBINDIR%\config mkdir %COPY_ALLBINDIR%\config
+xcopy /e /y %COPY_CPUBINPATH%\config %COPY_ALLBINDIR%\config
+call :CopyFile %COPY_NVBINPATH%\ %COPY_ALLBINDIR%\
+call :CopyFile %COPY_NVBINPATH_F231%\ %COPY_ALLBINDIR%\
+call :CopyFile %COPY_PARTITIONDIR%\ %COPY_ALLBINDIR%\
+
+
+call :CopyFile %COPY_RPMBINPATH%\evb_cpurpm.elf %COPY_OTHERBINDIR%\
+call :CopyFile %COPY_RPMBINPATH%\evb_cpurpm.map %COPY_OTHERBINDIR%\
+call :CopyFile %COPY_PHYBINPATH%\evb_cpuphy.map %COPY_OTHERBINDIR%\
+call :CopyFile %COPY_PHYBINPATH%\evb_cpuphy_out.7z %COPY_OTHERBINDIR%\
+
+for %%i in (%COPY_INVALIDNV%) do del %COPY_ALLBINDIR%\%%i /F
+
+goto :EOF
+
+:CopyFile
+copy %1 %2 /Y || echo "copy %1 to %2 failed!!!"
+goto :EOF
diff --git a/allbins/zx297520v3/prj_mifi/scripts_linux/copybin_mifi_min.bat b/allbins/zx297520v3/prj_mifi/scripts_linux/copybin_mifi_min.bat
new file mode 100755
index 0000000..31caba2
--- /dev/null
+++ b/allbins/zx297520v3/prj_mifi/scripts_linux/copybin_mifi_min.bat
@@ -0,0 +1,46 @@
+@echo off
+
+
+set COPY_CURPATH=%cd%
+set COPY_TOPDIR=%COPY_CURPATH%\..\..\..\..
+set COPY_CHIP_NAME=zx297520v3
+set COPY_PRJ_NAME=prj_mifi
+set COPY_RPMBINPATH=%COPY_TOPDIR%\rpm\project\%COPY_CHIP_NAME%\bin\tos\modem_7520v3
+set COPY_CPUBINPATH=%COPY_TOPDIR%\allbins\%COPY_CHIP_NAME%\prj_evb\nv
+set COPY_PHYBINPATH=%COPY_TOPDIR%\cp\phy\bin\%COPY_CHIP_NAME%\merge_lte_220a1_bin\ps
+set COPY_NVBINPATH=%COPY_TOPDIR%\allbins\%COPY_CHIP_NAME%\%COPY_PRJ_NAME%\nv
+set COPY_NVBINPATH_MIN=%COPY_TOPDIR%\allbins\%COPY_CHIP_NAME%\%COPY_PRJ_NAME%\nv_min
+set COPY_ALLBINDIR=%COPY_TOPDIR%\allbins\%COPY_CHIP_NAME%\%COPY_PRJ_NAME%\allbins_min
+set COPY_OTHERBINDIR=%COPY_TOPDIR%\allbins\%COPY_CHIP_NAME%\%COPY_PRJ_NAME%\elf_min
+set COPY_PARTITIONDIR=%COPY_TOPDIR%\allbins\%COPY_CHIP_NAME%\%COPY_PRJ_NAME%\config_min
+set COPY_BOOT_DIR=%COPY_TOPDIR%\boot
+
+set COPY_INVALIDNV=amtComm_nvro_0x00000000.bin phyGgeAmtCali_nvro_0x00050000.bin ^
+ phyLteAmtCali_nvro_0x00008000.bin phyTdsAmtCali_nvro_0x00048000.bin ^
+ phyWcdmaAmtCali_nvro_0x00058000.bin phyLteaAmtCali_nvro_0x00078000.bin
+
+echo "Enter call copybin.bat!!!!"
+
+call :CopyFile %COPY_RPMBINPATH%\evb_cpurpm.img %COPY_ALLBINDIR%\
+call :CopyFile %COPY_PHYBINPATH%\evb_cpuphy.bin %COPY_ALLBINDIR%\
+call :CopyFile %COPY_CPUBINPATH%\ %COPY_ALLBINDIR%\
+call :CopyFile %COPY_CPUBINPATH%\merge_lte\ %COPY_ALLBINDIR%\
+if not exist %COPY_ALLBINDIR%\config mkdir %COPY_ALLBINDIR%\config
+xcopy /e /y %COPY_CPUBINPATH%\config %COPY_ALLBINDIR%\config
+call :CopyFile %COPY_NVBINPATH%\ %COPY_ALLBINDIR%\
+call :CopyFile %COPY_NVBINPATH_MIN%\ %COPY_ALLBINDIR%\
+call :CopyFile %COPY_PARTITIONDIR%\ %COPY_ALLBINDIR%\
+
+
+call :CopyFile %COPY_RPMBINPATH%\evb_cpurpm.elf %COPY_OTHERBINDIR%\
+call :CopyFile %COPY_RPMBINPATH%\evb_cpurpm.map %COPY_OTHERBINDIR%\
+call :CopyFile %COPY_PHYBINPATH%\evb_cpuphy.map %COPY_OTHERBINDIR%\
+call :CopyFile %COPY_PHYBINPATH%\evb_cpuphy_out.7z %COPY_OTHERBINDIR%\
+
+for %%i in (%COPY_INVALIDNV%) do del %COPY_ALLBINDIR%\%%i /F
+
+goto :EOF
+
+:CopyFile
+copy %1 %2 /Y || echo "copy %1 to %2 failed!!!"
+goto :EOF
diff --git a/allbins/zx297520v3/prj_mifi/scripts_linux/copybin_mifi_min_aic8800dw_dcxo.bat b/allbins/zx297520v3/prj_mifi/scripts_linux/copybin_mifi_min_aic8800dw_dcxo.bat
new file mode 100755
index 0000000..f4b75ad
--- /dev/null
+++ b/allbins/zx297520v3/prj_mifi/scripts_linux/copybin_mifi_min_aic8800dw_dcxo.bat
@@ -0,0 +1,49 @@
+@echo off
+
+
+set COPY_CURPATH=%cd%
+set COPY_TOPDIR=%COPY_CURPATH%\..\..\..\..
+set COPY_CHIP_NAME=zx297520v3
+set COPY_PRJ_NAME=prj_mifi
+set COPY_RPMBINPATH=%COPY_TOPDIR%\rpm\project\%COPY_CHIP_NAME%\bin\tos\modem_7520v3
+set COPY_CPUBINPATH=%COPY_TOPDIR%\allbins\%COPY_CHIP_NAME%\prj_evb\nv
+set COPY_CPUBIN_RF230A_PATH=%COPY_TOPDIR%\allbins\%COPY_CHIP_NAME%\prj_evb\nv_230a
+set COPY_PHYBINPATH=%COPY_TOPDIR%\cp\phy\bin\%COPY_CHIP_NAME%\merge_lte_230a_bin\ps_dcxo
+set COPY_NVBINPATH=%COPY_TOPDIR%\allbins\%COPY_CHIP_NAME%\%COPY_PRJ_NAME%\nv
+set COPY_NVBINPATH_MIN_AIC8800DW_DCXO=%COPY_TOPDIR%\allbins\%COPY_CHIP_NAME%\%COPY_PRJ_NAME%\nv_min_aic8800dw_dcxo
+set COPY_ALLBINDIR=%COPY_TOPDIR%\allbins\%COPY_CHIP_NAME%\%COPY_PRJ_NAME%\allbins_min_aic8800dw_dcxo
+set COPY_OTHERBINDIR=%COPY_TOPDIR%\allbins\%COPY_CHIP_NAME%\%COPY_PRJ_NAME%\elf_min_aic8800dw_dcxo
+set COPY_PARTITIONDIR=%COPY_TOPDIR%\allbins\%COPY_CHIP_NAME%\%COPY_PRJ_NAME%\config_min_64
+set COPY_BOOT_DIR=%COPY_TOPDIR%\boot
+
+set COPY_INVALIDNV=amtComm_nvro_0x00000000.bin phyGgeAmtCali_nvro_0x00050000.bin ^
+ phyLteAmtCali_nvro_0x00008000.bin phyTdsAmtCali_nvro_0x00048000.bin ^
+ phyWcdmaAmtCali_nvro_0x00058000.bin phyLteaAmtCali_nvro_0x00078000.bin
+
+echo "Enter call copybin.bat!!!!"
+
+call :CopyFile %COPY_RPMBINPATH%\evb_cpurpm.img %COPY_ALLBINDIR%\
+call :CopyFile %COPY_PHYBINPATH%\evb_cpuphy.bin %COPY_ALLBINDIR%\
+call :CopyFile %COPY_CPUBINPATH%\ %COPY_ALLBINDIR%\
+call :CopyFile %COPY_CPUBINPATH%\merge_lte\ %COPY_ALLBINDIR%\
+if not exist %COPY_ALLBINDIR%\config mkdir %COPY_ALLBINDIR%\config
+xcopy /e /y %COPY_CPUBINPATH%\config %COPY_ALLBINDIR%\config
+call :CopyFile %COPY_CPUBIN_RF230A_PATH%\ %COPY_ALLBINDIR%\
+xcopy /e /y %COPY_CPUBIN_RF230A_PATH%\config %COPY_ALLBINDIR%\config
+call :CopyFile %COPY_NVBINPATH%\ %COPY_ALLBINDIR%\
+call :CopyFile %COPY_NVBINPATH_MIN_AIC8800DW_DCXO%\ %COPY_ALLBINDIR%\
+call :CopyFile %COPY_PARTITIONDIR%\ %COPY_ALLBINDIR%\
+
+
+call :CopyFile %COPY_RPMBINPATH%\evb_cpurpm.elf %COPY_OTHERBINDIR%\
+call :CopyFile %COPY_RPMBINPATH%\evb_cpurpm.map %COPY_OTHERBINDIR%\
+call :CopyFile %COPY_PHYBINPATH%\evb_cpuphy.map %COPY_OTHERBINDIR%\
+call :CopyFile %COPY_PHYBINPATH%\evb_cpuphy_out.7z %COPY_OTHERBINDIR%\
+
+for %%i in (%COPY_INVALIDNV%) do del %COPY_ALLBINDIR%\%%i /F
+
+goto :EOF
+
+:CopyFile
+copy %1 %2 /Y || echo "copy %1 to %2 failed!!!"
+goto :EOF
diff --git a/allbins/zx297520v3/prj_mifi/scripts_linux/copybin_mifi_min_sv6158_dcxo.bat b/allbins/zx297520v3/prj_mifi/scripts_linux/copybin_mifi_min_sv6158_dcxo.bat
new file mode 100755
index 0000000..633beeb
--- /dev/null
+++ b/allbins/zx297520v3/prj_mifi/scripts_linux/copybin_mifi_min_sv6158_dcxo.bat
@@ -0,0 +1,49 @@
+@echo off
+
+
+set COPY_CURPATH=%cd%
+set COPY_TOPDIR=%COPY_CURPATH%\..\..\..\..
+set COPY_CHIP_NAME=zx297520v3
+set COPY_PRJ_NAME=prj_mifi
+set COPY_RPMBINPATH=%COPY_TOPDIR%\rpm\project\%COPY_CHIP_NAME%\bin\tos\modem_7520v3
+set COPY_CPUBINPATH=%COPY_TOPDIR%\allbins\%COPY_CHIP_NAME%\prj_evb\nv
+set COPY_CPUBIN_RF230A_PATH=%COPY_TOPDIR%\allbins\%COPY_CHIP_NAME%\prj_evb\nv_230a
+set COPY_PHYBINPATH=%COPY_TOPDIR%\cp\phy\bin\%COPY_CHIP_NAME%\merge_lte_230a_bin\ps_dcxo
+set COPY_NVBINPATH=%COPY_TOPDIR%\allbins\%COPY_CHIP_NAME%\%COPY_PRJ_NAME%\nv
+set COPY_NVBINPATH_MIN_SV6158_DCXO=%COPY_TOPDIR%\allbins\%COPY_CHIP_NAME%\%COPY_PRJ_NAME%\nv_min_sv6158_dcxo
+set COPY_ALLBINDIR=%COPY_TOPDIR%\allbins\%COPY_CHIP_NAME%\%COPY_PRJ_NAME%\allbins_min_sv6158_dcxo
+set COPY_OTHERBINDIR=%COPY_TOPDIR%\allbins\%COPY_CHIP_NAME%\%COPY_PRJ_NAME%\elf_min_sv6158_dcxo
+set COPY_PARTITIONDIR=%COPY_TOPDIR%\allbins\%COPY_CHIP_NAME%\%COPY_PRJ_NAME%\config_min
+set COPY_BOOT_DIR=%COPY_TOPDIR%\boot
+
+set COPY_INVALIDNV=amtComm_nvro_0x00000000.bin phyGgeAmtCali_nvro_0x00050000.bin ^
+ phyLteAmtCali_nvro_0x00008000.bin phyTdsAmtCali_nvro_0x00048000.bin ^
+ phyWcdmaAmtCali_nvro_0x00058000.bin phyLteaAmtCali_nvro_0x00078000.bin
+
+echo "Enter call copybin.bat!!!!"
+
+call :CopyFile %COPY_RPMBINPATH%\evb_cpurpm.img %COPY_ALLBINDIR%\
+call :CopyFile %COPY_PHYBINPATH%\evb_cpuphy.bin %COPY_ALLBINDIR%\
+call :CopyFile %COPY_CPUBINPATH%\ %COPY_ALLBINDIR%\
+call :CopyFile %COPY_CPUBINPATH%\merge_lte\ %COPY_ALLBINDIR%\
+if not exist %COPY_ALLBINDIR%\config mkdir %COPY_ALLBINDIR%\config
+xcopy /e /y %COPY_CPUBINPATH%\config %COPY_ALLBINDIR%\config
+call :CopyFile %COPY_CPUBIN_RF230A_PATH%\ %COPY_ALLBINDIR%\
+xcopy /e /y %COPY_CPUBIN_RF230A_PATH%\config %COPY_ALLBINDIR%\config
+call :CopyFile %COPY_NVBINPATH%\ %COPY_ALLBINDIR%\
+call :CopyFile %COPY_NVBINPATH_MIN_SV6158_DCXO%\ %COPY_ALLBINDIR%\
+call :CopyFile %COPY_PARTITIONDIR%\ %COPY_ALLBINDIR%\
+
+
+call :CopyFile %COPY_RPMBINPATH%\evb_cpurpm.elf %COPY_OTHERBINDIR%\
+call :CopyFile %COPY_RPMBINPATH%\evb_cpurpm.map %COPY_OTHERBINDIR%\
+call :CopyFile %COPY_PHYBINPATH%\evb_cpuphy.map %COPY_OTHERBINDIR%\
+call :CopyFile %COPY_PHYBINPATH%\evb_cpuphy_out.7z %COPY_OTHERBINDIR%\
+
+for %%i in (%COPY_INVALIDNV%) do del %COPY_ALLBINDIR%\%%i /F
+
+goto :EOF
+
+:CopyFile
+copy %1 %2 /Y || echo "copy %1 to %2 failed!!!"
+goto :EOF
diff --git a/allbins/zx297520v3/prj_mifi/scripts_linux/copybin_mifi_min_xr819.bat b/allbins/zx297520v3/prj_mifi/scripts_linux/copybin_mifi_min_xr819.bat
new file mode 100755
index 0000000..5425c02
--- /dev/null
+++ b/allbins/zx297520v3/prj_mifi/scripts_linux/copybin_mifi_min_xr819.bat
@@ -0,0 +1,49 @@
+@echo off
+
+
+set COPY_CURPATH=%cd%
+set COPY_TOPDIR=%COPY_CURPATH%\..\..\..\..
+set COPY_CHIP_NAME=zx297520v3
+set COPY_PRJ_NAME=prj_mifi
+set COPY_RPMBINPATH=%COPY_TOPDIR%\rpm\project\%COPY_CHIP_NAME%\bin\tos\modem_7520v3
+set COPY_CPUBINPATH=%COPY_TOPDIR%\allbins\%COPY_CHIP_NAME%\prj_evb\nv
+set COPY_CPUBIN_RF230A_PATH=%COPY_TOPDIR%\allbins\%COPY_CHIP_NAME%\prj_evb\nv_230a
+set COPY_PHYBINPATH=%COPY_TOPDIR%\cp\phy\bin\%COPY_CHIP_NAME%\merge_lte_230a_bin\ps
+set COPY_NVBINPATH=%COPY_TOPDIR%\allbins\%COPY_CHIP_NAME%\%COPY_PRJ_NAME%\nv
+set COPY_NVBINPATH_MIN_XR819=%COPY_TOPDIR%\allbins\%COPY_CHIP_NAME%\%COPY_PRJ_NAME%\nv_min_xr819
+set COPY_ALLBINDIR=%COPY_TOPDIR%\allbins\%COPY_CHIP_NAME%\%COPY_PRJ_NAME%\allbins_min_xr819
+set COPY_OTHERBINDIR=%COPY_TOPDIR%\allbins\%COPY_CHIP_NAME%\%COPY_PRJ_NAME%\elf_min_xr819
+set COPY_PARTITIONDIR=%COPY_TOPDIR%\allbins\%COPY_CHIP_NAME%\%COPY_PRJ_NAME%\config_min
+set COPY_BOOT_DIR=%COPY_TOPDIR%\boot
+
+set COPY_INVALIDNV=amtComm_nvro_0x00000000.bin phyGgeAmtCali_nvro_0x00050000.bin ^
+ phyLteAmtCali_nvro_0x00008000.bin phyTdsAmtCali_nvro_0x00048000.bin ^
+ phyWcdmaAmtCali_nvro_0x00058000.bin phyLteaAmtCali_nvro_0x00078000.bin
+
+echo "Enter call copybin.bat!!!!"
+
+call :CopyFile %COPY_RPMBINPATH%\evb_cpurpm.img %COPY_ALLBINDIR%\
+call :CopyFile %COPY_PHYBINPATH%\evb_cpuphy.bin %COPY_ALLBINDIR%\
+call :CopyFile %COPY_CPUBINPATH%\ %COPY_ALLBINDIR%\
+call :CopyFile %COPY_CPUBINPATH%\merge_lte\ %COPY_ALLBINDIR%\
+if not exist %COPY_ALLBINDIR%\config mkdir %COPY_ALLBINDIR%\config
+xcopy /e /y %COPY_CPUBINPATH%\config %COPY_ALLBINDIR%\config
+call :CopyFile %COPY_CPUBIN_RF230A_PATH%\ %COPY_ALLBINDIR%\
+xcopy /e /y %COPY_CPUBIN_RF230A_PATH%\config %COPY_ALLBINDIR%\config
+call :CopyFile %COPY_NVBINPATH%\ %COPY_ALLBINDIR%\
+call :CopyFile %COPY_NVBINPATH_MIN_XR819%\ %COPY_ALLBINDIR%\
+call :CopyFile %COPY_PARTITIONDIR%\ %COPY_ALLBINDIR%\
+
+
+call :CopyFile %COPY_RPMBINPATH%\evb_cpurpm.elf %COPY_OTHERBINDIR%\
+call :CopyFile %COPY_RPMBINPATH%\evb_cpurpm.map %COPY_OTHERBINDIR%\
+call :CopyFile %COPY_PHYBINPATH%\evb_cpuphy.map %COPY_OTHERBINDIR%\
+call :CopyFile %COPY_PHYBINPATH%\evb_cpuphy_out.7z %COPY_OTHERBINDIR%\
+
+for %%i in (%COPY_INVALIDNV%) do del %COPY_ALLBINDIR%\%%i /F
+
+goto :EOF
+
+:CopyFile
+copy %1 %2 /Y || echo "copy %1 to %2 failed!!!"
+goto :EOF
diff --git a/allbins/zx297520v3/prj_mifi/scripts_linux/copybin_mifi_min_xr819_dcxo.bat b/allbins/zx297520v3/prj_mifi/scripts_linux/copybin_mifi_min_xr819_dcxo.bat
new file mode 100755
index 0000000..ebfa90c
--- /dev/null
+++ b/allbins/zx297520v3/prj_mifi/scripts_linux/copybin_mifi_min_xr819_dcxo.bat
@@ -0,0 +1,51 @@
+@echo off
+
+
+set COPY_CURPATH=%cd%
+set COPY_TOPDIR=%COPY_CURPATH%\..\..\..\..
+set COPY_CHIP_NAME=zx297520v3
+set COPY_PRJ_NAME=prj_mifi
+set COPY_RPMBINPATH=%COPY_TOPDIR%\rpm\project\%COPY_CHIP_NAME%\bin\tos\modem_7520v3
+set COPY_CPUBINPATH=%COPY_TOPDIR%\allbins\%COPY_CHIP_NAME%\prj_evb\nv
+set COPY_CPUBIN_RF230A_PATH=%COPY_TOPDIR%\allbins\%COPY_CHIP_NAME%\prj_evb\nv_230a
+set COPY_PHYBINPATH=%COPY_TOPDIR%\cp\phy\bin\%COPY_CHIP_NAME%\merge_lte_230a_bin\ps_dcxo
+set COPY_NVBINPATH=%COPY_TOPDIR%\allbins\%COPY_CHIP_NAME%\%COPY_PRJ_NAME%\nv
+set COPY_NVBINPATH_MIN_XR819=%COPY_TOPDIR%\allbins\%COPY_CHIP_NAME%\%COPY_PRJ_NAME%\nv_min_xr819
+set COPY_NVBINPATH_MIN_XR819_DCXO=%COPY_TOPDIR%\allbins\%COPY_CHIP_NAME%\%COPY_PRJ_NAME%\nv_min_xr819_dcxo
+set COPY_ALLBINDIR=%COPY_TOPDIR%\allbins\%COPY_CHIP_NAME%\%COPY_PRJ_NAME%\allbins_min_xr819_dcxo
+set COPY_OTHERBINDIR=%COPY_TOPDIR%\allbins\%COPY_CHIP_NAME%\%COPY_PRJ_NAME%\elf_min_xr819_dcxo
+set COPY_PARTITIONDIR=%COPY_TOPDIR%\allbins\%COPY_CHIP_NAME%\%COPY_PRJ_NAME%\config_min
+set COPY_BOOT_DIR=%COPY_TOPDIR%\boot
+
+set COPY_INVALIDNV=amtComm_nvro_0x00000000.bin phyGgeAmtCali_nvro_0x00050000.bin ^
+ phyLteAmtCali_nvro_0x00008000.bin phyTdsAmtCali_nvro_0x00048000.bin ^
+ phyWcdmaAmtCali_nvro_0x00058000.bin phyLteaAmtCali_nvro_0x00078000.bin
+
+echo "Enter call copybin.bat!!!!"
+
+call :CopyFile %COPY_RPMBINPATH%\evb_cpurpm.img %COPY_ALLBINDIR%\
+call :CopyFile %COPY_PHYBINPATH%\evb_cpuphy.bin %COPY_ALLBINDIR%\
+call :CopyFile %COPY_CPUBINPATH%\ %COPY_ALLBINDIR%\
+call :CopyFile %COPY_CPUBINPATH%\merge_lte\ %COPY_ALLBINDIR%\
+if not exist %COPY_ALLBINDIR%\config mkdir %COPY_ALLBINDIR%\config
+xcopy /e /y %COPY_CPUBINPATH%\config %COPY_ALLBINDIR%\config
+call :CopyFile %COPY_CPUBIN_RF230A_PATH%\ %COPY_ALLBINDIR%\
+xcopy /e /y %COPY_CPUBIN_RF230A_PATH%\config %COPY_ALLBINDIR%\config
+call :CopyFile %COPY_NVBINPATH%\ %COPY_ALLBINDIR%\
+call :CopyFile %COPY_NVBINPATH_MIN_XR819%\ %COPY_ALLBINDIR%\
+call :CopyFile %COPY_NVBINPATH_MIN_XR819_DCXO%\ %COPY_ALLBINDIR%\
+call :CopyFile %COPY_PARTITIONDIR%\ %COPY_ALLBINDIR%\
+
+
+call :CopyFile %COPY_RPMBINPATH%\evb_cpurpm.elf %COPY_OTHERBINDIR%\
+call :CopyFile %COPY_RPMBINPATH%\evb_cpurpm.map %COPY_OTHERBINDIR%\
+call :CopyFile %COPY_PHYBINPATH%\evb_cpuphy.map %COPY_OTHERBINDIR%\
+call :CopyFile %COPY_PHYBINPATH%\evb_cpuphy_out.7z %COPY_OTHERBINDIR%\
+
+for %%i in (%COPY_INVALIDNV%) do del %COPY_ALLBINDIR%\%%i /F
+
+goto :EOF
+
+:CopyFile
+copy %1 %2 /Y || echo "copy %1 to %2 failed!!!"
+goto :EOF
diff --git a/allbins/zx297520v3/prj_mifi/scripts_linux/merge.sh b/allbins/zx297520v3/prj_mifi/scripts_linux/merge.sh
new file mode 100755
index 0000000..6c6dcd6
--- /dev/null
+++ b/allbins/zx297520v3/prj_mifi/scripts_linux/merge.sh
@@ -0,0 +1,30 @@
+#!/bin/bash
+
+./Image -n NVRWInOneImage.ini
+./Image -n NVRWOInOneImage.ini
+./Image -n NVRWInOneImage_f231.ini
+./Image -n NVRWOInOneImage_f231.ini
+./Image -n NVRWInOneImage_min.ini
+./Image -n NVRWOInOneImage_min.ini
+./Image -n NVRWInOneImage_min_xr819.ini
+./Image -n NVRWOInOneImage_min_xr819.ini
+./Image -n NVRWInOneImage_min_xr819_dcxo.ini
+./Image -n NVRWOInOneImage_min_xr819_dcxo.ini
+./Image -n NVRWInOneImage_min_sv6158_dcxo.ini
+./Image -n NVRWOInOneImage_min_sv6158_dcxo.ini
+./Image -n NVRWInOneImage_min_aic8800dw_dcxo.ini
+./Image -n NVRWOInOneImage_min_aic8800dw_dcxo.ini
+./Image -f FsImage.ini
+./Image -f FsImage_f231.ini
+./Image -f FsImage_min.ini
+./Image -f FsImage_min_xr819.ini
+./Image -f FsImage_min_xr819_dcxo.ini
+./Image -f FsImage_min_sv6158_dcxo.ini
+./Image -f FsImage_min_aic8800dw_dcxo.ini
+./Image -m AllInOneImage.ini
+./Image -m AllInOneImage_f231.ini
+./Image -m AllInOneImage_min.ini
+./Image -m AllInOneImage_min_xr819.ini
+./Image -m AllInOneImage_min_xr819_dcxo.ini
+./Image -m AllInOneImage_min_sv6158_dcxo.ini
+./Image -m AllInOneImage_min_aic8800dw_dcxo.ini
\ No newline at end of file
diff --git a/file_touch.sh b/file_touch.sh
new file mode 100755
index 0000000..480d0d9
--- /dev/null
+++ b/file_touch.sh
@@ -0,0 +1,9 @@
+if [ $# -ne 2 ];then
+ echo example : ./file_touch.sh lynq/CPE ap/Makefile
+ echo Create the lynq/CPE/ap/ directory and copy the ap/Makefile file to the lynq/CPE/ap/ directory
+ exit
+fi
+str=$1/$(dirname $2)
+echo $str/$(basename $2)
+mkdir -p $str
+cp $2 $str
diff --git a/lynq/MIFI/ap/os/linux/linux-3.4.x/arch/arm/mach-zx297520v3/include/mach/gpio_cfg.h b/lynq/MIFI/ap/os/linux/linux-3.4.x/arch/arm/mach-zx297520v3/include/mach/gpio_cfg.h
new file mode 100644
index 0000000..cfbc997
--- /dev/null
+++ b/lynq/MIFI/ap/os/linux/linux-3.4.x/arch/arm/mach-zx297520v3/include/mach/gpio_cfg.h
@@ -0,0 +1,423 @@
+/*******************************************************************************
+ * Copyright (C) 2016, ZXIC Corporation.
+ *
+ * File Name: gpio_cfg.h
+ * File Mark:
+ * Description:define gpio config for EVB
+
+ * Author: ZXIC
+ * Date: 2016-07-19
+ *
+ * History 1:
+ ********************************************************************************/
+
+#ifndef _GPIO_CFG_H
+#define _GPIO_CFG_H
+
+/****************************************************************************
+* Include files
+****************************************************************************/
+#include <mach/gpio.h>
+
+
+/****************************************************************************
+* Local Macros
+****************************************************************************/
+/*
+modules:
+#define PIN_MODULE_FUNC ZX29_GPIO_XX
+*/
+
+
+/******************* Peripherals********************/
+
+#if 0 /*For Examples*/
+/* Keypad */
+#define PIN_KEYPAD_KPD_POWER ZX29_GPIO_52
+#define PIN_KEYPAD_KPD_WPS ZX29_GPIO_75
+#define PIN_KEYPAD_KPD_RESET ZX29_GPIO_76
+#endif
+
+/************************Platform********************/
+
+/**************pmu******************/
+#define PIN_PMU_INT ZX29_GPIO_47
+#define PIN_PMU_PSHOLD ZX29_GPIO_24
+
+#define PMU_INT_FUNC_SEL GPIO47_EXT_INT0
+#define PMU_PSHOLD_FUNC_SEL GPIO24_GPIO24
+
+/**************charge***************/
+#ifdef CONFIG_ARCH_ZX297520V3_MIFI
+#define PIN_CHARGE_INT ZX29_GPIO_48
+#define PIN_CHARGE_BOOST_GPIO1 ZX29_GPIO_35
+#define PIN_CHARGE_BOOST_GPIO2 ZX29_GPIO_36
+#define PIN_CHARGE_BOOST_GPIO3 ZX29_GPIO_37
+#define PIN_CHARGE_BOOST_LOADSWITCH ZX29_GPIO_38
+
+#define CHARGE_INT_FUNC_SEL GPIO48_EXT_INT1
+#define CHARGE_BOOST_GPIO1_FUNC_SEL GPIO35_GPIO35
+#define CHARGE_BOOST_GPIO2_FUNC_SEL GPIO36_GPIO36
+#define CHARGE_BOOST_GPIO3_FUNC_SEL GPIO37_GPIO37
+#define CHARGE_BOOST_LOADSWITCH_FUNC_SEL GPIO38_GPIO38
+#elif defined CONFIG_ARCH_ZX297520V3_UFI
+#define PIN_CHARGE_INT ZX29_GPIO_48
+#define PIN_CHARGE_BOOST_GPIO1 ZX29_GPIO_35
+#define PIN_CHARGE_BOOST_GPIO2 ZX29_GPIO_36
+#define PIN_CHARGE_BOOST_GPIO3 ZX29_GPIO_37
+#define PIN_CHARGE_BOOST_LOADSWITCH ZX29_GPIO_38
+
+#define CHARGE_INT_FUNC_SEL GPIO48_EXT_INT1
+#define CHARGE_BOOST_GPIO1_FUNC_SEL GPIO35_GPIO35
+#define CHARGE_BOOST_GPIO2_FUNC_SEL GPIO36_GPIO36
+#define CHARGE_BOOST_GPIO3_FUNC_SEL GPIO37_GPIO37
+#define CHARGE_BOOST_LOADSWITCH_FUNC_SEL GPIO38_GPIO38
+#elif defined CONFIG_ARCH_ZX297520V3_FWP
+#define PIN_CHARGE_EN_GPIO ZX29_GPIO_40
+#define PIN_CHARGE_STATE_GPIO ZX29_GPIO_52
+#define PIN_CHARGE_CTRL_GPIO ZX29_GPIO_NULL
+#define PIN_CHARGE_CHGIN_GPIO ZX29_GPIO_49
+
+#define CHARGE_EN_GPIO_SEL GPIO40_GPIO40
+#define CHARGE_STATE_GPIO_SEL GPIO52_GPIO52
+#define CHARGE_CTRL_GPIO_SEL 0xff//undefine
+#define CHARGE_CHGIN_GPIO_SEL GPIO49_GPIO49
+
+#define CHARGE_STATE_FUNC_SEL GPIO52_EXT_INT5
+#define CHARGE_CHGIN_FUNC_SEL GPIO49_EXT_INT2
+
+#else
+#define PIN_CHARGE_EN_GPIO ZX29_GPIO_131
+#define PIN_CHARGE_STATE_GPIO ZX29_GPIO_54
+#define PIN_CHARGE_CTRL_GPIO ZX29_GPIO_130
+#define PIN_CHARGE_CHGIN_GPIO ZX29_GPIO_48
+
+#define CHARGE_EN_GPIO_SEL GPIO131_GPIO131
+#define CHARGE_STATE_GPIO_SEL GPIO54_GPIO54
+#define CHARGE_CTRL_GPIO_SEL GPIO130_GPIO130
+#define CHARGE_CHGIN_GPIO_SEL GPIO48_GPIO48
+
+#define CHARGE_STATE_FUNC_SEL GPIO54_EXT_INT7
+#define CHARGE_CHGIN_FUNC_SEL GPIO48_EXT_INT1
+#endif
+/***************lcd*****************/
+#ifdef CONFIG_ARCH_ZX297520V3_FWP
+#define PIN_LCD_BLG ZX29_GPIO_53
+#define LCD_BLG_FUNC_SEL GPIO53_GPIO53
+#define PIN_LCD_RST ZX29_GPIO_125
+#define LCD_RST_FUNC_SEL GPIO125_GPIO125
+#else
+#define PIN_LCD_BLG ZX29_GPIO_121
+#define LCD_BLG_FUNC_SEL GPIO121_GPIO121
+#define PIN_LCD_RST ZX29_GPIO_120
+#define LCD_RST_FUNC_SEL GPIO120_GPIO120
+#endif
+
+#define PIN_SPI_DCX ZX29_GPIO_27
+#define SPI_DCX_FUNC_SEL GPIO27_GPIO27
+
+#define PIN_SPI_CS ZX29_GPIO_25
+#define PIN_SPI_CLK ZX29_GPIO_26
+#define PIN_SPI_TXD ZX29_GPIO_28
+
+#define LCD_CS_SPI_FUNC_SEL GPIO25_SSP0_CS
+#define LCD_CLK_SPI_FUNC_SEL GPIO26_SSP0_CLK
+#define LCD_TXD_SPI_FUNC_SEL GPIO28_SSP0_TXD
+
+#define LCD_CS_GPIO_FUNC_SEL GPIO25_GPIO25
+#define LCD_CLK_GPIO_FUNC_SEL GPIO26_GPIO26
+#define LCD_TXD_GPIO_FUNC_SEL GPIO28_GPIO28
+
+#ifdef CONFIG_FB_LCD_TE_ON
+#define PIN_LCD_TE ZX29_GPIO_49
+#define GPIO_TE_FUNC_SEL GPIO49_EXT_INT2
+#define LCD_TE_INT EX2_INT
+#define LCD_TE_INT_LEVEL INT_NEGEDGE
+#endif
+
+/***************led*****************/
+#if defined(CONFIG_ARCH_ZX297520V3_CPE_SWITCH)
+#define PIN_LED_POWER ZX29_GPIO_21
+#define PIN_LED_LTE_RED ZX29_GPIO_45
+#define PIN_LED_LTE_BLUE ZX29_GPIO_46
+#define PIN_LED_WIFI ZX29_GPIO_86
+#define PIN_LED_WPS ZX29_GPIO_72
+#define PIN_LED_RJ11 ZX29_GPIO_22
+#define PIN_LED_4G_1 ZX29_GPIO_29
+#define PIN_LED_4G_2 ZX29_GPIO_30
+#define PIN_LED_4G_3 ZX29_GPIO_73
+#define PIN_LED_4G_4 ZX29_GPIO_74
+#define PIN_LED_4G_5 ZX29_GPIO_75
+
+
+#define LED_POWER_FUNC_SEL GPIO21_GPIO21
+#define LED_LTE_RED_FUNC_SEL GPIO45_GPIO45
+#define LED_LTE_BLUE_FUNC_SEL GPIO46_GPIO46
+#define LED_WIFI_FUNC_SEL GPIO86_GPIO86
+#define LED_WPS_FUNC_SEL GPIO72_GPIO72
+#define LED_RJ11_FUNC_SEL GPIO22_GPIO22
+#define LED_4G_1_FUNC_SEL GPIO29_GPIO29
+#define LED_4G_2_FUNC_SEL GPIO30_GPIO30
+#define LED_4G_3_FUNC_SEL GPIO73_GPIO73
+#define LED_4G_4_FUNC_SEL GPIO74_GPIO74
+#define LED_4G_5_FUNC_SEL GPIO75_GPIO75
+
+#elif defined(CONFIG_ARCH_ZX297520V3_MIFI)
+#ifdef CONFIG_MIN_VERSION
+#define PIN_LED_MODEM_RED ZX29_GPIO_124
+#define PIN_LED_MODEM_GREEN ZX29_GPIO_125
+//#define PIN_LED_MODEM_BLUE ZX29_GPIO_123
+#define PIN_LED_SMS ZX29_GPIO_40
+#define PIN_LED_WIFI ZX29_GPIO_39
+#define PIN_LED_BATTARY_RED ZX29_GPIO_41
+#define PIN_LED_BATTARY_GREEN ZX29_GPIO_42
+
+#define LED_MODEM_RED_FUNC_SEL GPIO124_GPIO124
+#define LED_MODEM_GREEN_FUNC_SEL GPIO125_GPIO125
+//#define LED_MODEM_BLUE_FUNC_SEL GPIO123_GPIO123
+#define LED_SMS_FUNC_SEL GPIO40_GPIO40
+#define LED_WIFI_FUNC_SEL GPIO39_GPIO39
+#define LED_BATTARY_RED_FUNC_SEL GPIO41_GPIO41
+#define LED_BATTARY_GREEN_SEL GPIO42_GPIO42
+#else
+#define PIN_LED_MODEM_RED ZX29_GPIO_124
+//#define PIN_LED_MODEM_GREEN ZX29_GPIO_44
+#define PIN_LED_MODEM_BLUE ZX29_GPIO_123
+#define PIN_LED_SMS ZX29_GPIO_40
+#define PIN_LED_WIFI ZX29_GPIO_39
+#define PIN_LED_BATTARY_RED ZX29_GPIO_42/*red and green changed*/
+#define PIN_LED_BATTARY_GREEN ZX29_GPIO_41
+
+#define LED_MODEM_RED_FUNC_SEL GPIO124_GPIO124
+//#define LED_MODEM_GREEN_FUNC_SEL GPIO44_GPIO44
+#define LED_MODEM_BLUE_FUNC_SEL GPIO123_GPIO123
+#define LED_SMS_FUNC_SEL GPIO40_GPIO40
+#define LED_WIFI_FUNC_SEL GPIO39_GPIO39
+#define LED_BATTARY_RED_FUNC_SEL GPIO42_GPIO42
+#define LED_BATTARY_GREEN_SEL GPIO41_GPIO41
+#endif/*CONFIG_MIN_VERSION*/
+
+#elif defined(CONFIG_ARCH_ZX297520V3_UFI)
+#ifdef CONFIG_MIN_VERSION
+#define PIN_LED_MODEM_RED ZX29_GPIO_124
+#define PIN_LED_MODEM_GREEN ZX29_GPIO_125
+//#define PIN_LED_MODEM_BLUE ZX29_GPIO_123
+#define PIN_LED_SMS ZX29_GPIO_40
+#define PIN_LED_WIFI ZX29_GPIO_39
+#define PIN_LED_BATTARY_RED ZX29_GPIO_41
+#define PIN_LED_BATTARY_GREEN ZX29_GPIO_42
+
+#define LED_MODEM_RED_FUNC_SEL GPIO124_GPIO124
+#define LED_MODEM_GREEN_FUNC_SEL GPIO125_GPIO125
+//#define LED_MODEM_BLUE_FUNC_SEL GPIO123_GPIO123
+#define LED_SMS_FUNC_SEL GPIO40_GPIO40
+#define LED_WIFI_FUNC_SEL GPIO39_GPIO39
+#define LED_BATTARY_RED_FUNC_SEL GPIO41_GPIO41
+#define LED_BATTARY_GREEN_SEL GPIO42_GPIO42
+#else
+#define PIN_LED_MODEM_RED ZX29_GPIO_124
+//#define PIN_LED_MODEM_GREEN ZX29_GPIO_44
+#define PIN_LED_MODEM_BLUE ZX29_GPIO_123
+#define PIN_LED_SMS ZX29_GPIO_40
+#define PIN_LED_WIFI ZX29_GPIO_39
+#define PIN_LED_BATTARY_RED ZX29_GPIO_42/*red and green changed*/
+#define PIN_LED_BATTARY_GREEN ZX29_GPIO_41
+
+#define LED_MODEM_RED_FUNC_SEL GPIO124_GPIO124
+//#define LED_MODEM_GREEN_FUNC_SEL GPIO44_GPIO44
+#define LED_MODEM_BLUE_FUNC_SEL GPIO123_GPIO123
+#define LED_SMS_FUNC_SEL GPIO40_GPIO40
+#define LED_WIFI_FUNC_SEL GPIO39_GPIO39
+#define LED_BATTARY_RED_FUNC_SEL GPIO42_GPIO42
+#define LED_BATTARY_GREEN_SEL GPIO41_GPIO41
+#endif/*CONFIG_MIN_VERSION*/
+
+#else
+#ifdef _V3PHONE_TYPE_C31F_
+
+#define PIN_LED_FLASHLIGHT ZX29_GPIO_121
+#define PIN_LED_MOTOR ZX29_GPIO_125
+#define LED_FLASHLIGHT_FUNC_SEL GPIO121_GPIO121
+#define LED_MOTOR_FUNC_SEL GPIO125_GPIO125
+#else
+//#define PIN_LED_FLASHLIGHT ZX29_GPIO_45
+#define PIN_LED_MOTOR ZX29_GPIO_120
+
+//#define LED_FLASHLIGHT_FUNC_SEL GPIO45_GPIO45
+#define LED_MOTOR_FUNC_SEL GPIO120_GPIO120
+#endif
+#endif
+/***************TP********************/
+#define PIN_TP_IRQ ZX29_GPIO_51
+#define PIN_TP_RST ZX29_GPIO_121
+#define TP_IRQ_FUN_SEL GPIO51_EXT_INT4
+#define TP_RST_GPIO_SEL GPIO121_GPIO121
+
+/***************kpd*****************/
+/*Keypad (power_on, ufi, ufi_reset) for ufi*/
+#if defined(CONFIG_ARCH_ZX297520V3_CPE_SWITCH)
+#define PIN_KPD_WIFI ZX29_GPIO_130
+#define PIN_KPD_WPS ZX29_GPIO_131
+#define PIN_KPD_RST ZX29_GPIO_49
+
+#define KPD_WIFI_FUNC_GPIO GPIO130_GPIO130
+#define KPD_WPS_FUNC_GPIO GPIO131_GPIO131
+#define KPD_RST_FUNC_GPIO GPIO49_GPIO49
+
+#define KPD_WIFI_FUNC_INT GPIO130_EXT_INT11
+#define KPD_WPS_FUNC_INT GPIO131_EXT_INT12
+#define KPD_RST_FUNC_INT GPIO49_EXT_INT2
+#else
+#define PIN_KPD_WPS ZX29_GPIO_131
+#define PIN_KPD_RST ZX29_GPIO_126
+/* #define KPD_POWER_FUNC_GPIO GPIO52_GPIO52 */
+#define KPD_WPS_FUNC_GPIO GPIO131_GPIO131
+#define KPD_RST_FUNC_GPIO GPIO126_GPIO126
+
+/* #define KPD_POWER_FUNC_INT GPIO52_EXT_INT2 */
+#define KPD_WPS_FUNC_INT GPIO131_EXT_INT12
+#define KPD_RST_FUNC_INT GPIO126_EXT_INT15
+
+#endif
+
+/********************High-speed transaction***********/
+/* SD */
+#define PIN_MMC_TF_CARD_DET ZX29_GPIO_51
+#define PIN_MMC_TF_CARD_DET_FUNC GPIO51_EXT_INT4
+#define PIN_MMC_TF_CARD_DET_GPIO_FUNC GPIO51_GPIO51
+
+/*WIFI*/
+/*-----------------------------------------------------------------------
+ BUCK_GPIO | PWR_CTL | CHIP_ENABLE | WAKEUP
+-------------------------------------------------------------------------
+ CPE ZX29_GPIO_77 ZX29_GPIO_42 ZX29_GPIO_71 ZX29_GPIO_57
+-------------------------------------------------------------------------
+ EVB -- ZX29_GPIO_27 ZX29_GPIO_71 ZX29_GPIO_57
+-------------------------------------------------------------------------
+ MDL ZX29_GPIO_77 ZX29_GPIO_42 ZX29_GPIO_71 ZX29_GPIO_57
+-------------------------------------------------------------------------
+ MIFI -- ZX29_GPIO_27 ZX29_GPIO_71 ZX29_GPIO_57
+------------------------------------------------------------------------*/
+//SOC bug, GPIO77 must be configed GPIO function before buck3v3 power on..
+#define PIN_WIFI_PWR_BUCK_GPIO ZX29_GPIO_77
+#define PIN_WIFI_PWR_BUCK_GPIO_SEL GPIO77_GPIO77
+
+//WIFI power control pin, EVB is 27.
+#define PIN_WIFI_PWR_CTL ZX29_GPIO_121
+#define PIN_WIFI_PWR_CTL_SEL GPIO121_GPIO121
+
+//WIFI chip enable pin.
+#ifdef CONFIG_ARCH_ZX297520V3_MIFI
+#define PIN_WIFI_CHIP_ENABLE ZX29_GPIO_85
+#define PIN_WIFI_CHIP_ENABLE_SEL GPIO85_GPIO85
+#elif defined (CONFIG_ARCH_ZX297520V3_UFI)
+#define PIN_WIFI_CHIP_ENABLE ZX29_GPIO_85
+#define PIN_WIFI_CHIP_ENABLE_SEL GPIO85_GPIO85
+#elif defined (CONFIG_ARCH_ZX297520V3_CPE)
+#define PIN_WIFI_CHIP_ENABLE ZX29_GPIO_120
+#define PIN_WIFI_CHIP_ENABLE_SEL GPIO120_GPIO120
+#elif defined (CONFIG_ARCH_ZX297520V3_CPE_SWITCH)
+#define PIN_WIFI_CHIP_ENABLE ZX29_GPIO_123
+#define PIN_WIFI_CHIP_ENABLE_SEL GPIO123_GPIO123
+#else
+#define PIN_WIFI_CHIP_ENABLE ZX29_GPIO_31
+#define PIN_WIFI_CHIP_ENABLE_SEL GPIO31_GPIO31
+#endif
+
+//WIFI wakeup pin
+#define PIN_WIFI_WAKEUP ZX29_GPIO_54
+#define PIN_WIFI_WAKEUP_SEL GPIO54_EXT_INT7
+
+//interrupte of wakeup pin.
+#define INT_WIFI_WAKEUP PCU_EX7_INT
+
+
+/********************Low-speed transaction***********/
+
+/* UART */
+#define PIN_UART0_RXD ZX29_GPIO_29 /*GPIO 29 / 30*/
+#define FNC_UART0_RXD GPIO29_UART0_RXD
+#define PIN_UART0_TXD ZX29_GPIO_30 /*GPIO 30 / 29*/
+#define FNC_UART0_TXD GPIO30_UART0_TXD
+#define PIN_UART0_CTS ZX29_GPIO_31 /*GPIO 31 / 120*/
+#define FNC_UART0_CTS GPIO31_UART0_CTS
+#define PIN_UART0_RTS ZX29_GPIO_32 /*GPIO 32 / 119*/
+#define FNC_UART0_RTS GPIO32_UART0_RTS
+
+#define PIN_UART1_RXD ZX29_GPIO_33 /*GPIO 33 / 32*/
+#define FNC_UART1_RXD GPIO33_UART1_RXD
+#define PIN_UART1_TXD ZX29_GPIO_34 /*GPIO 34 / 31*/
+#define FNC_UART1_TXD GPIO34_UART1_TXD
+#define PIN_UART1_CTS ZX29_GPIO_126 /*GPIO 126*/
+#define FNC_UART1_CTS GPIO126_UART1_CTS
+#define PIN_UART1_RTS ZX29_GPIO_125 /*GPIO 125*/
+#define FNC_UART1_RTS GPIO125_UART1_RTS
+
+#define PIN_UART2_RXD ZX29_GPIO_121 /*GPIO 121 / 33 /34*/
+#define FNC_UART2_RXD GPIO121_UART2_RXD
+#define PIN_UART2_TXD ZX29_GPIO_122 /*GPIO 122 / 34 /33*/
+#define FNC_UART2_TXD GPIO122_UART2_TXD
+#define PIN_UART2_CTS ZX29_GPIO_124 /*GPIO 124*/
+#define FNC_UART2_CTS GPIO124_UART2_CTS
+#define PIN_UART2_RTS ZX29_GPIO_123 /*GPIO 123*/
+#define FNC_UART2_RTS GPIO123_UART2_RTS
+
+/************* I2S ***************/
+#define PIN_I2S0_WS ZX29_GPIO_35
+#define PIN_I2S0_CLK ZX29_GPIO_36
+#define PIN_I2S0_DIN ZX29_GPIO_37
+#define PIN_I2S0_DOUT ZX29_GPIO_38
+
+#define PIN_I2S1_WS ZX29_GPIO_39
+#define PIN_I2S1_CLK ZX29_GPIO_40
+#define PIN_I2S1_DIN ZX29_GPIO_41
+#define PIN_I2S1_DOUT ZX29_GPIO_42
+
+#define FUN_I2S0_WS GPIO35_I2S0_WS
+#define FUN_I2S0_CLK GPIO36_I2S0_CLK
+#define FUN_I2S0_DIN GPIO37_I2S0_DIN
+#define FUN_I2S0_DOUT GPIO38_I2S0_DOUT
+
+#define FUN_I2S1_WS GPIO39_I2S1_WS
+#define FUN_I2S1_CLK GPIO40_I2S1_CLK
+#define FUN_I2S1_DIN GPIO41_I2S1_DIN
+#define FUN_I2S1_DOUT GPIO42_I2S1_DOUT
+
+/************* TDM ***************/
+#ifdef CONFIG_ARCH_ZX297520V3_CPE_SWITCH
+
+#define PIN_TDM_FS ZX29_GPIO_39
+#define PIN_TDM_CLK ZX29_GPIO_40
+#define PIN_TDM_DIN ZX29_GPIO_41
+#define PIN_TDM_DOUT ZX29_GPIO_42
+
+#define FUN_TDM_FS GPIO39_TDM_FS
+#define FUN_TDM_CLK GPIO40_TDM_CLK
+#define FUN_TDM_DIN GPIO41_TDM_DATA_IN
+#define FUN_TDM_DOUT GPIO42_TDM_DATA_OUT
+
+#else
+#define PIN_TDM_FS ZX29_GPIO_35
+#define PIN_TDM_CLK ZX29_GPIO_36
+#define PIN_TDM_DIN ZX29_GPIO_37
+#define PIN_TDM_DOUT ZX29_GPIO_38
+
+#define FUN_TDM_FS GPIO35_TDM_FS
+#define FUN_TDM_CLK GPIO36_TDM_CLK
+#define FUN_TDM_DIN GPIO37_TDM_DATA_IN
+#define FUN_TDM_DOUT GPIO38_TDM_DATA_OUT
+#endif
+
+/************* CODEC ***************/
+#define CODEC_EN ZX29_GPIO_123
+#define CODEC_REFCLK ZX29_GPIO_15
+#define CODEC_RESET ZX29_GPIO_122
+#define PIN_EARP_INT ZX29_GPIO_53
+#define EARP_INT_FUNC_SEL GPIO53_EXT_INT6
+
+/************* SLIC ***************/
+#ifdef CONFIG_ARCH_ZX297520V3_CPE_SWITCH
+#define SLIC_PWR_CTRL ZX29_GPIO_132
+#endif
+
+#endif
diff --git a/lynq/MIFI/ap/os/linux/linux-3.4.x/arch/arm/mach-zx297520v3/pwr_ctrl.c b/lynq/MIFI/ap/os/linux/linux-3.4.x/arch/arm/mach-zx297520v3/pwr_ctrl.c
new file mode 100755
index 0000000..7e4699b
--- /dev/null
+++ b/lynq/MIFI/ap/os/linux/linux-3.4.x/arch/arm/mach-zx297520v3/pwr_ctrl.c
@@ -0,0 +1,385 @@
+/*
+ * linux/arch/arm/mach-zx297520v2/pwr_ctrl.c
+ *
+ * Copyright (C) 2013 ZTE-TSP
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; either version 2 of the License, or
+ * (at your option) any later version.
+ */
+
+#include <linux/clk.h>
+#include <linux/errno.h>
+#include <linux/interrupt.h>
+#include <linux/irq.h>
+#include <linux/debugfs.h>
+#include <linux/seq_file.h>
+#include <linux/kernel.h>
+#include <linux/list.h>
+#include <linux/module.h>
+#include <linux/io.h>
+
+#include <mach/gpio.h>
+#include <mach/gpio_def.h>
+#include <linux/gpio.h>
+#include <mach/pwr_ctrl.h>
+#include <linux/delay.h>
+#include <mach/pcu.h>
+//++yuwei 20160719
+#include <mach/gpio_cfg.h>
+//++
+
+static unsigned int pwr_buck3v3_init_flag = 0;
+static unsigned int pwr_buck3v3_status = 0;
+
+void pwr_buck3v3_init(void)
+{
+ int ret=0;
+
+ ret=gpio_request(PIN_WIFI_PWR_CTL,"buck3V3");
+ if(ret)
+ BUG();
+ //zx29_gpio_config(ZX29_GPIO_27, GPIO27_GPIO27);
+ zx29_gpio_config(PIN_WIFI_PWR_CTL, PIN_WIFI_PWR_CTL_SEL);
+ gpio_direction_output(PIN_WIFI_PWR_CTL, GPIO_LOW);
+}
+
+void pwr_buck3v3_on(power_buck3v3_id val)
+{
+ if(pwr_buck3v3_init_flag == 0)
+ {
+ pwr_buck3v3_init();
+ pwr_buck3v3_init_flag = 1;
+ mdelay(100);
+ }
+
+ if(pwr_buck3v3_status == 0)
+ {
+ gpio_set_value(PIN_WIFI_PWR_CTL, GPIO_HIGH);
+ }
+ pwr_buck3v3_status |= (1<<val);
+}
+
+void pwr_buck3v3_off(power_buck3v3_id val)
+{
+ pwr_buck3v3_status &= ~(1<<val);
+ if( pwr_buck3v3_status == 0)
+ {
+ gpio_set_value(PIN_WIFI_PWR_CTL, GPIO_LOW);
+ }
+}
+
+//#ifdef CONFIG_RDA5995_WIFI
+#if defined (CONFIG_RDAWFMAC)||defined(CONFIG_RDAWFMAC_MODULE)
+int rda_wifi_init(void)
+{
+ int ret = 0;
+ ret = gpio_request(PIN_WIFI_CHIP_ENABLE,"wifi_chip_enable");
+ if(ret < 0)
+ {
+ printk("request wifi enable gpio failed\n");
+ gpio_free(PIN_WIFI_CHIP_ENABLE);
+ }
+ return ret;
+}
+EXPORT_SYMBOL(rda_wifi_init);
+
+void rda_wifi_deinit(void)
+{
+
+ printk("gpio_free wifi enable gpio \n");
+ gpio_free(PIN_WIFI_CHIP_ENABLE);
+
+}
+EXPORT_SYMBOL(rda_wifi_deinit);
+
+void rda_wifi_enable(int bval)
+{
+ zx29_gpio_config(PIN_WIFI_CHIP_ENABLE, PIN_WIFI_CHIP_ENABLE_SEL);
+ if(bval)
+ {
+ gpio_direction_output(PIN_WIFI_CHIP_ENABLE, GPIO_HIGH);
+ printk("rda_wifi gpio%d success high ##############################\n",PIN_WIFI_CHIP_ENABLE);
+ }
+ else
+ {
+ gpio_direction_output(PIN_WIFI_CHIP_ENABLE, GPIO_LOW);
+ printk("rda_wifi gpio%d success low ##############################\n",PIN_WIFI_CHIP_ENABLE);
+ }
+}
+EXPORT_SYMBOL(rda_wifi_enable);
+#endif
+
+#if defined (CONFIG_ESP8089)||defined(CONFIG_ESP8089_MODULE)
+int esp_wifi_init(void)
+{
+ int ret = 0;
+ ret = gpio_request(PIN_WIFI_PWR_CTL,"wifi_pwr_ctl");
+ if(ret < 0)
+ {
+ printk("request wifi pwr ctl gpio failed, maybe lcd used.\n");
+ gpio_free(PIN_WIFI_PWR_CTL);
+ return 0;
+ }
+
+ ret = gpio_request(PIN_WIFI_CHIP_ENABLE,"wifi_chip_enable");
+ if(ret < 0)
+ {
+ printk("request wifi enable gpio failed\n");
+ gpio_free(PIN_WIFI_CHIP_ENABLE);
+ }
+ return ret;
+}
+EXPORT_SYMBOL(esp_wifi_init);
+
+void esp_wifi_deinit(void)
+{
+ gpio_free(PIN_WIFI_CHIP_ENABLE);
+}
+EXPORT_SYMBOL(esp_wifi_deinit);
+
+void esp_wifi_enable(int bval)
+{
+ zx29_gpio_config(PIN_WIFI_PWR_CTL, PIN_WIFI_PWR_CTL_SEL);
+ if(bval)
+ {
+ gpio_direction_output(PIN_WIFI_PWR_CTL, GPIO_HIGH);
+ printk("esp_wifi gpio%d success high, pwr on ##############################\n",PIN_WIFI_PWR_CTL);
+ }
+
+ zx29_gpio_config(PIN_WIFI_CHIP_ENABLE, PIN_WIFI_CHIP_ENABLE_SEL);
+ if(bval)
+ {
+ gpio_direction_output(PIN_WIFI_CHIP_ENABLE, GPIO_LOW);
+ printk("esp_wifi gpio%d success low, chip enable ##############################\n",PIN_WIFI_CHIP_ENABLE);
+ }
+ else
+ {
+ gpio_direction_output(PIN_WIFI_CHIP_ENABLE, GPIO_HIGH);
+ printk("esp_wifi gpio%d success high, chip disable ##############################\n",PIN_WIFI_CHIP_ENABLE);
+ }
+}
+EXPORT_SYMBOL(esp_wifi_enable);
+#endif
+
+#if defined (CONFIG_XR_WLAN)
+int xr_wifi_init(void)
+{
+ int ret = 0;
+#if 0
+ ret = gpio_request(PIN_WIFI_PWR_CTL,"wifi_pwr_ctl");
+ if(ret < 0)
+ {
+ printk("request wifi pwr ctl gpio failed, maybe lcd used.\n");
+ gpio_free(PIN_WIFI_PWR_CTL);
+ return 0;
+ }
+#endif
+ ret = gpio_request(ZX29_GPIO_123, "wlan_reset");
+ if(ret < 0)
+ {
+ printk("request wifi reset gpio failed\n");
+ gpio_free(ZX29_GPIO_123);
+ }
+ return ret;
+}
+EXPORT_SYMBOL(xr_wifi_init);
+
+void xr_wifi_deinit(void)
+{
+ gpio_free(ZX29_GPIO_123);
+ //io_free(PIN_WIFI_PWR_CTL);
+}
+EXPORT_SYMBOL(xr_wifi_deinit);
+
+void xr_wifi_enable(int bval)
+{
+ //29_gpio_config(PIN_WIFI_PWR_CTL, PIN_WIFI_PWR_CTL_SEL);
+#if 0
+ if(bval)
+ {
+ gpio_direction_output(PIN_WIFI_PWR_CTL, GPIO_HIGH);
+ printk("xr_wifi gpio%d success high, pwr on ##############################\n",PIN_WIFI_PWR_CTL);
+ }
+ else
+ {
+ gpio_direction_output(PIN_WIFI_PWR_CTL, GPIO_LOW);
+ printk("xr_wifi gpio%d success low, pwr down ##############################\n",PIN_WIFI_PWR_CTL);
+ }
+#endif
+
+ zx29_gpio_config(ZX29_GPIO_123, GPIO123_GPIO123);
+ zx29_gpio_pd_pu_set(ZX29_GPIO_123,0);
+ if(bval)
+ {
+ gpio_direction_output(ZX29_GPIO_123, 0);
+ mdelay(50);
+ gpio_direction_output(ZX29_GPIO_123, 1);
+ mdelay(2);
+ gpio_direction_output(ZX29_GPIO_123, 0);
+ mdelay(50);
+ //gpio_direction_output(PIN_WIFI_CHIP_ENABLE, GPIO_LOW);
+ printk("xr_wifi gpio%d success reset, chip enable ##############################\n",ZX29_GPIO_123);
+ }
+ else
+ {
+ gpio_direction_output(ZX29_GPIO_123, 1);
+ printk("xr_wifi gpio%d chip disable ##############################\n",ZX29_GPIO_123);
+ }
+
+}
+EXPORT_SYMBOL(xr_wifi_enable);
+#endif
+
+#if defined (CONFIG_SSV6X5X)
+
+void ssv6x5x_wifi_enable(int bval)
+{
+ if(bval)
+ {
+ gpio_direction_output(PIN_WIFI_CHIP_ENABLE, 0);
+ mdelay(10);
+ gpio_direction_output(PIN_WIFI_CHIP_ENABLE, 1);
+ printk("wifi enable gpio success low%d\n",PIN_WIFI_CHIP_ENABLE);
+ }
+ else
+ {
+ gpio_direction_output(PIN_WIFI_CHIP_ENABLE, 0);
+ printk("ssv6x5x_wifi gpio%d chip disable ##############################\n",PIN_WIFI_CHIP_ENABLE);
+ }
+
+}
+EXPORT_SYMBOL(ssv6x5x_wifi_enable);
+#endif
+
+#if defined (CONFIG_AIC8800)
+
+void aic8800_wifi_enable(int bval)
+{
+ int ret = 0;
+ if(bval)
+ {
+#ifdef CONFIG_AIC8800_MIFI_EN
+ ret=gpio_request(ZX29_GPIO_85,"aic_mifi_en");
+ if(ret){
+ printk("request aic_mifi_en gpio failed\n");
+ gpio_free(ZX29_GPIO_85);
+ }
+ ret=gpio_request(ZX29_GPIO_119,"aic_mifi_power_en");
+ if(ret){
+ printk("request aic_mifi_power_en gpio failed\n");
+ gpio_free(ZX29_GPIO_119);
+ }
+ gpio_direction_output(ZX29_GPIO_85, 1);
+ gpio_direction_output(ZX29_GPIO_119, 1);
+#else
+ ret=gpio_request(ZX29_GPIO_85,"aic_ufi_en");
+ if(ret){
+ printk("request aic_ufi_en gpio failed\n");
+ gpio_free(ZX29_GPIO_85);
+ }
+ ret=gpio_request(ZX29_GPIO_119,"aic_ufi_power_en");
+ if(ret){
+ printk("request aic_ufi_power_en gpio failed\n");
+ gpio_free(ZX29_GPIO_119);
+ }
+ gpio_direction_output(ZX29_GPIO_85, 1);
+ gpio_direction_output(ZX29_GPIO_119, 1);
+#endif
+ mdelay(10);
+ printk("qqq aic en succ.\n");
+ }
+ else
+ {
+#ifdef CONFIG_AIC8800_MIFI_EN
+ gpio_direction_output(ZX29_GPIO_85, 0);
+ gpio_direction_output(ZX29_GPIO_119, 0);
+#else
+ gpio_direction_output(ZX29_GPIO_85, 0);
+ gpio_direction_output(ZX29_GPIO_119, 0);
+#endif
+ printk("qqq aic en fail.\n");
+ }
+
+}
+EXPORT_SYMBOL(aic8800_wifi_enable);
+#endif
+#if defined (CONFIG_AIC8800)
+void aic8800_wifi_disable(int bval)
+{
+ int ret = 0;
+ if(bval)
+ {
+#ifdef CONFIG_AIC8800_MIFI_EN
+ gpio_direction_output(ZX29_GPIO_85, 0);
+ gpio_direction_output(ZX29_GPIO_119, 0);
+#else
+ gpio_direction_output(ZX29_GPIO_85, 0);
+ gpio_direction_output(ZX29_GPIO_119, 0);
+#endif
+ mdelay(50);
+ printk("qqq aic dis succ.\n");
+ }
+ else
+ {
+#ifdef CONFIG_AIC8800_MIFI_EN
+ gpio_direction_output(ZX29_GPIO_85, 1);
+ gpio_direction_output(ZX29_GPIO_119, 1);
+#else
+ gpio_direction_output(ZX29_GPIO_85, 1);
+ gpio_direction_output(ZX29_GPIO_119, 1);
+#endif
+ printk("qqq aic dis fail.\n");
+ }
+}
+EXPORT_SYMBOL(aic8800_wifi_disable);
+#endif
+#if defined (CONFIG_AIC8800)
+void aic8800_wifi_re_enable(int bval)
+{
+ int ret = 0;
+ if(bval)
+ {
+#ifdef CONFIG_AIC8800_MIFI_EN
+ gpio_direction_output(ZX29_GPIO_85, 1);
+ gpio_direction_output(ZX29_GPIO_119, 1);
+#else
+ gpio_direction_output(ZX29_GPIO_85, 1);
+ gpio_direction_output(ZX29_GPIO_119, 1);
+#endif
+ mdelay(50);
+ printk("qqq re enable succ.\n");
+ }
+ else
+ {
+#ifdef CONFIG_AIC8800_MIFI_EN
+ gpio_direction_output(ZX29_GPIO_85, 0);
+ gpio_direction_output(ZX29_GPIO_119, 0);
+#else
+ gpio_direction_output(ZX29_GPIO_85, 0);
+ gpio_direction_output(ZX29_GPIO_119, 0);
+#endif
+ printk("qqq aic dis fail.\n");
+ }
+}
+EXPORT_SYMBOL(aic8800_wifi_re_enable);
+#endif
+
+#ifdef CONFIG_RTL8192CD
+//hess add, called by 8192cd_pwrctrl.c
+unsigned int Get_WiFi_Wakeup_Pin_Num()
+{
+ //return ZX29_GPIO_57;
+ return PIN_WIFI_WAKEUP;
+}
+
+int Get_WiFi_Wakeup_Pin_INT()
+{
+ //return PCU_EX7_INT;
+ return INT_WIFI_WAKEUP;
+}
+
+#endif
+
+
diff --git a/lynq/MIFI/ap/os/linux/linux-3.4.x/arch/arm/mach-zx297520v3/zx297520v3-mifi-devices.c b/lynq/MIFI/ap/os/linux/linux-3.4.x/arch/arm/mach-zx297520v3/zx297520v3-mifi-devices.c
new file mode 100755
index 0000000..81dcc83
--- /dev/null
+++ b/lynq/MIFI/ap/os/linux/linux-3.4.x/arch/arm/mach-zx297520v3/zx297520v3-mifi-devices.c
@@ -0,0 +1,1369 @@
+/*
+ * arch/arm/mach-zx297520v3/zx297520v3_devices.c
+ *
+ * Copyright (C) 2015 ZTE-TSP
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; either version 2 of the License, or
+ * (at your option) any later version.
+ *
+ */
+#include <asm/mach/arch.h>
+#include <asm/mach/map.h>
+
+#include <linux/dma-mapping.h>
+#include <linux/platform_device.h>
+#include <linux/soc/zte/rpm/rpmsg.h>
+#include <linux/i2c.h>
+
+#include <mach/dma.h>
+#include <mach/board.h>
+#include <mach/iomap.h>
+#include <mach/irqs.h>
+#include <mach/i2c.h>
+#include <mach/gpio.h>
+#include <mach/zx29_mmc.h>
+#include <mach/zx29_uart_def.h>
+#include <linux/soc/zte/tsc/tsc.h>
+
+#if (defined CONFIG_SPI_ZX29) || (defined CONFIG_SPI_GPIO)
+#include <linux/spi/spi.h>
+#include <linux/spi/spi_gpio.h>
+#include <mach/spi.h>
+#include <linux/video/zx29_lcd.h>
+#endif
+
+#ifdef CONFIG_CHARGER_ZX234502
+#include <linux/power/zx234502_charger.h>
+#endif
+#ifdef CONFIG_CHARGER_AW3215
+#include <linux/power/aw3215_charger.h>
+#endif
+#ifdef CONFIG_LEDS_GPIO
+#include <linux/leds.h>
+#endif
+#ifdef CONFIG_MMC_ZX29
+#include <linux/mmc/host.h>
+#endif
+#ifdef CONFIG_KEYBOARD_ZX_INT
+#include <linux/input.h>
+#include <linux/gpio_keys.h>
+#endif
+#ifdef CONFIG_KEYBOARD_ZX_5x6
+#include <linux/input.h>
+#include <linux/input/zx29_keypad_5x6.h>
+#endif
+
+#ifdef CONFIG_MFD_ZX234290_I2C
+#include <linux/mfd/zx234290.h>
+#endif
+
+#if (defined CONFIG_SND_SOC_ZX297520V3) || (defined CONFIG_SND_SOC_ZX297520V3_MODULE)
+#include <sound/zx29_snd_platform.h>
+#endif
+#include <mach/gpio_cfg.h>
+
+
+struct zx29_uart_platdata zx29_uart0_platdata= {
+ .uart_use = 1,
+ .uart_rxd.gpioname = "uart0_rxd",
+ .uart_rxd.gpionum = PIN_UART0_RXD,
+ .uart_rxd.gpiofnc = FNC_UART0_RXD,
+ .uart_txd.gpioname = "uart0_txd",
+ .uart_txd.gpionum = PIN_UART0_TXD,
+ .uart_txd.gpiofnc = FNC_UART0_TXD,
+ .uart_ctsrtsuse = 0,
+ .uart_cts.gpioname = "uart0_cts",
+ .uart_cts.gpionum= PIN_UART0_CTS ,
+ .uart_cts.gpiofnc = FNC_UART0_CTS ,
+ .uart_rts.gpioname = "uart0_rts",
+ .uart_rts.gpionum =PIN_UART0_RTS,
+ .uart_rts.gpiofnc = FNC_UART0_RTS,
+ .uart_abauduse = 0,
+ .uart_input_enable = 0,
+};
+struct zx29_uart_platdata zx29_uart1_platdata= {
+ .uart_use = 1,
+ .uart_rxd.gpioname = "uart1_rxd",
+ .uart_rxd.gpionum = PIN_UART1_RXD,
+ .uart_rxd.gpiofnc = FNC_UART1_RXD,
+ .uart_txd.gpioname = "uart1_txd",
+ .uart_txd.gpionum = PIN_UART1_TXD,
+ .uart_txd.gpiofnc = FNC_UART1_TXD,
+ .uart_ctsrtsuse = 0,
+ .uart_cts.gpioname = "uart1_cts",
+ .uart_cts.gpionum= PIN_UART1_CTS ,
+ .uart_cts.gpiofnc = FNC_UART1_CTS ,
+ .uart_rts.gpioname = "uart1_rts",
+ .uart_rts.gpionum = PIN_UART1_RTS,
+ .uart_rts.gpiofnc = FNC_UART1_RTS,
+ .uart_abauduse = 0,
+ .uart_input_enable = 0,
+};
+struct zx29_uart_platdata zx29_uart2_platdata= {
+ .uart_use = 0,
+ .uart_rxd.gpioname = "uart2_rxd",
+ .uart_rxd.gpionum = PIN_UART2_RXD,
+ .uart_rxd.gpiofnc = FNC_UART2_RXD,
+ .uart_txd.gpioname = "uart2_txd",
+ .uart_txd.gpionum = PIN_UART2_TXD,
+ .uart_txd.gpiofnc = FNC_UART2_TXD,
+ .uart_ctsrtsuse = 0,
+ .uart_cts.gpioname = "uart2_cts",
+ .uart_cts.gpionum= PIN_UART2_CTS ,
+ .uart_cts.gpiofnc = FNC_UART2_CTS ,
+ .uart_rts.gpioname = "uart2_rts",
+ .uart_rts.gpionum = PIN_UART2_RTS,
+ .uart_rts.gpiofnc = FNC_UART2_RTS,
+ .uart_abauduse = 0,
+ .uart_input_enable = 0,
+};
+/* --------------------------------------------------------------------
+ * UART
+ * -------------------------------------------------------------------- */
+#ifdef CONFIG_SERIAL_ZX29_UART
+/* UART0*/
+static struct resource zx29_uart0_resources[] = {
+ [0] = {
+ .start = ZX29_UART0_PHYS,
+ .end = ZX29_UART0_PHYS + SZ_4K - 1,
+ .flags = IORESOURCE_MEM,
+ },
+ [1] = {
+ .start = UART0_MIX_INT,
+ .end = UART0_MIX_INT,
+ .flags = IORESOURCE_IRQ,
+ },
+};
+
+static struct platform_device zx29_uart0_device = {
+ .name = "zx29_uart",
+ .id = 0,
+ .resource = zx29_uart0_resources,
+ .num_resources = ARRAY_SIZE(zx29_uart0_resources),
+ .dev = {
+ .platform_data = &zx29_uart0_platdata,
+ }
+};
+/* UART2*/
+static struct resource zx29_uart1_resources[] = {
+ [0] = {
+ .start = ZX29_UART1_PHYS,
+ .end = ZX29_UART1_PHYS + SZ_4K - 1,
+ .flags = IORESOURCE_MEM,
+ },
+ [1] = {
+ .start = UART1_MIX_INT,
+ .end = UART1_MIX_INT,
+ .flags = IORESOURCE_IRQ,
+ },
+};
+
+static struct platform_device zx29_uart1_device = {
+ .name = "zx29_uart",
+ .id = 1,
+ .resource = zx29_uart1_resources,
+ .num_resources = ARRAY_SIZE(zx29_uart1_resources),
+ .dev = {
+ .platform_data = &zx29_uart1_platdata,
+ }
+};
+
+/* UART2*/
+static struct resource zx29_uart2_resources[] = {
+ [0] = {
+ .start = ZX29_UART2_PHYS,
+ .end = ZX29_UART2_PHYS + SZ_4K - 1,
+ .flags = IORESOURCE_MEM,
+ },
+ [1] = {
+ .start = UART2_MIX_INT,
+ .end = UART2_MIX_INT,
+ .flags = IORESOURCE_IRQ,
+ },
+};
+
+static struct platform_device zx29_uart2_device = {
+ .name = "zx29_uart",
+ .id = 2,
+ .resource = zx29_uart2_resources,
+ .num_resources = ARRAY_SIZE(zx29_uart2_resources),
+ .dev = {
+ .platform_data = & zx29_uart2_platdata,
+ }
+};
+#endif
+
+/* --------------------------------------------------------------------
+ * DMA -- Direct Memory Access
+* -------------------------------------------------------------------- */
+#ifdef CONFIG_ZX29_DMA
+static struct resource zx29_dma_res[] = {
+ [0] = {
+ .start = (u32)ZX_DMA_PS_BASE,
+ .end = (u32)ZX_DMA_PS_BASE + SZ_4K - 1,
+ .flags = IORESOURCE_MEM,
+ },
+ [1] = {
+ .start = PS_DMA_INT,
+ .end = PS_DMA_INT,
+ .flags = IORESOURCE_IRQ,
+ },
+};
+static struct platform_device zx29_dma_device = {
+ .name = "zx29_dma",
+ .id = 0,
+ .resource = zx29_dma_res,
+ .num_resources = ARRAY_SIZE(zx29_dma_res),
+};
+#endif
+
+#if (defined CONFIG_SND_SOC_ZX297520V3) || (defined CONFIG_SND_SOC_ZX297520V3_MODULE)
+
+static struct platform_device zx29_audio = {
+ .name = SND_MACHINE_PDEV_NAME,
+ .id = -1,
+ .dev = {
+ .platform_data = ZX29_SND_MACH_PDATA, //&snd_machine_pdata,
+ },
+};
+#endif
+
+#if (defined CONFIG_SND_SOC_ZX_PCM) || (defined CONFIG_SND_SOC_ZX_PCM_MODULE)
+/* ASOC DMA */
+static unsigned long long zx29_device_dma_mask = DMA_BIT_MASK(32);
+
+struct platform_device zx29_asoc_dma = {
+ .name = "zx29-pcm-audio",
+ .id = -1,
+ .dev = {
+ .dma_mask = &zx29_device_dma_mask,
+ .coherent_dma_mask = DMA_BIT_MASK(32),
+ }
+};
+#endif
+
+/* --------------------------------------------------------------------
+ * I2S
+* -------------------------------------------------------------------- */
+//#ifdef CONFIG_SND_SOC_ZX_I2S
+#if (defined CONFIG_SND_SOC_ZX_I2S) || (defined CONFIG_SND_SOC_ZX_I2S_MODULE)
+#define zx29_I2S0 1
+//#define zx29_I2S1 1
+
+#ifdef zx29_I2S0
+/* I2S0 */
+static struct resource i2s0_res[] = {
+ [0] = {
+ .start = (u32)ZX_I2S0_BASE,
+ .end = (u32)ZX_I2S0_BASE + SZ_4K - 1,
+ .flags = IORESOURCE_MEM,
+ },
+ [1] = {
+ .start = DMA_CH_I2S0_TX,
+ .end = DMA_CH_I2S0_TX,
+ .flags = IORESOURCE_DMA,
+ },
+ [2] = {
+ .start = DMA_CH_I2S0_RX0,
+ .end = DMA_CH_I2S0_RX0,
+ .flags = IORESOURCE_DMA,
+ },
+};
+static struct platform_device zx29_i2s0_device = {
+ .name = "zx29_i2s",
+ .id = 0,
+ .resource = i2s0_res,
+ .num_resources = ARRAY_SIZE(i2s0_res),
+};
+#endif
+
+#ifdef zx29_I2S1
+static struct resource i2s1_res[] = {
+ [0] = {
+ .start = (u32)ZX_I2S1_BASE,
+ .end = (u32)ZX_I2S1_BASE + SZ_4K - 1,
+ .flags = IORESOURCE_MEM,
+ },
+ [1] = {
+ .start = DMA_CH_I2S1_TX,
+ .end = DMA_CH_I2S1_TX,
+ .flags = IORESOURCE_DMA,
+ },
+ [2] = {
+ .start = DMA_CH_I2S1_RX0,
+ .end = DMA_CH_I2S1_RX0,
+ .flags = IORESOURCE_DMA,
+ },
+};
+static struct platform_device zx29_i2s1_device = {
+ .name = "zx29_i2s",
+ .id = 1,
+ .resource = i2s1_res,
+ .num_resources = ARRAY_SIZE(i2s1_res),
+};
+#endif
+#endif
+
+#if (defined CONFIG_SND_SOC_ZX_VOICE) || (defined CONFIG_SND_SOC_ZX_VOICE_MODULE)
+static struct platform_device voice_asoc_device = {
+ .name = "voice_audio",
+ .id = -1,
+};
+#endif
+/* --------------------------------------------------------------------
+ * MMC / SD
+ * -------------------------------------------------------------------- */
+#ifdef CONFIG_MMC_ZX29
+static struct resource zx29_sdmmc0_resources[] = {
+ [0] = {
+ .start = ZX_SD0_BASE,
+ .end = ZX_SD0_BASE + SZ_4K - 1,
+ .flags = IORESOURCE_MEM,
+ },
+ [1] = {
+ .start = SD0_INT,
+ .end = SD0_INT,
+ .flags = IORESOURCE_IRQ,
+ },
+};
+
+struct dw_mci_board zx29_sdmmc0_platdata = {
+ .num_slots = 1,
+#if 1//def CONFIG_RTL8192CD
+ .quirks = DW_MCI_QUIRK_BROKEN_CARD_DETECTION | DW_MCI_QUIRK_SDIO \
+ | DW_MCI_QUIRK_UNALIGN_DMA_SZ | DW_MCI_QUIRK_UNALIGN_DMA_START |DW_MCI_QUIRK_CLK_PHASE_TURN ,
+ .caps = (MMC_CAP_4_BIT_DATA | MMC_CAP_MMC_HIGHSPEED | MMC_CAP_SD_HIGHSPEED |MMC_CAP_UHS_SDR50 | MMC_CAP_SDIO_IRQ |MMC_CAP_NONREMOVABLE),
+#else
+ .quirks = DW_MCI_QUIRK_BROKEN_CARD_DETECTION | DW_MCI_QUIRK_SDIO,
+ .caps = (MMC_CAP_4_BIT_DATA | MMC_CAP_MMC_HIGHSPEED | MMC_CAP_SD_HIGHSPEED |MMC_CAP_UHS_SDR50),
+#endif
+
+#ifdef CONFIG_SSV6X5X
+ .bus_hz = 50*1000*1000,
+#else
+ .bus_hz = 100*1000*1000,
+#ifdef CONFIG_AIC8800
+ .bus_hz = 100*1000*1000,
+#endif
+#endif
+ .pm_caps = MMC_PM_KEEP_POWER | MMC_PM_IGNORE_PM_NOTIFY,
+ .data1_irq = SD0_DATA1_INT,
+};
+static struct platform_device zx29_sdmmc0_device = {
+ .name = "zx29_sd",
+ .id = 0,
+ .resource = zx29_sdmmc0_resources,
+ .num_resources = ARRAY_SIZE(zx29_sdmmc0_resources),
+ .dev = {
+ .coherent_dma_mask = 0xffffffffUL,
+ .platform_data = &zx29_sdmmc0_platdata,
+ },
+};
+static struct resource zx29_sdmmc1_resources[] = {
+ [0] = {
+ .start = ZX_SD1_BASE,
+ .end = ZX_SD1_BASE + SZ_4K - 1,
+ .flags = IORESOURCE_MEM,
+ },
+ [1] = {
+ .start = SD1_INT,
+ .end = SD1_INT,
+ .flags = IORESOURCE_IRQ,
+ },
+};
+
+struct dw_mci_board zx29_sdmmc1_platdata = {
+ .num_slots = 1,
+#ifdef CONFIG_XR_WLAN
+ .quirks = DW_MCI_QUIRK_BROKEN_CARD_DETECTION | DW_MCI_QUIRK_SDIO \
+ | DW_MCI_QUIRK_UNALIGN_DMA_SZ | DW_MCI_QUIRK_UNALIGN_DMA_START,
+ .bus_hz = 100*1000*1000,
+ .caps = (MMC_CAP_4_BIT_DATA | MMC_CAP_MMC_HIGHSPEED | MMC_CAP_SD_HIGHSPEED |MMC_CAP_UHS_SDR50 | MMC_CAP_SDIO_IRQ|MMC_CAP_NONREMOVABLE),
+ .pm_caps = MMC_PM_KEEP_POWER | MMC_PM_IGNORE_PM_NOTIFY,
+ .data1_irq = SD1_DATA1_INT,
+#else
+ .bus_hz = 50*1000*1000,
+ .caps = (MMC_CAP_4_BIT_DATA | MMC_CAP_MMC_HIGHSPEED | MMC_CAP_SD_HIGHSPEED),
+ .detect_delay_ms = 500,
+#endif
+ //.init = sdmmc_init,
+ //.setpower = sdmmc_set_power,
+
+ //.detect_delay_ms = 500,
+};
+
+
+static struct platform_device zx29_sdmmc1_device = {
+ .name = "zx29_sd",
+ .id = 1,
+ .resource = zx29_sdmmc1_resources,
+ .num_resources = ARRAY_SIZE(zx29_sdmmc1_resources),
+ .dev = {
+ .coherent_dma_mask = 0xffffffffUL,
+ .platform_data = &zx29_sdmmc1_platdata,
+ },
+};
+#endif
+
+/* --------------------------------------------------------------------
+ * NAND
+ * -------------------------------------------------------------------- */
+#ifdef CONFIG_MTD_ZXIC_SPIFC
+ static struct resource spi_nand_resource[] = {
+ [0] = {
+ .start = ZX_SPIFC0_BASE,
+ .end = ZX_SPIFC0_BASE + SZ_4K - 1,
+ .flags = IORESOURCE_MEM,
+ .name = "spifc_reg",
+ },
+ [2] = {
+ .start = SPI_FC0_INT,
+ .end = SPI_FC0_INT,
+ .flags = IORESOURCE_IRQ,
+
+ },
+ };
+#endif
+#ifdef CONFIG_MTD_NAND_DENALI
+static struct resource denali_nand_resource[] = {
+ [0] = {
+ .start = ZX_NAND_REG_BASE,
+ .end = ZX_NAND_REG_BASE + SZ_4K - 1,
+ .flags = IORESOURCE_MEM,
+ .name = "denali_reg",
+ },
+ [1] = {
+ .start = ZX_NAND_DATA_BASE,
+ .end = ZX_NAND_DATA_BASE + SZ_4K - 1,
+ .flags = IORESOURCE_MEM,
+ .name = "nand_data",
+ },
+ [2] = {
+ .start = NAND_INT,
+ .end = NAND_INT,
+ .flags = IORESOURCE_IRQ,
+
+ },
+};
+struct denali_nand_data {
+ struct mtd_partition *parts;
+ int (*dev_ready)(struct mtd_info *mtd);
+ u32 nr_parts;
+ u8 ale; /* address line number connected to ALE */
+ u8 cle; /* address line number connected to CLE */
+ u8 width; /* buswidth */
+ u8 chip_delay;
+};
+static struct denali_nand_data zx29_nand_data = {
+ .cle = 0,
+ .ale = 1,
+ .width = 8,
+};
+struct platform_device zx29_device_nand = {
+ .name = "denali-nand-dt",
+ .id = -1,
+ .dev = {
+ .platform_data = &zx29_nand_data,
+ },
+ .num_resources = ARRAY_SIZE(denali_nand_resource),
+ .resource = denali_nand_resource,
+};
+#endif
+
+#ifdef CONFIG_MTD_ZXIC_SPIFC
+struct platform_device zx29_device_spi_nand = {
+ .name = "spi-nand-dt",
+ .id = -1,
+ .num_resources = ARRAY_SIZE(spi_nand_resource),
+ .resource = spi_nand_resource,
+};
+#endif
+
+/*
+ *--------------------------------------------------------------------
+ * NOR
+ * --------------------------------------------------------------------
+ */
+
+#ifdef CONFIG_SPI_ZXIC_NOR
+ static struct resource spi_nor_resource[] = {
+ [0] = {
+ .start = ZX_SPIFC0_BASE,
+ .end = ZX_SPIFC0_BASE + SZ_4K - 1,
+ .flags = IORESOURCE_MEM,
+ .name = "spi_nor_reg",
+ },
+ [2] = {
+ .start = SPI_FC0_INT,
+ .end = SPI_FC0_INT,
+ .flags = IORESOURCE_IRQ,
+
+ },
+ };
+
+struct platform_device zx29_device_spi_nor = {
+ .name = "spi-nor-dt",
+ .id = -1,
+ .num_resources = ARRAY_SIZE(spi_nor_resource),
+ .resource = spi_nor_resource,
+};
+#endif
+
+
+
+/* --------------------------------------------------------------------
+ * I2C
+ * -------------------------------------------------------------------- */
+#ifdef CONFIG_I2C_ZX29
+
+#define zx29_pmic_i2c 1
+#define zx29_I2C0 1
+
+
+#ifdef zx29_pmic_i2c
+static struct zx29_i2c_platform_data zx29_pmic_i2c_platform_data = {
+ .bus_clk_rate = 300000,
+};
+
+static struct resource pmic_i2c_resources[] = {
+ [0] = {
+ .start = (u32)ZX_PMIC_I2C_BASE,
+ .end = (u32)ZX_PMIC_I2C_BASE + SZ_4K - 1,
+ .flags = IORESOURCE_MEM,
+ },
+ [1] = {
+ .start = I2C0_INT,
+ .end = I2C0_INT,
+ .flags = IORESOURCE_IRQ,
+ },
+};
+
+static struct platform_device zx29_pmic_i2c_device = {
+ .name = "zx29_i2c",
+ .id = 0,
+ .resource = pmic_i2c_resources,
+ .num_resources = ARRAY_SIZE(pmic_i2c_resources),
+ .dev = {
+ .platform_data = &zx29_pmic_i2c_platform_data,
+ },
+};
+#endif
+
+#ifdef zx29_I2C0
+static struct zx29_i2c_platform_data zx29_i2c0_platform_data = {
+ .bus_clk_rate = 300000,
+};
+
+static struct resource i2c0_resources[] = {
+ [0] = {
+ .start = (u32)ZX_I2C1_BASE,
+ .end = (u32)ZX_I2C1_BASE + SZ_4K - 1,
+ .flags = IORESOURCE_MEM,
+ },
+ [1] = {
+ .start = I2C1_INT,
+ .end = I2C1_INT,
+ .flags = IORESOURCE_IRQ,
+ },
+};
+
+static struct platform_device zx29_i2c0_device = {
+ .name = "zx29_i2c",
+ .id = 1,
+ .resource = i2c0_resources,
+ .num_resources = ARRAY_SIZE(i2c0_resources),
+ .dev = {
+ .platform_data = &zx29_i2c0_platform_data,
+ },
+};
+#endif
+
+
+#endif //end CONFIG_I2C_ZX29
+
+/* --------------------------------------------------------------------
+ * SPI
+ * -------------------------------------------------------------------- */
+#ifdef CONFIG_SPI_ZX29
+static struct resource spi0_resources[] = {
+ [0]={
+ .start = ZX_SSP0_BASE,
+ .end = ZX_SSP0_BASE + SZ_32 - 1,
+ .name = "registers",
+ .flags = IORESOURCE_MEM,
+ },
+ [1]={
+ .start = SSP0_INT,
+ .end = SSP0_INT,
+ .name = "interrupt",
+ .flags = IORESOURCE_IRQ,
+ },
+};
+
+static struct zx29_spi_controller spi0_data ={
+ .bus_id = 0,
+ .num_chipselect = 1,
+ .enable_dma = 1,
+ .autosuspend_delay=0,
+ .dma_tx_param = (void*) DMA_CH_SSP0_TX,
+ .dma_rx_param = (void*) DMA_CH_SSP0_RX,
+};
+
+static struct platform_device zx29_ssp0_device = {
+ .name = "zx29_ssp",
+ .id = 0,
+ .dev ={
+ .platform_data = &spi0_data,
+ },
+ .resource = spi0_resources,
+ .num_resources = ARRAY_SIZE(spi0_resources),
+};
+#endif
+
+/* --------------------------------------------------------------------
+ * USB
+ * -------------------------------------------------------------------- */
+#ifdef CONFIG_DWC_OTG_USB
+/* USB 20*/
+static struct resource zx29_usb0_resources[] = {
+ [0] = {
+ .start = ZX29_USB_PHYS,
+ .end = ZX29_USB_PHYS + SZ_256K - 1,
+ .flags = IORESOURCE_MEM,
+ },
+ [1] = {
+ .name = "usb_int",
+ .start = USB_INT,
+ .end = USB_INT,
+ .flags = IORESOURCE_IRQ,
+ },
+ [2] = {
+ .name = "usb_powerdown_up",
+ .start = USB_POWERDWN_UP_INT,
+ .end = USB_POWERDWN_UP_INT,
+ .flags = IORESOURCE_IRQ,
+ },
+ [3] = {
+ .name = "usb_powerdown_down",
+ .start = USB_POWERDWN_DOWN_INT,
+ .end = USB_POWERDWN_DOWN_INT,
+ .flags = IORESOURCE_IRQ,
+ },
+};
+
+static struct platform_device zx29_usb0_device = {
+ .name = "zx29_hsotg",
+ .id = 0,
+ .resource = zx29_usb0_resources,
+ .num_resources = ARRAY_SIZE(zx29_usb0_resources),
+};
+#endif
+
+#ifdef CONFIG_USB_DWC_OTG_HCD
+ /* HSIC*/
+static struct resource zx29_usb1_resources[] = {
+ [0] = {
+ .start = ZX29_HSIC_PHYS,
+ .end = ZX29_HSIC_PHYS + SZ_256K - 1,
+ .flags = IORESOURCE_MEM,
+ },
+ [1] = {
+ .name = "hsic_int",
+ .start = HSIC_INT,
+ .end = HSIC_INT,
+ .flags = IORESOURCE_IRQ,
+ },
+ [2] = {
+ .name = "hsic_powerdown_up",
+ .start = HSIC_POWERDWN_UP_INT,
+ .end = HSIC_POWERDWN_UP_INT,
+ .flags = IORESOURCE_IRQ,
+ },
+ [3] = {
+ .name = "hsic_powerdown_down",
+ .start = HSIC_POWERDWN_DOWN_INT,
+ .end = HSIC_POWERDWN_DOWN_INT,
+ .flags = IORESOURCE_IRQ,
+ },
+};
+
+static struct platform_device zx29_usb1_device = {
+ .name = "zx29_hsic",
+ .id = 1,
+ .resource = zx29_usb1_resources,
+ .num_resources = ARRAY_SIZE(zx29_usb1_resources),
+};
+#endif
+
+/* --------------------------------------------------------------------
+ * ICP
+ * -------------------------------------------------------------------- */
+#ifdef CONFIG_RPM_ZX29
+ /*ICP_M0/ICP_ARM0*/
+static struct zx29_rpmsg_platform_data rpmsg_m0_platform_data = {
+ .iram_send_base = (u32)ICP_IRAM_APM0_BASEADDR,
+ .iram_send_size = ICP_IRAM_APM0_SIZE,
+ .iram_recv_base = (u32)ICP_IRAM_M0AP_BASEADDR,
+ .iram_recv_size = ICP_IRAM_M0AP_SIZE,
+ .ddr_send_base = (u32)ICP_DDR_APM0_BASEADDR,
+ .ddr_send_size = ICP_DDR_APM0_SIZE,
+ .ddr_recv_base = (u32)ICP_DDR_M0AP_BASEADDR,
+ .ddr_recv_size = ICP_DDR_M0AP_SIZE,
+ .max_channel_cnt= CHANNEL_AP2M0_MAXID,
+};
+
+static struct resource icp_m0_resources[] = {
+ [0] = {
+ .start = ICP_M02PS_INT,
+ .end = ICP_M02PS_INT,
+ .flags = IORESOURCE_IRQ,
+ },
+ [1] = {
+ .start = (u32)ZX29_ICP_APM0_REG,
+ .end = (u32)ZX29_ICP_APM0_REG + 0x30,
+ .flags = IORESOURCE_MEM,
+ .name = "icp",
+ },
+
+};
+
+static struct zx29_rpmsg_platform_data rpmsg_ps_platform_data = {
+ .iram_send_base = (u32)ICP_IRAM_APPS_BASEADDR,
+ .iram_send_size = ICP_IRAM_APPS_SIZE,
+ .iram_recv_base = (u32)ICP_IRAM_PSAP_BASEADDR,
+ .iram_recv_size = ICP_IRAM_PSAP_SIZE,
+ .ddr_send_base = (u32)ICP_DDR_APPS_BASEADDR,
+ .ddr_send_size = ICP_DDR_APPS_SIZE,
+ .ddr_recv_base = (u32)ICP_DDR_PSAP_BASEADDR,
+ .ddr_recv_size = ICP_DDR_PSAP_SIZE,
+ .max_channel_cnt= CHANNEL_AP2PS_MAXID,
+};
+
+static struct resource icp_ps_resources[] = {
+ [0] = {
+ .start = ICP_AP2PS_INT,
+ .end = ICP_AP2PS_INT,
+ .flags = IORESOURCE_IRQ,
+ },
+ [1] = {
+ .start = (u32)ZX29_ICP_APPS_REG,
+ .end = (u32)ZX29_ICP_APPS_REG + 0x30,
+ .flags = IORESOURCE_MEM,
+ .name = "icp",
+ },
+};
+
+/* AP <--> m0 */
+static struct platform_device zx29_icp_m0_device = {
+ .name = "icp",
+ .id = 0,
+ .resource = icp_m0_resources,
+ .num_resources = ARRAY_SIZE(icp_m0_resources),
+ .dev = {
+ .platform_data = &rpmsg_m0_platform_data,
+ },
+};
+
+/* AP <--> ps */
+static struct platform_device zx29_icp_ps_device = {
+ .name = "icp",
+ .id = 1,
+ .resource = icp_ps_resources,
+ .num_resources = ARRAY_SIZE(icp_ps_resources),
+ .dev = {
+ .platform_data = &rpmsg_ps_platform_data,
+ },
+};
+#endif
+
+/* --------------------------------------------------------------------
+ * WDT -- ap watchdog timer
+* -------------------------------------------------------------------- */
+#ifdef CONFIG_ZX29_WATCHDOG
+static struct resource wdt_res[] = {
+ [0] = {
+ .start = (u32)ZX_AP_WDT_BASE,
+ .end = (u32)ZX_AP_WDT_BASE + SZ_4K - 1,
+ .flags = IORESOURCE_MEM,
+ },
+ [1] = {
+ .start = WDT_INT,
+ .end = WDT_INT,
+ .flags = IORESOURCE_IRQ,
+ },
+};
+static struct platform_device zx29_wdt_device = {
+ .name = "zx29_ap_wdt",
+ .id = 0,
+ .resource = wdt_res,
+ .num_resources = ARRAY_SIZE(wdt_res),
+};
+#endif
+
+#ifdef CONFIG_LEDS_GPIO
+
+struct gpio_led leds[]={
+ {
+ .name = "modem_r_led",
+ .pin_select = 0,/*gpio*/
+ .gpio = PIN_LED_MODEM_RED,
+ .func = LED_MODEM_RED_FUNC_SEL,
+ .active_low = 0,
+ },
+ #ifdef CONFIG_MIN_VERSION
+ {
+ .name = "modem_g_led",
+ .pin_select = 0,/*gpio*/
+ .gpio = PIN_LED_MODEM_GREEN,
+ .func = LED_MODEM_GREEN_FUNC_SEL,
+ .active_low = 0,
+ },
+ #else
+ {
+ .name = "modem_b_led",
+ .pin_select = 0,/*gpio*/
+ .gpio = PIN_LED_MODEM_BLUE,
+ .func = LED_MODEM_BLUE_FUNC_SEL,
+ .active_low = 0,
+ },
+ #endif
+ {
+ .name = "sms_led",
+ .pin_select = 0,/*gpio*/
+ .gpio = PIN_LED_SMS,
+ .func = LED_SMS_FUNC_SEL,
+ .active_low = 0,
+ },
+ {
+ .name = "wifi_led",
+ .pin_select = 0,/*gpio*/
+ .gpio = PIN_LED_WIFI,
+ .func = LED_WIFI_FUNC_SEL,
+ .active_low = 0,
+ },
+ {
+ .name = "battery_r_led",
+ .pin_select = 0,/*gpio*/
+ .gpio = PIN_LED_BATTARY_RED,
+ .func = LED_BATTARY_RED_FUNC_SEL,
+ .active_low = 0,
+ .default_state=LEDS_GPIO_DEFSTATE_ON,
+ },
+ {
+ .name = "battery_g_led",
+ .pin_select = 0,/*gpio*/
+ .gpio = PIN_LED_BATTARY_GREEN,
+ .func = LED_BATTARY_GREEN_SEL,
+ .active_low = 0,
+ //.hw_timer = 1,
+ //.retain_state_suspended = 1,
+ }/*,
+ {
+ .name = "sink1",
+ .pin_select = 1,
+ //.gpio = PIN_LED_BATTARY_GREEN,
+ //.func = LED_BATTARY_GREEN_SEL,
+ .active_low = 0,
+ //.hw_timer = 1,
+ //.retain_state_suspended = 1,
+ }*/
+
+};
+
+extern int platform_gpio_blink_set(unsigned pin_sel,unsigned gpio, int state,
+ unsigned long *delay_on, unsigned long *delay_off);
+
+static struct gpio_led_platform_data leds_data =
+{
+ .num_leds =sizeof(leds)/sizeof(leds[0]) ,
+ .leds = leds,
+ .gpio_blink_set=platform_gpio_blink_set,
+
+};
+
+static struct platform_device leds_device =
+{
+ .name = "leds-gpio",
+ .id = 1,
+ .dev = {
+ .platform_data = &leds_data,
+ },
+};
+#endif
+
+
+#ifdef CONFIG_KEYBOARD_ZX_INT
+/* --------------------------------------------------------------------
+ * Keypad (power_on, ufi, ufi_reset) for ufi
+ * -------------------------------------------------------------------- */
+static struct gpio_keys_button zx29_keypad_int[] = {
+ #if 1
+ {
+ .active_low = 1, /*ÊÇ·ñµÍµçƽÓÐЧ¡£1: °´ÏÂΪµÍµçƽ 0: °´ÏÂΪ¸ßµçƽ*/
+ .desc = "kpd_power",
+ .code = KEY_POWER /* power: 116 */,
+ .use_pmu_pwron = 1, /*true: use pmu pwron interrupt fase: use zx297520v2 ext int*/
+ /*
+ // unnecessary for the situation of (.use_pmu_pwron = 1)
+ .gpio = PIN_KPD_POWER,
+ .gpio_sel_gpio = KPD_POWER_FUNC_GPIO,
+ .gpio_sel_int = KPD_POWER_FUNC_INT,
+ */
+ },
+ #endif
+
+ #if 1
+ {
+ .gpio = ZX29_GPIO_53,
+ .active_low = 1,
+ .desc = "kpd_wps",
+ .code = KEY_KPEQUAL, /* wps: 117 */
+ .gpio_sel_gpio = GPIO53_GPIO53,
+ .gpio_sel_int = GPIO53_EXT_INT6,
+ },
+ #endif
+
+ #if 0
+ {
+ .gpio = ZX29_GPIO_52,
+ .active_low = 1,
+ .desc = "kpd_reset",
+ .code = KEY_KPPLUSMINUS, /* reset: 118 */
+ .gpio_sel_gpio = GPIO52_GPIO52,
+ .gpio_sel_int = GPIO52_EXT_INT5,
+ },
+ #endif
+};
+
+static struct gpio_keys_platform_data zx29_keypad_int_data = {
+ .buttons = zx29_keypad_int,
+ .nbuttons = ARRAY_SIZE(zx29_keypad_int),
+};
+
+static struct platform_device zx29_keypad_int_device ={
+ .name = "zx29_keypad_int",
+ .id = -1,
+ .dev = {
+ .platform_data = &zx29_keypad_int_data,
+ }
+};
+#endif
+
+#ifdef CONFIG_KEYBOARD_ZX_5x6
+static struct zx29_5x6_keypad_platform_data zx29_5x6_keypad_data = {
+ .key_map = {
+ {11, 12, 13, 14, 15, 16},
+ {21, 22, 23, 24, 25, 26},
+ {31, 32, 33, 34, 35, 36},
+ {41, 42, 43, 44, 45, 46},
+ {51, 52, 53, 54, 55, 56}
+ },
+ .pin_col_row = {83, 84, 85, 86},
+};
+
+static struct resource kpd5x6_resources[] = {
+ {
+ .start = KEYPAD_INT,
+ .end = KEYPAD_INT,
+ .flags = IORESOURCE_IRQ,
+ },
+};
+
+static struct platform_device zx29_5x6_keypad_device ={
+ .name = "zx29_keypad",
+ .id = 0,
+ .resource = kpd5x6_resources,
+ .num_resources = ARRAY_SIZE(kpd5x6_resources),
+ .dev = {
+ .platform_data = &zx29_5x6_keypad_data,
+ }
+};
+#endif
+
+#ifdef CONFIG_NET_ZX29_GMAC
+/* gmac*/
+#if 0
+static struct resource gmac_resources[] = {
+ [0] = {
+ .start = ZX_GMAC_BASE,
+ .end = ZX_GMAC_BASE + SZ_8K - 1,
+ .flags = IORESOURCE_MEM,
+ },
+ [1] = {
+ .start = GMAC_INT,
+ .end = GMAC_INT,
+ .flags = IORESOURCE_IRQ,
+ },
+};
+#endif
+#if 1
+static struct resource zx29_gmac_resources[] = {
+ [0] = {
+ .start = ZX_GMAC_BASE,
+ .end = ZX_GMAC_BASE + SZ_8K - 1,
+ .flags = IORESOURCE_MEM,
+ },
+#if 0
+ [1] = {
+ .name = "gmac_int",
+ .start = GMAC_INT,
+ .end = GMAC_INT,
+ .flags = IORESOURCE_IRQ,
+ },
+ [2] = {
+ .name = "phy_int",
+ .start = GMACPHY_INT,
+ .end = GMACPHY_INT,
+ .flags = IORESOURCE_IRQ,
+ },
+#endif
+};
+#endif
+static struct platform_device zx29_gmac_device = {
+ .name = "zx29_gmac",
+ .id = 0,
+ .resource = zx29_gmac_resources,
+ .num_resources = ARRAY_SIZE(zx29_gmac_resources),
+ .dev = {
+ .platform_data = NULL,
+ }
+};
+#endif
+
+#ifdef CONFIG_CHARGER_AW3215
+static struct aw3215_platform_data aw3215_charger_platform = {
+ .gpio_chgen = ZX29_GPIO_131,
+ .gpio_chgen_gpio_sel = GPIO131_GPIO131,
+ .gpio_chgin = ZX29_GPIO_48,
+ .gpio_chgin_fun_sel = GPIO48_EXT_INT1,
+ .gpio_chgin_gpio_sel =GPIO48_GPIO48 ,
+ .gpio_chgctrl = ZX29_GPIO_130,/*not used*/
+ .gpio_chgctrl_gpio_sel = GPIO130_GPIO130,/*not used*/
+ .gpio_chgstate = ZX29_GPIO_50,
+ .gpio_chgstate_fun_sel = GPIO50_EXT_INT3,
+ .gpio_chgstate_gpio_sel = GPIO50_GPIO50,
+};
+
+static struct platform_device zx29_charger_device = {
+ .name = "aw3215-charger",
+ .id = 0,
+ .dev = {
+ .platform_data = &aw3215_charger_platform,
+ }
+};
+
+
+#endif
+
+/* --------------------------------------------------------------------
+ * ---------- for solution integration department --------- end
+* -------------------------------------------------------------------- */
+
+
+/*
+ * device tab used by board_init()
+ */
+struct platform_device *zx29_device_table[] __initdata={
+/* --------------------------------------------------------------------
+ * ---------- for solution integration department --------- start
+* -------------------------------------------------------------------- */
+#ifdef CONFIG_SERIAL_ZX29_UART
+ //&zx29_uart0_device,
+ &zx29_uart1_device,
+ //&zx29_uart2_device,
+#endif
+#ifdef CONFIG_MTD_NAND_DENALI
+ &zx29_device_nand,
+#endif
+#ifdef CONFIG_DWC_OTG_USB
+ &zx29_usb0_device,
+#endif
+#ifdef CONFIG_USB_DWC_OTG_HCD
+ &zx29_usb1_device,
+#endif
+#ifdef CONFIG_MTD_ZXIC_SPIFC
+ &zx29_device_spi_nand,
+#endif
+
+#ifdef CONFIG_SPI_ZXIC_NOR
+ &zx29_device_spi_nor,
+#endif
+
+
+#ifdef CONFIG_ZX29_DMA
+ &zx29_dma_device,
+#endif
+
+#ifdef CONFIG_MMC_ZX29
+#ifdef CONFIG_XR_WLAN
+ &zx29_sdmmc1_device,
+#else
+ &zx29_sdmmc0_device,
+ &zx29_sdmmc1_device,
+#endif
+#endif
+
+#ifdef CONFIG_I2C_ZX29
+
+#ifdef zx29_pmic_i2c
+ &zx29_pmic_i2c_device,
+#endif
+
+#ifdef zx29_I2C0
+ &zx29_i2c0_device,
+#endif
+
+#endif
+
+#ifdef CONFIG_SPI_ZX29
+ &zx29_ssp0_device,
+#endif
+
+#ifdef CONFIG_RPM_ZX29
+ &zx29_icp_m0_device,
+ &zx29_icp_ps_device,
+#endif
+
+#ifdef CONFIG_ZX29_WATCHDOG
+ &zx29_wdt_device,
+#endif
+
+#ifdef CONFIG_KEYBOARD_ZX_5x6
+ &zx29_5x6_keypad_device,
+#endif
+
+#ifdef CONFIG_KEYBOARD_ZX_INT
+ &zx29_keypad_int_device,
+#endif
+
+#ifdef CONFIG_CHARGER_AW3215
+ &zx29_charger_device,
+#endif
+
+#ifdef CONFIG_LEDS_GPIO
+ &leds_device,
+#endif
+
+#ifdef CONFIG_NET_ZX29_GMAC
+ &zx29_gmac_device,
+#endif
+
+#if (defined CONFIG_SND_SOC_ZX_I2S) || (defined CONFIG_SND_SOC_ZX_I2S_MODULE)
+#ifdef zx29_I2S0
+ &zx29_i2s0_device,
+#endif
+#ifdef zx29_I2S1
+ &zx29_i2s1_device,
+#endif
+#endif
+
+#if (defined CONFIG_SND_SOC_ZX_VOICE) || (defined CONFIG_SND_SOC_ZX_VOICE_MODULE)
+ &voice_asoc_device,
+#endif
+
+#if (defined CONFIG_SND_SOC_ZX_PCM) || (defined CONFIG_SND_SOC_ZX_PCM_MODULE)
+ &zx29_asoc_dma,
+#endif
+#if (defined CONFIG_SND_SOC_ZX297520V3) || (defined CONFIG_SND_SOC_ZX297520V3_MODULE)
+ &zx29_audio,
+#endif
+};
+
+unsigned int zx29_device_table_num=ARRAY_SIZE(zx29_device_table);
+
+#if (defined CONFIG_SPI_ZX29) || (defined CONFIG_SPI_GPIO)
+struct zx29_lcd_platform_data lead_lcd_platform = {
+ .spi_dcx_gpio = PIN_SPI_DCX,
+ .spi_dcx_gpio_fun_sel = SPI_DCX_FUNC_SEL,
+ .lcd_blg_gpio = PIN_LCD_BLG,
+ .lcd_blg_gpio_fun_sel = LCD_BLG_FUNC_SEL,
+ .lcd_rst_gpio = PIN_LCD_RST,
+ .lcd_rst_gpio_fun_sel =LCD_RST_FUNC_SEL,
+};
+
+static const struct spi_config_chip lead_lcd_chip_info = {
+ .com_mode = DMA_TRANSFER,
+ .iface = SPI_INTERFACE_MOTOROLA_SPI,
+ .hierarchy = SPI_MASTER,
+ .slave_tx_disable = 1,//DO_NOT_DRIVE_TX
+ .rx_lev_trig = SPI_RX_4_OR_MORE_ELEM,
+ .tx_lev_trig = SPI_TX_4_OR_MORE_EMPTY_LOC,
+// .ctrl_len = SSP_BITS_8,
+// .wait_state = SSP_MWIRE_WAIT_ZERO,
+// .duplex = SSP_MICROWIRE_CHANNEL_FULL_DUPLEX,
+// .cs_control = null_cs_control,
+};
+static struct spi_board_info zx29_spi_devices[] = {
+#ifdef CONFIG_FB_LEADT15DS26
+ {
+ .modalias = "lead_t15ds26",
+ .bus_num = 0,
+ .chip_select = 0,
+ .max_speed_hz = 13000000,
+ .mode = SPI_MODE_3,
+ .platform_data = &lead_lcd_platform,
+ .controller_data = &lead_lcd_chip_info,
+ },
+#endif
+};
+void __init spi_add_devices(void)
+{
+ unsigned devices_num = ARRAY_SIZE(zx29_spi_devices);
+ int ret = 0;
+ printk("spi_register_board_info success,devices_num=%d\n",devices_num);
+ if (devices_num){
+ ret = spi_register_board_info(zx29_spi_devices, devices_num);
+ printk("spi_register_board_info success,ret=%d\n",ret);
+ if(ret)
+ BUG();
+ }
+}
+#endif
+
+#ifdef CONFIG_CHARGER_ZX234502
+
+#define ZX234502_BAT_VOLTAGE_LEN 21
+
+struct zx234502_bat_calibration zx234502_bat_volage_charge[]=
+{
+ {4100,100}, {4090,95}, {4080,90}, {4070,85}, {4060,80}, {4050,75},
+ {4012,70}, {3973,65}, {3935,60}, {3896,55}, {3860,50}, {3817,45},
+ {3775,40}, {3733,35}, {3692,30}, {3650,25}, {3610,20}, {3570,15},
+ {3530,12}, {3590,10}, {3450,5}
+};
+
+struct zx234502_bat_calibration zx234502_bat_volage_discharge[]=
+{
+ {4100,100}, {4090,95}, {4080,90}, {4070,85}, {4060,80}, {4050,75},
+ {4012,70}, {3973,65}, {3935,60}, {3896,55}, {3860,50}, {3817,45},
+ {3775,40}, {3733,35}, {3692,30}, {3650,25}, {3610,20}, {3570,15},
+ {3530,12}, {3590,10}, {3450,5}
+};
+
+static struct zx234502_platform_data zx234502_charger_platform = {
+ .gpio_int = PIN_CHARGE_INT, //gpio55
+ .gpio_int_fun_sel = CHARGE_INT_FUNC_SEL,
+ .charging = &zx234502_bat_volage_charge,
+ .charging_size = ZX234502_BAT_VOLTAGE_LEN,
+ .discharging = &zx234502_bat_volage_discharge,
+ .discharging_size = ZX234502_BAT_VOLTAGE_LEN,
+ .ts_flag = TRUE,
+ .boost_flag = FALSE,
+ .boost_cur_gpio1 = PIN_CHARGE_BOOST_GPIO1,/*GPIO39*/
+ .boost_gpio1_fun_sel = CHARGE_BOOST_GPIO1_FUNC_SEL,
+ .boost_cur_gpio2 = PIN_CHARGE_BOOST_GPIO2,/*GPIO40*/
+ .boost_gpio2_fun_sel = CHARGE_BOOST_GPIO2_FUNC_SEL,
+ .boost_cur_gpio3 = PIN_CHARGE_BOOST_GPIO3,/*GPIO41*/
+ .boost_gpio3_fun_sel = CHARGE_BOOST_GPIO3_FUNC_SEL,
+ .boost_loadswitch_gpio = PIN_CHARGE_BOOST_LOADSWITCH,/*GPIO38*/
+ .boost_loadswitch_fun_sel = CHARGE_BOOST_LOADSWITCH_FUNC_SEL,
+};
+
+#endif
+#ifdef CONFIG_TSC_ZX29
+u32 ts_temp_value_table[TS_ADC_TEMP_NUMBER][TS_ADC_TEMP_VOLTAGE_NUMBER]={
+{30,31,32,33,34,35,36,37,38,39,
+ 40,41,42,43,44,45,46,47,48,49,
+ 50,51,52,53,54,55,56,57,58,59,
+ 60,61,62,63,64,65,66,67,68,69,
+ 70,71,72,73,74,75,76,77,78,79,
+ 80,81,82,83,84,85,86,87,88,89,
+ 90,91,92,93,94,95,96,97,98,99,
+ 100,101,102,103,104,105,106,107,108,109,
+ 110,111,112,113,114,115,116,117,118,119,
+ 120,121,122,123,124,125},
+
+{
+ 1422,1408,1395,1381,1367,1353,1338,1323,1308,1293,
+ 1278,1262,1247,1231,1215,1199,1183,1166,1149,1133,
+ 1116,1100,1083,1066,1049,1032,1015,998,981,965,
+ 948,931,915,898,882,865,849,833,816,801,
+ 785,769,754,739,723,708,694,679,665,650,
+ 636,623,610,596,583,570,558,545,532,521,
+ 509,498,486,475,464,454,443,432,423,412,
+ 402,394,384,375,367,358,350,341,333,326,
+ 317,310,302,295,289,282,275,268,262,256,
+ 250,242,239,233,227,222 }
+};
+volatile u32 ts_adc_flag=2;// 2:adc2,others:adc1
+#endif
+#if 1
+/*
+ * I2C device tab used by board_init()
+ */
+#ifdef CONFIG_MFD_ZX234290_I2C
+static struct zx234290_board zx234290_platform = {
+ .irq_gpio_num = PIN_PMU_INT, //EX0_INT,
+ .irq_gpio_func = PMU_INT_FUNC_SEL,
+ .pshold_gpio_num = PIN_PMU_PSHOLD,
+ .pshold_gpio_func = PMU_PSHOLD_FUNC_SEL,
+ .irq_base = ENT_ZX234290_IRQ_BASE,
+};
+#endif
+
+static struct i2c_board_info zx29_i2c0_devices[] = {
+#ifdef CONFIG_MFD_ZX234290_I2C
+ [0]={
+ I2C_BOARD_INFO("zx234290", 0x12),
+ .irq = EX0_INT,
+ .platform_data = &zx234290_platform,
+ },
+#endif
+
+};
+
+static struct i2c_board_info zx29_i2c1_devices[] = {
+#ifdef CONFIG_CHARGER_ZX234502
+ {
+ I2C_BOARD_INFO("zx234502-charger", 0x13),
+ //.irq = EX5_INT,
+ .platform_data = &zx234502_charger_platform,
+ },
+#endif
+#if (defined CONFIG_SND_SOC_ZX297520V3) || (defined CONFIG_SND_SOC_ZX297520V3_MODULE)
+ {
+ I2C_BOARD_INFO(CODEC_NAME, CODEC_ADDR),
+ .platform_data = ZX29_SND_CODEC_PDATA, //&snd_codec_pdata,
+ },
+#endif
+#ifdef CONFIG_CAMERA_DRV
+ {
+ I2C_BOARD_INFO("gc6133-sensor", 0x40),
+ },
+#endif
+#ifdef CONFIG_INPUT_TOUCHSCREEN
+ {
+ I2C_BOARD_INFO("touchscreen", 0x38),
+ },
+#endif
+
+};
+
+void __init i2c_add_devices(void)
+{
+ unsigned devices_num = 0;
+ int ret = 0;
+
+ /*
+ *i2c devices on bus 0
+ */
+ devices_num = ARRAY_SIZE(zx29_i2c0_devices);
+ if (devices_num){
+ ret = i2c_register_board_info(0,zx29_i2c0_devices, devices_num);
+ if(ret)
+ BUG();
+ }
+
+ /*
+ *i2c devices on bus 1
+ */
+ devices_num = ARRAY_SIZE(zx29_i2c1_devices);
+ if (devices_num){
+ ret = i2c_register_board_info(1,zx29_i2c1_devices, devices_num);
+ if(ret)
+ BUG();
+ }
+}
+#endif
diff --git a/lynq/MIFI/ap/os/linux/linux-3.4.x/drivers/net/wireless/aic8800/rwnx_platform.h b/lynq/MIFI/ap/os/linux/linux-3.4.x/drivers/net/wireless/aic8800/rwnx_platform.h
new file mode 100755
index 0000000..89c6c65
--- /dev/null
+++ b/lynq/MIFI/ap/os/linux/linux-3.4.x/drivers/net/wireless/aic8800/rwnx_platform.h
@@ -0,0 +1,328 @@
+/**
+ ******************************************************************************
+ *
+ * @file rwnx_platorm.h
+ *
+ * Copyright (C) RivieraWaves 2012-2019
+ *
+ ******************************************************************************
+ */
+
+#ifndef _RWNX_PLATFORM_H_
+#define _RWNX_PLATFORM_H_
+
+#include <linux/pci.h>
+#include "lmac_msg.h"
+
+#define AIC_MACCONFIG_NAME "../../etc/aic_macconfig.txt"
+#define RWNX_CONFIG_FW_NAME "rwnx_settings.ini"
+#define RWNX_PHY_CONFIG_TRD_NAME "rwnx_trident.ini"
+#define RWNX_PHY_CONFIG_KARST_NAME "rwnx_karst.ini"
+#define RWNX_AGC_FW_NAME "agcram.bin"
+#define RWNX_LDPC_RAM_NAME "ldpcram.bin"
+#ifdef CONFIG_RWNX_FULLMAC
+#define RWNX_MAC_FW_BASE_NAME "fmacfw"
+#define RWNX_MAC_FW_RF_BASE_NAME "lmacfw_rf.bin"
+#elif defined CONFIG_RWNX_FHOST
+#define RWNX_MAC_FW_BASE_NAME "fhostfw"
+#endif /* CONFIG_RWNX_FULLMAC */
+
+#ifdef CONFIG_RWNX_TL4
+#define RWNX_MAC_FW_NAME RWNX_MAC_FW_BASE_NAME".hex"
+#else
+#define RWNX_MAC_FW_NAME RWNX_MAC_FW_BASE_NAME".ihex"
+#ifdef CONFIG_MCU_INTEGRATED
+#ifdef CONFIG_MCU_MESSAGE
+#define RWNX_MAC_FW_NAME2 RWNX_MAC_FW_BASE_NAME"_8818m_custmsg.bin"
+#else
+#define RWNX_MAC_FW_NAME2 RWNX_MAC_FW_BASE_NAME"_8818m.bin"
+#endif
+#else
+#define RWNX_MAC_FW_NAME2 RWNX_MAC_FW_BASE_NAME".bin"
+#endif
+#endif
+#define RWNX_MAC_CALIB_BASE_NAME_8800DC "fmacfw_calib_8800dc"
+#define RWNX_MAC_CALIB_NAME_8800DC_U02 RWNX_MAC_CALIB_BASE_NAME_8800DC"_u02.bin"
+#define RWNX_MAC_CALIB_NAME_8800DC_H_U02 RWNX_MAC_CALIB_BASE_NAME_8800DC"_h_u02.bin"
+
+#if (defined(CONFIG_DPD) && !defined(CONFIG_FORCE_DPD_CALIB))
+#define FW_DPDRESULT_NAME_8800DC "aic_dpdresult_8800dc.bin"
+#endif
+#ifdef CONFIG_DPD
+#define ROM_FMAC_CALIB_ADDR 0x00130000
+#define FW_PATH_MAX_LEN 200
+int is_file_exist(char* name);
+typedef struct {
+ uint32_t bit_mask[3];
+ uint32_t reserved;
+ uint32_t dpd_high[96];
+ uint32_t dpd_11b[96];
+ uint32_t dpd_low[96];
+ uint32_t idac_11b[48];
+ uint32_t idac_high[48];
+ uint32_t idac_low[48];
+ uint32_t loft_res[18];
+ uint32_t rx_iqim_res[16];
+} rf_misc_ram_t;
+typedef struct {
+ uint32_t bit_mask[4];
+ uint32_t dpd_high[96];
+ uint32_t loft_res[18];
+} rf_misc_ram_lite_t;
+#define MEMBER_SIZE(type, member) sizeof(((type *)0)->member)
+#define DPD_RESULT_SIZE_8800DC sizeof(rf_misc_ram_lite_t)
+extern rf_misc_ram_lite_t dpd_res;
+#endif
+#ifdef CONFIG_DPD
+#ifndef CONFIG_FORCE_DPD_CALIB
+int aicwf_dpd_result_write_8800dc(void *buf, int buf_len);
+#endif
+#endif
+#define RWNX_MAC_PATCH_BASE_NAME "fmacfw_patch_8800dc"
+#define RWNX_MAC_PATCH_NAME2 RWNX_MAC_PATCH_BASE_NAME".bin"
+#define RWNX_MAC_PATCH_NAME2_U02 RWNX_MAC_PATCH_BASE_NAME"_u02.bin"
+#define RWNX_MAC_PATCH_NAME2_8800DC_H_U02 RWNX_MAC_PATCH_BASE_NAME"_h_u02.bin"
+#define RWNX_MAC_PATCH_TABLE_NAME_8800DC "fmacfw_patch_tbl_8800dc"
+#define RWNX_MAC_PATCH_TABLE_8800DC RWNX_MAC_PATCH_TABLE_NAME_8800DC ".bin"
+#define RWNX_MAC_PATCH_TABLE_8800DC_U02 RWNX_MAC_PATCH_TABLE_NAME_8800DC "_u02.bin"
+#define RWNX_MAC_PATCH_TABLE_8800DC_H_U02 RWNX_MAC_PATCH_TABLE_NAME_8800DC "_h_u02.bin"
+#define RWNX_MAC_RF_PATCH_BASE_NAME "fmacfw_rf_patch"
+#define RWNX_MAC_RF_PATCH_NAME RWNX_MAC_RF_PATCH_BASE_NAME".bin"
+
+
+#define RWNX_FCU_FW_NAME "fcuram.bin"
+
+#define FW_USERCONFIG_NAME "aic_userconfig.txt"
+
+#ifdef CONFIG_VENDOR_SPECIFIED_FW_PATH
+#define VENDOR_SPECIFIED_FW_PATH CONFIG_VENDOR_SPECIFIED_FW_PATH
+#endif
+#ifdef CONFIG_VENDOR_SUBDIR_NAME
+#define VENDOR_SUBDIR_NAME CONFIG_VENDOR_SUBDIR_NAME
+#endif
+#define VENDOR_SPECIFIED_DPD_PATH "/mnt/userdata/etc_rw/wifi"
+
+enum aicbt_patch_table_type {
+ AICBT_PT_INF = 0x00,
+ AICBT_PT_TRAP = 0x1,
+ AICBT_PT_B4,
+ AICBT_PT_BTMODE,
+ AICBT_PT_PWRON,
+ AICBT_PT_AF,
+ AICBT_PT_VER,
+};
+enum aicbt_btport_type {
+ AICBT_BTPORT_NULL,
+ AICBT_BTPORT_MB,
+ AICBT_BTPORT_UART,
+};
+enum aicbt_btmode_type {
+ AICBT_BTMODE_BT_ONLY_SW = 0x0, // bt only mode with switch
+ AICBT_BTMODE_BT_WIFI_COMBO, // wifi/bt combo mode
+ AICBT_BTMODE_BT_ONLY, // bt only mode without switch
+ AICBT_BTMODE_BT_ONLY_TEST, // bt only test mode
+ AICBT_BTMODE_BT_WIFI_COMBO_TEST, // wifi/bt combo test mode
+ AICBT_BTMODE_BT_ONLY_COANT, // bt only mode with no external switch
+ AICBT_MODE_NULL = 0xFF, // invalid value
+};
+enum aicbt_uart_baud_type {
+ AICBT_UART_BAUD_115200 = 115200,
+ AICBT_UART_BAUD_921600 = 921600,
+ AICBT_UART_BAUD_1_5M = 1500000,
+ AICBT_UART_BAUD_3_25M = 3250000,
+};
+enum aicbt_uart_flowctrl_type {
+ AICBT_UART_FLOWCTRL_DISABLE = 0x0, // uart without flow ctrl
+ AICBT_UART_FLOWCTRL_ENABLE, // uart with flow ctrl
+};
+enum aicbsp_cpmode_type {
+ AICBSP_CPMODE_WORK,
+ AICBSP_CPMODE_TEST,
+ AICBSP_CPMODE_MAX,
+};
+enum chip_rev {
+ CHIP_REV_U01 = 1,
+ CHIP_REV_U02 = 3,
+ CHIP_REV_U03 = 7,
+ CHIP_REV_U04 = 7,
+};
+#define RAM_FMAC_FW_ADDR 0x00120000
+#define FW_RAM_ADID_BASE_ADDR 0x00161928
+#define FW_RAM_ADID_BASE_ADDR_U03 0x00161928
+#define FW_RAM_PATCH_BASE_ADDR 0x00100000
+#define RAM_8800DC_U01_ADID_ADDR 0x00101788
+#define RAM_8800DC_U02_ADID_ADDR 0x001017d8
+#define RAM_8800DC_FW_PATCH_ADDR 0x00184000
+#define FW_RESET_START_ADDR 0x40500128
+#define FW_RESET_START_VAL 0x40
+#define FW_ADID_FLAG_ADDR 0x40500150
+#define FW_ADID_FLAG_VAL 0x01
+#define FW_RAM_ADID_BASE_ADDR_8800D80 0x002017E0
+#define FW_RAM_PATCH_BASE_ADDR_8800D80 0x0020B2B0
+#define FW_RAM_ADID_BASE_ADDR_8800D80_U02 0x00201940
+#define FW_RAM_PATCH_BASE_ADDR_8800D80_U02 0x0020b43c
+#define AICBT_PT_TAG "AICBT_PT_TAG"
+#define AICBT_TXPWR_LVL 0x00006020
+#define AICBT_TXPWR_LVL_8800dc 0x00006f2f
+#define AICBT_TXPWR_LVL_8800d80 0x00006f2f
+#define AICBSP_HWINFO_DEFAULT (-1)
+#define AICBSP_CPMODE_DEFAULT AICBSP_CPMODE_WORK
+#define AICBSP_FWLOG_EN_DEFAULT 0
+#define AICBT_BTMODE_DEFAULT_8800d80 AICBT_BTMODE_BT_ONLY_COANT
+#define AICBT_BTMODE_DEFAULT AICBT_BTMODE_BT_WIFI_COMBO
+#define AICBT_BTPORT_DEFAULT AICBT_BTPORT_UART
+#define AICBT_UART_BAUD_DEFAULT AICBT_UART_BAUD_1_5M
+#define AICBT_UART_FC_DEFAULT AICBT_UART_FLOWCTRL_ENABLE
+#define AICBT_LPM_ENABLE_DEFAULT 0
+#define AICBT_TXPWR_LVL_DEFAULT AICBT_TXPWR_LVL
+#define AICBT_TXPWR_LVL_DEFAULT_8800dc AICBT_TXPWR_LVL_8800dc
+#define AICBT_TXPWR_LVL_DEFAULT_8800d80 AICBT_TXPWR_LVL_8800d80
+struct aicbt_patch_table {
+ char *name;
+ uint32_t type;
+ uint32_t *data;
+ uint32_t len;
+ struct aicbt_patch_table *next;
+};
+struct aicbt_info_t {
+ uint32_t btmode;
+ uint32_t btport;
+ uint32_t uart_baud;
+ uint32_t uart_flowctrl;
+ uint32_t lpm_enable;
+ uint32_t txpwr_lvl;
+};
+struct aicbt_patch_info_t {
+ uint32_t info_len;
+ uint32_t adid_addrinf;
+ uint32_t addr_adid;
+ uint32_t patch_addrinf;
+ uint32_t addr_patch;
+ uint32_t reset_addr;
+ uint32_t reset_val;
+ uint32_t adid_flag_addr;
+ uint32_t adid_flag;
+};
+struct aicbsp_firmware {
+ const char *desc;
+ const char *bt_adid;
+ const char *bt_patch;
+ const char *bt_table;
+ const char *wl_fw;
+};
+struct aicbsp_info_t {
+ int hwinfo;
+ int hwinfo_r;
+ uint32_t cpmode;
+ uint32_t chip_rev;
+ bool fwlog_en;
+ uint8_t irqf;
+};
+/**
+ * Type of memory to access (cf rwnx_plat.get_address)
+ *
+ * @RWNX_ADDR_CPU To access memory of the embedded CPU
+ * @RWNX_ADDR_SYSTEM To access memory/registers of one subsystem of the
+ * embedded system
+ *
+ */
+enum rwnx_platform_addr {
+ RWNX_ADDR_CPU,
+ RWNX_ADDR_SYSTEM,
+ RWNX_ADDR_MAX,
+};
+
+struct rwnx_hw;
+
+/**
+ * struct rwnx_plat - Operation pointers for RWNX PCI platform
+ *
+ * @pci_dev: pointer to pci dev
+ * @enabled: Set if embedded platform has been enabled (i.e. fw loaded and
+ * ipc started)
+ * @enable: Configure communication with the fw (i.e. configure the transfers
+ * enable and register interrupt)
+ * @disable: Stop communication with the fw
+ * @deinit: Free all ressources allocated for the embedded platform
+ * @get_address: Return the virtual address to access the requested address on
+ * the platform.
+ * @ack_irq: Acknowledge the irq at link level.
+ * @get_config_reg: Return the list (size + pointer) of registers to restore in
+ * order to reload the platform while keeping the current configuration.
+ *
+ * @priv Private data for the link driver
+ */
+struct rwnx_plat {
+ struct pci_dev *pci_dev;
+
+#ifdef AICWF_SDIO_SUPPORT
+ struct aic_sdio_dev *sdiodev;
+#endif
+
+#ifdef AICWF_USB_SUPPORT
+ struct aic_usb_dev *usbdev;
+#endif
+ bool enabled;
+
+ int (*enable)(struct rwnx_hw *rwnx_hw);
+ int (*disable)(struct rwnx_hw *rwnx_hw);
+ void (*deinit)(struct rwnx_plat *rwnx_plat);
+ u8* (*get_address)(struct rwnx_plat *rwnx_plat, int addr_name,
+ unsigned int offset);
+ void (*ack_irq)(struct rwnx_plat *rwnx_plat);
+ int (*get_config_reg)(struct rwnx_plat *rwnx_plat, const u32 **list);
+
+ u8 priv[0] __aligned(sizeof(void *));
+};
+
+#define RWNX_ADDR(plat, base, offset) \
+ plat->get_address(plat, base, offset)
+
+#define RWNX_REG_READ(plat, base, offset) \
+ readl(plat->get_address(plat, base, offset))
+
+#define RWNX_REG_WRITE(val, plat, base, offset) \
+ writel(val, plat->get_address(plat, base, offset))
+
+typedef struct
+{
+ u8_l enable;
+ u8_l xtal_cap;
+ u8_l xtal_cap_fine;
+
+} xtal_cap_conf_t;
+
+extern struct rwnx_plat *g_rwnx_plat;
+
+int rwnx_platform_init(struct rwnx_plat *rwnx_plat, void **platform_data);
+void rwnx_platform_deinit(struct rwnx_hw *rwnx_hw);
+
+int rwnx_platform_on(struct rwnx_hw *rwnx_hw, void *config);
+void rwnx_platform_off(struct rwnx_hw *rwnx_hw, void **config);
+
+int rwnx_platform_register_drv(void);
+void rwnx_platform_unregister_drv(void);
+
+#ifdef CONFIG_LOAD_USERCONFIG
+void get_userconfig_txpwr_lvl(txpwr_lvl_conf_t *txpwr_lvl);
+void get_userconfig_txpwr_lvl_v2_in_fdrv(txpwr_lvl_conf_v2_t *txpwr_lvl_v2);
+void get_userconfig_txpwr_loss(txpwr_loss_conf_t *txpwr_loss);
+void get_userconfig_txpwr_ofst(txpwr_ofst_conf_t *txpwr_ofst);
+void get_userconfig_xtal_cap(xtal_cap_conf_t *xtal_cap);
+void set_txpwr_loss_ofst(s8_l value);
+#ifdef CONFIG_SET_AP_PS
+int get_userconfig_set_ap_ps_lvl(ap_ps_conf_t *ap_ps_lvl);
+#endif
+#endif
+int aicwf_patch_table_load(struct rwnx_hw *rwnx_hw, char *filename);
+int rwnx_load_firmware(u32 **fw_buf, const char *name, struct device *device);
+extern struct device *rwnx_platform_get_dev(struct rwnx_plat *rwnx_plat);
+
+static inline unsigned int rwnx_platform_get_irq(struct rwnx_plat *rwnx_plat)
+{
+ return rwnx_plat->pci_dev->irq;
+}
+int aicwf_misc_ram_init_8800dc(struct rwnx_hw *rwnx_hw);
+int aicwf_plat_patch_load_8800dc(struct rwnx_hw *rwnx_hw);
+
+#endif /* _RWNX_PLATFORM_H_ */
diff --git a/lynq/MIFI/ap/project/zx297520v3/prj_mifi_min_aic8800dw/fs/normal/rootfs/etc_ro/default/default_parameter_user b/lynq/MIFI/ap/project/zx297520v3/prj_mifi_min_aic8800dw/fs/normal/rootfs/etc_ro/default/default_parameter_user
new file mode 100755
index 0000000..b127fca
--- /dev/null
+++ b/lynq/MIFI/ap/project/zx297520v3/prj_mifi_min_aic8800dw/fs/normal/rootfs/etc_ro/default/default_parameter_user
@@ -0,0 +1,472 @@
+apn_auto_config=CMCC($)cmnet($)manual($)*99#($)pap($)($)($)IP($)auto($)($)auto($)($)
+APN_config0=Default($)Default($)manual($)($)($)($)($)IP($)auto($)($)auto($)($)
+APN_config1=
+APN_config2=
+APN_config3=
+APN_config4=
+APN_config5=
+APN_config6=
+APN_config7=
+APN_config8=
+APN_config9=
+apn_index=0
+apn_mode=auto
+at_snap_flag=3
+at_wifi_mac=0
+auto_apn_index=0
+cid_reserved=0
+clear_pb_when_restore=no
+clear_sms_when_restore=no
+default_apn=3gnet
+ipv6_APN_config1=
+ipv6_APN_config2=
+ipv6_APN_config3=
+ipv6_APN_config4=
+ipv6_APN_config5=
+ipv6_APN_config6=
+ipv6_APN_config7=
+ipv6_APN_config8=
+ipv6_APN_config9=
+m_profile_name=Internux
+need_init_modem=yes
+net_select=NETWORK_auto
+pdp_type=IP
+ppp_apn=
+max_reconnect_time=3000000
+pppd_auth=noauth
+ppp_auth_mode=none
+ppp_passwd=
+ppp_pdp_type=
+ppp_username=
+ipv6_ppp_auth_mode=none
+ipv6_ppp_passwd=
+ipv6_ppp_username=
+pre_mode=
+prefer_dns_manual=0.0.0.0
+standby_dns_manual=0.0.0.0
+wan_apn=internet
+wan_dial=
+cta_test=0
+safecare_enbale=0
+safecare_hostname=mob.3gcare.cn
+safecare_registed_imei=
+safecare_registed_iccid=
+safecare_contimestart1=
+safecare_contimestart2=
+safecare_contimestart3=
+safecare_contimestop1=
+safecare_contimestop2=
+safecare_contimestop3=
+safecare_contimeinterval=
+safecare_mobsite=http://mob.3gcare.cn
+safecare_chatsite=
+safecare_platno=
+safecare_mobilenumber=
+safecare_version=
+ethwan_dns_mode=auto
+pswan_dns_mode=auto
+wifiwan_dns_mode=auto
+ethwan_ipv6_dns_mode=auto
+wifiwan_ipv6_dns_mode=auto
+pswan_ipv6_dns_mode=auto
+admin_Password=Pass1234
+psw_changed=1
+alg_ftp_enable=0
+alg_sip_enable=0
+blc_wan_auto_mode=AUTO_PPP
+blc_wan_mode=AUTO
+br_ipchange_flag=
+br_node=usblan0
+clat_fake_subnet=192.0.168.0
+clat_frag_collect_timeout=300
+clat_local_mapping_timeout=300
+clat_mapping_record_timeout=3000
+clat_query_server_port=1464
+DefaultFirewallPolicy=0
+dev_coexist=0
+dhcpDns=192.168.0.1
+dhcpEnabled=1
+dhcpEnd=192.168.0.200
+dhcpLease_hour=24
+dhcpStart=192.168.0.100
+dhcpv6stateEnabled=0
+dhcpv6statelessEnabled=1
+dhcpv6statePdEnabled=0
+dial_mode=auto_dial
+DMZEnable=0
+DMZIPAddress=
+dns_extern=
+ipv6_dns_extern=
+eth_act_type=
+eth_type=wan
+ethlan=
+ethwan=
+ethwan_dialmode=auto
+ethwan_mode=auto
+ethwan_priority=3
+fast_usb=usblan0
+fastnat_level=2
+IPPortFilterEnable=0
+IPPortFilterRules_0=
+IPPortFilterRules_1=
+IPPortFilterRules_2=
+IPPortFilterRules_3=
+IPPortFilterRules_4=
+IPPortFilterRules_5=
+IPPortFilterRules_6=
+IPPortFilterRules_7=
+IPPortFilterRules_8=
+IPPortFilterRules_9=
+IPPortFilterRulesv6_0=
+IPPortFilterRulesv6_1=
+IPPortFilterRulesv6_2=
+IPPortFilterRulesv6_3=
+IPPortFilterRulesv6_4=
+IPPortFilterRulesv6_5=
+IPPortFilterRulesv6_6=
+IPPortFilterRulesv6_7=
+IPPortFilterRulesv6_8=
+IPPortFilterRulesv6_9=
+ipv4_fake_subnet=192.0.0.0
+ipv6_fake_subnet=2016::1
+lan_ipaddr=192.168.0.1
+lan_name=br0
+lan_netmask=255.255.255.0
+LanEnable=1
+mac_ip_list=
+mgmt_quicken_power_on=0
+mtu=1400
+natenable=
+dosenable=0
+need_jilian=1
+nofast_port=21+22+23+25+53+67+68+69+110+115+123+443+500+1352+1723+1990+1991+1992+1993+1994+1995+1996+1997+1998+4500+5060
+nv_save_interval=300
+path_conf=/etc_rw
+path_ro=/etc_ro
+path_log=/var/log/
+path_sh=/sbin
+path_tmp=/tmp
+permit_gw=
+permit_ip6=
+permit_nm=255.255.255.0
+PortForwardEnable=0
+PortForwardRules_0=
+PortForwardRules_1=
+PortForwardRules_2=
+PortForwardRules_3=
+PortForwardRules_4=
+PortForwardRules_5=
+PortForwardRules_6=
+PortForwardRules_7=
+PortForwardRules_8=
+PortForwardRules_9=
+PortMapEnable=0
+PortMapRules_0=
+PortMapRules_1=
+PortMapRules_2=
+PortMapRules_3=
+PortMapRules_4=
+PortMapRules_5=
+PortMapRules_6=
+PortMapRules_7=
+PortMapRules_8=
+PortMapRules_9=
+ppp_name=ppp0
+pppoe_password=
+pppoe_username=
+ps_ext1=usblan0
+ps_ext2=usblan0
+ps_ext3=usblan0
+ps_ext4=usblan0
+ps_ext5=usblan0
+ps_ext6=usblan0
+ps_ext7=usblan0
+ps_ext8=usblan0
+pswan=wan
+pswan_mode=pdp
+pswan_priority=1
+RemoteManagement=0
+rj45_plugstate_path=/sys/kernel/eth_debug/eth_state
+rootdev_friendlyname=DEMO-UPnP
+rootdev_manufacturer=DEMO
+rootdev_modeldes=XXX
+rootdev_modelname=XXX
+os_url=http://www.demo.com
+serialnumber=See-IMEI
+static_dhcp_enable=1
+static_ethwan_gw=
+static_ethwan_ip=
+static_ethwan_nm=
+static_ethwan_pridns=
+static_ethwan_secdns=
+static_wifiwan_ipaddr=
+static_wifiwan_netmask=
+static_wifiwan_gateway=
+wifiwan_pridns_manual=
+wifiwan_secdns_manual=
+static_wan_gateway=0.0.0.0
+static_wan_ipaddr=0.0.0.0
+static_wan_netmask=0.0.0.0
+static_wan_primary_dns=0.0.0.0
+static_wan_secondary_dns=0.0.0.0
+swlanstr=sw0_lan
+swvlan=sw0
+swwanstr=sw0_wan
+tc_downlink=
+tc_uplink=
+tc_local=1310720
+tc_enable=0
+time_limited=
+time_to_2000_when_restore=yes
+upnpEnabled=0
+usblan=usblan0
+WANPingFilter=0
+websURLFilters=
+wifiwan_priority=2
+DDNS=
+DDNS_Enable=0
+DDNSAccount=
+DDNSPassword=
+DDNSProvider=
+iccidPrevious=
+imeiPrevious=
+registerFlag=0
+registeredRound=
+secsEveryRound=1
+secsEveryTime=1
+regver=4.0
+meid=
+uetype=1
+LocalDomain=m.home
+data_volume_alert_percent=
+data_volume_limit_size=
+data_volume_limit_switch=0
+data_volume_limit_unit=0
+flux_day_total=0
+flux_last_day=
+flux_last_month=
+flux_last_year=
+flux_month_total=0
+flux_set_day=
+flux_set_month=
+flux_set_year=
+monthly_rx_bytes=0
+monthly_time=0
+monthly_tx_bytes=0
+MonthlyConTime_Last=
+dm_nextpollingtime=
+fota_allowRoamingUpdate=0
+fota_dl_pkg_size=0
+fota_update_flag=
+fota_updateIntervalDay=15
+fota_upgrade_result=
+fota_version_delta_id=
+fota_version_delta_url=
+fota_pkg_total_size=0
+fota_version_file_size=
+fota_version_md5sum=
+fota_version_name=
+fota_need_user_confirm_update=0
+fota_need_user_confirm_download=1
+fota_version_force_install=0
+polling_nexttime=0
+pwron_auto_check=1
+fota_updateMode=1
+fota_test_mode=0
+fota_pkg_downloaded=0
+fota_upgrade_result_internal=
+mmi_battery_voltage_line=3090+3300+3450+3490+3510+3540+3550+3570+3580+3600+3620+3650+3670+3710+3740+3780+3850+3900+3950+4000+4060
+mmi_fast_poweron=1
+mmi_led_mode=sleep_mode
+mmi_new_sms_blink_flag=1
+mmi_show_pagetab=page1+page2+page3
+mmi_showmode=lcd
+mmi_task_tab=net_task+ctrl_task+wifi_task+traffic_task+key_task+tip_task+tipwps_task+tipwifistation_task+tipfota_task+tipwps_task+tipnetconnect_task+wificode_task+ssid_task+sms_task
+mmi_temp_voltage_line=150+260+1120+1500
+mmi_use_protect=
+mmi_use_wifi_usernum=1
+leak_full_panic=
+leak_list_max=
+leak_set_flag=
+monitor_period=300
+netinf_flag=
+skb_all_max=
+skb_data_max=
+skb_fromcp_max=
+skb_max_fail=
+skb_max_panic=
+skb_size_max=
+skb_tocp_max=
+sntp_default_ip=134.170.185.211;131.107.13.100;202.112.31.197;202.112.29.82;202.112.10.36;ntp.gwadar.cn;ntp-sz.chl.la;dns.sjtu.edu.cn;news.neu.edu.cn;dns1.synet.edu.cn;time-nw.nist.gov;pool.ntp.org;europe.pool.ntp.org
+sntp_dst_enable=0
+sntp_other_server0=
+sntp_other_server1=
+sntp_other_server2=
+sntp_server0=time-nw.nist.gov
+sntp_server1=pool.ntp.org
+sntp_server2=europe.pool.ntp.org
+sntp_sync_select_interval_time=30
+sntp_time_set_mode=auto
+sntp_timezone=CST-8
+sntp_timezone_index=0
+assert_errno=
+comm_logsize=16384
+cr_inner_version=V1.0.0B08
+cr_version=V1.0.0B01
+hw_version=PCBMF29S2V1.0.0
+TURNOFF_CHR_NUM=
+watchdog_app=0
+HTTP_SHARE_FILE=
+HTTP_SHARE_STATUS=
+HTTP_SHARE_WR_AUTH=readWrite
+ipv6_pdp_type=
+ipv6_wan_apn=
+Language=zh-cn
+manual_time_day=
+manual_time_hour=
+manual_time_minute=
+manual_time_month=
+manual_time_second=
+manual_time_year=
+sdcard_mode_option=0
+AccessControlList0=
+AccessPolicy0=0
+ACL_mode=0
+AuthMode=WPA2PSK
+Channel=0
+wifi_acs_num=8
+closeEnable=0
+closeTime=
+CountryCode=CN
+DefaultKeyID=0
+DtimPeriod=1
+EncrypType=AES
+EX_APLIST=
+EX_APLIST1=
+EX_AuthMode=
+EX_DefaultKeyID=
+EX_EncrypType=
+EX_mac=
+EX_SSID1=Ufi_
+EX_WEPKEY=
+EX_wifi_profile=
+EX_WPAPSK1=
+FragThreshold=2346
+HideSSID=0
+HT_GI=1
+Key1Str1=12345
+Key2Str1=
+Key3Str1=
+Key4Str1=
+Key1Type=1
+Key2Type=
+Key3Type=
+Key4Type=
+m_AuthMode=WPA2PSK
+m_DefaultKeyID=
+m_EncrypType=AES
+m_HideSSID=0
+m_Key1Str1=1234
+m_Key2Str1=
+m_Key3Str1=
+m_Key4Str1=
+m_Key1Type=1
+m_Key2Type=
+m_Key3Type=
+m_Key4Type=
+m_MAX_Access_num=0
+m_NoForwarding=
+m_show_qrcode_flag=0
+m_SSID=Ufi_
+m_ssid_enable=0
+m_wapiType=
+m_wifi_mac=901D45692A5C
+m_WPAPSK1_aes=
+m_WPAPSK1_encode=MTIzNDU2Nzg=
+MAX_Access_num=32
+MAX_Access_num_bak=32
+NoForwarding=0
+openEnable=0
+openTime=
+operater_ap=
+RekeyInterval=3600
+RTSThreshold=2347
+show_qrcode_flag=0
+Sleep_interval=10
+ssid_write_flag=0
+SSID1=Ufi_
+tsw_sleep_time_hour=
+tsw_sleep_time_min=
+tsw_wake_time_hour=
+tsw_wake_time_min=
+wapiType=
+wifi_force_40m=1
+wifi_11n_cap=1
+wifi_band=b
+wifi_coverage=long_mode
+wifi_hostname_black_list=
+wifi_hostname_white_list=
+wifi_mac=901D45692A5B
+wifi_mac_black_list=
+wifi_mac_white_list=
+wifi_profile=
+wifi_profile1=
+wifi_profile2=
+wifi_profile3=
+wifi_profile4=
+wifi_profile5=
+wifi_profile6=
+wifi_profile7=
+wifi_profile8=
+wifi_profile9=
+wifi_profile_num=0
+wifi_root_dir=
+wifi_sta_connection=0
+wifi_wps_index=1
+wifiEnabled=1
+wifilan=wlan0-va0
+wifilan2=wlan0-va1
+WirelessMode=6
+WPAPSK1_aes=
+WPAPSK1_encode=MTIzNDU2Nzg=
+wps_mode=
+WPS_SSID=
+WscModeOption=0
+monitor_apps=
+at_netdog=
+autorspchannel_list=all
+soctime_switch=0
+uart_control=0
+uart_ctstrs_enable=
+special_cmd_list=$MYNETREAD
+##为入网入库芯片认证版本添加 begin
+atcmd_stream1=AT+ZSET="w_instrument",1
+atcmd_stream2=AT^SYSCONFIG=24,0,1,2
+atcmd_stream3=AT+ZSET="csiiot",2
+atcmd_stream4=AT+ZSET="dlparaflg",0
+atcmd_stream5=AT+ZSET="MTNET_TEST",1;AT+ZGAAT=0;AT+ZSET="CMCC_TEST",1;AT+ZSET="LTE_INFO",6348;AT+ZSET="VOICE_SUPPORT",1;AT+ZSET="FDD_RELEASE",7;AT+ZSET="LTE_RELEASE",1;AT+ZSET="UE_PS_RELEASE",5;AT+ZSET="QOS_RELEASE",4;AT+ZSET="TEBS_THRESHOLD",0
+atcmd_stream6=AT+ZSET="MTNET_TEST",1;AT+ZGAAT=0;AT+ZSET="LTE_INFO",6348;AT+ZSET="VOICE_SUPPORT",1;AT+ZSET="FDD_RELEASE",7;AT+ZSET="LTE_RELEASE",1;AT+ZSET="UE_PS_RELEASE",5;AT+ZSET="QOS_RELEASE",4;AT+ZSET="TEBS_THRESHOLD",0;AT+ZSET="IGNORE_SECURITY_SUPPORT",0;AT+ZSET="csifilter",0;AT+ZSET="csrhobandflg",0;AT+ZSET="dlparaflg",1;AT+ZSET="csiup",1;AT+ZSET="rfparaflag",0,0,1,0;AT+ZSET="csiiot",1;AT+ZSET="EXCEPT_RESET",0;AT+ZSET="ISIM_SUPPORT",1;AT+ZIMSTEST="MTNET_TEST",1;AT+ZSET="MANUAL_SEARCH",0
+##为入网入库芯片认证版本添加 end
+#for audio ctrl
+audio_priority=0123
+customer_type=sdk_min
+debug_mode=
+cpIndCmdList=+ZMMI+ZURDY+ZUSLOT+ZICCID^MODE+ZPBIC+ZMSRI+CREG+CEREG+CGREG+CGEV
+zephyr_filter_ip=
+wait_timeout=2
+sntp_sync_time=1
+sntp_static_server0=time-nw.nist.gov
+sntp_static_server1=pool.ntp.org
+sntp_static_server2=europe.pool.ntp.org
+vsim_bin_path=/mnt/userdata/vSim.bin
+webv6_enable=
+lan_ipv6addr=fe80::1
+sms_vp=
+at_select_timeout=
+mtnet_test_mcc=
+at_atv=
+at_atq=
+at_at_d=
+base_ip_on_mac=0
+quick_dial=1
+xlat_enable=0
diff --git a/lynq/MIFI/boot/common/src/uboot/board/zte/zx297520v3/zx297520v3_mifi_mini.c b/lynq/MIFI/boot/common/src/uboot/board/zte/zx297520v3/zx297520v3_mifi_mini.c
new file mode 100755
index 0000000..25419ea
--- /dev/null
+++ b/lynq/MIFI/boot/common/src/uboot/board/zte/zx297520v3/zx297520v3_mifi_mini.c
@@ -0,0 +1,679 @@
+/*********************************************************************
+ Copyright 2016 by ZIXC Corporation.
+*
+* FileName:: zx297520.c
+* File Mark:
+* Description:
+* Others:
+* Version: v1.0
+* Author: zhouqi
+* Date: 2014-1-15
+
+* History 1:
+* Date:
+* Version:
+* Author:
+* Modification:
+* History 2:
+**********************************************************************/
+
+#include <common.h>
+#include <errno.h>
+#include <nand.h>
+#include <asm/arch/nand.h>
+#include <asm/arch/hardware.h>
+#include <asm/arch/uart.h>
+#include <asm/arch/lsp_crpm.h>
+#include <power.h>
+#include <partition_table.h>
+
+#include <mmc.h>
+#include <dwmmc.h>
+#include <boot_mode.h>
+#include <load_image.h>
+#include <zx234290.h>
+#include <charge.h>
+//#include <led.h>
+#include <lcd.h>
+#include <peripheral.h>
+#include "board.h"
+
+#include <drvs_gpio.h>
+
+#include <asm/arch/gmac.h>
+#include <command.h>
+#include <version.h>
+#include <secure_verify.h>
+#include <asm/arch/efuse.h>
+
+#include "cmd_downver.h"
+#include <../drivers/dma/zx29_dma.h>
+
+#include <watchdog.h>
+#include <linux/mtd/partitions.h>
+
+
+#define RET_BOOT_READY 1
+
+DECLARE_GLOBAL_DATA_PTR;
+
+#if TIME_DEBUG
+#define time_debug_reset(fmt) fmt = get_timer(0)
+#define time_debug_printf(fmt, val) printf(fmt ,get_timer(val))
+#else
+#define time_debug_reset(fmt)
+#define time_debug_printf(fmt, val)
+#endif /* TIME_DEBUG */
+
+typedef struct {
+ int (*Init)(void);
+ char func_name[20];
+}sys_init_func_t;
+
+extern boot_reason_t g_boot_reason;
+extern uint32_t g_gmac_init_flag;
+extern uint32_t g_gmac_init_overtime;
+extern unsigned char g_ddr_size_flag;
+
+unsigned int g_uiDebugLevel = UBOOT_NOTICE;
+unsigned int g_sys_kernel_sdram_size = CONFIG_SYS_SDRAM32_A9_SIZE;
+
+
+#ifndef CFG_TEMP_ADDR
+#define CFG_TEMP_ADDR 0x22000000
+#endif
+
+#define reg32(addr) (*(volatile unsigned long *)(addr))
+
+#define UDELAY_PARAM_1SEC (100000/3)
+
+/* DebugLevel - Controlled at compile time
+ * UBOOT_ERR -> Noncritical error conditions.
+ * UBOOT_WARN -> Warning conditions that should be taken care of.
+ * UBOOT_NOTICE -> Normal, but significant events.
+ * UBOOT_DBG -> Informational messages that require no action.
+ * UBOOT_INFO -> Debugging messages, output if the developer enabled debugging.
+ */
+//unsigned int g_uiDebugLevel = UBOOT_NOTICE;
+extern int copy_ddr_allbin(void);
+
+/*******************************************************************************
+ * Function: board_init
+ * Description:
+ * Parameters:
+ * Input:
+ *
+ * Output:
+ *
+ * Returns:
+ *
+ *
+ * Others:
+ ********************************************************************************/
+int board_init(void)
+{
+ return 0;
+}
+
+/*******************************************************************************
+ * Function: dram_init_banksize
+ * Description:
+ * Parameters:
+ * Input:
+ *
+ * Output:
+ *
+ * Returns:
+ *
+ *
+ * Others:
+ ********************************************************************************/
+void dram_init_banksize(void)
+{
+ gd->bd->bi_dram[0].start = PHYS_SDRAM_1;
+ gd->bd->bi_dram[0].size = PHYS_SDRAM_1_SIZE;
+}
+
+/*******************************************************************************
+ * Function: dram_init
+ * Description:
+ * Parameters:
+ * Input:
+ *
+ * Output:
+ *
+ * Returns:
+ *
+ *
+ * Others:
+ ********************************************************************************/
+int dram_init(void)
+{
+ gd->ram_size = get_ram_size((long *)CONFIG_SYS_SDRAM_BASE,
+ PHYS_SDRAM_1_SIZE);
+
+ return 0;
+}
+
+/*******************************************************************************
+ * Function: checkboard
+ * Description:
+ * Parameters:
+ * Input:
+ *
+ * Output:
+ *
+ * Returns:
+ *
+ *
+ * Others:
+ ********************************************************************************/
+int checkboard(void)
+{
+#ifdef CONFIG_DISPLAY_BOARDINFO
+ printf("Board: ZX297520V3\n");
+#endif
+
+ return 0;
+}
+
+void clear_iram(uint32_t addr, uint32_t len)
+{
+ uint32_t i = 0;
+ for(i = addr; i < addr + len; i+=4)
+ {
+ writel(0x0, i);
+ }
+}
+
+void clear_tmp_buf(void)
+{
+ clear_iram(CONFIG_SYS_SDRAM_TEMP_BASE, 0x800);
+}
+
+static int gmac_download_init(void)
+{
+ int ret = 0;
+
+ get_gmac_init_flag();
+ BOOT_PRINTF(UBOOT_DBG, "get_gmac_init_flag = 0x%x, read_gmac_init_flag = 0x%x.\n", get_gmac_init_flag(), read_gmac_init_flag());
+ if(1 == read_gmac_init_flag())
+ {
+ BOOT_PRINTF(UBOOT_NOTICE, "gmac init overtime[%ds].....$$$$$$$$$$$$$$\n", read_gmac_init_overtime());
+
+ puts("Net: ");
+ eth_initialize(gd->bd);
+
+ if (run_command ("downver allbins", 0) >= 0)
+ {
+ ret = copy_ddr_allbin();
+ if(ret != 0)
+ {
+ BOOT_PRINTF(UBOOT_ERR, "net load write from ddr to nand FAILED !!!\n");
+ }
+ }
+ else
+ {
+ BOOT_PRINTF(UBOOT_ERR, "run_command downver allbins FAILED !!!\n");
+ }
+ }
+
+ return 0;
+}
+
+static int test_env_entry(void)
+{
+ /* Ó²¼þ²âÊÔ */
+#if CONFIG_HARDWARE_TEST
+ hardware_test();
+#endif
+
+#if CONFIG_MUTUAL_DEBUG //ÖÃ1Ö®ºó¾Í¿ÉÒÔ½øÈëUBoot¿ØÖÆ̨ÃüÁîÐÐ
+ for (;;)
+ {
+ main_loop();
+ }
+#endif
+
+ return 0;
+}
+
+static int boot_reason_init(void)
+{
+ int ret = 0;
+ unsigned int amt_flag = 0;
+ unsigned int key_times = 0;
+ unsigned int *poweron_type = (unsigned int *)POWERON_TYPE_ADDR; //ÁÙʱʹÓÃ
+
+ BOOT_PRINTF(UBOOT_DBG, "Normal mode.\n");
+
+ amt_flag = readl(POWERON_TYPE_ADDR);
+ BOOT_PRINTF(UBOOT_NOTICE, "VALUE = 0x%x!\n", amt_flag);
+ if(amt_flag == AMT_MODE_FLAG)
+ {
+ BOOT_PRINTF(UBOOT_NOTICE, "AMT VALUE = AMT_MODE_FLAG!\n");
+ g_boot_reason = RB_AMT;
+ }
+ else
+ {
+ ret = get_boot_reason();
+ if(ret != 0)
+ {
+ BOOT_PRINTF(UBOOT_ERR, "get boot reason ERROR !!!\n");
+ /* TBD: Error Return. */
+ }
+ }
+
+ if(read_fota_update_flag() == FOTA_RECOVERY)
+ {
+ *poweron_type = POWER_ON_FOTA;
+ }
+ else if(read_fota_update_flag() == FOTA_LOCALUPDATE)
+ {
+ *poweron_type = POWER_ON_LOCALUPDATE;
+ }
+ else if(g_boot_reason == RB_AMT)
+ {
+ *poweron_type = POWER_ON_AMT;
+ }
+ else if(g_boot_reason == RB_PRODUCTION)
+ {
+ *poweron_type = POWER_ON_PRODUCTION;
+ }
+ else if((g_boot_reason & 0xF0) == ZX234290_WDT_RST_FLAG)
+ {
+ *poweron_type = g_boot_reason & 0x0F;
+ }
+ else if(g_boot_reason == RB_RESET_NOMAL)
+ {
+ *poweron_type = POWER_ON_NORMAL;
+ }
+ else if(g_boot_reason == RB_RTC)
+ {
+ *poweron_type = POWER_ON_RTC; //POWER_ON_NORMAL;
+ }
+ else if(g_boot_reason == RB_RESET_EXCEPT)
+ {
+ *poweron_type = POWER_ON_EXCEPTRESET;
+ }
+ else if(g_boot_reason == RB_POWER_KEY_LONG)//add llp restart power on mode by yuxiang
+ {
+ *poweron_type = POWER_ON_NORMAL;
+ }
+ else if(g_boot_reason == RB_POWER_KEY)
+ {
+
+ while(1)
+ {
+ /*******¼ì²âÊÇ·ñ³¤°´¼ü3s********/
+ if(zx234290_get_poweron_state())
+ {
+ key_times++;
+// printf( "[sys_entry]: power key down,key_times=%d.\n",key_times);
+ }
+ else
+ {
+ *poweron_type = POWER_ON_CHARGING;
+ break;
+ }
+ if(key_times >= 20)
+ {
+ *poweron_type = POWER_ON_NORMAL;
+ break;
+ }
+ udelay(UDELAY_PARAM_1SEC / 100); /*Actual 10ms*/
+ }
+
+ }
+ else if((g_boot_reason == RB_USB_INSERT)||(g_boot_reason == RB_RESET_USB_OFF))
+ {
+ *poweron_type = POWER_ON_CHARGING;
+ }
+ else if(g_boot_reason == RB_POWER_BOOST_IN)
+ {
+ *poweron_type = POWER_ON_BOOST_IN;
+ }
+ else if(g_boot_reason == RB_RESET_ALARM)
+ {
+ *poweron_type = POWER_ON_NORMAL;
+ }
+ else
+ {
+ *poweron_type = POWER_ON_INVALID;
+ BOOT_PRINTF(UBOOT_DBG, "g_boot_reason=0x%x.\n", g_boot_reason);
+ }
+ BOOT_PRINTF(UBOOT_NOTICE, "poweron_type=0x%x.\n", *poweron_type);
+#if 0
+ key_times = 0;
+ while(*poweron_type == POWER_ON_CHARGING)
+ {
+ /* ¼ì²éÊÇ·ñ½ÓÁ˳äµçÆ÷ */
+ if(1)//if(detect_usb_online())
+ {
+ break;
+ }
+ pmu_pull_on_ps_hold();
+ /* ¼ì²éÄÖÖÓ¡¢µ¹¼Æʱʼþ */
+ if(zx234290_get_rtc_state() > 0)
+ {
+ *poweron_type = POWER_ON_RTC;
+ BOOT_PRINTF(UBOOT_NOTICE, "new poweron_type=0x%x.\n", *poweron_type);
+ break;
+ }
+ /* ¼ì²é°´¼ü³¤°´ */
+ if(zx234290_get_poweron_state())
+ {
+ key_times++;
+ }
+ else
+ {
+ key_times = 0;
+ }
+ if(key_times >= 2)
+ {
+ BOOT_PRINTF(UBOOT_NOTICE, "new poweron_type=0x%x.\n", *poweron_type);
+ *poweron_type = POWER_ON_NORMAL;
+ break;
+ }
+ pmu_pull_off_ps_hold();
+ udelay(UDELAY_PARAM_1SEC / 10); /*Actual 100ms*/
+ }
+#endif
+ zx234290_write_flag(ZX234290_WDT_RST_FLAG | *poweron_type);
+
+ return 0;
+}
+
+static int bat_detect(void)
+{
+ unsigned int *poweron_type = (unsigned int *)POWERON_TYPE_ADDR; //ÁÙʱʹÓÃ
+ int vBatVoltage = -1;
+ uchar lowbat_keyrelease=0;
+ int vBatPowerOnVoltage = -1;
+
+ if ((*poweron_type == POWER_ON_AMT) ||
+ (*poweron_type == POWER_ON_PRODUCTION) ||
+ (*poweron_type == POWER_ON_LOCALUPDATE)) {
+ BOOT_PRINTF(UBOOT_WARN, "skip battery detect!!!\n");
+ }
+ else if(1==get_battery_detect_flag())/*detect bat start*/
+ {
+ if (!zx_get_battery_Status())
+ {
+ BOOT_PRINTF(UBOOT_WARN, "there is no battery. Forbid power on.\n");
+ pmu_pull_on_ps_hold();
+ Show_No_Battery();
+ udelay(UDELAY_PARAM_1SEC * 3); /*3s*/
+ pmu_pull_off_ps_hold();
+ hang();
+ }
+
+ vBatVoltage = zx_get_vbat_voltage();
+ BOOT_PRINTF(UBOOT_NOTICE, "zx_get_vbat_voltage= %d.\n", vBatVoltage);
+
+ if (vBatVoltage <= 3400)
+ {
+ pmu_pull_on_ps_hold();
+ BOOT_PRINTF(UBOOT_WARN, "Battery voltage %d. Forbid power on.\n", vBatVoltage);
+ if((*poweron_type == POWER_ON_NORMAL)||(*poweron_type == POWER_ON_FOTA))
+ {
+ /*show the low Battery for 3s*/
+ Show_LowPower();
+ udelay(UDELAY_PARAM_1SEC * 2); /*3s*/
+ }
+ //pmu_pull_off_ps_hold();
+ wdt_close();//close wdt
+ while(1)
+ {
+ if(!lowbat_keyrelease && !zx234290_get_poweron_state())
+ {
+ zDrvLcd_TurnBacklightOnOff(0);
+ udelay(UDELAY_PARAM_1SEC /10); // 100ms
+ BOOT_PRINTF(UBOOT_WARN, "pwr key released...poweroff\n");
+ pmu_pull_off_ps_hold();
+ udelay(UDELAY_PARAM_1SEC /10); // 100ms
+ lowbat_keyrelease = 1;// usb or other power hold on the system.
+ }
+ vBatPowerOnVoltage = zx_get_vbat_voltage();
+ BOOT_PRINTF(UBOOT_WARN, "the current battery voltage is %d.\n", vBatPowerOnVoltage);
+ if(vBatPowerOnVoltage > 3400)
+ {
+ break;
+ }
+ udelay(UDELAY_PARAM_1SEC );
+ }
+ if(*poweron_type != POWER_ON_FOTA)
+ wdt_open();//open wdt
+ }
+ }/* detect bat end*/
+
+ return 0;
+}
+
+void display_boot_animation(unsigned int poweron_type)
+{
+ switch (poweron_type) {
+ case POWER_ON_LOCALUPDATE:
+ Show_UpdateWait();
+ break;
+
+ case POWER_ON_NORMAL:
+ Show_PowerOn_Normal();
+ break;
+
+ case POWER_ON_FOTA:
+ Show_PowerOn_Fota();
+ break;
+
+ case POWER_ON_CHARGING:
+ Show_Charging();
+ break;
+
+ default:
+ break;
+ }
+}
+
+static int boot_prepare(void)
+{
+ unsigned int poweron_type = reg32(POWERON_TYPE_ADDR); //ÁÙʱʹÓÃ
+
+ if (poweron_type == POWER_ON_CHARGING) {
+ pmu_pull_off_ps_hold();
+ } else {
+ pmu_pull_on_ps_hold();
+ }
+
+ display_boot_animation(poweron_type);
+
+ return 0;
+}
+
+static int boot_entry(void)
+{
+ int ret = 0;
+ unsigned int poweron_type = reg32(POWERON_TYPE_ADDR); //ÁÙʱʹÓÃ
+
+ g_ddr_size_flag = CHIP_DDR_IS_32M;
+
+ switch (poweron_type) {
+
+ case POWER_ON_LOCALUPDATE:
+ break;
+ case POWER_ON_FOTA:
+ BOOT_PRINTF(UBOOT_NOTICE, "Fota entry!\n");
+ if(g_ddr_size_flag == CHIP_DDR_IS_32M)
+ {
+ g_sys_kernel_sdram_size = CONFIG_SYS_SDRAM32_RECOVERY_A9_SIZE;
+ }
+ else if(g_ddr_size_flag == CHIP_DDR_IS_64M)
+ {
+ g_sys_kernel_sdram_size = CONFIG_SYS_SDRAM64_RECOVERY_A9_SIZE;
+ }
+ else if(g_ddr_size_flag == CHIP_DDR_IS_128M)
+ {
+ g_sys_kernel_sdram_size = CONFIG_SYS_SDRAM128_RECOVERY_A9_SIZE;
+ }
+ else
+ {
+ g_sys_kernel_sdram_size = CONFIG_SYS_SDRAM256_RECOVERY_A9_SIZE;
+ }
+
+ ret = fs_load_arm_image_linux(ARM_RECOVERY_USERDATA_IMAGE); /*FOTA-UPDATE*/
+ break;
+ default:
+ BOOT_PRINTF(UBOOT_NOTICE, "Normal entry!\n");
+ if(g_ddr_size_flag == CHIP_DDR_IS_32M)
+ {
+ g_sys_kernel_sdram_size = CONFIG_SYS_SDRAM32_A9_SIZE;
+ }
+ else if(g_ddr_size_flag == CHIP_DDR_IS_64M)
+
+ {
+ g_sys_kernel_sdram_size = CONFIG_SYS_SDRAM64_A9_SIZE;
+ }
+ else if(g_ddr_size_flag == CHIP_DDR_IS_128M)
+ {
+ g_sys_kernel_sdram_size = CONFIG_SYS_SDRAM128_A9_SIZE;
+ }
+ else
+ {
+ g_sys_kernel_sdram_size = CONFIG_SYS_SDRAM256_A9_SIZE;
+ }
+ ret = fs_load_m0_image();
+ ret += fs_load_zsp_image();
+ ret += fs_load_arm_image_linux(ARM_APP_IMAGE);
+ break;
+ }
+
+#if VERSION_RELEASE
+ if( ret != 0 )
+ {
+ BOOT_PRINTF(UBOOT_ERR, "load images ERROR !!!\n");
+ }
+#endif
+
+ return 0;
+}
+
+static const sys_init_func_t uboot_init_func_tbl[] =
+{
+ {wdt_get_reboot_reason, "wdt_reboot"},
+ {dma_init, "dma"},
+ {i2c_init, "i2c"},
+ {peripheral_init, "peri"},
+ {nand_init, "nand"},
+ {partition_init, "partition"},
+ {gmac_download_init, "gmac"},
+ {test_env_entry, "test"},
+ {efuse_init, "efuse"},
+ {lcd_init, "lcd"},//aic8800 init
+ {nvrw_flag_init, "nvrw_flag"},
+ {boot_reason_init, "boot_reason"},
+ {wdt_init, "wdt"},
+ //{bat_detect, "bat_det"},
+ {boot_prepare, "boot_prepare"},
+ {NULL, {}}
+};
+
+static const sys_init_func_t tboot_init_func_tbl[] =
+{
+ {wdt_get_reboot_reason, "wdt_reboot"},
+ {dma_init, "dma"},
+ {i2c_init, "i2c"},
+ {peripheral_init, "peri"},
+ {nand_init, "nand"},
+ {NULL, {}}
+};
+
+int uboot_init_func(void)
+{
+ unsigned int dev_index;
+ int ret;
+
+ BOOT_PRINTF(UBOOT_NOTICE, "go into uboot init func\n");
+
+ for (dev_index = 0; (uboot_init_func_tbl[dev_index].Init != NULL); dev_index++)
+ {
+ ret = uboot_init_func_tbl[dev_index].Init();
+
+ if (ret < 0) {
+ BOOT_PRINTF(UBOOT_ERR, "uboot init %s fail, ret = %d\n",
+ uboot_init_func_tbl[dev_index].func_name, ret);
+ BUG();
+ return ret;
+ } else {
+ BOOT_PRINTF(UBOOT_NOTICE, "uboot init %s success\n",
+ uboot_init_func_tbl[dev_index].func_name);
+ }
+ }
+
+ return SUCCESS;
+}
+
+int tboot_init_func(void)
+{
+ unsigned int dev_index;
+ int ret;
+
+ BOOT_PRINTF(UBOOT_NOTICE, "go into tboot init func\n");
+
+ for (dev_index = 0; (tboot_init_func_tbl[dev_index].Init != NULL); dev_index++)
+ {
+ ret = tboot_init_func_tbl[dev_index].Init();
+ if (ret < 0) {
+ BOOT_PRINTF(UBOOT_ERR, "tboot init %s fail, ret = %d\n",
+ tboot_init_func_tbl[dev_index].func_name, ret);
+ BUG();
+ return ret;
+ } else {
+ BOOT_PRINTF(UBOOT_NOTICE, "tboot init %s success\n",
+ tboot_init_func_tbl[dev_index].func_name);
+ }
+ }
+
+ return SUCCESS;
+}
+
+/*******************************************************************************
+ * Function: sys_entry
+ * Description: ϵͳÖ÷Á÷³Ì
+ * Parameters:
+ * Input:
+ *
+ * Output:
+ *
+ * Returns:
+ *
+ *
+ * Others:
+ ********************************************************************************/
+void sys_entry(void)
+{
+
+ BOOT_PRINTF(UBOOT_NOTICE, "sys_entry ...\n");
+
+ switch (get_load_mode()) {
+ case TLOAD_MODE:
+ tboot_init_func();
+ run_command("downloader", 0);
+ break;
+ case ZLOAD_MODE:
+ uboot_init_func();
+ boot_entry();
+ //clear_tmp_buf();
+ break;
+ default:
+ break;
+ }
+
+ add_partition_to_bootargs();
+ for (;;)
+ {
+ main_loop();
+ }
+
+ hang();
+ /* NOTREACHED - no way out of command loop except booting */
+}
+
diff --git a/lynq/MIFI/boot/common/src/uboot/drivers/mtd/partition/partition.c b/lynq/MIFI/boot/common/src/uboot/drivers/mtd/partition/partition.c
new file mode 100755
index 0000000..494b353
--- /dev/null
+++ b/lynq/MIFI/boot/common/src/uboot/drivers/mtd/partition/partition.c
@@ -0,0 +1,456 @@
+/*********************************************************************
+ Copyright 2016 by ZIXC Corporation.
+*
+* FileName:: partition.c
+* File Mark:
+* Description:
+* Others:
+* Version: v1.0
+* Author: zhouqi
+* Date: 2014-1-15
+
+* History 1:
+* Date:
+* Version:
+* Author:
+* Modification:
+* History 2:
+**********************************************************************/
+
+#include <common.h>
+#include <errno.h>
+#include <command.h>
+#include <malloc.h>
+#include <jffs2/load_kernel.h>
+#include <linux/list.h>
+#include <linux/ctype.h>
+#include <linux/err.h>
+#include <linux/mtd/mtd.h>
+#include <nand.h>
+#include <linux/mtd/partitions.h>
+#include <asm/io.h>
+#include <load_image.h>
+#include <boot_mode.h>
+#include <config.h>
+
+
+
+#define DEFINE_PARTITION_TABLE
+#include <partition_table.h>
+#include <boot_mode.h>
+
+
+#if defined(CONFIG_CMD_NAND)
+#include <linux/mtd/nand.h>
+#include <nand.h>
+#endif
+
+#include <linux/mtd/nor_spifc.h>
+
+u_char * g_table = NULL; /* ¶ÁÈ¡µÄ·ÖÇø±íÐÅÏ¢ 2k+64 */
+partition_table_t * g_partition_table = NULL; /* Ö¸Ïò·ÖÇø±íÐÅÏ¢ */
+extern partition_table_t * g_partition_table_dl;
+extern struct fsl_qspi spi_nor_flash;
+#ifdef CONFIG_ZX297520V3E_MDL_AB
+extern int imagefs_flag;
+#endif
+
+/* ================================================================================
+ * add_partition_to_bootargs : Ôö¼Ó·ÖÇøÐÅÏ¢µ½ bootargs
+ */
+ #ifdef CONFIG_ZX297520V3E_MDL_AB
+ void add_partition_to_bootargs( void )
+{
+ int ret = 0;
+ uint32_t part_nums = 0;
+ uint32_t i = 0;
+ uint32_t start_entry = 0; /* Æô¶¯·ÖÇøºÅ */
+ uchar bootargs_cmd[1024] = {0};
+ uchar boot_reason_para[32] = {0};
+ uchar boot_mode_para[16] = {0};
+ unsigned int *poweron_type = (unsigned int *)POWERON_TYPE_ADDR; //ÁÙʱʹÓÃ
+
+ part_nums = g_partition_table->entrys;
+
+ partition_entry_t * entry = &g_partition_table->table[0];
+
+ /* console=ttyS1,115200 no_console_suspend */
+ sprintf((char *)bootargs_cmd, "console=ttyS1,921600 no_console_suspend");
+
+ /* denali-nand: */
+ if(read_boot_flashtype() == IF_TYPE_NAND)
+ {
+ sprintf((char *)bootargs_cmd + strlen(bootargs_cmd), " mtdparts=denali-nand:");
+ }
+ else if (read_boot_flashtype() == IF_TYPE_SPI_NAND)
+ {
+ sprintf((char *)bootargs_cmd + strlen(bootargs_cmd), " mtdparts=spi-nand:");
+ }
+ else if (read_boot_flashtype() == IF_TYPE_NOR)
+ {
+ sprintf((char *)bootargs_cmd + strlen(bootargs_cmd), " mtdparts=spi-nor-dt:");
+ }
+
+ /* È¥³ý×îºóµÄ2¸ö·ÖÇø ddr raw */
+ for( i=0; i<part_nums-VIRTUAL_PART_NUM-1; i++ )
+ {
+ if( (entry->part_size >= 0x100000) && (entry->part_size%0x100000 == 0) )
+ {
+ sprintf((char *)bootargs_cmd + strlen(bootargs_cmd), "%dm@0x%lx(%s),",
+ (entry->part_size) >> 20, (entry->part_offset), (entry->part_name));
+ }
+ else
+ {
+ sprintf((char *)bootargs_cmd + strlen(bootargs_cmd), "%dk@0x%lx(%s),",
+ (entry->part_size) >> 10, (entry->part_offset), (entry->part_name));
+ }
+
+ /* »ñÈ¡Æô¶¯·ÖÇøºÅ */
+ //if(read_fota_update_flag())
+ if(imagefs_flag == 1)
+ {
+ if ( 0 == strcmp( (char *)entry->part_name, (char *)ARM_ROOTFS_IMAGE ) )
+ {
+ start_entry = i;
+ }
+ }
+ else if(imagefs_flag == 2)
+ {
+ if ( 0 == strcmp( (char *)entry->part_name, (char *)ARM_ROOTFS2_IMAGE ) )
+ {
+ start_entry = i;
+ }
+ }
+
+ entry++;
+ }
+
+ /* »ñÈ¡Æô¶¯·ÖÇøºÅ */
+ if(imagefs_flag == 1)
+ {
+ if ( 0 == strcmp( (char *)entry->part_name, (char *)ARM_ROOTFS_IMAGE) )
+ {
+ start_entry = i + 1;
+ }
+ }
+ else if(imagefs_flag == 2)
+ {
+ if ( 0 == strcmp( (char *)entry->part_name, (char *)ARM_ROOTFS2_IMAGE ) )
+ {
+ start_entry = i + 1;
+ }
+ }
+
+ /* ×îºóÒ»¸ö·ÖÇø */
+ if( (entry->part_size >= 0x100000) && (entry->part_size%0x100000 == 0) )
+ {
+ sprintf((char *)bootargs_cmd + strlen(bootargs_cmd), "%dm@0x%lx(%s)",
+ (entry->part_size) >> 20, (entry->part_offset), (entry->part_name));
+ }
+ else
+ {
+ sprintf((char *)bootargs_cmd + strlen(bootargs_cmd), "%dk@0x%lx(%s)",
+ (entry->part_size) >> 10, (entry->part_offset), (entry->part_name));
+ }
+
+ /* rootfs=/dev/mtdblock7 rootfs2=/dev/mtdblock8 */
+ sprintf((char *)bootargs_cmd + strlen(bootargs_cmd),
+ " root=/dev/mtdblock%d ro rootfstype=jffs2", start_entry);
+
+ printf("rootfs%d entry...\n",start_entry);
+
+ if(RB_AMT == read_boot_reason())
+ {
+ *poweron_type = POWER_ON_AMT;
+ sprintf((char *)bootargs_cmd + strlen(bootargs_cmd), " boot_reason=%d", *poweron_type);
+ sprintf((char *)bootargs_cmd + strlen(bootargs_cmd), " bootmode=amt");
+ }
+ else
+ {
+ sprintf((char *)bootargs_cmd + strlen(bootargs_cmd), " boot_reason=%d", *poweron_type);
+ }
+ BOOT_PRINTF(UBOOT_INFO, "CONFIG_SYS_START_FLAG_ADDR = 0x%x, poweron_type = 0x%x.\n",
+ POWERON_TYPE_ADDR, *poweron_type);
+
+ if(imagefs_flag == 1)
+ {
+ sprintf((char *)bootargs_cmd + strlen(bootargs_cmd), " system=system_a");
+ }
+ else if(imagefs_flag == 2)
+ {
+ sprintf((char *)bootargs_cmd + strlen(bootargs_cmd), " system=system_b");
+ }
+
+ /* save */
+ setenv("bootargs", (char *)bootargs_cmd);
+}
+ #else
+void add_partition_to_bootargs( void )
+{
+ int ret = 0;
+ uint32_t part_nums = 0;
+ uint32_t i = 0;
+ uint32_t start_entry = 0; /* Æô¶¯·ÖÇøºÅ */
+ uchar bootargs_cmd[1024] = {0};
+ uchar boot_reason_para[32] = {0};
+ uchar boot_mode_para[16] = {0};
+ unsigned int *poweron_type = (unsigned int *)POWERON_TYPE_ADDR; //ÁÙʱʹÓÃ
+
+ part_nums = g_partition_table->entrys;
+
+ partition_entry_t * entry = &g_partition_table->table[0];
+
+ /* console=ttyS1,115200 no_console_suspend */
+ sprintf((char *)bootargs_cmd, "console=ttyS1,921600 no_console_suspend");
+
+ /* denali-nand: */
+ if(read_boot_flashtype() == IF_TYPE_NAND)
+ {
+ sprintf((char *)bootargs_cmd + strlen(bootargs_cmd), " mtdparts=denali-nand:");
+ }
+ else if (read_boot_flashtype() == IF_TYPE_SPI_NAND)
+ {
+ sprintf((char *)bootargs_cmd + strlen(bootargs_cmd), " mtdparts=spi-nand:");
+ }
+ else if (read_boot_flashtype() == IF_TYPE_NOR)
+ {
+ sprintf((char *)bootargs_cmd + strlen(bootargs_cmd), " mtdparts=spi-nor-dt:");
+ }
+
+ /* È¥³ý×îºóµÄ2¸ö·ÖÇø ddr raw */
+ for( i=0; i<part_nums-VIRTUAL_PART_NUM-1; i++ )
+ {
+ if( (entry->part_size >= 0x100000) && (entry->part_size%0x100000 == 0) )
+ {
+ sprintf((char *)bootargs_cmd + strlen(bootargs_cmd), "%dm@0x%lx(%s),",
+ (entry->part_size) >> 20, (entry->part_offset), (entry->part_name));
+ }
+ else
+ {
+ sprintf((char *)bootargs_cmd + strlen(bootargs_cmd), "%dk@0x%lx(%s),",
+ (entry->part_size) >> 10, (entry->part_offset), (entry->part_name));
+ }
+
+ /* »ñÈ¡Æô¶¯·ÖÇøºÅ */
+ if(read_fota_update_flag())
+ {
+ if ( 0 == strcmp( (char *)entry->part_name, (char *)ARM_RECOVERY_USERDATA_IMAGE ) )
+ {
+ start_entry = i;
+ }
+ }
+ else
+ {
+ if ( 0 == strcmp( (char *)entry->part_name, (char *)ARM_USERDATA_IMAGE ) )
+ {
+ start_entry = i;
+ }
+ }
+
+ entry++;
+ }
+
+ /* »ñÈ¡Æô¶¯·ÖÇøºÅ */
+ if(read_fota_update_flag()) /* 3±íʾFOTA-RECOVERY */
+ {
+ if ( 0 == strcmp( (char *)entry->part_name, (char *)ARM_RECOVERY_USERDATA_IMAGE) )
+ {
+ start_entry = i + 1;
+ }
+ }
+ else /* Õý³£Æô¶¯Á÷³Ì */
+ {
+ if ( 0 == strcmp( (char *)entry->part_name, (char *)ARM_USERDATA_IMAGE ) )
+ {
+ start_entry = i + 1;
+ }
+ }
+
+ /* ×îºóÒ»¸ö·ÖÇø */
+ if( (entry->part_size >= 0x100000) && (entry->part_size%0x100000 == 0) )
+ {
+ sprintf((char *)bootargs_cmd + strlen(bootargs_cmd), "%dm@0x%lx(%s)",
+ (entry->part_size) >> 20, (entry->part_offset), (entry->part_name));
+ }
+ else
+ {
+ sprintf((char *)bootargs_cmd + strlen(bootargs_cmd), "%dk@0x%lx(%s)",
+ (entry->part_size) >> 10, (entry->part_offset), (entry->part_name));
+ }
+
+ if(RB_AMT == read_boot_reason())
+ {
+ *poweron_type = POWER_ON_AMT;
+ sprintf((char *)bootargs_cmd + strlen(bootargs_cmd), " boot_reason=%d", *poweron_type);
+ sprintf((char *)bootargs_cmd + strlen(bootargs_cmd), " bootmode=amt");
+ }
+ else
+ {
+ *poweron_type = POWER_ON_NORMAL;
+ sprintf((char *)bootargs_cmd + strlen(bootargs_cmd), " boot_reason=%d", *poweron_type);
+ }
+ BOOT_PRINTF(UBOOT_INFO, "CONFIG_SYS_START_FLAG_ADDR = 0x%x, poweron_type = 0x%x.\n",
+ POWERON_TYPE_ADDR, *poweron_type);
+
+ if(read_fota_update_flag())
+ {
+ sprintf((char *)bootargs_cmd + strlen(bootargs_cmd), " system=recovery");
+ }
+ else
+ {
+ sprintf((char *)bootargs_cmd + strlen(bootargs_cmd), " system=normal");
+ }
+
+ /* save */
+ setenv("bootargs", (char *)bootargs_cmd);
+}
+#endif
+/*******************************************************************************
+ * Function: read_partition_and_check
+ * Description: ´ÓFLASHÖжÁÈ¡·ÖÇø±í
+ * Parameters:
+ * Input:
+ *
+ * Output:
+ *
+ * @return 0 : ¶ÁÈ¡·ÖÇø±íÓÐЧ
+ * @return 1 : ¶ÁÈ¡·ÖÇø±íÎÞЧ
+ *
+ * Others:
+ ********************************************************************************/
+int read_partition_and_check( void )
+{
+ struct flash_ops *flash = NULL;
+ nand_info_t *nand = &nand_info[nand_curr_device];
+ int table_size = 2048;
+ int ret = 0;
+ int type = 0;
+ int buf_size = 0;
+ struct fsl_qspi *nor;
+
+ nor = &spi_nor_flash;
+
+ flash = get_flash_ops();
+ type = read_boot_flashtype();
+ if(type == IF_TYPE_NAND || type == IF_TYPE_SPI_NAND)
+ {
+ buf_size = nand->writesize + nand->oobsize;
+ }
+ else if(type == IF_TYPE_NOR)
+ {
+ buf_size = table_size;
+ }
+
+ g_table = (u_char *)kzalloc(buf_size, GFP_KERNEL);
+ if ( g_table == NULL )
+ {
+ BOOT_PRINTF(UBOOT_ERR, "kzalloc Failed!\n");
+ return -EIO;
+ }
+
+ /* ¶ÁÈ¡·ÖÇø±í */
+ /*
+ +------------------------------------------------------------+
+ | z-load.bin | partition_table.bin |
+ +------------------------------------------------------------+
+ 8k one page 10k
+ */
+
+ if(type == IF_TYPE_NAND || type == IF_TYPE_SPI_NAND)
+ {
+ ret = flash->read_with_ecc(nand, (loff_t)8*1024, &table_size, g_table);
+ if(ret)
+ {
+ BOOT_PRINTF(UBOOT_ERR, "read_no_ecc Failed! ret = %d.\n", ret);
+ return -1;
+ }
+ }
+ else if(type == IF_TYPE_NOR)
+ {
+ ret = nand_read(&(nor->nor[0].mtd), (loff_t)8*1024, &table_size, g_table);
+ if(ret)
+ {
+ BOOT_PRINTF(UBOOT_ERR, "nand_read error! ret = %d.\n", ret);
+ return -1;
+ }
+ }
+
+ g_partition_table = (partition_table_t *)g_table;
+ if( g_partition_table->magic != PARTITION_MAGIC )
+ {
+ BOOT_PRINTF(UBOOT_ERR, "Partition Table Invalid! ret = %d.\n", ret);
+ return -EIO;
+ }
+
+ return SUCCESS;
+}
+
+
+/*******************************************************************************
+ * Function: find_partition_para
+ * Description: ͨ¹ý·ÖÇøÃû²éÕÒ·ÖÇøÊ×µØÖ·
+ * Parameters:
+ * Input:
+ *
+ * Output:
+ *
+ * Returns:
+ *
+ *
+ * Others:
+ ********************************************************************************/
+partition_entry_t * find_partition_para( uchar * name )
+{
+ partition_entry_t *entry = NULL;
+ uint32_t entry_nums = 0;
+
+ if(get_load_mode() == TLOAD_MODE)
+ {
+ entry = &g_partition_table_dl->table[0];
+ entry_nums = g_partition_table_dl->entrys;
+ }
+ else
+ {
+ entry = &g_partition_table->table[0];
+ entry_nums = g_partition_table->entrys;
+ }
+ while( entry_nums-- )
+ {
+ if ( strcmp( (char *)entry->part_name, (char *)name ) == 0 )
+ {
+ return entry;
+ }
+ entry++;
+ }
+ return NULL;
+}
+
+/*******************************************************************************
+ * Function: partition_init
+ * Description: ͨ¹ý·ÖÇøÃû²éÕÒ·ÖÇøÊ×µØÖ·
+ * Parameters:
+ * Input:
+ *
+ * Output:
+ *
+ * Returns:
+ *
+ *
+ * Others:
+ ********************************************************************************/
+int partition_init(void)
+{
+ int ret = 0;
+
+ ret = read_partition_and_check();
+
+ if( ret != 0 )
+ {
+ BOOT_PRINTF(UBOOT_ERR, "read_partition ERROR !!!\n");
+ return -1;
+ }
+
+ return 0;
+}
+
+