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192.168.1.100 / R306 / 0d38ff9c7afa1207beebf9fa0886f87741dfb64a / . / ap / os / linux / linux-3.4.x / arch / arm / mach-zx297520v3 / gpio.c
blob: 146a1e603a12bd877a1d4aef853da9f83b2cc2e3 [file] [log] [blame]
yuezonghe824eb0c2024-06-27 02:32:26 -0700[diff] [blame]1/*
2 * linux/arch/arm/mach-zx297520v2/gpio.c
3 *
4 * Copyright (C) 2013 ZTE-TSP
5 *
6 * This program is free software; you can redistribute it and/or modify
7 * it under the terms of the GNU General Public License as published by
8 * the Free Software Foundation; either version 2 of the License, or
9 * (at your option) any later version.
10 */
11
12#include <linux/clk.h>
13#include <linux/errno.h>
14#include <linux/interrupt.h>
15#include <linux/irq.h>
16#include <linux/debugfs.h>
17#include <linux/seq_file.h>
18#include <linux/kernel.h>
19#include <linux/list.h>
20#include <linux/module.h>
21#include <linux/io.h>
22
23#include <mach/iomap.h>
24#include <mach/gpio.h>
25#include <mach/gpio_def.h>
26#include <mach/pcu.h>
27#include <mach/debug.h>
28#include <mach/spinlock.h>
29
30#define GPIO0_NUM 128
31
32#define gpio_write_reg_lock(a, v) \
33 do { \
34 reg_spin_lock(); \
35 zx_write_reg(a, v); \
36 reg_spin_unlock(); \
37 } while (0)
38
39#define gpio_write_bits_lock(a, o, w, v) \
40 do { \
41 reg_spin_lock(); \
42 zx_write_bits(a, o, w, v); \
43 reg_spin_unlock(); \
44 } while (0)
45
46/*
47 * select gpio multiplex function
48 * gpio: gpio number
49 * func: PIN_FUNC_SEL_AON/PIN_FUNC_SEL_PD
50 * according with register defination
51 */
52int zx29_gpio_function_sel(unsigned int gpio, gpio_func_id func )
53{
54 int i ;
55 unsigned int func_sel = (func>>12)&0x1;
56 unsigned int value = func&0x3ff;
57
58 if((gpio != (func>>24))||(gpio > ZX29_GPIO_MAX))
59 return -EINVAL;
60
61 for(i=0; i<ARRAY_SIZE(pin_info); i++)
62 {
63 if(pin_info[i].gpio == gpio)
64 break;
65
66 /* no support */
67 if(pin_info[i].gpio == ZX29_GPIO_NULL)
68 return -ENODATA;
69 }
70
71 /* no support */
72 if(i >= ARRAY_SIZE(pin_info))
73 return -ENODATA;
74
75 /* top_func_sel */
76 if(pin_info[i].top_func_sel_reg.reg_addr)
77 gpio_write_bits_lock(pin_info[i].top_func_sel_reg.reg_addr,
78 pin_info[i].top_func_sel_reg.reg_bit_offset,
79 pin_info[i].top_func_sel_reg.reg_bit_size,
80 func_sel);
81
82 if(PIN_FUNC_SEL_AON == func_sel)
83 {
84 if(pin_info[i].aon_func_sel_reg.reg_addr)
85 gpio_write_bits_lock(pin_info[i].aon_func_sel_reg.reg_addr,
86 pin_info[i].aon_func_sel_reg.reg_bit_offset,
87 pin_info[i].aon_func_sel_reg.reg_bit_size,
88 value);
89 }
90 else
91 {
92 if(pin_info[i].pd_func_sel_reg.reg_addr)
93 gpio_write_bits_lock(pin_info[i].pd_func_sel_reg.reg_addr,
94 pin_info[i].pd_func_sel_reg.reg_bit_offset,
95 pin_info[i].pd_func_sel_reg.reg_bit_size,
96 value);
97 }
98
99 return 0;
100}
101
102static unsigned int get_gpio_by_name(const char *pin_name)
103{
104 int i ;
105
106 for(i=0; i<ARRAY_SIZE(pin_info); i++)
107 {
108 if (!strcmp(pin_name, pin_info[i].pin_name))
109 {
110 return pin_info[i].gpio;
111 }
112 }
113
114 return ZX29_GPIO_NULL;
115}
116
117int zx29_func_sel_by_name(const char *pin_name, gpio_func_id func)
118{
119 unsigned int gpio = get_gpio_by_name(pin_name);
120
121 if(gpio == ZX29_GPIO_NULL)
122 {
123 pr_err("zx29_func_sel_by_name(%s) failed. \n", pin_name);
124 return -ENODATA;
125 }
126
127 return zx29_gpio_function_sel(gpio, func);
128}
129
130int zx29_gpio_function_sel_get(unsigned int gpio)
131{
132 int i=0;
133 unsigned int func_sel = 0;
134 unsigned int top_func = 0;
135 unsigned int value = 0;
136 unsigned int temp=0,mask=0;
137
138 if(gpio > ZX29_GPIO_MAX)
139 return -EINVAL;
140
141 for(i=0; i<ARRAY_SIZE(pin_info); i++)
142 {
143 if(pin_info[i].gpio == gpio)
144 break;
145 /* not support*/
146 if(pin_info[i].gpio == ZX29_GPIO_NULL)
147 return -ENODATA;
148 }
149
150 /* no support */
151 if(i >= ARRAY_SIZE(pin_info))
152 return -ENODATA;
153
154 /*top_func*/
155 if(pin_info[i].top_func_sel_reg.reg_addr)
156 {
157 temp=zx_read_reg(pin_info[i].top_func_sel_reg.reg_addr);
158 top_func = temp>>(pin_info[i].top_func_sel_reg.reg_bit_offset);
159
160 top_func = top_func&0x01;
161 }
162 else
163 {
164 top_func = PIN_FUNC_SEL_AON;
165 }
166
167 /*aon_func*/
168 if(top_func == PIN_FUNC_SEL_AON)
169 {
170 if(pin_info[i].aon_func_sel_reg.reg_addr)
171 {
172 temp = zx_read_reg(pin_info[i].aon_func_sel_reg.reg_addr);
173 value = temp>>(pin_info[i].aon_func_sel_reg.reg_bit_offset);
174 mask =(1<<pin_info[i].aon_func_sel_reg.reg_bit_size)-1;
175 value = value&mask;
176 }
177 else
178 value = 0;
179 }
180 else/*pd_func*/
181 {
182 if(pin_info[i].pd_func_sel_reg.reg_addr)
183 {
184 temp = zx_read_reg(pin_info[i].pd_func_sel_reg.reg_addr);
185 value = temp>>(pin_info[i].pd_func_sel_reg.reg_bit_offset);
186 mask =(1<<pin_info[i].pd_func_sel_reg.reg_bit_size)-1;
187 value =value&mask;
188 }
189 else
190 value = 0;
191 }
192
193 func_sel = (gpio<<24)|(top_func<<12)|value;
194
195 return func_sel;
196}
197
198
199/*
200 * set gpio resistance of pull-up and pull-down status
201 *@ gpio: gpio pin number
202 *@ config: IO_CFG enum
203 *@
204 *@ This function is only for config pu/pd, if select driver capacity,
205 *@ use another interface.
206 */
207void zx29_gpio_pd_pu_set(unsigned int gpio, unsigned int config)
208{
209 int i ;
210 int pull_val = 0;
211
212 if(gpio > ZX29_GPIO_MAX)
213 return;
214
215 for(i=0; i<ARRAY_SIZE(pin_info); i++)
216 {
217 if(pin_info[i].gpio == gpio)
218 break;
219
220 /* no support */
221 if(pin_info[i].gpio == ZX29_GPIO_NULL)
222 return;
223 }
224
225 /* no support */
226 if(i >= ARRAY_SIZE(pin_info))
227 return;
228
229 if(pin_info[i].io_cfg_reg.reg_addr == NULL)
230 return;
231
232 if(pin_info[i].io_cfg_reg.reg_bit_size == 8)
233 {
234 /*bit6:PD bit5:PU*/
235 pull_val = zx_read_reg(pin_info[i].io_cfg_reg.reg_addr);
236
237 pull_val = pull_val>>(pin_info[i].io_cfg_reg.reg_bit_offset);
238
239 pull_val &= 0xff; /*reg_bit_size 8*/
240 pull_val &= ~(0x3<<5); /*bit5 bit6 clear*/
241 if(config == IO_CFG_PULL_DOWN)
242 pull_val |= (0x1<<6); /*bit6 PD*/
243 else if(config == IO_CFG_PULL_UP)
244 pull_val |= (0x1<<5); /*bit5 PU*/
245
246 }
247 else
248 {
249 /*bit0:PE bit1:PS*/
250 pull_val = config;
251 }
252
253 gpio_write_bits_lock(pin_info[i].io_cfg_reg.reg_addr,
254 pin_info[i].io_cfg_reg.reg_bit_offset,
255 pin_info[i].io_cfg_reg.reg_bit_size,
256 pull_val);
257
258}
259EXPORT_SYMBOL(zx29_gpio_pd_pu_set);
260
261/****************************************************************
262 ** gpio function
263 **
264 ***************************************************************/
265/*
266 * set direction
267 *
268 * 0:input 1:out
269 */
270void zx29_gpio_set_direction(unsigned int gpio, unsigned int dir)
271{
272 unsigned int temp=0;
273 void __iomem *regaddr = NULL;
274
275 if(ZX29_GPIO_24 == gpio)
276 {
277 if(GPIO_IN == dir)
278 dir = GPIO_OUT;
279 else
280 dir = GPIO_IN;
281 }
282
283 if(gpio < GPIO0_NUM)
284 regaddr = GPIOPDD_REG0(gpio);
285 else
286 {
287 gpio -= GPIO0_NUM;
288 regaddr = GPIOPDD_REG1(gpio);
289 }
290
291 temp = zx_read_reg(regaddr);
292 if(dir == GPIO_IN)
293 temp &= ~(1 << (gpio % 16));
294 else
295 temp |= (1 << (gpio % 16));
296
297 gpio_write_reg_lock(regaddr, temp);
298}
299
300/*
301 * get direction
302 *
303 * 0:input 1:out
304 */
305unsigned int zx29_gpio_get_direction(unsigned int gpio)
306{
307 unsigned int temp=0;
308
309 if(gpio <GPIO0_NUM)
310 temp = zx_read_reg(GPIOPDD_REG0(gpio));
311 else
312 {
313 gpio -= GPIO0_NUM;
314 temp = zx_read_reg(GPIOPDD_REG1(gpio));
315 }
316
317 temp = temp >> (gpio % 16);
318 temp &= 0x1;
319
320 return temp;
321}
322
323/*
324 * gpio out
325 *
326 * 0:low 1:high
327 */
328void zx29_gpio_output_data(unsigned int gpio, unsigned int value)
329{
330 unsigned int temp=0;
331
332 if(value == GPIO_LOW)
333 {
334 if(gpio <GPIO0_NUM)
335 {
336 temp = zx_read_reg(SET0_SEND_REG0(gpio));
337 temp |= (1 << (gpio % 16));
338 gpio_write_reg_lock(SET0_SEND_REG0(gpio), temp);
339 }
340 else{
341 gpio -= GPIO0_NUM;
342 temp = zx_read_reg(SET0_SEND_REG1(gpio));
343 temp |= (1 << (gpio % 16));
344 gpio_write_reg_lock(SET0_SEND_REG1(gpio), temp);
345 }
346 }else if(value == GPIO_HIGH)
347 {
348 if(gpio <GPIO0_NUM)
349 {
350 temp = zx_read_reg(SET1_SEND_REG0(gpio));
351 temp |= (1 << (gpio % 16));
352 gpio_write_reg_lock(SET1_SEND_REG0(gpio), temp);
353 }
354 else{
355 gpio -= GPIO0_NUM;
356 temp = zx_read_reg(SET1_SEND_REG1(gpio));
357 temp |= (1 << (gpio % 16));
358 gpio_write_reg_lock(SET1_SEND_REG1(gpio), temp);
359 }
360 } else {
361 pr_warn("gpio%d output %X ignored.", gpio, value);
362 }
363}
364
365/*
366 * gpio input
367 *
368 * 0:low 1:high
369 */
370unsigned int zx29_gpio_input_data(unsigned int gpio)
371{
372 unsigned int value=0;
373
374 if(gpio < GPIO0_NUM)
375 value = zx_read_reg(RECV_REG0(gpio));
376 else
377 {
378 gpio -= GPIO0_NUM;
379 value = zx_read_reg(RECV_REG1(gpio));
380 }
381
382 return (value >> (gpio % 16)) & 0x1;
383}
384
385/*
386 * set extern int source type
387 *
388 * gpio: gpio number
389 *
390 * type: IRQ_TYPE_LEVEL_HIGH
391 * IRQ_TYPE_LEVEL_LOW
392 * IRQ_TYPE_EDGE_RISING
393 * IRQ_TYPE_EDGE_FALLING
394 */
395void zx29_gpio_set_inttype(unsigned int gpio, unsigned int type)
396{
397 unsigned int index = 0;
398
399 /*****************************
400 ** gpio47~~54 ---- ext0~~7
401 ** gpio119~~126 ---- ext8~~15
402 ** gpio127~~132 ---- ext8~~13
403 *****************************/
404 if ((gpio>=47) && (gpio<=54))
405 index = gpio - 47 + (unsigned int)PCU_EX0_INT;
406 else if ((gpio>=119) && (gpio<=126))
407 index = gpio - 119 + (unsigned int)PCU_EX8_INT;
408 else if ((gpio>=127) && (gpio<=132))
409 index = gpio - 127 + (unsigned int)PCU_EX8_INT;
410 else
411 return;
412
413 pcu_int_set_type((PCU_INT_INDEX)index,type);
414}
415EXPORT_SYMBOL(zx29_gpio_set_inttype);
416
417int zx29_gpio2irq(unsigned int gpio)
418{
419 if ((gpio>=47) && (gpio<=54))
420 return(gpio - 47 + EX0_INT);
421 else if ((gpio>=119) && (gpio<=126))
422 return (gpio - 119 + EX8_INT);
423 else if ((gpio>=127) && (gpio<=132))
424 return (gpio - 127 + EX8_INT);
425
426 return -EINVAL;
427}
428
429/*********************************************************************************************
430 *** jtag0: sd1_cmd/sd1_data0/sd1_data1/sd1_data2/sd1_data3
431 *** pd_func: 0: sd1 1:ps_jtag 2:phy_jtag 3:ap_jtag aon_func: 0:gpio 1:m0_jtag
432 ***
433 *** jtag1: jtag_tck/jtag_tdi/jtag_tdo/jtag_tms/jtag_trst
434 *** pd_func: 0: ps_jtag 1:phy_jtag 2:ap_jtag aon_func: 0:m0_jtag 1:gpio
435 ***
436 *** jtag2: kbc_0/kbc_2/kbr_0/kbr_1/kbr_2
437 *** pd_func: 0: ps_jtag 1:phy_jtag 2:ap_jtag aon_func: 0:key 1:gpio 2:ext_int 3:m0_jtag
438 ***********************************************************************************************
439 */
440void jtag_config(unsigned int jtag_num, unsigned int function)
441{
442 //unsigned int tmp = 0;
443
444 return ;
445}
446
447unsigned int zx29_gpio_outputdata_get(unsigned int gpio)
448{
449 unsigned int temp=0;
450 if(gpio <GPIO0_NUM)
451 temp = zx_read_reg(SEND_REG0(gpio));
452 else
453 {
454 gpio -=GPIO0_NUM;
455 temp = zx_read_reg(SEND_REG1(gpio));
456 }
457 return (temp>>(gpio%16))&0x01;
458}
459
460#ifdef CONFIG_DEBUG_FS
461
462#include <linux/debugfs.h>
463#include <linux/seq_file.h>
464#include <asm/uaccess.h>
465#include <asm/string.h>
466
467static char temp_buf[50],temp[30];
468unsigned char buf = 0;
469
470static struct gpio_status{
471 char *function;
472 char *direction;
473 char *level;
474 }gpio_status_get;
475
476struct zx29_gpio_def
477{
478 char * gpio_name;
479 unsigned int gpio_num;
480 unsigned int gpio_func;
481};
482
483static struct zx29_gpio_def gpio_def[] =
484{
485 {"GPIO0_GPIO0", 0, GPIO0_GPIO0},
486 {"GPIO0_NAND_WE", 0, GPIO0_NAND_WE},
487 {"GPIO0_LCD_OE_N", 0, GPIO0_LCD_OE_N},
488 {"GPIO1_GPIO1", 1, GPIO1_GPIO1},
489 {"GPIO1_NAND_CS0", 1, GPIO1_NAND_CS0},
490 {"GPIO1_LCD_CS_N", 1, GPIO1_LCD_CS_N},
491 {"GPIO2_GPIO2", 2, GPIO2_GPIO2},
492 {"GPIO2_NAND_READY", 2, GPIO2_NAND_READY},
493 {"GPIO2_LCD_RS", 2, GPIO2_LCD_RS},
494 {"GPIO3_GPIO3", 3, GPIO3_GPIO3},
495 {"GPIO3_NAND_CLE", 3, GPIO3_NAND_CLE},
496 {"GPIO3_LCD_RESET_N", 3, GPIO3_LCD_RESET_N},
497 {"GPIO4_GPIO4", 4, GPIO4_GPIO4},
498 {"GPIO4_NAND_ALE", 4, GPIO4_NAND_ALE},
499 {"GPIO4_LCD_WE_N", 4, GPIO4_LCD_WE_N},
500 {"GPIO5_GPIO5", 5, GPIO5_GPIO5},
501 {"GPIO5_NAND_RE", 5, GPIO5_NAND_RE},
502 {"GPIO5_LCD_TE", 5, GPIO5_LCD_TE},
503 {"GPIO6_GPIO6", 6, GPIO6_GPIO6},
504 {"GPIO6_NAND_WRITE_PROTECT",6,GPIO6_NAND_WRITE_PROTECT},
505 {"GPIO6_LCD_D0", 6, GPIO6_LCD_D0},
506 {"GPIO7_GPIO7", 7, GPIO7_GPIO7},
507 {"GPIO7_NAND_DATA0", 7, GPIO7_NAND_DATA0},
508 {"GPIO7_LCD_D1", 7, GPIO7_LCD_D1},
509 {"GPIO8_GPIO8", 8, GPIO8_GPIO8},
510 {"GPIO8_NAND_DATA1", 8, GPIO8_NAND_DATA1},
511 {"GPIO8_LCD_D2", 8, GPIO8_LCD_D2},
512 {"GPIO9_GPIO9", 9, GPIO9_GPIO9},
513 {"GPIO9_NAND_DATA2", 9, GPIO9_NAND_DATA2},
514 {"GPIO9_LCD_D3", 9, GPIO9_LCD_D3},
515 {"GPIO10_GPIO10", 10, GPIO10_GPIO10},
516 {"GPIO10_NAND_DATA3", 10, GPIO10_NAND_DATA3},
517 {"GPIO10_LCD_D4", 10, GPIO10_LCD_D4},
518 {"GPIO11_GPIO11", 11, GPIO11_GPIO11},
519 {"GPIO11_NAND_DATA4", 11, GPIO11_NAND_DATA4},
520 {"GPIO11_LCD_D5", 11, GPIO11_LCD_D5},
521 {"GPIO12_GPIO12", 12, GPIO12_GPIO12},
522 {"GPIO12_NAND_DATA5", 12, GPIO12_NAND_DATA5},
523 {"GPIO12_LCD_D6", 12, GPIO12_LCD_D6},
524 {"GPIO13_GPIO13", 13, GPIO13_GPIO13},
525 {"GPIO13_NAND_DATA6", 13, GPIO13_NAND_DATA6},
526 {"GPIO13_LCD_D7", 13, GPIO13_LCD_D7},
527 {"GPIO14_GPIO14", 14, GPIO14_GPIO14},
528 {"GPIO14_NAND_DATA7", 14, GPIO14_NAND_DATA7},
529 {"GPIO14_LCD_D8", 14, GPIO14_LCD_D8},
530 {"GPIO15_GPIO15", 15, GPIO15_GPIO15},
531 {"GPIO15_CLK_OUT0", 15, GPIO15_CLK_OUT0},
532 {"GPIO16_GPIO16", 16, GPIO16_GPIO16},
533 {"GPIO16_CLK_OUT1", 16, GPIO16_CLK_OUT1},
534 {"GPIO17_GPIO17", 17, GPIO17_GPIO17},
535 {"GPIO17_CLK_OUT2", 17, GPIO17_CLK_OUT2},
536 {"GPIO17_TEST_CLK_OUT", 17, GPIO17_TEST_CLK_OUT},
537 {"GPIO17_TDM_MCLK_OUT", 17, GPIO17_TDM_MCLK_OUT},
538 {"GPIO17_I2S0_MCLK_OUT", 17, GPIO17_I2S0_MCLK_OUT},
539 {"GPIO17_I2S1_MCLK_OUT", 17, GPIO17_I2S1_MCLK_OUT},
540 {"GPIO18_GPIO18", 18, GPIO18_GPIO18},
541 {"GPIO18_CLK_32K_OUT", 18, GPIO18_CLK_32K_OUT},
542 {"GPIO19_GPIO19", 19, GPIO19_GPIO19},
543 {"GPIO19_RMII_CLK_I", 19, GPIO19_RMII_CLK_I},
544 {"GPIO20_GPIO20", 20, GPIO20_GPIO20},
545 {"GPIO20_RMII_CLK_O", 20, GPIO20_RMII_CLK_O},
546 {"GPIO21_CLK_REQ0", 21, GPIO21_CLK_REQ0},
547 {"GPIO21_GPIO21", 21, GPIO21_GPIO21},
548 {"GPIO22_CLK_REQ1", 22, GPIO22_CLK_REQ1},
549 {"GPIO22_GPIO22", 22, GPIO22_GPIO22},
550 {"GPIO23_PWRCTRL", 23, GPIO23_PWRCTRL},
551 {"GPIO23_GPIO23", 23, GPIO23_GPIO23},
552 {"GPIO24_GPIO24", 24, GPIO24_GPIO24},
553 {"GPIO25_GPIO25", 25, GPIO25_GPIO25},
554 {"GPIO25_SSP0_CS", 25, GPIO25_SSP0_CS},
555 {"GPIO26_GPIO26", 26, GPIO26_GPIO26},
556 {"GPIO26_SSP0_CLK", 26, GPIO26_SSP0_CLK},
557 {"GPIO27_SSP0_RXD", 27, GPIO27_SSP0_RXD},
558 {"GPIO27_GPIO27", 27, GPIO27_GPIO27},
559 {"GPIO28_GPIO28", 28, GPIO28_GPIO28},
560 {"GPIO28_SSP0_TXD", 28, GPIO28_SSP0_TXD},
561
562 {"GPIO29_UART0_RXD", 29, GPIO29_UART0_RXD},
563 {"GPIO29_GPIO29", 29, GPIO29_GPIO29},
564 {"GPIO29_UART0_TXD", 29, GPIO29_UART0_TXD},
565 {"GPIO29_FRAME_SYNC", 29, GPIO29_FRAME_SYNC},
566 {"GPIO29_TEST_PIN10", 29, GPIO29_TEST_PIN10},
567
568 {"GPIO30_UART0_TXD", 30, GPIO30_UART0_TXD},
569 {"GPIO30_GPIO30", 30, GPIO30_GPIO30},
570 {"GPIO30_UART0_RXD", 30, GPIO30_UART0_RXD},
571 {"GPIO30_LTE_PRE_TX", 30, GPIO30_LTE_PRE_TX},
572 {"GPIO30_TEST_PIN11", 30, GPIO30_TEST_PIN11},
573
574 {"GPIO31_GPIO31", 31, GPIO31_GPIO31},
575 {"GPIO31_UART0_CTS", 31, GPIO31_UART0_CTS},
576 {"GPIO31_LTE_TPU_OUT3", 31, GPIO31_LTE_TPU_OUT3},
577 {"GPIO31_UART1_TXD", 31, GPIO31_UART1_TXD},
578 {"GPIO31_TEST_PIN12", 31, GPIO31_TEST_PIN12},
579
580 {"GPIO32_GPIO32", 32, GPIO32_GPIO32},
581 {"GPIO32_UART0_RTS", 32, GPIO32_UART0_RTS},
582 {"GPIO32_LTE_TPU_OUT4", 32, GPIO32_LTE_TPU_OUT4},
583 {"GPIO32_UART1_RXD", 32, GPIO32_UART1_RXD},
584
585 {"GPIO33_GPIO33", 33, GPIO33_GPIO33},
586 {"GPIO33_UART1_RXD", 33, GPIO33_UART1_RXD},
587 {"GPIO33_UART2_TXD", 33, GPIO33_UART2_TXD},
588 {"GPIO33_UART2_RXD", 33, GPIO33_UART2_RXD},
589
590 {"GPIO34_UART1_TXD", 34, GPIO34_UART1_TXD},
591 {"GPIO34_GPIO34", 34, GPIO34_GPIO34},
592 {"GPIO34_UART2_RXD", 34, GPIO34_UART2_RXD},
593 {"GPIO34_UART2_TXD", 34, GPIO34_UART2_TXD},
594
595 {"GPIO35_GPIO35", 35, GPIO35_GPIO35},
596 {"GPIO35_I2S0_WS", 35, GPIO35_I2S0_WS},
597 {"GPIO35_TEST_PIN0", 35, GPIO35_TEST_PIN0},
598 {"GPIO35_TDM_FS", 35, GPIO35_TDM_FS},
599
600 {"GPIO36_GPIO36", 36, GPIO36_GPIO36},
601 {"GPIO36_I2S0_CLK", 36, GPIO36_I2S0_CLK},
602 {"GPIO36_TEST_PIN1", 36, GPIO36_TEST_PIN1},
603 {"GPIO36_TDM_CLK", 36, GPIO36_TDM_CLK},
604
605 {"GPIO37_GPIO37", 37, GPIO37_GPIO37},
606 {"GPIO37_I2S0_DIN", 37, GPIO37_I2S0_DIN},
607 {"GPIO37_TEST_PIN2", 37, GPIO37_TEST_PIN2},
608 {"GPIO37_TDM_DATA_IN", 37, GPIO37_TDM_DATA_IN},
609
610 {"GPIO38_GPIO38", 38, GPIO38_GPIO38},
611 {"GPIO38_I2S0_DOUT", 38, GPIO38_I2S0_DOUT},
612 {"GPIO38_TEST_PIN3", 38, GPIO38_TEST_PIN3},
613 {"GPIO38_TDM_DATA_OUT", 38, GPIO38_TDM_DATA_OUT},
614
615 {"GPIO39_GPIO39", 39, GPIO39_GPIO39},
616 {"GPIO39_I2S1_WS", 39, GPIO39_I2S1_WS},
617 {"GPIO39_TEST_PIN4", 39, GPIO39_TEST_PIN4},
618 {"GPIO39_TDM_FS", 39, GPIO39_TDM_FS},
619 {"GPIO39_PWM0", 39, GPIO39_PWM0},
620 {"GPIO40_GPIO40", 40, GPIO40_GPIO40},
621 {"GPIO40_I2S1_CLK", 40, GPIO40_I2S1_CLK},
622 {"GPIO40_TEST_PIN5", 40, GPIO40_TEST_PIN5},
623 {"GPIO40_TDM_CLK", 40, GPIO40_TDM_CLK},
624 {"GPIO40_PWM1", 40, GPIO40_PWM1},
625 {"GPIO41_GPIO41", 41, GPIO41_GPIO41},
626 {"GPIO41_I2S1_DIN", 41, GPIO41_I2S1_DIN},
627 {"GPIO41_TEST_PIN6", 41, GPIO41_TEST_PIN6},
628 {"GPIO41_TDM_DATA_IN", 41, GPIO41_TDM_DATA_IN},
629
630 {"GPIO42_GPIO42", 42, GPIO42_GPIO42},
631 {"GPIO42_I2S1_DOUT", 42, GPIO42_I2S1_DOUT},
632 {"GPIO42_TEST_PIN7", 42, GPIO42_TEST_PIN7},
633 {"GPIO42_TDM_DATA_OUT", 42, GPIO42_TDM_DATA_OUT},
634
635 {"GPIO43_GPIO43", 43, GPIO43_GPIO43},
636 {"GPIO43_SCL0", 43, GPIO43_SCL0},
637
638 {"GPIO44_GPIO44", 44, GPIO44_GPIO44},
639 {"GPIO44_SDA0", 44, GPIO44_SDA0},
640
641 {"GPIO45_GPIO45", 45, GPIO45_GPIO45},
642 {"GPIO45_SCL1", 45, GPIO45_SCL1},
643
644 {"GPIO46_GPIO46", 46, GPIO46_GPIO46},
645 {"GPIO46_SDA1", 46, GPIO46_SDA1},
646
647 {"GPIO47_GPIO47", 47, GPIO47_GPIO47},
648 {"GPIO47_EXT_INT0", 47, GPIO47_EXT_INT0},
649
650 {"GPIO48_GPIO48", 48, GPIO48_GPIO48},
651 {"GPIO48_EXT_INT1", 48, GPIO48_EXT_INT1},
652 {"GPIO49_GPIO49", 49, GPIO49_GPIO49},
653 {"GPIO49_EXT_INT2", 49, GPIO49_EXT_INT2},
654 {"GPIO50_GPIO50", 50, GPIO50_GPIO50},
655 {"GPIO50_EXT_INT3", 50, GPIO50_EXT_INT3},
656 {"GPIO50_TEST_PIN8", 50, GPIO50_TEST_PIN8},
657 {"GPIO51_GPIO51", 51, GPIO51_GPIO51},
658 {"GPIO51_EXT_INT4", 51, GPIO51_EXT_INT4},
659 {"GPIO51_TEST_PIN9", 51, GPIO51_TEST_PIN9},
660 {"GPIO52_GPIO52", 52, GPIO52_GPIO52},
661 {"GPIO52_EXT_INT5", 52, GPIO52_EXT_INT5},
662 {"GPIO52_TEST_PIN13", 52, GPIO52_TEST_PIN13},
663
664 {"GPIO53_GPIO53", 53, GPIO53_GPIO53},
665 {"GPIO53_EXT_INT6", 53, GPIO53_EXT_INT6},
666 {"GPIO53_TEST_PIN14", 53, GPIO53_TEST_PIN14},
667 {"GPIO54_GPIO54", 54, GPIO54_GPIO54},
668 {"GPIO54_EXT_INT7", 54, GPIO54_EXT_INT7},
669 {"GPIO54_TEST_PIN15", 54, GPIO54_TEST_PIN15},
670 {"GPIO55_GPIO55", 55, GPIO55_GPIO55},
671 {"GPIO55_RMII_TXEN", 55, GPIO55_RMII_TXEN},
672
673 {"GPIO56_GPIO56", 56, GPIO56_GPIO56},
674 {"GPIO56_RMII_RXEN", 56, GPIO56_RMII_RXEN},
675
676 {"GPIO57_GPIO57", 57, GPIO57_GPIO57},
677 {"GPIO57_RMII_RXD0", 57, GPIO57_RMII_RXD0},
678
679 {"GPIO58_GPIO58", 58, GPIO58_GPIO58},
680 {"GPIO58_RMII_RXD1", 58, GPIO58_RMII_RXD1},
681 {"GPIO59_GPIO59", 59, GPIO59_GPIO59},
682 {"GPIO59_RMII_TXD0", 59, GPIO59_RMII_TXD0},
683
684 {"GPIO60_GPIO60", 60, GPIO60_GPIO60},
685 {"GPIO60_RMII_TXD1", 60, GPIO60_RMII_TXD1},
686
687 {"GPIO61_GPIO61", 61, GPIO61_GPIO61},
688 {"GPIO61_MDC_SCLK", 61, GPIO61_MDC_SCLK},
689
690 {"GPIO62_GPIO62", 62, GPIO62_GPIO62},
691 {"GPIO62_MDC_SDIO", 62, GPIO62_MDC_SDIO},
692
693 {"GPIO63_GPIO63", 63, GPIO63_GPIO63},
694 {"GPIO63_PHY_RST", 63, GPIO63_PHY_RST},
695
696 {"GPIO64_GPIO64", 64, GPIO64_GPIO64},
697 {"GPIO64_PHY_INT", 64, GPIO64_PHY_INT},
698
699 {"GPIO65_GPIO65", 65, GPIO65_GPIO65},
700
701 {"GPIO66_GPIO66", 66, GPIO66_GPIO66},
702 {"GPIO66_KEY_COL2", 66, GPIO66_KEY_COL2},
703 {"GPIO66_EMMC_CLK", 66, GPIO66_EMMC_CLK},
704
705 {"GPIO67_GPIO67", 67, GPIO67_GPIO67},
706 {"GPIO67_KEY_COL3", 67, GPIO67_KEY_COL3},
707 {"GPIO67_EMMC_CMD", 67, GPIO67_EMMC_CMD},
708
709 {"GPIO68_GPIO68", 68, GPIO68_GPIO68},
710 {"GPIO68_KEY_COL4", 68, GPIO68_KEY_COL4},
711 {"GPIO68_EMMC_DATA0", 68, GPIO68_EMMC_DATA0},
712
713 {"GPIO69_GPIO69", 69, GPIO69_GPIO69},
714 {"GPIO69_KEY_ROW2", 69, GPIO69_KEY_ROW2},
715 {"GPIO69_EMMC_DATA1", 69, GPIO69_EMMC_DATA1},
716
717 {"GPIO70_GPIO70", 70, GPIO70_GPIO70},
718 {"GPIO70_KEY_ROW3", 70, GPIO70_KEY_ROW3},
719 {"GPIO70_EMMC_DATA2", 70, GPIO70_EMMC_DATA2},
720
721 {"GPIO71_GPIO71", 71, GPIO71_GPIO71},
722 {"GPIO71_KEY_ROW4", 71, GPIO71_KEY_ROW4},
723 {"GPIO71_EMMC_DATA3", 71, GPIO71_EMMC_DATA3},
724 {"GPIO72_GPIO72", 72, GPIO72_GPIO72},
725 {"GPIO72_SD1_HOST_SDCLK", 72, GPIO72_SD1_HOST_SDCLK},
726
727 {"GPIO73_GPIO73", 73, GPIO73_GPIO73},
728 {"GPIO73_M_JTAG_TDO", 73, GPIO73_M_JTAG_TDO},
729 {"GPIO73_SD1_CMD", 73, GPIO73_SD1_CMD},
730 {"GPIO73_PS_JTAG_TDO", 73, GPIO73_PS_JTAG_TDO},
731 {"GPIO73_PHY_JTAG_TDO", 73, GPIO73_PHY_JTAG_TDO},
732 {"GPIO73_AP_JTAG_TDO", 73, GPIO73_AP_JTAG_TDO},
733
734 {"GPIO74_GPIO74", 74, GPIO74_GPIO74},
735 {"GPIO74_M_JTAG_TCK", 74, GPIO74_M_JTAG_TCK},
736 {"GPIO74_SD1_DATA0", 74, GPIO74_SD1_DATA0},
737 {"GPIO74_PS_JTAG_TCK", 74, GPIO74_PS_JTAG_TCK},
738 {"GPIO74_PHY_JTAG_TCK", 74, GPIO74_PHY_JTAG_TCK},
739 {"GPIO74_AP_JTAG_TCK", 74, GPIO74_AP_JTAG_TCK},
740
741 {"GPIO75_GPIO75", 75, GPIO75_GPIO75},
742 {"GPIO75_M_JTAG_TRST", 75, GPIO75_M_JTAG_TRST},
743 {"GPIO75_SD1_DATA1", 75, GPIO75_SD1_DATA1},
744 {"GPIO75_PS_JTAG_TRST", 75, GPIO75_PS_JTAG_TRST},
745 {"GPIO75_PHY_JTAG_TRST", 75, GPIO75_PHY_JTAG_TRST},
746 {"GPIO75_AP_JTAG_TRST", 75, GPIO75_AP_JTAG_TRST},
747
748 {"GPIO76_GPIO76", 76, GPIO76_GPIO76},
749 {"GPIO76_M_JTAG_TMS", 76, GPIO76_M_JTAG_TMS},
750 {"GPIO76_SD1_DATA2", 76, GPIO76_SD1_DATA2},
751 {"GPIO76_PS_JTAG_TMS", 76, GPIO76_PS_JTAG_TMS},
752 {"GPIO76_PHY_JTAG_TMS", 76, GPIO76_PHY_JTAG_TMS},
753 {"GPIO76_AP_JTAG_TMS", 76, GPIO76_AP_JTAG_TMS},
754
755 {"GPIO77_GPIO77", 77, GPIO77_GPIO77},
756 {"GPIO77_M_JTAG_TDI", 77, GPIO77_M_JTAG_TDI},
757 {"GPIO77_SD1_DATA2", 77, GPIO77_SD1_DATA3},
758 {"GPIO77_PS_JTAG_TDI", 77, GPIO77_PS_JTAG_TDI},
759 {"GPIO77_PHY_JTAG_TDI", 77, GPIO77_PHY_JTAG_TDI},
760 {"GPIO77_AP_JTAG_TDI", 77, GPIO77_AP_JTAG_TDI},
761
762 {"GPIO78_GPIO78", 78, GPIO78_GPIO78},
763 {"GPIO78_M_JTAG_TCK", 78, GPIO78_M_JTAG_TCK},
764 {"GPIO78_PS_JTAG_TCK", 78, GPIO78_PS_JTAG_TCK},
765 {"GPIO78_PHY_JTAG_TCK", 78, GPIO78_PHY_JTAG_TCK},
766 {"GPIO78_AP_JTAG_TCK", 78, GPIO78_AP_JTAG_TCK},
767
768 {"GPIO79_GPIO79", 79, GPIO79_GPIO79},
769 {"GPIO79_M_JTAG_TDI", 79, GPIO79_M_JTAG_TDI},
770 {"GPIO79_PS_JTAG_TDI", 79, GPIO79_PS_JTAG_TDI},
771 {"GPIO79_PHY_JTAG_TDI", 79, GPIO79_PHY_JTAG_TDI},
772 {"GPIO79_AP_JTAG_TDI", 79, GPIO79_AP_JTAG_TDI},
773
774 {"GPIO80_GPIO80", 80, GPIO80_GPIO80},
775 {"GPIO80_M_JTAG_TDO", 80, GPIO80_M_JTAG_TDO},
776 {"GPIO80_PS_JTAG_TDO", 80, GPIO80_PS_JTAG_TDO},
777 {"GPIO80_PHY_JTAG_TDO", 80, GPIO80_PHY_JTAG_TDO},
778 {"GPIO80_AP_JTAG_TDO", 80, GPIO80_AP_JTAG_TDO},
779
780 {"GPIO81_GPIO81", 81, GPIO81_GPIO81},
781 {"GPIO81_M_JTAG_TMS", 81, GPIO81_M_JTAG_TMS},
782 {"GPIO81_PS_JTAG_TMS", 81, GPIO81_PS_JTAG_TMS},
783 {"GPIO81_PHY_JTAG_TMS", 81, GPIO81_PHY_JTAG_TMS},
784 {"GPIO81_AP_JTAG_TMS", 81, GPIO81_AP_JTAG_TMS},
785
786 {"GPIO82_GPIO82", 82, GPIO82_GPIO82},
787 {"GPIO82_M_JTAG_TRST", 82, GPIO82_M_JTAG_TRST},
788 {"GPIO82_PS_JTAG_TRST", 82, GPIO82_PS_JTAG_TRST},
789 {"GPIO82_PHY_JTAG_TRST", 82, GPIO82_PHY_JTAG_TRST},
790 {"GPIO82_AP_JTAG_TRST", 82, GPIO82_AP_JTAG_TRST},
791
792 {"GPIO83_GPIO83", 83, GPIO83_GPIO83},
793 {"GPIO83_KEY_COL0", 83, GPIO83_KEY_COL0},
794 {"GPIO84_GPIO84", 84, GPIO84_GPIO84},
795 {"GPIO84_KEY_COL1", 84, GPIO84_KEY_COL1},
796 {"GPIO85_GPIO85", 85, GPIO85_GPIO85},
797 {"GPIO85_KEY_ROW0", 85, GPIO85_KEY_ROW0},
798 {"GPIO86_GPIO86", 86, GPIO86_GPIO86},
799 {"GPIO86_KEY_ROW1", 86, GPIO86_KEY_ROW1},
800 {"GPIO87_GPIO87", 87, GPIO87_GPIO87},
801 {"GPIO87_CAM_SPI_CS", 87, GPIO87_CAM_SPI_CS},
802 {"GPIO88_GPIO88", 88, GPIO88_GPIO88},
803 {"GPIO88_CAM_SPI_CLK", 88, GPIO88_CAM_SPI_CLK},
804 {"GPIO89_GPIO89", 89, GPIO89_GPIO89},
805 {"GPIO89_CAM_SPI_DATA0", 89, GPIO89_CAM_SPI_DATA0},
806 {"GPIO90_GPIO90", 90, GPIO90_GPIO90},
807 {"GPIO90_CAM_SPI_DATA1", 90, GPIO90_CAM_SPI_DATA1},
808 {"GPIO90_CAM_SPI_TXD", 90, GPIO90_CAM_SPI_TXD},
809 {"GPIO91_GPIO91", 91, GPIO91_GPIO91},
810 {"GPIO91_CAM_SPI_DATA2", 91, GPIO91_CAM_SPI_DATA2},
811 {"GPIO92_GPIO92", 92, GPIO92_GPIO92},
812 {"GPIO92_CAM_SPI_DATA3", 92, GPIO92_CAM_SPI_DATA3},
813 {"GPIO93_GPIO93", 93, GPIO93_GPIO93},
814 {"GPIO93_SPIFC_CS", 93, GPIO93_SPIFC_CS},
815 {"GPIO94_GPIO94", 94, GPIO94_GPIO94},
816 {"GPIO94_SPIFC_CLK", 94, GPIO94_SPIFC_CLK},
817 {"GPIO95_GPIO95", 95, GPIO95_GPIO95},
818 {"GPIO95_SPIFC_DATA0", 95, GPIO95_SPIFC_DATA0},
819 {"GPIO96_GPIO96", 96, GPIO96_GPIO96},
820 {"GPIO96_SPIFC_DATA1", 96, GPIO96_SPIFC_DATA1},
821 {"GPIO97_GPIO97", 97, GPIO97_GPIO97},
822 {"GPIO97_SPIFC_DATA2", 97, GPIO97_SPIFC_DATA2},
823 {"GPIO98_GPIO98", 98, GPIO98_GPIO98},
824 {"GPIO98_SPIFC_DATA3", 98, GPIO98_SPIFC_DATA3},
825 {"GPIO99_GPIO99", 99, GPIO99_GPIO99},
826
827 {"GPIO100_GPIO100", 100, GPIO100_GPIO100},
828 {"GPIO100_RF_SPI_STR", 100, GPIO100_RF_SPI_STR},
829 {"GPIO101_GPIO101", 101, GPIO101_GPIO101},
830 {"GPIO101_RF_SPI_CLK", 101, GPIO101_RF_SPI_CLK},
831 {"GPIO102_GPIO102", 102, GPIO102_GPIO102},
832 {"GPIO102_RF_SPI_DATA", 102, GPIO102_RF_SPI_DATA},
833 {"GPIO103_GPIO103", 103, GPIO103_GPIO103},
834
835 {"GPIO104_GPIO104", 104, GPIO104_GPIO104},
836 {"GPIO104_TD_G0_GPIO2", 104, GPIO104_TD_G0_GPIO2},
837 {"GPIO104_LTE_TPU_OUT0_5", 104, GPIO104_LTE_TPU_OUT0_5},
838 {"GPIO104_W_G0_GPIO2", 104, GPIO104_W_G0_GPIO2},
839 {"GPIO104_GSM_T_OUT_O_0", 104, GPIO104_GSM_T_OUT_O_0},
840
841 {"GPIO105_GPIO105", 105, GPIO105_GPIO105},
842 {"GPIO105_TD_G0_GPIO3", 105, GPIO105_TD_G0_GPIO3},
843 {"GPIO105_LTE_TPU_OUT0_6", 105, GPIO105_LTE_TPU_OUT0_6},
844 {"GPIO105_W_G0_GPIO3", 105, GPIO105_W_G0_GPIO3},
845 {"GPIO105_GSM_T_OUT_O_1", 105, GPIO105_GSM_T_OUT_O_1},
846
847 {"GPIO106_GPIO106", 106, GPIO106_GPIO106},
848 {"GPIO106_TD_G0_GPIO4", 106, GPIO106_TD_G0_GPIO4},
849 {"GPIO106_LTE_TPU_OUT0_7", 106, GPIO106_LTE_TPU_OUT0_7},
850 {"GPIO106_W_G0_GPIO4", 106, GPIO106_W_G0_GPIO4},
851 {"GPIO106_GSM_T_OUT_O_2", 106, GPIO106_GSM_T_OUT_O_2},
852
853 {"GPIO107_GPIO107", 107, GPIO107_GPIO107},
854 {"GPIO107_TD_G0_GPIO5", 107, GPIO107_TD_G0_GPIO5},
855 {"GPIO107_LTE_TPU_OUT0_8", 107, GPIO107_LTE_TPU_OUT0_8},
856 {"GPIO107_W_G0_GPIO5", 107, GPIO107_W_G0_GPIO5},
857 {"GPIO107_GSM_T_OUT_O_3", 107, GPIO107_GSM_T_OUT_O_3},
858
859 {"GPIO108_GPIO108", 108, GPIO108_GPIO108},
860 {"GPIO108_TD_G0_GPIO6", 108, GPIO108_TD_G0_GPIO6},
861 {"GPIO108_LTE_TPU_OUT0_9", 108, GPIO108_LTE_TPU_OUT0_9},
862 {"GPIO108_W_G0_GPIO6", 108, GPIO108_W_G0_GPIO6},
863 {"GPIO108_GSM_T_OUT_O_4", 108, GPIO108_GSM_T_OUT_O_4},
864
865 {"GPIO109_GPIO109", 109, GPIO109_GPIO109},
866 {"GPIO109_TD_G0_GPIO7", 109, GPIO109_TD_G0_GPIO7},
867 {"GPIO109_LTE_TPU_OUT0_10", 109, GPIO109_LTE_TPU_OUT0_10},
868 {"GPIO109_W_G0_GPIO7", 109, GPIO109_W_G0_GPIO7},
869 {"GPIO109_GSM_T_OUT_O_5", 109, GPIO109_GSM_T_OUT_O_5},
870
871 {"GPIO110_GPIO110", 110, GPIO110_GPIO110},
872 {"GPIO110_TD_G0_GPIO8", 110, GPIO110_TD_G0_GPIO8},
873 {"GPIO110_LTE_TPU_OUT0_11", 110, GPIO110_LTE_TPU_OUT0_11},
874 {"GPIO110_W_G0_GPIO8", 110, GPIO110_W_G0_GPIO8},
875 {"GPIO110_GSM_T_OUT_O_6", 110, GPIO110_GSM_T_OUT_O_6},
876
877 {"GPIO111_GPIO111", 111, GPIO111_GPIO111},
878 {"GPIO111_TD_G0_GPIO9", 111, GPIO111_TD_G0_GPIO9},
879 {"GPIO111_LTE_TPU_OUT0_12", 111, GPIO111_LTE_TPU_OUT0_12},
880 {"GPIO111_W_G0_GPIO9", 111, GPIO111_W_G0_GPIO9},
881 {"GPIO111_GSM_T_OUT_O_7", 111, GPIO111_GSM_T_OUT_O_7},
882
883 {"GPIO112_GPIO112", 112, GPIO112_GPIO112},
884 {"GPIO112_MIPI_RFFE_CLK0", 112, GPIO112_MIPI_RFFE_CLK0},
885 {"GPIO112_TD_G0_GPIO10", 112, GPIO112_TD_G0_GPIO10},
886 {"GPIO112_LTE_TPU_OUT0_13", 112, GPIO112_LTE_TPU_OUT0_13},
887 {"GPIO112_W_G0_GPIO10", 112, GPIO112_W_G0_GPIO10},
888 {"GPIO112_GSM_T_OUT_O_8", 112, GPIO112_GSM_T_OUT_O_8},
889
890 {"GPIO113_GPIO113", 113, GPIO113_GPIO113},
891 {"GPIO113_MIPI_RFFE_DATA0", 113, GPIO113_MIPI_RFFE_DATA0},
892 {"GPIO113_TD_G0_GPIO11", 113, GPIO113_TD_G0_GPIO11},
893 {"GPIO113_LTE_TPU_OUT0_14", 113, GPIO113_LTE_TPU_OUT0_14},
894 {"GPIO113_W_G0_GPIO11", 113, GPIO113_W_G0_GPIO11},
895 {"GPIO113_GSM_T_OUT_O_9", 113, GPIO113_GSM_T_OUT_O_9},
896
897 {"GPIO114_GPIO114", 114, GPIO114_GPIO114},
898 {"GPIO114_MIPI_RFFE_CLK1", 114, GPIO114_MIPI_RFFE_CLK1},
899 {"GPIO114_ABB_I2C_SEL_PINMUX", 114, GPIO114_ABB_I2C_SEL_PINMUX},
900 {"GPIO114_TD_G0_GPIO12", 114, GPIO114_TD_G0_GPIO12},
901 {"GPIO114_LTE_TPU_OUT0_15", 114, GPIO114_LTE_TPU_OUT0_15},
902 {"GPIO114_W_G0_GPIO12", 114, GPIO114_W_G0_GPIO12},
903 {"GPIO114_GSM_T_OUT_O_10", 114, GPIO114_GSM_T_OUT_O_10},
904
905 {"GPIO115_GPIO115", 115, GPIO115_GPIO115},
906 {"GPIO115_MIPI_RFFE_DATA1", 115, GPIO115_MIPI_RFFE_DATA1},
907 {"GPIO115_ABB_I2C_SDA_PINMUX", 115, GPIO115_ABB_I2C_SDA_PINMUX},
908 {"GPIO115_TD_G1_GPIO0", 115, GPIO115_TD_G1_GPIO0},
909 {"GPIO115_LTE_TPU_OUT1_0", 115, GPIO115_LTE_TPU_OUT1_0},
910 {"GPIO115_W_G1_GPIO0", 115, GPIO115_W_G1_GPIO0},
911 {"GPIO115_GSM_T_OUT_O_11", 115, GPIO115_GSM_T_OUT_O_11},
912
913 {"GPIO116_GPIO116", 116, GPIO116_GPIO116},
914 {"GPIO116_SIM_RST", 116, GPIO116_SIM_RST},
915 {"GPIO117_GPIO117", 117, GPIO117_GPIO117},
916 {"GPIO117_SIM_CLK", 117, GPIO117_SIM_CLK},
917 {"GPIO118_GPIO118", 118, GPIO118_GPIO118},
918 {"GPIO118_SIM_DATA", 118, GPIO118_SIM_DATA},
919 {"GPIO119_GPIO119", 119, GPIO119_GPIO119},
920 {"GPIO119_EXT_INT8", 119, GPIO119_EXT_INT8},
921 {"GPIO119_M_JTAG_TDO", 119, GPIO119_M_JTAG_TDO},
922 {"GPIO119_URAT0_RTS", 119, GPIO119_URAT0_RTS},
923 {"GPIO119_PSJTAG_TDO", 119, GPIO119_PSJTAG_TDO},
924 {"GPIO119_PHYJTAG_TDO", 119, GPIO119_PHYJTAG_TDO},
925 {"GPIO119_APJTAG_TDO", 119, GPIO119_APJTAG_TDO},
926 {"GPIO119_PWM0", 119, GPIO119_PWM0},
927
928 {"GPIO120_GPIO120", 120, GPIO120_GPIO120},
929 {"GPIO120_EXT_INT9", 120, GPIO120_EXT_INT9},
930 {"GPIO120_M_JTAG_TCK", 120, GPIO120_M_JTAG_TCK},
931 {"GPIO120_UART0_CTS", 120, GPIO120_UART0_CTS},
932 {"GPIO120_PSJTAG_TCK", 120, GPIO120_PSJTAG_TCK},
933 {"GPIO120_PHYJTAG_TCK", 120, GPIO120_PHYJTAG_TCK},
934 {"GPIO120_APJTAG_TCK", 120, GPIO120_APJTAG_TCK},
935 {"GPIO120_PWM1", 120, GPIO120_PWM1},
936
937 {"GPIO121_GPIO121", 121, GPIO121_GPIO121},
938 {"GPIO121_EXT_INT10", 121, GPIO121_EXT_INT10},
939 {"GPIO121_M_JTAG_TRST", 121, GPIO121_M_JTAG_TRST},
940 {"GPIO121_PSJTAG_TRST", 121, GPIO121_PSJTAG_TRST},
941 {"GPIO121_PHYJTAG_TRST", 121, GPIO121_PHYJTAG_TRST},
942 {"GPIO121_APJTAG_TRST", 121, GPIO121_APJTAG_TRST},
943 {"GPIO121_UART2_RXD", 121, GPIO121_UART2_RXD},
944
945 {"GPIO122_GPIO122", 122, GPIO122_GPIO122},
946 {"GPIO122_EXT_INT11", 122, GPIO122_EXT_INT11},
947 {"GPIO122_M_JTAG_TMS", 122, GPIO122_M_JTAG_TMS},
948 {"GPIO122_PSJTAG_TMS", 122, GPIO122_PSJTAG_TMS},
949 {"GPIO122_PHYJTAG_TMS", 122, GPIO122_PHYJTAG_TMS},
950 {"GPIO122_APJTAG_TMS", 122, GPIO122_APJTAG_TMS},
951 {"GPIO122_UART2_TXD", 122, GPIO122_UART2_TXD},
952
953 {"GPIO123_GPIO123", 123, GPIO123_GPIO123},
954 {"GPIO123_EXT_INT12", 123, GPIO123_EXT_INT12},
955 {"GPIO123_M_JTAG_TDI", 123, GPIO123_M_JTAG_TDI},
956 {"GPIO123_PSJTAG_TDI", 123, GPIO123_PSJTAG_TDI},
957 {"GPIO123_PHYJTAG_TDI", 123, GPIO123_PHYJTAG_TDI},
958 {"GPIO123_APJTAG_TDI", 123, GPIO123_APJTAG_TDI},
959 {"GPIO123_UART2_RTS", 123, GPIO123_UART2_RTS},
960
961 {"GPIO124_GPIO124", 124, GPIO124_GPIO124},
962 {"GPIO124_EXT_INT13", 124, GPIO124_EXT_INT13},
963 {"GPIO124_UART2_CTS", 124, GPIO124_UART2_CTS},
964
965 {"GPIO125_GPIO125", 125, GPIO125_GPIO125},
966 {"GPIO125_EXT_INT14", 125, GPIO125_EXT_INT14},
967 {"GPIO125_UART1_RTS", 125, GPIO125_UART1_RTS},
968
969 {"GPIO126_GPIO126", 126, GPIO126_GPIO126},
970 {"GPIO126_EXT_INT15", 126, GPIO126_EXT_INT15},
971 {"GPIO126_KEY_COL2", 126, GPIO126_KEY_COL2},
972 {"GPIO126_UART1_CTS", 126, GPIO126_UART1_CTS},
973
974 {"GPIO127_GPIO127", 127, GPIO127_GPIO127},
975 {"GPIO127_EXT_INT8", 127, GPIO127_EXT_INT8},
976 {"GPIO127_KEY_COL3", 127, GPIO127_KEY_COL3},
977
978 {"GPIO128_GPIO128", 128, GPIO128_GPIO128},
979 {"GPIO128_EXT_INT9", 128, GPIO128_EXT_INT9},
980 {"GPIO128_KEY_COL4", 128, GPIO128_KEY_COL4},
981
982 {"GPIO129_GPIO129", 129, GPIO129_GPIO129},
983 {"GPIO129_EXT_INT10", 129, GPIO129_EXT_INT10},
984 {"GPIO129_KEY_COL5", 129, GPIO129_KEY_COL5},
985
986 {"GPIO130_GPIO130", 130, GPIO130_GPIO130},
987 {"GPIO130_EXT_INT11", 130, GPIO130_EXT_INT11},
988 {"GPIO130_KEY_ROW2", 130, GPIO130_KEY_ROW2},
989
990 {"GPIO131_GPIO131", 131, GPIO131_GPIO131},
991 {"GPIO131_EXT_INT12", 131, GPIO131_EXT_INT12},
992 {"GPIO131_KEY_ROW3", 131, GPIO131_KEY_ROW3},
993
994 {"GPIO132_GPIO132", 132, GPIO132_GPIO132},
995 {"GPIO132_EXT_INT13", 132, GPIO132_EXT_INT13},
996 {"GPIO132_KEY_ROW4", 132, GPIO132_KEY_ROW4},
997
998 {"GPIO133_GPIO133", 133, GPIO133_GPIO133},
999 {"GPIO133_SIM1_RST", 133, GPIO133_SIM1_RST},
1000 {"GPIO133_TD_G1_GPIO1", 133, GPIO133_TD_G1_GPIO1},
1001 {"GPIO133_LTE_TPU_OUT1_1", 133, GPIO133_LTE_TPU_OUT1_1},
1002 {"GPIO133_W_G1_GPIO1", 133, GPIO133_W_G1_GPIO1},
1003 {"GPIO133_GSM_T_OUT_O_12", 133, GPIO133_GSM_T_OUT_O_12},
1004
1005 {"GPIO134_GPIO134", 134, GPIO134_GPIO134},
1006 {"GPIO134_SIM1_CLK", 134, GPIO134_SIM1_CLK},
1007 {"GPIO134_TD_G1_GPIO2", 134, GPIO134_TD_G1_GPIO2},
1008 {"GPIO134_LTE_TPU_OUT1_2", 134, GPIO134_LTE_TPU_OUT1_2},
1009 {"GPIO134_W_G1_GPIO2", 134, GPIO134_W_G1_GPIO2},
1010 {"GPIO134_GSM_T_OUT_O_13", 134, GPIO134_GSM_T_OUT_O_13},
1011
1012 {"GPIO135_GPIO135", 135, GPIO135_GPIO135},
1013 {"GPIO135_SIM1_DATA", 135, GPIO135_SIM1_DATA},
1014 {"GPIO135_TD_G1_GPIO3", 135, GPIO135_TD_G1_GPIO3},
1015 {"GPIO135_LTE_TPU_OUT1_3", 135, GPIO135_LTE_TPU_OUT1_3},
1016 {"GPIO135_W_G1_GPIO3", 135, GPIO135_W_G1_GPIO3},
1017 {"GPIO135_GSM_T_OUT_O_14", 135, GPIO135_GSM_T_OUT_O_14},
1018
1019 {"GPIO FUNCTION NOT EXIST", ZX29_GPIO_NULL, ZX29_GPIO_NULL},
1020};
1021void zx29_gpio_status_get(unsigned int gpio)
1022{
1023 int temp = 0, n = 0;
1024
1025 temp = zx29_gpio_function_sel_get(gpio);
1026
1027 for(n=0; n<ARRAY_SIZE(gpio_def); n++)
1028 {
1029 if(gpio_def[n].gpio_func == temp)
1030 {
1031 gpio_status_get.function = gpio_def[n].gpio_name;
1032 break;
1033 }
1034 if(gpio_def[n].gpio_num == ZX29_GPIO_NULL)
1035 {
1036 printk("GPIO%d function not exist, func[%d]\n",gpio,temp);
1037 gpio_status_get.function = gpio_def[n].gpio_name;
1038 }
1039 }
1040
1041 temp=zx29_gpio_get_direction(gpio);
1042
1043 if(temp==GPIO_IN)
1044 {
1045 gpio_status_get.direction = "GPIO_IN";
1046 temp=zx29_gpio_input_data(gpio);
1047 if(temp)
1048 gpio_status_get.level = "GPIO_HIGH";
1049 else
1050 gpio_status_get.level = "GPIO_LOW";
1051 }
1052 else
1053 {
1054 gpio_status_get.direction = "GPIO_OUT";
1055 temp=zx29_gpio_outputdata_get(gpio);
1056 if(temp)
1057 gpio_status_get.level = "GPIO_HIGH";
1058 else
1059 gpio_status_get.level = "GPIO_LOW";
1060 }
1061}
1062
1063/*sectionally get gpio seting parameters in temp_buf[50] */
1064static void temp_buf_get(void)
1065{
1066 unsigned char n = 0;
1067 while((temp_buf[buf] != ' ')&&(temp_buf[buf] != '#')&&(temp_buf[buf] != '\0'))
1068 {
1069 temp[n++] = temp_buf[buf++];
1070 }
1071 temp[n] = '\0';
1072 buf++;
1073}
1074
1075/* analysis seting parameters in temp_buf[50] to get setting parameters of gpio_num,gpio_function, gpio_dir and gpio_level */
1076static int parse_temp_buf(char *tempbuf)
1077{
1078 unsigned gpio_num = 0, gpio_dir = 0,gpio_level = 0;
1079 unsigned int gpio_func = 0,n = 0;
1080 unsigned char temp_k = 0, gpio_flag = 1;
1081 int ret = 0;
1082
1083 buf = 0;
1084/* get function setting parameters in"GPIO40_LTE_DATA_DONGLE0 OUT HIGH#"*/
1085 temp_buf_get();
1086
1087 for(n=0; n<ARRAY_SIZE(gpio_def); n++)
1088 {
1089 if(!strcmp(gpio_def[n].gpio_name,temp))
1090 {
1091 gpio_num = gpio_def[n].gpio_num;
1092 gpio_func = gpio_def[n].gpio_func;
1093 break;
1094 }
1095 if(!strcmp(gpio_def[n].gpio_name ,"GPIO FUNCTION NOT EXIST"))
1096 {
1097 printk("gpio_func INVALID INPUT\n");
1098 return -EINVAL;
1099 }
1100 }
1101
1102 ret = zx29_gpio_function_sel(gpio_num, gpio_func);
1103 if(ret)
1104 return ret;
1105
1106/*juge gpio is used as GPIO (GPIO40_GPIO40,the two strings besides the '_' are same) or multiplex function */
1107 temp_k = (strlen(temp)-1)/2;
1108 for(n=0;n<temp_k;n++)
1109 {
1110 if(temp[n] != temp[temp_k+1+n])
1111 {
1112 gpio_flag = 0;
1113 break;
1114 }
1115 }
1116
1117 if(!gpio_flag)
1118 return 0;
1119
1120/* get direction setting parameters in"GPIO40_LTE_DATA_DONGLE0 OUT HIGH#"*/
1121
1122 temp_buf_get();
1123
1124 if(!strcmp(temp,""))/*just set GPIO function*/
1125 return 0;
1126 else if(!strcmp(temp,"IN"))
1127 gpio_dir = GPIO_IN;
1128 else if(!strcmp(temp,"OUT"))
1129 gpio_dir = GPIO_OUT;
1130 else
1131 {
1132 printk("gpio_dir INVALID INPUT\n");
1133 return -EINVAL;
1134 }
1135
1136 zx29_gpio_set_direction(gpio_num,gpio_dir);
1137
1138 if(gpio_dir == GPIO_IN)
1139 return 0;
1140
1141/* get level setting parameters in"GPIO40_LTE_DATA_DONGLE0 OUT HIGH#"*/
1142 temp_buf_get();
1143
1144 if(!strcmp(temp,"HIGH"))
1145 gpio_level = GPIO_HIGH;
1146 else if(!strcmp(temp,"LOW"))
1147 gpio_level = GPIO_LOW;
1148 else
1149 {
1150 printk("gpio_level INVALID INPUT\n");
1151 return -EINVAL;
1152 }
1153
1154 zx29_gpio_output_data(gpio_num,gpio_level);
1155
1156 return 0;
1157 }
1158
1159unsigned int gpio_param_valid(unsigned int num)
1160{
1161 unsigned int n,valid = 0;
1162
1163 for(n=0; n<ARRAY_SIZE(pin_info); n++)
1164 { if(pin_info[n].gpio == num)
1165 {
1166 valid = 1;
1167 break;
1168 }
1169 }
1170 return valid;
1171}
1172
1173static int dbg_gpio_show(struct seq_file *s, void *unused)
1174{
1175
1176 unsigned int num;
1177
1178 seq_printf(s,"The gpio module status:\n");
1179
1180 for(num = 0; num <= ZX29_GPIO_MAX; num++)
1181 {
1182 if(gpio_param_valid(num))
1183 {
1184 zx29_gpio_status_get(num);
1185 seq_printf(s,"%-30s",gpio_status_get.function);
1186 seq_printf(s,"%-15s",gpio_status_get.direction);
1187 seq_printf(s,"%-15s\n",gpio_status_get.level);
1188 }
1189 }
1190
1191 return 0;
1192}
1193
1194ssize_t gpio_debug_write (struct file *file, const char __user *buf, size_t size, loff_t *p)
1195{
1196 int ret;
1197
1198 if(copy_from_user(temp_buf, buf, size))
1199 printk("copy user failed\n");
1200
1201 /*parse temp_buf*/
1202 ret=parse_temp_buf(temp_buf);
1203
1204 if(!ret)
1205 printk("GPIO setting succeed\n");
1206 else
1207 {
1208 printk("GPIO setting failed\n");
1209 printk("please follow the format to input GPIO parameters :\"GPIO40_GPI40 OUT HIGH#\"\n");
1210 }
1211 return size;
1212}
1213
1214static int dbg_gpio_open(struct inode *inode, struct file *file)
1215{
1216 return single_open(file, dbg_gpio_show, &inode->i_private);
1217}
1218
1219
1220static const struct file_operations debug_fops = {
1221 .open = dbg_gpio_open,
1222 .read = seq_read,
1223 .write = gpio_debug_write,
1224 .llseek = seq_lseek,
1225 .release = single_release,
1226};
1227
1228static void zx29_gpio_debuginit(void)
1229{
1230 (void) debugfs_create_file("zx29_gpio", S_IRUGO,
1231 NULL, NULL, &debug_fops);
1232}
1233
1234late_initcall(zx29_gpio_debuginit);
1235
1236#endif
1237
1238