yuezonghe | 824eb0c | 2024-06-27 02:32:26 -0700 | [diff] [blame] | 1 | /* |
| 2 | * Copyright (C) 2001-2004 by David Brownell |
| 3 | * |
| 4 | * This program is free software; you can redistribute it and/or modify it |
| 5 | * under the terms of the GNU General Public License as published by the |
| 6 | * Free Software Foundation; either version 2 of the License, or (at your |
| 7 | * option) any later version. |
| 8 | * |
| 9 | * This program is distributed in the hope that it will be useful, but |
| 10 | * WITHOUT ANY WARRANTY; without even the implied warranty of MERCHANTABILITY |
| 11 | * or FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License |
| 12 | * for more details. |
| 13 | * |
| 14 | * You should have received a copy of the GNU General Public License |
| 15 | * along with this program; if not, write to the Free Software Foundation, |
| 16 | * Inc., 675 Mass Ave, Cambridge, MA 02139, USA. |
| 17 | */ |
| 18 | |
| 19 | /* this file is part of ehci-hcd.c */ |
| 20 | |
| 21 | /*-------------------------------------------------------------------------*/ |
| 22 | |
| 23 | /* |
| 24 | * EHCI Root Hub ... the nonsharable stuff |
| 25 | * |
| 26 | * Registers don't need cpu_to_le32, that happens transparently |
| 27 | */ |
| 28 | |
| 29 | /*-------------------------------------------------------------------------*/ |
| 30 | #include <linux/usb/otg.h> |
| 31 | |
| 32 | #define PORT_WAKE_BITS (PORT_WKOC_E|PORT_WKDISC_E|PORT_WKCONN_E) |
| 33 | |
| 34 | #ifdef CONFIG_PM |
| 35 | |
| 36 | static int ehci_hub_control( |
| 37 | struct usb_hcd *hcd, |
| 38 | u16 typeReq, |
| 39 | u16 wValue, |
| 40 | u16 wIndex, |
| 41 | char *buf, |
| 42 | u16 wLength |
| 43 | ); |
| 44 | |
| 45 | /* After a power loss, ports that were owned by the companion must be |
| 46 | * reset so that the companion can still own them. |
| 47 | */ |
| 48 | static void ehci_handover_companion_ports(struct ehci_hcd *ehci) |
| 49 | { |
| 50 | u32 __iomem *reg; |
| 51 | u32 status; |
| 52 | int port; |
| 53 | __le32 buf; |
| 54 | struct usb_hcd *hcd = ehci_to_hcd(ehci); |
| 55 | |
| 56 | if (!ehci->owned_ports) |
| 57 | return; |
| 58 | |
| 59 | /* Give the connections some time to appear */ |
| 60 | msleep(20); |
| 61 | |
| 62 | port = HCS_N_PORTS(ehci->hcs_params); |
| 63 | while (port--) { |
| 64 | if (test_bit(port, &ehci->owned_ports)) { |
| 65 | reg = &ehci->regs->port_status[port]; |
| 66 | status = ehci_readl(ehci, reg) & ~PORT_RWC_BITS; |
| 67 | |
| 68 | /* Port already owned by companion? */ |
| 69 | if (status & PORT_OWNER) |
| 70 | clear_bit(port, &ehci->owned_ports); |
| 71 | else if (test_bit(port, &ehci->companion_ports)) |
| 72 | ehci_writel(ehci, status & ~PORT_PE, reg); |
| 73 | else |
| 74 | ehci_hub_control(hcd, SetPortFeature, |
| 75 | USB_PORT_FEAT_RESET, port + 1, |
| 76 | NULL, 0); |
| 77 | } |
| 78 | } |
| 79 | |
| 80 | if (!ehci->owned_ports) |
| 81 | return; |
| 82 | msleep(90); /* Wait for resets to complete */ |
| 83 | |
| 84 | port = HCS_N_PORTS(ehci->hcs_params); |
| 85 | while (port--) { |
| 86 | if (test_bit(port, &ehci->owned_ports)) { |
| 87 | ehci_hub_control(hcd, GetPortStatus, |
| 88 | 0, port + 1, |
| 89 | (char *) &buf, sizeof(buf)); |
| 90 | |
| 91 | /* The companion should now own the port, |
| 92 | * but if something went wrong the port must not |
| 93 | * remain enabled. |
| 94 | */ |
| 95 | reg = &ehci->regs->port_status[port]; |
| 96 | status = ehci_readl(ehci, reg) & ~PORT_RWC_BITS; |
| 97 | if (status & PORT_OWNER) |
| 98 | ehci_writel(ehci, status | PORT_CSC, reg); |
| 99 | else { |
| 100 | ehci_dbg(ehci, "failed handover port %d: %x\n", |
| 101 | port + 1, status); |
| 102 | ehci_writel(ehci, status & ~PORT_PE, reg); |
| 103 | } |
| 104 | } |
| 105 | } |
| 106 | |
| 107 | ehci->owned_ports = 0; |
| 108 | } |
| 109 | |
| 110 | static int __maybe_unused ehci_port_change(struct ehci_hcd *ehci) |
| 111 | { |
| 112 | int i = HCS_N_PORTS(ehci->hcs_params); |
| 113 | |
| 114 | /* First check if the controller indicates a change event */ |
| 115 | |
| 116 | if (ehci_readl(ehci, &ehci->regs->status) & STS_PCD) |
| 117 | return 1; |
| 118 | |
| 119 | /* |
| 120 | * Not all controllers appear to update this while going from D3 to D0, |
| 121 | * so check the individual port status registers as well |
| 122 | */ |
| 123 | |
| 124 | while (i--) |
| 125 | if (ehci_readl(ehci, &ehci->regs->port_status[i]) & PORT_CSC) |
| 126 | return 1; |
| 127 | |
| 128 | return 0; |
| 129 | } |
| 130 | |
| 131 | static __maybe_unused void ehci_adjust_port_wakeup_flags(struct ehci_hcd *ehci, |
| 132 | bool suspending, bool do_wakeup) |
| 133 | { |
| 134 | int port; |
| 135 | u32 temp; |
| 136 | unsigned long flags; |
| 137 | |
| 138 | /* If remote wakeup is enabled for the root hub but disabled |
| 139 | * for the controller, we must adjust all the port wakeup flags |
| 140 | * when the controller is suspended or resumed. In all other |
| 141 | * cases they don't need to be changed. |
| 142 | */ |
| 143 | if (!ehci_to_hcd(ehci)->self.root_hub->do_remote_wakeup || do_wakeup) |
| 144 | return; |
| 145 | |
| 146 | spin_lock_irqsave(&ehci->lock, flags); |
| 147 | |
| 148 | /* clear phy low-power mode before changing wakeup flags */ |
| 149 | if (ehci->has_hostpc) { |
| 150 | port = HCS_N_PORTS(ehci->hcs_params); |
| 151 | while (port--) { |
| 152 | u32 __iomem *hostpc_reg; |
| 153 | |
| 154 | hostpc_reg = (u32 __iomem *)((u8 *) ehci->regs |
| 155 | + HOSTPC0 + 4 * port); |
| 156 | temp = ehci_readl(ehci, hostpc_reg); |
| 157 | ehci_writel(ehci, temp & ~HOSTPC_PHCD, hostpc_reg); |
| 158 | } |
| 159 | spin_unlock_irqrestore(&ehci->lock, flags); |
| 160 | msleep(5); |
| 161 | spin_lock_irqsave(&ehci->lock, flags); |
| 162 | } |
| 163 | |
| 164 | port = HCS_N_PORTS(ehci->hcs_params); |
| 165 | while (port--) { |
| 166 | u32 __iomem *reg = &ehci->regs->port_status[port]; |
| 167 | u32 t1 = ehci_readl(ehci, reg) & ~PORT_RWC_BITS; |
| 168 | u32 t2 = t1 & ~PORT_WAKE_BITS; |
| 169 | |
| 170 | /* If we are suspending the controller, clear the flags. |
| 171 | * If we are resuming the controller, set the wakeup flags. |
| 172 | */ |
| 173 | if (!suspending) { |
| 174 | if (t1 & PORT_CONNECT) |
| 175 | t2 |= PORT_WKOC_E | PORT_WKDISC_E; |
| 176 | else |
| 177 | t2 |= PORT_WKOC_E | PORT_WKCONN_E; |
| 178 | } |
| 179 | ehci_vdbg(ehci, "port %d, %08x -> %08x\n", |
| 180 | port + 1, t1, t2); |
| 181 | ehci_writel(ehci, t2, reg); |
| 182 | } |
| 183 | |
| 184 | /* enter phy low-power mode again */ |
| 185 | if (ehci->has_hostpc) { |
| 186 | port = HCS_N_PORTS(ehci->hcs_params); |
| 187 | while (port--) { |
| 188 | u32 __iomem *hostpc_reg; |
| 189 | |
| 190 | hostpc_reg = (u32 __iomem *)((u8 *) ehci->regs |
| 191 | + HOSTPC0 + 4 * port); |
| 192 | temp = ehci_readl(ehci, hostpc_reg); |
| 193 | ehci_writel(ehci, temp | HOSTPC_PHCD, hostpc_reg); |
| 194 | } |
| 195 | } |
| 196 | |
| 197 | /* Does the root hub have a port wakeup pending? */ |
| 198 | if (!suspending && ehci_port_change(ehci)) |
| 199 | usb_hcd_resume_root_hub(ehci_to_hcd(ehci)); |
| 200 | |
| 201 | spin_unlock_irqrestore(&ehci->lock, flags); |
| 202 | } |
| 203 | |
| 204 | static int ehci_bus_suspend (struct usb_hcd *hcd) |
| 205 | { |
| 206 | struct ehci_hcd *ehci = hcd_to_ehci (hcd); |
| 207 | int port; |
| 208 | int mask; |
| 209 | int changed; |
| 210 | |
| 211 | ehci_dbg(ehci, "suspend root hub\n"); |
| 212 | |
| 213 | if (time_before (jiffies, ehci->next_statechange)) |
| 214 | msleep(5); |
| 215 | del_timer_sync(&ehci->watchdog); |
| 216 | del_timer_sync(&ehci->iaa_watchdog); |
| 217 | |
| 218 | spin_lock_irq (&ehci->lock); |
| 219 | |
| 220 | /* Once the controller is stopped, port resumes that are already |
| 221 | * in progress won't complete. Hence if remote wakeup is enabled |
| 222 | * for the root hub and any ports are in the middle of a resume or |
| 223 | * remote wakeup, we must fail the suspend. |
| 224 | */ |
| 225 | if (hcd->self.root_hub->do_remote_wakeup) { |
| 226 | if (ehci->resuming_ports) { |
| 227 | spin_unlock_irq(&ehci->lock); |
| 228 | ehci_dbg(ehci, "suspend failed because a port is resuming\n"); |
| 229 | return -EBUSY; |
| 230 | } |
| 231 | } |
| 232 | |
| 233 | /* stop schedules, clean any completed work */ |
| 234 | if (ehci->rh_state == EHCI_RH_RUNNING) |
| 235 | ehci_quiesce (ehci); |
| 236 | ehci->command = ehci_readl(ehci, &ehci->regs->command); |
| 237 | ehci_work(ehci); |
| 238 | |
| 239 | /* Unlike other USB host controller types, EHCI doesn't have |
| 240 | * any notion of "global" or bus-wide suspend. The driver has |
| 241 | * to manually suspend all the active unsuspended ports, and |
| 242 | * then manually resume them in the bus_resume() routine. |
| 243 | */ |
| 244 | ehci->bus_suspended = 0; |
| 245 | ehci->owned_ports = 0; |
| 246 | changed = 0; |
| 247 | port = HCS_N_PORTS(ehci->hcs_params); |
| 248 | while (port--) { |
| 249 | u32 __iomem *reg = &ehci->regs->port_status [port]; |
| 250 | u32 t1 = ehci_readl(ehci, reg) & ~PORT_RWC_BITS; |
| 251 | u32 t2 = t1 & ~PORT_WAKE_BITS; |
| 252 | |
| 253 | /* keep track of which ports we suspend */ |
| 254 | if (t1 & PORT_OWNER) |
| 255 | set_bit(port, &ehci->owned_ports); |
| 256 | else if ((t1 & PORT_PE) && !(t1 & PORT_SUSPEND)) { |
| 257 | t2 |= PORT_SUSPEND; |
| 258 | set_bit(port, &ehci->bus_suspended); |
| 259 | } |
| 260 | |
| 261 | /* enable remote wakeup on all ports, if told to do so */ |
| 262 | if (hcd->self.root_hub->do_remote_wakeup) { |
| 263 | /* only enable appropriate wake bits, otherwise the |
| 264 | * hardware can not go phy low power mode. If a race |
| 265 | * condition happens here(connection change during bits |
| 266 | * set), the port change detection will finally fix it. |
| 267 | */ |
| 268 | if (t1 & PORT_CONNECT) |
| 269 | t2 |= PORT_WKOC_E | PORT_WKDISC_E; |
| 270 | else |
| 271 | t2 |= PORT_WKOC_E | PORT_WKCONN_E; |
| 272 | } |
| 273 | |
| 274 | if (t1 != t2) { |
| 275 | ehci_vdbg (ehci, "port %d, %08x -> %08x\n", |
| 276 | port + 1, t1, t2); |
| 277 | ehci_writel(ehci, t2, reg); |
| 278 | changed = 1; |
| 279 | } |
| 280 | } |
| 281 | |
| 282 | if (changed && ehci->has_hostpc) { |
| 283 | spin_unlock_irq(&ehci->lock); |
| 284 | msleep(5); /* 5 ms for HCD to enter low-power mode */ |
| 285 | spin_lock_irq(&ehci->lock); |
| 286 | |
| 287 | port = HCS_N_PORTS(ehci->hcs_params); |
| 288 | while (port--) { |
| 289 | u32 __iomem *hostpc_reg; |
| 290 | u32 t3; |
| 291 | |
| 292 | hostpc_reg = (u32 __iomem *)((u8 *) ehci->regs |
| 293 | + HOSTPC0 + 4 * port); |
| 294 | t3 = ehci_readl(ehci, hostpc_reg); |
| 295 | ehci_writel(ehci, t3 | HOSTPC_PHCD, hostpc_reg); |
| 296 | t3 = ehci_readl(ehci, hostpc_reg); |
| 297 | ehci_dbg(ehci, "Port %d phy low-power mode %s\n", |
| 298 | port, (t3 & HOSTPC_PHCD) ? |
| 299 | "succeeded" : "failed"); |
| 300 | } |
| 301 | } |
| 302 | |
| 303 | /* Apparently some devices need a >= 1-uframe delay here */ |
| 304 | if (ehci->bus_suspended) |
| 305 | udelay(150); |
| 306 | |
| 307 | /* turn off now-idle HC */ |
| 308 | ehci_halt (ehci); |
| 309 | ehci->rh_state = EHCI_RH_SUSPENDED; |
| 310 | |
| 311 | if (ehci->reclaim) |
| 312 | end_unlink_async(ehci); |
| 313 | |
| 314 | /* allow remote wakeup */ |
| 315 | mask = INTR_MASK; |
| 316 | if (!hcd->self.root_hub->do_remote_wakeup) |
| 317 | mask &= ~STS_PCD; |
| 318 | ehci_writel(ehci, mask, &ehci->regs->intr_enable); |
| 319 | ehci_readl(ehci, &ehci->regs->intr_enable); |
| 320 | |
| 321 | ehci->next_statechange = jiffies + msecs_to_jiffies(10); |
| 322 | spin_unlock_irq (&ehci->lock); |
| 323 | |
| 324 | /* ehci_work() may have re-enabled the watchdog timer, which we do not |
| 325 | * want, and so we must delete any pending watchdog timer events. |
| 326 | */ |
| 327 | del_timer_sync(&ehci->watchdog); |
| 328 | return 0; |
| 329 | } |
| 330 | |
| 331 | |
| 332 | /* caller has locked the root hub, and should reset/reinit on error */ |
| 333 | static int ehci_bus_resume (struct usb_hcd *hcd) |
| 334 | { |
| 335 | struct ehci_hcd *ehci = hcd_to_ehci (hcd); |
| 336 | u32 temp; |
| 337 | u32 power_okay; |
| 338 | int i; |
| 339 | unsigned long resume_needed = 0; |
| 340 | |
| 341 | if (time_before (jiffies, ehci->next_statechange)) |
| 342 | msleep(5); |
| 343 | spin_lock_irq (&ehci->lock); |
| 344 | if (!HCD_HW_ACCESSIBLE(hcd)) { |
| 345 | spin_unlock_irq(&ehci->lock); |
| 346 | return -ESHUTDOWN; |
| 347 | } |
| 348 | |
| 349 | if (unlikely(ehci->debug)) { |
| 350 | if (!dbgp_reset_prep()) |
| 351 | ehci->debug = NULL; |
| 352 | else |
| 353 | dbgp_external_startup(); |
| 354 | } |
| 355 | |
| 356 | /* Ideally and we've got a real resume here, and no port's power |
| 357 | * was lost. (For PCI, that means Vaux was maintained.) But we |
| 358 | * could instead be restoring a swsusp snapshot -- so that BIOS was |
| 359 | * the last user of the controller, not reset/pm hardware keeping |
| 360 | * state we gave to it. |
| 361 | */ |
| 362 | power_okay = ehci_readl(ehci, &ehci->regs->intr_enable); |
| 363 | ehci_dbg(ehci, "resume root hub%s\n", |
| 364 | power_okay ? "" : " after power loss"); |
| 365 | |
| 366 | /* at least some APM implementations will try to deliver |
| 367 | * IRQs right away, so delay them until we're ready. |
| 368 | */ |
| 369 | ehci_writel(ehci, 0, &ehci->regs->intr_enable); |
| 370 | |
| 371 | /* re-init operational registers */ |
| 372 | ehci_writel(ehci, 0, &ehci->regs->segment); |
| 373 | ehci_writel(ehci, ehci->periodic_dma, &ehci->regs->frame_list); |
| 374 | ehci_writel(ehci, (u32) ehci->async->qh_dma, &ehci->regs->async_next); |
| 375 | |
| 376 | /* restore CMD_RUN, framelist size, and irq threshold */ |
| 377 | ehci_writel(ehci, ehci->command, &ehci->regs->command); |
| 378 | ehci->rh_state = EHCI_RH_RUNNING; |
| 379 | |
| 380 | /* Some controller/firmware combinations need a delay during which |
| 381 | * they set up the port statuses. See Bugzilla #8190. */ |
| 382 | spin_unlock_irq(&ehci->lock); |
| 383 | msleep(8); |
| 384 | spin_lock_irq(&ehci->lock); |
| 385 | |
| 386 | /* clear phy low-power mode before resume */ |
| 387 | if (ehci->bus_suspended && ehci->has_hostpc) { |
| 388 | i = HCS_N_PORTS(ehci->hcs_params); |
| 389 | while (i--) { |
| 390 | if (test_bit(i, &ehci->bus_suspended)) { |
| 391 | u32 __iomem *hostpc_reg; |
| 392 | |
| 393 | hostpc_reg = (u32 __iomem *)((u8 *) ehci->regs |
| 394 | + HOSTPC0 + 4 * i); |
| 395 | temp = ehci_readl(ehci, hostpc_reg); |
| 396 | ehci_writel(ehci, temp & ~HOSTPC_PHCD, |
| 397 | hostpc_reg); |
| 398 | } |
| 399 | } |
| 400 | spin_unlock_irq(&ehci->lock); |
| 401 | msleep(5); |
| 402 | spin_lock_irq(&ehci->lock); |
| 403 | } |
| 404 | |
| 405 | /* manually resume the ports we suspended during bus_suspend() */ |
| 406 | i = HCS_N_PORTS (ehci->hcs_params); |
| 407 | while (i--) { |
| 408 | temp = ehci_readl(ehci, &ehci->regs->port_status [i]); |
| 409 | temp &= ~(PORT_RWC_BITS | PORT_WAKE_BITS); |
| 410 | if (test_bit(i, &ehci->bus_suspended) && |
| 411 | (temp & PORT_SUSPEND)) { |
| 412 | temp |= PORT_RESUME; |
| 413 | set_bit(i, &resume_needed); |
| 414 | } |
| 415 | ehci_writel(ehci, temp, &ehci->regs->port_status [i]); |
| 416 | } |
| 417 | |
| 418 | /* msleep for 20ms only if code is trying to resume port */ |
| 419 | if (resume_needed) { |
| 420 | spin_unlock_irq(&ehci->lock); |
| 421 | msleep(20); |
| 422 | spin_lock_irq(&ehci->lock); |
| 423 | } |
| 424 | |
| 425 | i = HCS_N_PORTS (ehci->hcs_params); |
| 426 | while (i--) { |
| 427 | temp = ehci_readl(ehci, &ehci->regs->port_status [i]); |
| 428 | if (test_bit(i, &resume_needed)) { |
| 429 | temp &= ~(PORT_RWC_BITS | PORT_RESUME); |
| 430 | ehci_writel(ehci, temp, &ehci->regs->port_status [i]); |
| 431 | ehci_vdbg (ehci, "resumed port %d\n", i + 1); |
| 432 | } |
| 433 | } |
| 434 | (void) ehci_readl(ehci, &ehci->regs->command); |
| 435 | |
| 436 | /* maybe re-activate the schedule(s) */ |
| 437 | temp = 0; |
| 438 | if (ehci->async->qh_next.qh) |
| 439 | temp |= CMD_ASE; |
| 440 | if (ehci->periodic_sched) |
| 441 | temp |= CMD_PSE; |
| 442 | if (temp) { |
| 443 | ehci->command |= temp; |
| 444 | ehci_writel(ehci, ehci->command, &ehci->regs->command); |
| 445 | } |
| 446 | |
| 447 | ehci->next_statechange = jiffies + msecs_to_jiffies(5); |
| 448 | |
| 449 | /* Now we can safely re-enable irqs */ |
| 450 | ehci_writel(ehci, INTR_MASK, &ehci->regs->intr_enable); |
| 451 | |
| 452 | spin_unlock_irq (&ehci->lock); |
| 453 | ehci_handover_companion_ports(ehci); |
| 454 | return 0; |
| 455 | } |
| 456 | |
| 457 | #else |
| 458 | |
| 459 | #define ehci_bus_suspend NULL |
| 460 | #define ehci_bus_resume NULL |
| 461 | |
| 462 | #endif /* CONFIG_PM */ |
| 463 | |
| 464 | /*-------------------------------------------------------------------------*/ |
| 465 | |
| 466 | /* |
| 467 | * Sets the owner of a port |
| 468 | */ |
| 469 | static void set_owner(struct ehci_hcd *ehci, int portnum, int new_owner) |
| 470 | { |
| 471 | u32 __iomem *status_reg; |
| 472 | u32 port_status; |
| 473 | int try; |
| 474 | |
| 475 | status_reg = &ehci->regs->port_status[portnum]; |
| 476 | |
| 477 | /* |
| 478 | * The controller won't set the OWNER bit if the port is |
| 479 | * enabled, so this loop will sometimes require at least two |
| 480 | * iterations: one to disable the port and one to set OWNER. |
| 481 | */ |
| 482 | for (try = 4; try > 0; --try) { |
| 483 | spin_lock_irq(&ehci->lock); |
| 484 | port_status = ehci_readl(ehci, status_reg); |
| 485 | if ((port_status & PORT_OWNER) == new_owner |
| 486 | || (port_status & (PORT_OWNER | PORT_CONNECT)) |
| 487 | == 0) |
| 488 | try = 0; |
| 489 | else { |
| 490 | port_status ^= PORT_OWNER; |
| 491 | port_status &= ~(PORT_PE | PORT_RWC_BITS); |
| 492 | ehci_writel(ehci, port_status, status_reg); |
| 493 | } |
| 494 | spin_unlock_irq(&ehci->lock); |
| 495 | if (try > 1) |
| 496 | msleep(5); |
| 497 | } |
| 498 | } |
| 499 | |
| 500 | /*-------------------------------------------------------------------------*/ |
| 501 | |
| 502 | static int check_reset_complete ( |
| 503 | struct ehci_hcd *ehci, |
| 504 | int index, |
| 505 | u32 __iomem *status_reg, |
| 506 | int port_status |
| 507 | ) { |
| 508 | if (!(port_status & PORT_CONNECT)) |
| 509 | return port_status; |
| 510 | |
| 511 | /* if reset finished and it's still not enabled -- handoff */ |
| 512 | if (!(port_status & PORT_PE)) { |
| 513 | |
| 514 | /* with integrated TT, there's nobody to hand it to! */ |
| 515 | if (ehci_is_TDI(ehci)) { |
| 516 | ehci_dbg (ehci, |
| 517 | "Failed to enable port %d on root hub TT\n", |
| 518 | index+1); |
| 519 | return port_status; |
| 520 | } |
| 521 | |
| 522 | ehci_dbg (ehci, "port %d full speed --> companion\n", |
| 523 | index + 1); |
| 524 | |
| 525 | // what happens if HCS_N_CC(params) == 0 ? |
| 526 | port_status |= PORT_OWNER; |
| 527 | port_status &= ~PORT_RWC_BITS; |
| 528 | ehci_writel(ehci, port_status, status_reg); |
| 529 | |
| 530 | /* ensure 440EPX ohci controller state is operational */ |
| 531 | if (ehci->has_amcc_usb23) |
| 532 | set_ohci_hcfs(ehci, 1); |
| 533 | } else { |
| 534 | ehci_dbg (ehci, "port %d high speed\n", index + 1); |
| 535 | /* ensure 440EPx ohci controller state is suspended */ |
| 536 | if (ehci->has_amcc_usb23) |
| 537 | set_ohci_hcfs(ehci, 0); |
| 538 | } |
| 539 | |
| 540 | return port_status; |
| 541 | } |
| 542 | |
| 543 | /*-------------------------------------------------------------------------*/ |
| 544 | |
| 545 | |
| 546 | /* build "status change" packet (one or two bytes) from HC registers */ |
| 547 | |
| 548 | static int |
| 549 | ehci_hub_status_data (struct usb_hcd *hcd, char *buf) |
| 550 | { |
| 551 | struct ehci_hcd *ehci = hcd_to_ehci (hcd); |
| 552 | u32 temp, status; |
| 553 | u32 mask; |
| 554 | int ports, i, retval = 1; |
| 555 | unsigned long flags; |
| 556 | u32 ppcd = 0; |
| 557 | |
| 558 | /* init status to no-changes */ |
| 559 | buf [0] = 0; |
| 560 | ports = HCS_N_PORTS (ehci->hcs_params); |
| 561 | if (ports > 7) { |
| 562 | buf [1] = 0; |
| 563 | retval++; |
| 564 | } |
| 565 | |
| 566 | /* Inform the core about resumes-in-progress by returning |
| 567 | * a non-zero value even if there are no status changes. |
| 568 | */ |
| 569 | status = ehci->resuming_ports; |
| 570 | |
| 571 | /* Some boards (mostly VIA?) report bogus overcurrent indications, |
| 572 | * causing massive log spam unless we completely ignore them. It |
| 573 | * may be relevant that VIA VT8235 controllers, where PORT_POWER is |
| 574 | * always set, seem to clear PORT_OCC and PORT_CSC when writing to |
| 575 | * PORT_POWER; that's surprising, but maybe within-spec. |
| 576 | */ |
| 577 | if (!ignore_oc) |
| 578 | mask = PORT_CSC | PORT_PEC | PORT_OCC; |
| 579 | else |
| 580 | mask = PORT_CSC | PORT_PEC; |
| 581 | // PORT_RESUME from hardware ~= PORT_STAT_C_SUSPEND |
| 582 | |
| 583 | /* no hub change reports (bit 0) for now (power, ...) */ |
| 584 | |
| 585 | /* port N changes (bit N)? */ |
| 586 | spin_lock_irqsave (&ehci->lock, flags); |
| 587 | |
| 588 | /* get per-port change detect bits */ |
| 589 | if (ehci->has_ppcd) |
| 590 | ppcd = ehci_readl(ehci, &ehci->regs->status) >> 16; |
| 591 | |
| 592 | for (i = 0; i < ports; i++) { |
| 593 | /* leverage per-port change bits feature */ |
| 594 | if (ehci->has_ppcd && !(ppcd & (1 << i))) |
| 595 | continue; |
| 596 | temp = ehci_readl(ehci, &ehci->regs->port_status [i]); |
| 597 | |
| 598 | /* |
| 599 | * Return status information even for ports with OWNER set. |
| 600 | * Otherwise khubd wouldn't see the disconnect event when a |
| 601 | * high-speed device is switched over to the companion |
| 602 | * controller by the user. |
| 603 | */ |
| 604 | |
| 605 | if ((temp & mask) != 0 || test_bit(i, &ehci->port_c_suspend) |
| 606 | || (ehci->reset_done[i] && time_after_eq( |
| 607 | jiffies, ehci->reset_done[i]))) { |
| 608 | if (i < 7) |
| 609 | buf [0] |= 1 << (i + 1); |
| 610 | else |
| 611 | buf [1] |= 1 << (i - 7); |
| 612 | status = STS_PCD; |
| 613 | } |
| 614 | } |
| 615 | |
| 616 | /* If a resume is in progress, make sure it can finish */ |
| 617 | if (ehci->resuming_ports) |
| 618 | mod_timer(&hcd->rh_timer, jiffies + msecs_to_jiffies(25)); |
| 619 | |
| 620 | spin_unlock_irqrestore (&ehci->lock, flags); |
| 621 | return status ? retval : 0; |
| 622 | } |
| 623 | |
| 624 | /*-------------------------------------------------------------------------*/ |
| 625 | |
| 626 | static void |
| 627 | ehci_hub_descriptor ( |
| 628 | struct ehci_hcd *ehci, |
| 629 | struct usb_hub_descriptor *desc |
| 630 | ) { |
| 631 | int ports = HCS_N_PORTS (ehci->hcs_params); |
| 632 | u16 temp; |
| 633 | |
| 634 | desc->bDescriptorType = 0x29; |
| 635 | desc->bPwrOn2PwrGood = 10; /* ehci 1.0, 2.3.9 says 20ms max */ |
| 636 | desc->bHubContrCurrent = 0; |
| 637 | |
| 638 | desc->bNbrPorts = ports; |
| 639 | temp = 1 + (ports / 8); |
| 640 | desc->bDescLength = 7 + 2 * temp; |
| 641 | |
| 642 | /* two bitmaps: ports removable, and usb 1.0 legacy PortPwrCtrlMask */ |
| 643 | memset(&desc->u.hs.DeviceRemovable[0], 0, temp); |
| 644 | memset(&desc->u.hs.DeviceRemovable[temp], 0xff, temp); |
| 645 | |
| 646 | temp = 0x0008; /* per-port overcurrent reporting */ |
| 647 | if (HCS_PPC (ehci->hcs_params)) |
| 648 | temp |= 0x0001; /* per-port power control */ |
| 649 | else |
| 650 | temp |= 0x0002; /* no power switching */ |
| 651 | #if 0 |
| 652 | // re-enable when we support USB_PORT_FEAT_INDICATOR below. |
| 653 | if (HCS_INDICATOR (ehci->hcs_params)) |
| 654 | temp |= 0x0080; /* per-port indicators (LEDs) */ |
| 655 | #endif |
| 656 | desc->wHubCharacteristics = cpu_to_le16(temp); |
| 657 | } |
| 658 | |
| 659 | /*-------------------------------------------------------------------------*/ |
| 660 | |
| 661 | static int ehci_hub_control ( |
| 662 | struct usb_hcd *hcd, |
| 663 | u16 typeReq, |
| 664 | u16 wValue, |
| 665 | u16 wIndex, |
| 666 | char *buf, |
| 667 | u16 wLength |
| 668 | ) { |
| 669 | struct ehci_hcd *ehci = hcd_to_ehci (hcd); |
| 670 | int ports = HCS_N_PORTS (ehci->hcs_params); |
| 671 | u32 __iomem *status_reg = &ehci->regs->port_status[ |
| 672 | (wIndex & 0xff) - 1]; |
| 673 | u32 __iomem *hostpc_reg = NULL; |
| 674 | u32 temp, temp1, status; |
| 675 | unsigned long flags; |
| 676 | int retval = 0; |
| 677 | unsigned selector; |
| 678 | |
| 679 | /* |
| 680 | * FIXME: support SetPortFeatures USB_PORT_FEAT_INDICATOR. |
| 681 | * HCS_INDICATOR may say we can change LEDs to off/amber/green. |
| 682 | * (track current state ourselves) ... blink for diagnostics, |
| 683 | * power, "this is the one", etc. EHCI spec supports this. |
| 684 | */ |
| 685 | |
| 686 | if (ehci->has_hostpc) |
| 687 | hostpc_reg = (u32 __iomem *)((u8 *)ehci->regs |
| 688 | + HOSTPC0 + 4 * ((wIndex & 0xff) - 1)); |
| 689 | spin_lock_irqsave (&ehci->lock, flags); |
| 690 | switch (typeReq) { |
| 691 | case ClearHubFeature: |
| 692 | switch (wValue) { |
| 693 | case C_HUB_LOCAL_POWER: |
| 694 | case C_HUB_OVER_CURRENT: |
| 695 | /* no hub-wide feature/status flags */ |
| 696 | break; |
| 697 | default: |
| 698 | goto error; |
| 699 | } |
| 700 | break; |
| 701 | case ClearPortFeature: |
| 702 | if (!wIndex || wIndex > ports) |
| 703 | goto error; |
| 704 | wIndex--; |
| 705 | temp = ehci_readl(ehci, status_reg); |
| 706 | |
| 707 | /* |
| 708 | * Even if OWNER is set, so the port is owned by the |
| 709 | * companion controller, khubd needs to be able to clear |
| 710 | * the port-change status bits (especially |
| 711 | * USB_PORT_STAT_C_CONNECTION). |
| 712 | */ |
| 713 | |
| 714 | switch (wValue) { |
| 715 | case USB_PORT_FEAT_ENABLE: |
| 716 | ehci_writel(ehci, temp & ~PORT_PE, status_reg); |
| 717 | break; |
| 718 | case USB_PORT_FEAT_C_ENABLE: |
| 719 | ehci_writel(ehci, (temp & ~PORT_RWC_BITS) | PORT_PEC, |
| 720 | status_reg); |
| 721 | break; |
| 722 | case USB_PORT_FEAT_SUSPEND: |
| 723 | if (temp & PORT_RESET) |
| 724 | goto error; |
| 725 | if (ehci->no_selective_suspend) |
| 726 | break; |
| 727 | #ifdef CONFIG_USB_OTG |
| 728 | if ((hcd->self.otg_port == (wIndex + 1)) |
| 729 | && hcd->self.b_hnp_enable) { |
| 730 | otg_start_hnp(ehci->transceiver->otg); |
| 731 | break; |
| 732 | } |
| 733 | #endif |
| 734 | if (!(temp & PORT_SUSPEND)) |
| 735 | break; |
| 736 | if ((temp & PORT_PE) == 0) |
| 737 | goto error; |
| 738 | |
| 739 | /* clear phy low-power mode before resume */ |
| 740 | if (hostpc_reg) { |
| 741 | temp1 = ehci_readl(ehci, hostpc_reg); |
| 742 | ehci_writel(ehci, temp1 & ~HOSTPC_PHCD, |
| 743 | hostpc_reg); |
| 744 | spin_unlock_irqrestore(&ehci->lock, flags); |
| 745 | msleep(5);/* wait to leave low-power mode */ |
| 746 | spin_lock_irqsave(&ehci->lock, flags); |
| 747 | } |
| 748 | /* resume signaling for 20 msec */ |
| 749 | temp &= ~(PORT_RWC_BITS | PORT_WAKE_BITS); |
| 750 | ehci_writel(ehci, temp | PORT_RESUME, status_reg); |
| 751 | ehci->reset_done[wIndex] = jiffies |
| 752 | + msecs_to_jiffies(20); |
| 753 | break; |
| 754 | case USB_PORT_FEAT_C_SUSPEND: |
| 755 | clear_bit(wIndex, &ehci->port_c_suspend); |
| 756 | break; |
| 757 | case USB_PORT_FEAT_POWER: |
| 758 | if (HCS_PPC (ehci->hcs_params)) |
| 759 | ehci_writel(ehci, |
| 760 | temp & ~(PORT_RWC_BITS | PORT_POWER), |
| 761 | status_reg); |
| 762 | break; |
| 763 | case USB_PORT_FEAT_C_CONNECTION: |
| 764 | if (ehci->has_lpm) { |
| 765 | /* clear PORTSC bits on disconnect */ |
| 766 | temp &= ~PORT_LPM; |
| 767 | temp &= ~PORT_DEV_ADDR; |
| 768 | } |
| 769 | ehci_writel(ehci, (temp & ~PORT_RWC_BITS) | PORT_CSC, |
| 770 | status_reg); |
| 771 | break; |
| 772 | case USB_PORT_FEAT_C_OVER_CURRENT: |
| 773 | ehci_writel(ehci, (temp & ~PORT_RWC_BITS) | PORT_OCC, |
| 774 | status_reg); |
| 775 | break; |
| 776 | case USB_PORT_FEAT_C_RESET: |
| 777 | /* GetPortStatus clears reset */ |
| 778 | break; |
| 779 | default: |
| 780 | goto error; |
| 781 | } |
| 782 | ehci_readl(ehci, &ehci->regs->command); /* unblock posted write */ |
| 783 | break; |
| 784 | case GetHubDescriptor: |
| 785 | ehci_hub_descriptor (ehci, (struct usb_hub_descriptor *) |
| 786 | buf); |
| 787 | break; |
| 788 | case GetHubStatus: |
| 789 | /* no hub-wide feature/status flags */ |
| 790 | memset (buf, 0, 4); |
| 791 | //cpu_to_le32s ((u32 *) buf); |
| 792 | break; |
| 793 | case GetPortStatus: |
| 794 | if (!wIndex || wIndex > ports) |
| 795 | goto error; |
| 796 | wIndex--; |
| 797 | status = 0; |
| 798 | temp = ehci_readl(ehci, status_reg); |
| 799 | |
| 800 | // wPortChange bits |
| 801 | if (temp & PORT_CSC) |
| 802 | status |= USB_PORT_STAT_C_CONNECTION << 16; |
| 803 | if (temp & PORT_PEC) |
| 804 | status |= USB_PORT_STAT_C_ENABLE << 16; |
| 805 | |
| 806 | if ((temp & PORT_OCC) && !ignore_oc){ |
| 807 | status |= USB_PORT_STAT_C_OVERCURRENT << 16; |
| 808 | |
| 809 | /* |
| 810 | * Hubs should disable port power on over-current. |
| 811 | * However, not all EHCI implementations do this |
| 812 | * automatically, even if they _do_ support per-port |
| 813 | * power switching; they're allowed to just limit the |
| 814 | * current. khubd will turn the power back on. |
| 815 | */ |
| 816 | if ((temp & PORT_OC) && HCS_PPC(ehci->hcs_params)) { |
| 817 | ehci_writel(ehci, |
| 818 | temp & ~(PORT_RWC_BITS | PORT_POWER), |
| 819 | status_reg); |
| 820 | temp = ehci_readl(ehci, status_reg); |
| 821 | } |
| 822 | } |
| 823 | |
| 824 | /* whoever resumes must GetPortStatus to complete it!! */ |
| 825 | if (temp & PORT_RESUME) { |
| 826 | |
| 827 | /* Remote Wakeup received? */ |
| 828 | if (!ehci->reset_done[wIndex]) { |
| 829 | /* resume signaling for 20 msec */ |
| 830 | ehci->reset_done[wIndex] = jiffies |
| 831 | + msecs_to_jiffies(20); |
| 832 | /* check the port again */ |
| 833 | mod_timer(&ehci_to_hcd(ehci)->rh_timer, |
| 834 | ehci->reset_done[wIndex]); |
| 835 | } |
| 836 | |
| 837 | /* resume completed? */ |
| 838 | else if (time_after_eq(jiffies, |
| 839 | ehci->reset_done[wIndex])) { |
| 840 | clear_bit(wIndex, &ehci->suspended_ports); |
| 841 | set_bit(wIndex, &ehci->port_c_suspend); |
| 842 | ehci->reset_done[wIndex] = 0; |
| 843 | |
| 844 | /* stop resume signaling */ |
| 845 | temp = ehci_readl(ehci, status_reg); |
| 846 | ehci_writel(ehci, |
| 847 | temp & ~(PORT_RWC_BITS | PORT_RESUME), |
| 848 | status_reg); |
| 849 | clear_bit(wIndex, &ehci->resuming_ports); |
| 850 | retval = handshake(ehci, status_reg, |
| 851 | PORT_RESUME, 0, 2000 /* 2msec */); |
| 852 | if (retval != 0) { |
| 853 | ehci_err(ehci, |
| 854 | "port %d resume error %d\n", |
| 855 | wIndex + 1, retval); |
| 856 | goto error; |
| 857 | } |
| 858 | temp &= ~(PORT_SUSPEND|PORT_RESUME|(3<<10)); |
| 859 | } |
| 860 | } |
| 861 | |
| 862 | /* whoever resets must GetPortStatus to complete it!! */ |
| 863 | if ((temp & PORT_RESET) |
| 864 | && time_after_eq(jiffies, |
| 865 | ehci->reset_done[wIndex])) { |
| 866 | status |= USB_PORT_STAT_C_RESET << 16; |
| 867 | ehci->reset_done [wIndex] = 0; |
| 868 | clear_bit(wIndex, &ehci->resuming_ports); |
| 869 | |
| 870 | /* force reset to complete */ |
| 871 | ehci_writel(ehci, temp & ~(PORT_RWC_BITS | PORT_RESET), |
| 872 | status_reg); |
| 873 | /* REVISIT: some hardware needs 550+ usec to clear |
| 874 | * this bit; seems too long to spin routinely... |
| 875 | */ |
| 876 | retval = handshake(ehci, status_reg, |
| 877 | PORT_RESET, 0, 1000); |
| 878 | if (retval != 0) { |
| 879 | ehci_err (ehci, "port %d reset error %d\n", |
| 880 | wIndex + 1, retval); |
| 881 | goto error; |
| 882 | } |
| 883 | |
| 884 | /* see what we found out */ |
| 885 | temp = check_reset_complete (ehci, wIndex, status_reg, |
| 886 | ehci_readl(ehci, status_reg)); |
| 887 | } |
| 888 | |
| 889 | if (!(temp & (PORT_RESUME|PORT_RESET))) { |
| 890 | ehci->reset_done[wIndex] = 0; |
| 891 | clear_bit(wIndex, &ehci->resuming_ports); |
| 892 | } |
| 893 | |
| 894 | /* transfer dedicated ports to the companion hc */ |
| 895 | if ((temp & PORT_CONNECT) && |
| 896 | test_bit(wIndex, &ehci->companion_ports)) { |
| 897 | temp &= ~PORT_RWC_BITS; |
| 898 | temp |= PORT_OWNER; |
| 899 | ehci_writel(ehci, temp, status_reg); |
| 900 | ehci_dbg(ehci, "port %d --> companion\n", wIndex + 1); |
| 901 | temp = ehci_readl(ehci, status_reg); |
| 902 | } |
| 903 | |
| 904 | /* |
| 905 | * Even if OWNER is set, there's no harm letting khubd |
| 906 | * see the wPortStatus values (they should all be 0 except |
| 907 | * for PORT_POWER anyway). |
| 908 | */ |
| 909 | |
| 910 | if (temp & PORT_CONNECT) { |
| 911 | status |= USB_PORT_STAT_CONNECTION; |
| 912 | // status may be from integrated TT |
| 913 | if (ehci->has_hostpc) { |
| 914 | temp1 = ehci_readl(ehci, hostpc_reg); |
| 915 | status |= ehci_port_speed(ehci, temp1); |
| 916 | } else |
| 917 | status |= ehci_port_speed(ehci, temp); |
| 918 | } |
| 919 | if (temp & PORT_PE) |
| 920 | status |= USB_PORT_STAT_ENABLE; |
| 921 | |
| 922 | /* maybe the port was unsuspended without our knowledge */ |
| 923 | if (temp & (PORT_SUSPEND|PORT_RESUME)) { |
| 924 | status |= USB_PORT_STAT_SUSPEND; |
| 925 | } else if (test_bit(wIndex, &ehci->suspended_ports)) { |
| 926 | clear_bit(wIndex, &ehci->suspended_ports); |
| 927 | clear_bit(wIndex, &ehci->resuming_ports); |
| 928 | ehci->reset_done[wIndex] = 0; |
| 929 | if (temp & PORT_PE) |
| 930 | set_bit(wIndex, &ehci->port_c_suspend); |
| 931 | } |
| 932 | |
| 933 | if (temp & PORT_OC) |
| 934 | status |= USB_PORT_STAT_OVERCURRENT; |
| 935 | if (temp & PORT_RESET) |
| 936 | status |= USB_PORT_STAT_RESET; |
| 937 | if (temp & PORT_POWER) |
| 938 | status |= USB_PORT_STAT_POWER; |
| 939 | if (test_bit(wIndex, &ehci->port_c_suspend)) |
| 940 | status |= USB_PORT_STAT_C_SUSPEND << 16; |
| 941 | |
| 942 | #ifndef VERBOSE_DEBUG |
| 943 | if (status & ~0xffff) /* only if wPortChange is interesting */ |
| 944 | #endif |
| 945 | dbg_port (ehci, "GetStatus", wIndex + 1, temp); |
| 946 | put_unaligned_le32(status, buf); |
| 947 | break; |
| 948 | case SetHubFeature: |
| 949 | switch (wValue) { |
| 950 | case C_HUB_LOCAL_POWER: |
| 951 | case C_HUB_OVER_CURRENT: |
| 952 | /* no hub-wide feature/status flags */ |
| 953 | break; |
| 954 | default: |
| 955 | goto error; |
| 956 | } |
| 957 | break; |
| 958 | case SetPortFeature: |
| 959 | selector = wIndex >> 8; |
| 960 | wIndex &= 0xff; |
| 961 | if (unlikely(ehci->debug)) { |
| 962 | /* If the debug port is active any port |
| 963 | * feature requests should get denied */ |
| 964 | if (wIndex == HCS_DEBUG_PORT(ehci->hcs_params) && |
| 965 | (readl(&ehci->debug->control) & DBGP_ENABLED)) { |
| 966 | retval = -ENODEV; |
| 967 | goto error_exit; |
| 968 | } |
| 969 | } |
| 970 | if (!wIndex || wIndex > ports) |
| 971 | goto error; |
| 972 | wIndex--; |
| 973 | temp = ehci_readl(ehci, status_reg); |
| 974 | if (temp & PORT_OWNER) |
| 975 | break; |
| 976 | |
| 977 | temp &= ~PORT_RWC_BITS; |
| 978 | switch (wValue) { |
| 979 | case USB_PORT_FEAT_SUSPEND: |
| 980 | if (ehci->no_selective_suspend) |
| 981 | break; |
| 982 | if ((temp & PORT_PE) == 0 |
| 983 | || (temp & PORT_RESET) != 0) |
| 984 | goto error; |
| 985 | |
| 986 | /* After above check the port must be connected. |
| 987 | * Set appropriate bit thus could put phy into low power |
| 988 | * mode if we have hostpc feature |
| 989 | */ |
| 990 | temp &= ~PORT_WKCONN_E; |
| 991 | temp |= PORT_WKDISC_E | PORT_WKOC_E; |
| 992 | ehci_writel(ehci, temp | PORT_SUSPEND, status_reg); |
| 993 | if (hostpc_reg) { |
| 994 | spin_unlock_irqrestore(&ehci->lock, flags); |
| 995 | msleep(5);/* 5ms for HCD enter low pwr mode */ |
| 996 | spin_lock_irqsave(&ehci->lock, flags); |
| 997 | temp1 = ehci_readl(ehci, hostpc_reg); |
| 998 | ehci_writel(ehci, temp1 | HOSTPC_PHCD, |
| 999 | hostpc_reg); |
| 1000 | temp1 = ehci_readl(ehci, hostpc_reg); |
| 1001 | ehci_dbg(ehci, "Port%d phy low pwr mode %s\n", |
| 1002 | wIndex, (temp1 & HOSTPC_PHCD) ? |
| 1003 | "succeeded" : "failed"); |
| 1004 | } |
| 1005 | set_bit(wIndex, &ehci->suspended_ports); |
| 1006 | break; |
| 1007 | case USB_PORT_FEAT_POWER: |
| 1008 | if (HCS_PPC (ehci->hcs_params)) |
| 1009 | ehci_writel(ehci, temp | PORT_POWER, |
| 1010 | status_reg); |
| 1011 | break; |
| 1012 | case USB_PORT_FEAT_RESET: |
| 1013 | if (temp & PORT_RESUME) |
| 1014 | goto error; |
| 1015 | /* line status bits may report this as low speed, |
| 1016 | * which can be fine if this root hub has a |
| 1017 | * transaction translator built in. |
| 1018 | */ |
| 1019 | if ((temp & (PORT_PE|PORT_CONNECT)) == PORT_CONNECT |
| 1020 | && !ehci_is_TDI(ehci) |
| 1021 | && PORT_USB11 (temp)) { |
| 1022 | ehci_dbg (ehci, |
| 1023 | "port %d low speed --> companion\n", |
| 1024 | wIndex + 1); |
| 1025 | temp |= PORT_OWNER; |
| 1026 | } else { |
| 1027 | ehci_vdbg (ehci, "port %d reset\n", wIndex + 1); |
| 1028 | temp |= PORT_RESET; |
| 1029 | temp &= ~PORT_PE; |
| 1030 | |
| 1031 | /* |
| 1032 | * caller must wait, then call GetPortStatus |
| 1033 | * usb 2.0 spec says 50 ms resets on root |
| 1034 | */ |
| 1035 | ehci->reset_done [wIndex] = jiffies |
| 1036 | + msecs_to_jiffies (50); |
| 1037 | } |
| 1038 | ehci_writel(ehci, temp, status_reg); |
| 1039 | break; |
| 1040 | |
| 1041 | /* For downstream facing ports (these): one hub port is put |
| 1042 | * into test mode according to USB2 11.24.2.13, then the hub |
| 1043 | * must be reset (which for root hub now means rmmod+modprobe, |
| 1044 | * or else system reboot). See EHCI 2.3.9 and 4.14 for info |
| 1045 | * about the EHCI-specific stuff. |
| 1046 | */ |
| 1047 | case USB_PORT_FEAT_TEST: |
| 1048 | if (!selector || selector > 5) |
| 1049 | goto error; |
| 1050 | ehci_quiesce(ehci); |
| 1051 | |
| 1052 | /* Put all enabled ports into suspend */ |
| 1053 | while (ports--) { |
| 1054 | u32 __iomem *sreg = |
| 1055 | &ehci->regs->port_status[ports]; |
| 1056 | |
| 1057 | temp = ehci_readl(ehci, sreg) & ~PORT_RWC_BITS; |
| 1058 | if (temp & PORT_PE) |
| 1059 | ehci_writel(ehci, temp | PORT_SUSPEND, |
| 1060 | sreg); |
| 1061 | } |
| 1062 | ehci_halt(ehci); |
| 1063 | temp = ehci_readl(ehci, status_reg); |
| 1064 | temp |= selector << 16; |
| 1065 | ehci_writel(ehci, temp, status_reg); |
| 1066 | break; |
| 1067 | |
| 1068 | default: |
| 1069 | goto error; |
| 1070 | } |
| 1071 | ehci_readl(ehci, &ehci->regs->command); /* unblock posted writes */ |
| 1072 | break; |
| 1073 | |
| 1074 | default: |
| 1075 | error: |
| 1076 | /* "stall" on error */ |
| 1077 | retval = -EPIPE; |
| 1078 | } |
| 1079 | error_exit: |
| 1080 | spin_unlock_irqrestore (&ehci->lock, flags); |
| 1081 | return retval; |
| 1082 | } |
| 1083 | |
| 1084 | static void __maybe_unused ehci_relinquish_port(struct usb_hcd *hcd, |
| 1085 | int portnum) |
| 1086 | { |
| 1087 | struct ehci_hcd *ehci = hcd_to_ehci(hcd); |
| 1088 | |
| 1089 | if (ehci_is_TDI(ehci)) |
| 1090 | return; |
| 1091 | set_owner(ehci, --portnum, PORT_OWNER); |
| 1092 | } |
| 1093 | |
| 1094 | static int __maybe_unused ehci_port_handed_over(struct usb_hcd *hcd, |
| 1095 | int portnum) |
| 1096 | { |
| 1097 | struct ehci_hcd *ehci = hcd_to_ehci(hcd); |
| 1098 | u32 __iomem *reg; |
| 1099 | |
| 1100 | if (ehci_is_TDI(ehci)) |
| 1101 | return 0; |
| 1102 | reg = &ehci->regs->port_status[portnum - 1]; |
| 1103 | return ehci_readl(ehci, reg) & PORT_OWNER; |
| 1104 | } |