blob: 9ae41d25838163418fc4a37e3bd9bddf130854bb [file] [log] [blame]
yuezonghe824eb0c2024-06-27 02:32:26 -07001/*
2 * Copyright (C) 2001-2004 by David Brownell
3 *
4 * This program is free software; you can redistribute it and/or modify it
5 * under the terms of the GNU General Public License as published by the
6 * Free Software Foundation; either version 2 of the License, or (at your
7 * option) any later version.
8 *
9 * This program is distributed in the hope that it will be useful, but
10 * WITHOUT ANY WARRANTY; without even the implied warranty of MERCHANTABILITY
11 * or FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
12 * for more details.
13 *
14 * You should have received a copy of the GNU General Public License
15 * along with this program; if not, write to the Free Software Foundation,
16 * Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
17 */
18
19/* this file is part of ehci-hcd.c */
20
21/*-------------------------------------------------------------------------*/
22
23/*
24 * EHCI hardware queue manipulation ... the core. QH/QTD manipulation.
25 *
26 * Control, bulk, and interrupt traffic all use "qh" lists. They list "qtd"
27 * entries describing USB transactions, max 16-20kB/entry (with 4kB-aligned
28 * buffers needed for the larger number). We use one QH per endpoint, queue
29 * multiple urbs (all three types) per endpoint. URBs may need several qtds.
30 *
31 * ISO traffic uses "ISO TD" (itd, and sitd) records, and (along with
32 * interrupts) needs careful scheduling. Performance improvements can be
33 * an ongoing challenge. That's in "ehci-sched.c".
34 *
35 * USB 1.1 devices are handled (a) by "companion" OHCI or UHCI root hubs,
36 * or otherwise through transaction translators (TTs) in USB 2.0 hubs using
37 * (b) special fields in qh entries or (c) split iso entries. TTs will
38 * buffer low/full speed data so the host collects it at high speed.
39 */
40
41/*-------------------------------------------------------------------------*/
42
43/* fill a qtd, returning how much of the buffer we were able to queue up */
44
45static int
46qtd_fill(struct ehci_hcd *ehci, struct ehci_qtd *qtd, dma_addr_t buf,
47 size_t len, int token, int maxpacket)
48{
49 int i, count;
50 u64 addr = buf;
51
52 /* one buffer entry per 4K ... first might be short or unaligned */
53 qtd->hw_buf[0] = cpu_to_hc32(ehci, (u32)addr);
54 qtd->hw_buf_hi[0] = cpu_to_hc32(ehci, (u32)(addr >> 32));
55 count = 0x1000 - (buf & 0x0fff); /* rest of that page */
56 if (likely (len < count)) /* ... iff needed */
57 count = len;
58 else {
59 buf += 0x1000;
60 buf &= ~0x0fff;
61
62 /* per-qtd limit: from 16K to 20K (best alignment) */
63 for (i = 1; count < len && i < 5; i++) {
64 addr = buf;
65 qtd->hw_buf[i] = cpu_to_hc32(ehci, (u32)addr);
66 qtd->hw_buf_hi[i] = cpu_to_hc32(ehci,
67 (u32)(addr >> 32));
68 buf += 0x1000;
69 if ((count + 0x1000) < len)
70 count += 0x1000;
71 else
72 count = len;
73 }
74
75 /* short packets may only terminate transfers */
76 if (count != len)
77 count -= (count % maxpacket);
78 }
79 qtd->hw_token = cpu_to_hc32(ehci, (count << 16) | token);
80 qtd->length = count;
81
82 return count;
83}
84
85/*-------------------------------------------------------------------------*/
86
87static inline void
88qh_update (struct ehci_hcd *ehci, struct ehci_qh *qh, struct ehci_qtd *qtd)
89{
90 struct ehci_qh_hw *hw = qh->hw;
91
92 /* writes to an active overlay are unsafe */
93 BUG_ON(qh->qh_state != QH_STATE_IDLE);
94
95 hw->hw_qtd_next = QTD_NEXT(ehci, qtd->qtd_dma);
96 hw->hw_alt_next = EHCI_LIST_END(ehci);
97
98 /* Except for control endpoints, we make hardware maintain data
99 * toggle (like OHCI) ... here (re)initialize the toggle in the QH,
100 * and set the pseudo-toggle in udev. Only usb_clear_halt() will
101 * ever clear it.
102 */
103 if (!(hw->hw_info1 & cpu_to_hc32(ehci, 1 << 14))) {
104 unsigned is_out, epnum;
105
106 is_out = qh->is_out;
107 epnum = (hc32_to_cpup(ehci, &hw->hw_info1) >> 8) & 0x0f;
108 if (unlikely (!usb_gettoggle (qh->dev, epnum, is_out))) {
109 hw->hw_token &= ~cpu_to_hc32(ehci, QTD_TOGGLE);
110 usb_settoggle (qh->dev, epnum, is_out, 1);
111 }
112 }
113
114 hw->hw_token &= cpu_to_hc32(ehci, QTD_TOGGLE | QTD_STS_PING);
115}
116
117/* if it weren't for a common silicon quirk (writing the dummy into the qh
118 * overlay, so qh->hw_token wrongly becomes inactive/halted), only fault
119 * recovery (including urb dequeue) would need software changes to a QH...
120 */
121static void
122qh_refresh (struct ehci_hcd *ehci, struct ehci_qh *qh)
123{
124 struct ehci_qtd *qtd;
125
126 if (list_empty (&qh->qtd_list))
127 qtd = qh->dummy;
128 else {
129 qtd = list_entry (qh->qtd_list.next,
130 struct ehci_qtd, qtd_list);
131 /*
132 * first qtd may already be partially processed.
133 * If we come here during unlink, the QH overlay region
134 * might have reference to the just unlinked qtd. The
135 * qtd is updated in qh_completions(). Update the QH
136 * overlay here.
137 */
138 if (cpu_to_hc32(ehci, qtd->qtd_dma) == qh->hw->hw_current) {
139 qh->hw->hw_qtd_next = qtd->hw_next;
140 qtd = NULL;
141 }
142 }
143
144 if (qtd)
145 qh_update (ehci, qh, qtd);
146}
147
148/*-------------------------------------------------------------------------*/
149
150static void qh_link_async(struct ehci_hcd *ehci, struct ehci_qh *qh);
151
152static void ehci_clear_tt_buffer_complete(struct usb_hcd *hcd,
153 struct usb_host_endpoint *ep)
154{
155 struct ehci_hcd *ehci = hcd_to_ehci(hcd);
156 struct ehci_qh *qh = ep->hcpriv;
157 unsigned long flags;
158
159 spin_lock_irqsave(&ehci->lock, flags);
160 qh->clearing_tt = 0;
161 if (qh->qh_state == QH_STATE_IDLE && !list_empty(&qh->qtd_list)
162 && ehci->rh_state == EHCI_RH_RUNNING)
163 qh_link_async(ehci, qh);
164 spin_unlock_irqrestore(&ehci->lock, flags);
165}
166
167static void ehci_clear_tt_buffer(struct ehci_hcd *ehci, struct ehci_qh *qh,
168 struct urb *urb, u32 token)
169{
170
171 /* If an async split transaction gets an error or is unlinked,
172 * the TT buffer may be left in an indeterminate state. We
173 * have to clear the TT buffer.
174 *
175 * Note: this routine is never called for Isochronous transfers.
176 */
177 if (urb->dev->tt && !usb_pipeint(urb->pipe) && !qh->clearing_tt) {
178#ifdef DEBUG
179 struct usb_device *tt = urb->dev->tt->hub;
180 dev_dbg(&tt->dev,
181 "clear tt buffer port %d, a%d ep%d t%08x\n",
182 urb->dev->ttport, urb->dev->devnum,
183 usb_pipeendpoint(urb->pipe), token);
184#endif /* DEBUG */
185 if (!ehci_is_TDI(ehci)
186 || urb->dev->tt->hub !=
187 ehci_to_hcd(ehci)->self.root_hub) {
188 if (usb_hub_clear_tt_buffer(urb) == 0)
189 qh->clearing_tt = 1;
190 } else {
191
192 /* REVISIT ARC-derived cores don't clear the root
193 * hub TT buffer in this way...
194 */
195 }
196 }
197}
198
199static int qtd_copy_status (
200 struct ehci_hcd *ehci,
201 struct urb *urb,
202 size_t length,
203 u32 token
204)
205{
206 int status = -EINPROGRESS;
207
208 /* count IN/OUT bytes, not SETUP (even short packets) */
209 if (likely (QTD_PID (token) != 2))
210 urb->actual_length += length - QTD_LENGTH (token);
211
212 /* don't modify error codes */
213 if (unlikely(urb->unlinked))
214 return status;
215
216 /* force cleanup after short read; not always an error */
217 if (unlikely (IS_SHORT_READ (token)))
218 status = -EREMOTEIO;
219
220 /* serious "can't proceed" faults reported by the hardware */
221 if (token & QTD_STS_HALT) {
222 if (token & QTD_STS_BABBLE) {
223 /* FIXME "must" disable babbling device's port too */
224 status = -EOVERFLOW;
225 /* CERR nonzero + halt --> stall */
226 } else if (QTD_CERR(token)) {
227 status = -EPIPE;
228
229 /* In theory, more than one of the following bits can be set
230 * since they are sticky and the transaction is retried.
231 * Which to test first is rather arbitrary.
232 */
233 } else if (token & QTD_STS_MMF) {
234 /* fs/ls interrupt xfer missed the complete-split */
235 status = -EPROTO;
236 } else if (token & QTD_STS_DBE) {
237 status = (QTD_PID (token) == 1) /* IN ? */
238 ? -ENOSR /* hc couldn't read data */
239 : -ECOMM; /* hc couldn't write data */
240 } else if (token & QTD_STS_XACT) {
241 /* timeout, bad CRC, wrong PID, etc */
242 ehci_dbg(ehci, "devpath %s ep%d%s 3strikes\n",
243 urb->dev->devpath,
244 usb_pipeendpoint(urb->pipe),
245 usb_pipein(urb->pipe) ? "in" : "out");
246 status = -EPROTO;
247 } else { /* unknown */
248 status = -EPROTO;
249 }
250
251 ehci_vdbg (ehci,
252 "dev%d ep%d%s qtd token %08x --> status %d\n",
253 usb_pipedevice (urb->pipe),
254 usb_pipeendpoint (urb->pipe),
255 usb_pipein (urb->pipe) ? "in" : "out",
256 token, status);
257 }
258
259 return status;
260}
261
262static void
263ehci_urb_done(struct ehci_hcd *ehci, struct urb *urb, int status)
264__releases(ehci->lock)
265__acquires(ehci->lock)
266{
267 if (usb_pipetype(urb->pipe) == PIPE_INTERRUPT) {
268 /* ... update hc-wide periodic stats */
269 ehci_to_hcd(ehci)->self.bandwidth_int_reqs--;
270 }
271
272 if (usb_pipetype(urb->pipe) != PIPE_ISOCHRONOUS)
273 qh_put((struct ehci_qh *) urb->hcpriv);
274
275 if (unlikely(urb->unlinked)) {
276 COUNT(ehci->stats.unlink);
277 } else {
278 /* report non-error and short read status as zero */
279 if (status == -EINPROGRESS || status == -EREMOTEIO)
280 status = 0;
281 COUNT(ehci->stats.complete);
282 }
283
284#ifdef EHCI_URB_TRACE
285 ehci_dbg (ehci,
286 "%s %s urb %p ep%d%s status %d len %d/%d\n",
287 __func__, urb->dev->devpath, urb,
288 usb_pipeendpoint (urb->pipe),
289 usb_pipein (urb->pipe) ? "in" : "out",
290 status,
291 urb->actual_length, urb->transfer_buffer_length);
292#endif
293
294 /* complete() can reenter this HCD */
295 usb_hcd_unlink_urb_from_ep(ehci_to_hcd(ehci), urb);
296 spin_unlock (&ehci->lock);
297 usb_hcd_giveback_urb(ehci_to_hcd(ehci), urb, status);
298 spin_lock (&ehci->lock);
299}
300
301static void start_unlink_async (struct ehci_hcd *ehci, struct ehci_qh *qh);
302static void unlink_async (struct ehci_hcd *ehci, struct ehci_qh *qh);
303
304static int qh_schedule (struct ehci_hcd *ehci, struct ehci_qh *qh);
305
306/*
307 * Process and free completed qtds for a qh, returning URBs to drivers.
308 * Chases up to qh->hw_current. Returns number of completions called,
309 * indicating how much "real" work we did.
310 */
311static unsigned
312qh_completions (struct ehci_hcd *ehci, struct ehci_qh *qh)
313{
314 struct ehci_qtd *last, *end = qh->dummy;
315 struct list_head *entry, *tmp;
316 int last_status;
317 int stopped;
318 unsigned count = 0;
319 u8 state;
320 struct ehci_qh_hw *hw = qh->hw;
321
322 if (unlikely (list_empty (&qh->qtd_list)))
323 return count;
324
325 /* completions (or tasks on other cpus) must never clobber HALT
326 * till we've gone through and cleaned everything up, even when
327 * they add urbs to this qh's queue or mark them for unlinking.
328 *
329 * NOTE: unlinking expects to be done in queue order.
330 *
331 * It's a bug for qh->qh_state to be anything other than
332 * QH_STATE_IDLE, unless our caller is scan_async() or
333 * scan_periodic().
334 */
335 state = qh->qh_state;
336 qh->qh_state = QH_STATE_COMPLETING;
337 stopped = (state == QH_STATE_IDLE);
338
339 rescan:
340 last = NULL;
341 last_status = -EINPROGRESS;
342 qh->needs_rescan = 0;
343
344 /* remove de-activated QTDs from front of queue.
345 * after faults (including short reads), cleanup this urb
346 * then let the queue advance.
347 * if queue is stopped, handles unlinks.
348 */
349 list_for_each_safe (entry, tmp, &qh->qtd_list) {
350 struct ehci_qtd *qtd;
351 struct urb *urb;
352 u32 token = 0;
353
354 qtd = list_entry (entry, struct ehci_qtd, qtd_list);
355 urb = qtd->urb;
356
357 /* clean up any state from previous QTD ...*/
358 if (last) {
359 if (likely (last->urb != urb)) {
360 ehci_urb_done(ehci, last->urb, last_status);
361 count++;
362 last_status = -EINPROGRESS;
363 }
364 ehci_qtd_free (ehci, last);
365 last = NULL;
366 }
367
368 /* ignore urbs submitted during completions we reported */
369 if (qtd == end)
370 break;
371
372 /* hardware copies qtd out of qh overlay */
373 rmb ();
374 token = hc32_to_cpu(ehci, qtd->hw_token);
375
376 /* always clean up qtds the hc de-activated */
377 retry_xacterr:
378 if ((token & QTD_STS_ACTIVE) == 0) {
379
380 /* Report Data Buffer Error: non-fatal but useful */
381 if (token & QTD_STS_DBE)
382 ehci_dbg(ehci,
383 "detected DataBufferErr for urb %p ep%d%s len %d, qtd %p [qh %p]\n",
384 urb,
385 usb_endpoint_num(&urb->ep->desc),
386 usb_endpoint_dir_in(&urb->ep->desc) ? "in" : "out",
387 urb->transfer_buffer_length,
388 qtd,
389 qh);
390
391 /* on STALL, error, and short reads this urb must
392 * complete and all its qtds must be recycled.
393 */
394 if ((token & QTD_STS_HALT) != 0) {
395
396 /* retry transaction errors until we
397 * reach the software xacterr limit
398 */
399 if ((token & QTD_STS_XACT) &&
400 QTD_CERR(token) == 0 &&
401 ++qh->xacterrs < QH_XACTERR_MAX &&
402 !urb->unlinked) {
403 ehci_dbg(ehci,
404 "detected XactErr len %zu/%zu retry %d\n",
405 qtd->length - QTD_LENGTH(token), qtd->length, qh->xacterrs);
406
407 /* reset the token in the qtd and the
408 * qh overlay (which still contains
409 * the qtd) so that we pick up from
410 * where we left off
411 */
412 token &= ~QTD_STS_HALT;
413 token |= QTD_STS_ACTIVE |
414 (EHCI_TUNE_CERR << 10);
415 qtd->hw_token = cpu_to_hc32(ehci,
416 token);
417 wmb();
418 hw->hw_token = cpu_to_hc32(ehci,
419 token);
420 goto retry_xacterr;
421 }
422 stopped = 1;
423
424 /* magic dummy for some short reads; qh won't advance.
425 * that silicon quirk can kick in with this dummy too.
426 *
427 * other short reads won't stop the queue, including
428 * control transfers (status stage handles that) or
429 * most other single-qtd reads ... the queue stops if
430 * URB_SHORT_NOT_OK was set so the driver submitting
431 * the urbs could clean it up.
432 */
433 } else if (IS_SHORT_READ (token)
434 && !(qtd->hw_alt_next
435 & EHCI_LIST_END(ehci))) {
436 stopped = 1;
437 }
438
439 /* stop scanning when we reach qtds the hc is using */
440 } else if (likely (!stopped
441 && ehci->rh_state == EHCI_RH_RUNNING)) {
442 break;
443
444 /* scan the whole queue for unlinks whenever it stops */
445 } else {
446 stopped = 1;
447
448 /* cancel everything if we halt, suspend, etc */
449 if (ehci->rh_state != EHCI_RH_RUNNING)
450 last_status = -ESHUTDOWN;
451
452 /* this qtd is active; skip it unless a previous qtd
453 * for its urb faulted, or its urb was canceled.
454 */
455 else if (last_status == -EINPROGRESS && !urb->unlinked)
456 continue;
457
458 /* qh unlinked; token in overlay may be most current */
459 if (state == QH_STATE_IDLE
460 && cpu_to_hc32(ehci, qtd->qtd_dma)
461 == hw->hw_current) {
462 token = hc32_to_cpu(ehci, hw->hw_token);
463
464 /* An unlink may leave an incomplete
465 * async transaction in the TT buffer.
466 * We have to clear it.
467 */
468 ehci_clear_tt_buffer(ehci, qh, urb, token);
469 }
470 }
471
472 /* unless we already know the urb's status, collect qtd status
473 * and update count of bytes transferred. in common short read
474 * cases with only one data qtd (including control transfers),
475 * queue processing won't halt. but with two or more qtds (for
476 * example, with a 32 KB transfer), when the first qtd gets a
477 * short read the second must be removed by hand.
478 */
479 if (last_status == -EINPROGRESS) {
480 last_status = qtd_copy_status(ehci, urb,
481 qtd->length, token);
482 if (last_status == -EREMOTEIO
483 && (qtd->hw_alt_next
484 & EHCI_LIST_END(ehci)))
485 last_status = -EINPROGRESS;
486
487 /* As part of low/full-speed endpoint-halt processing
488 * we must clear the TT buffer (11.17.5).
489 */
490 if (unlikely(last_status != -EINPROGRESS &&
491 last_status != -EREMOTEIO)) {
492 /* The TT's in some hubs malfunction when they
493 * receive this request following a STALL (they
494 * stop sending isochronous packets). Since a
495 * STALL can't leave the TT buffer in a busy
496 * state (if you believe Figures 11-48 - 11-51
497 * in the USB 2.0 spec), we won't clear the TT
498 * buffer in this case. Strictly speaking this
499 * is a violation of the spec.
500 */
501 if (last_status != -EPIPE)
502 ehci_clear_tt_buffer(ehci, qh, urb,
503 token);
504 }
505 }
506
507 /* if we're removing something not at the queue head,
508 * patch the hardware queue pointer.
509 */
510 if (stopped && qtd->qtd_list.prev != &qh->qtd_list) {
511 last = list_entry (qtd->qtd_list.prev,
512 struct ehci_qtd, qtd_list);
513 last->hw_next = qtd->hw_next;
514 }
515
516 /* remove qtd; it's recycled after possible urb completion */
517 list_del (&qtd->qtd_list);
518 last = qtd;
519
520 /* reinit the xacterr counter for the next qtd */
521 qh->xacterrs = 0;
522 }
523
524 /* last urb's completion might still need calling */
525 if (likely (last != NULL)) {
526 ehci_urb_done(ehci, last->urb, last_status);
527 count++;
528 ehci_qtd_free (ehci, last);
529 }
530
531 /* Do we need to rescan for URBs dequeued during a giveback? */
532 if (unlikely(qh->needs_rescan)) {
533 /* If the QH is already unlinked, do the rescan now. */
534 if (state == QH_STATE_IDLE)
535 goto rescan;
536
537 /* Otherwise we have to wait until the QH is fully unlinked.
538 * Our caller will start an unlink if qh->needs_rescan is
539 * set. But if an unlink has already started, nothing needs
540 * to be done.
541 */
542 if (state != QH_STATE_LINKED)
543 qh->needs_rescan = 0;
544 }
545
546 /* restore original state; caller must unlink or relink */
547 qh->qh_state = state;
548
549 /* be sure the hardware's done with the qh before refreshing
550 * it after fault cleanup, or recovering from silicon wrongly
551 * overlaying the dummy qtd (which reduces DMA chatter).
552 */
553 if (stopped != 0 || hw->hw_qtd_next == EHCI_LIST_END(ehci)) {
554 switch (state) {
555 case QH_STATE_IDLE:
556 qh_refresh(ehci, qh);
557 break;
558 case QH_STATE_LINKED:
559 /* We won't refresh a QH that's linked (after the HC
560 * stopped the queue). That avoids a race:
561 * - HC reads first part of QH;
562 * - CPU updates that first part and the token;
563 * - HC reads rest of that QH, including token
564 * Result: HC gets an inconsistent image, and then
565 * DMAs to/from the wrong memory (corrupting it).
566 *
567 * That should be rare for interrupt transfers,
568 * except maybe high bandwidth ...
569 */
570
571 /* Tell the caller to start an unlink */
572 qh->needs_rescan = 1;
573 break;
574 /* otherwise, unlink already started */
575 }
576 }
577
578 return count;
579}
580
581/*-------------------------------------------------------------------------*/
582
583// high bandwidth multiplier, as encoded in highspeed endpoint descriptors
584#define hb_mult(wMaxPacketSize) (1 + (((wMaxPacketSize) >> 11) & 0x03))
585// ... and packet size, for any kind of endpoint descriptor
586#define max_packet(wMaxPacketSize) ((wMaxPacketSize) & 0x07ff)
587
588/*
589 * reverse of qh_urb_transaction: free a list of TDs.
590 * used for cleanup after errors, before HC sees an URB's TDs.
591 */
592static void qtd_list_free (
593 struct ehci_hcd *ehci,
594 struct urb *urb,
595 struct list_head *qtd_list
596) {
597 struct list_head *entry, *temp;
598
599 list_for_each_safe (entry, temp, qtd_list) {
600 struct ehci_qtd *qtd;
601
602 qtd = list_entry (entry, struct ehci_qtd, qtd_list);
603 list_del (&qtd->qtd_list);
604 ehci_qtd_free (ehci, qtd);
605 }
606}
607
608/*
609 * create a list of filled qtds for this URB; won't link into qh.
610 */
611static struct list_head *
612qh_urb_transaction (
613 struct ehci_hcd *ehci,
614 struct urb *urb,
615 struct list_head *head,
616 gfp_t flags
617) {
618 struct ehci_qtd *qtd, *qtd_prev;
619 dma_addr_t buf;
620 int len, this_sg_len, maxpacket;
621 int is_input;
622 u32 token;
623 int i;
624 struct scatterlist *sg;
625
626 /*
627 * URBs map to sequences of QTDs: one logical transaction
628 */
629 qtd = ehci_qtd_alloc (ehci, flags);
630 if (unlikely (!qtd))
631 return NULL;
632 list_add_tail (&qtd->qtd_list, head);
633 qtd->urb = urb;
634
635 token = QTD_STS_ACTIVE;
636 token |= (EHCI_TUNE_CERR << 10);
637 /* for split transactions, SplitXState initialized to zero */
638
639 len = urb->transfer_buffer_length;
640 is_input = usb_pipein (urb->pipe);
641 if (usb_pipecontrol (urb->pipe)) {
642 /* SETUP pid */
643 qtd_fill(ehci, qtd, urb->setup_dma,
644 sizeof (struct usb_ctrlrequest),
645 token | (2 /* "setup" */ << 8), 8);
646
647 /* ... and always at least one more pid */
648 token ^= QTD_TOGGLE;
649 qtd_prev = qtd;
650 qtd = ehci_qtd_alloc (ehci, flags);
651 if (unlikely (!qtd))
652 goto cleanup;
653 qtd->urb = urb;
654 qtd_prev->hw_next = QTD_NEXT(ehci, qtd->qtd_dma);
655 list_add_tail (&qtd->qtd_list, head);
656
657 /* for zero length DATA stages, STATUS is always IN */
658 if (len == 0)
659 token |= (1 /* "in" */ << 8);
660 }
661
662 /*
663 * data transfer stage: buffer setup
664 */
665 i = urb->num_mapped_sgs;
666 if (len > 0 && i > 0) {
667 sg = urb->sg;
668 buf = sg_dma_address(sg);
669
670 /* urb->transfer_buffer_length may be smaller than the
671 * size of the scatterlist (or vice versa)
672 */
673 this_sg_len = min_t(int, sg_dma_len(sg), len);
674 } else {
675 sg = NULL;
676 buf = urb->transfer_dma;
677 this_sg_len = len;
678 }
679
680 if (is_input)
681 token |= (1 /* "in" */ << 8);
682 /* else it's already initted to "out" pid (0 << 8) */
683
684 maxpacket = max_packet(usb_maxpacket(urb->dev, urb->pipe, !is_input));
685
686 /*
687 * buffer gets wrapped in one or more qtds;
688 * last one may be "short" (including zero len)
689 * and may serve as a control status ack
690 */
691 for (;;) {
692 int this_qtd_len;
693
694 this_qtd_len = qtd_fill(ehci, qtd, buf, this_sg_len, token,
695 maxpacket);
696 this_sg_len -= this_qtd_len;
697 len -= this_qtd_len;
698 buf += this_qtd_len;
699
700 /*
701 * short reads advance to a "magic" dummy instead of the next
702 * qtd ... that forces the queue to stop, for manual cleanup.
703 * (this will usually be overridden later.)
704 */
705 if (is_input)
706 qtd->hw_alt_next = ehci->async->hw->hw_alt_next;
707
708 /* qh makes control packets use qtd toggle; maybe switch it */
709 if ((maxpacket & (this_qtd_len + (maxpacket - 1))) == 0)
710 token ^= QTD_TOGGLE;
711
712 if (likely(this_sg_len <= 0)) {
713 if (--i <= 0 || len <= 0)
714 break;
715 sg = sg_next(sg);
716 buf = sg_dma_address(sg);
717 this_sg_len = min_t(int, sg_dma_len(sg), len);
718 }
719
720 qtd_prev = qtd;
721 qtd = ehci_qtd_alloc (ehci, flags);
722 if (unlikely (!qtd))
723 goto cleanup;
724 qtd->urb = urb;
725 qtd_prev->hw_next = QTD_NEXT(ehci, qtd->qtd_dma);
726 list_add_tail (&qtd->qtd_list, head);
727 }
728
729 /*
730 * unless the caller requires manual cleanup after short reads,
731 * have the alt_next mechanism keep the queue running after the
732 * last data qtd (the only one, for control and most other cases).
733 */
734 if (likely ((urb->transfer_flags & URB_SHORT_NOT_OK) == 0
735 || usb_pipecontrol (urb->pipe)))
736 qtd->hw_alt_next = EHCI_LIST_END(ehci);
737
738 /*
739 * control requests may need a terminating data "status" ack;
740 * other OUT ones may need a terminating short packet
741 * (zero length).
742 */
743 if (likely (urb->transfer_buffer_length != 0)) {
744 int one_more = 0;
745
746 if (usb_pipecontrol (urb->pipe)) {
747 one_more = 1;
748 token ^= 0x0100; /* "in" <--> "out" */
749 token |= QTD_TOGGLE; /* force DATA1 */
750 } else if (usb_pipeout(urb->pipe)
751 && (urb->transfer_flags & URB_ZERO_PACKET)
752 && !(urb->transfer_buffer_length % maxpacket)) {
753 one_more = 1;
754 }
755 if (one_more) {
756 qtd_prev = qtd;
757 qtd = ehci_qtd_alloc (ehci, flags);
758 if (unlikely (!qtd))
759 goto cleanup;
760 qtd->urb = urb;
761 qtd_prev->hw_next = QTD_NEXT(ehci, qtd->qtd_dma);
762 list_add_tail (&qtd->qtd_list, head);
763
764 /* never any data in such packets */
765 qtd_fill(ehci, qtd, 0, 0, token, 0);
766 }
767 }
768
769 /* by default, enable interrupt on urb completion */
770 if (likely (!(urb->transfer_flags & URB_NO_INTERRUPT)))
771 qtd->hw_token |= cpu_to_hc32(ehci, QTD_IOC);
772 return head;
773
774cleanup:
775 qtd_list_free (ehci, urb, head);
776 return NULL;
777}
778
779/*-------------------------------------------------------------------------*/
780
781// Would be best to create all qh's from config descriptors,
782// when each interface/altsetting is established. Unlink
783// any previous qh and cancel its urbs first; endpoints are
784// implicitly reset then (data toggle too).
785// That'd mean updating how usbcore talks to HCDs. (2.7?)
786
787
788/*
789 * Each QH holds a qtd list; a QH is used for everything except iso.
790 *
791 * For interrupt urbs, the scheduler must set the microframe scheduling
792 * mask(s) each time the QH gets scheduled. For highspeed, that's
793 * just one microframe in the s-mask. For split interrupt transactions
794 * there are additional complications: c-mask, maybe FSTNs.
795 */
796static struct ehci_qh *
797qh_make (
798 struct ehci_hcd *ehci,
799 struct urb *urb,
800 gfp_t flags
801) {
802 struct ehci_qh *qh = ehci_qh_alloc (ehci, flags);
803 u32 info1 = 0, info2 = 0;
804 int is_input, type;
805 int maxp = 0;
806 struct usb_tt *tt = urb->dev->tt;
807 struct ehci_qh_hw *hw;
808
809 if (!qh)
810 return qh;
811
812 /*
813 * init endpoint/device data for this QH
814 */
815 info1 |= usb_pipeendpoint (urb->pipe) << 8;
816 info1 |= usb_pipedevice (urb->pipe) << 0;
817
818 is_input = usb_pipein (urb->pipe);
819 type = usb_pipetype (urb->pipe);
820 maxp = usb_maxpacket (urb->dev, urb->pipe, !is_input);
821
822 /* 1024 byte maxpacket is a hardware ceiling. High bandwidth
823 * acts like up to 3KB, but is built from smaller packets.
824 */
825 if (max_packet(maxp) > 1024) {
826 ehci_dbg(ehci, "bogus qh maxpacket %d\n", max_packet(maxp));
827 goto done;
828 }
829
830 /* Compute interrupt scheduling parameters just once, and save.
831 * - allowing for high bandwidth, how many nsec/uframe are used?
832 * - split transactions need a second CSPLIT uframe; same question
833 * - splits also need a schedule gap (for full/low speed I/O)
834 * - qh has a polling interval
835 *
836 * For control/bulk requests, the HC or TT handles these.
837 */
838 if (type == PIPE_INTERRUPT) {
839 qh->usecs = NS_TO_US(usb_calc_bus_time(USB_SPEED_HIGH,
840 is_input, 0,
841 hb_mult(maxp) * max_packet(maxp)));
842 qh->start = NO_FRAME;
843 qh->stamp = ehci->periodic_stamp;
844
845 if (urb->dev->speed == USB_SPEED_HIGH) {
846 qh->c_usecs = 0;
847 qh->gap_uf = 0;
848
849 qh->period = urb->interval >> 3;
850 if (qh->period == 0 && urb->interval != 1) {
851 /* NOTE interval 2 or 4 uframes could work.
852 * But interval 1 scheduling is simpler, and
853 * includes high bandwidth.
854 */
855 urb->interval = 1;
856 } else if (qh->period > ehci->periodic_size) {
857 qh->period = ehci->periodic_size;
858 urb->interval = qh->period << 3;
859 }
860 } else {
861 int think_time;
862
863 /* gap is f(FS/LS transfer times) */
864 qh->gap_uf = 1 + usb_calc_bus_time (urb->dev->speed,
865 is_input, 0, maxp) / (125 * 1000);
866
867 /* FIXME this just approximates SPLIT/CSPLIT times */
868 if (is_input) { // SPLIT, gap, CSPLIT+DATA
869 qh->c_usecs = qh->usecs + HS_USECS (0);
870 qh->usecs = HS_USECS (1);
871 } else { // SPLIT+DATA, gap, CSPLIT
872 qh->usecs += HS_USECS (1);
873 qh->c_usecs = HS_USECS (0);
874 }
875
876 think_time = tt ? tt->think_time : 0;
877 qh->tt_usecs = NS_TO_US (think_time +
878 usb_calc_bus_time (urb->dev->speed,
879 is_input, 0, max_packet (maxp)));
880 qh->period = urb->interval;
881 if (qh->period > ehci->periodic_size) {
882 qh->period = ehci->periodic_size;
883 urb->interval = qh->period;
884 }
885 }
886 }
887
888 /* support for tt scheduling, and access to toggles */
889 qh->dev = urb->dev;
890
891 /* using TT? */
892 switch (urb->dev->speed) {
893 case USB_SPEED_LOW:
894 info1 |= (1 << 12); /* EPS "low" */
895 /* FALL THROUGH */
896
897 case USB_SPEED_FULL:
898 /* EPS 0 means "full" */
899 if (type != PIPE_INTERRUPT)
900 info1 |= (EHCI_TUNE_RL_TT << 28);
901 if (type == PIPE_CONTROL) {
902 info1 |= (1 << 27); /* for TT */
903 info1 |= 1 << 14; /* toggle from qtd */
904 }
905 info1 |= maxp << 16;
906
907 info2 |= (EHCI_TUNE_MULT_TT << 30);
908
909 /* Some Freescale processors have an erratum in which the
910 * port number in the queue head was 0..N-1 instead of 1..N.
911 */
912 if (ehci_has_fsl_portno_bug(ehci))
913 info2 |= (urb->dev->ttport-1) << 23;
914 else
915 info2 |= urb->dev->ttport << 23;
916
917 /* set the address of the TT; for TDI's integrated
918 * root hub tt, leave it zeroed.
919 */
920 if (tt && tt->hub != ehci_to_hcd(ehci)->self.root_hub)
921 info2 |= tt->hub->devnum << 16;
922
923 /* NOTE: if (PIPE_INTERRUPT) { scheduler sets c-mask } */
924
925 break;
926
927 case USB_SPEED_HIGH: /* no TT involved */
928 info1 |= (2 << 12); /* EPS "high" */
929 if (type == PIPE_CONTROL) {
930 info1 |= (EHCI_TUNE_RL_HS << 28);
931 info1 |= 64 << 16; /* usb2 fixed maxpacket */
932 info1 |= 1 << 14; /* toggle from qtd */
933 info2 |= (EHCI_TUNE_MULT_HS << 30);
934 } else if (type == PIPE_BULK) {
935 info1 |= (EHCI_TUNE_RL_HS << 28);
936 /* The USB spec says that high speed bulk endpoints
937 * always use 512 byte maxpacket. But some device
938 * vendors decided to ignore that, and MSFT is happy
939 * to help them do so. So now people expect to use
940 * such nonconformant devices with Linux too; sigh.
941 */
942 info1 |= max_packet(maxp) << 16;
943 info2 |= (EHCI_TUNE_MULT_HS << 30);
944 } else { /* PIPE_INTERRUPT */
945 info1 |= max_packet (maxp) << 16;
946 info2 |= hb_mult (maxp) << 30;
947 }
948 break;
949 default:
950 dbg ("bogus dev %p speed %d", urb->dev, urb->dev->speed);
951done:
952 qh_put (qh);
953 return NULL;
954 }
955
956 /* NOTE: if (PIPE_INTERRUPT) { scheduler sets s-mask } */
957
958 /* init as live, toggle clear, advance to dummy */
959 qh->qh_state = QH_STATE_IDLE;
960 hw = qh->hw;
961 hw->hw_info1 = cpu_to_hc32(ehci, info1);
962 hw->hw_info2 = cpu_to_hc32(ehci, info2);
963 qh->is_out = !is_input;
964 usb_settoggle (urb->dev, usb_pipeendpoint (urb->pipe), !is_input, 1);
965 qh_refresh (ehci, qh);
966 return qh;
967}
968
969/*-------------------------------------------------------------------------*/
970
971/* move qh (and its qtds) onto async queue; maybe enable queue. */
972
973static void qh_link_async (struct ehci_hcd *ehci, struct ehci_qh *qh)
974{
975 __hc32 dma = QH_NEXT(ehci, qh->qh_dma);
976 struct ehci_qh *head;
977
978 /* Don't link a QH if there's a Clear-TT-Buffer pending */
979 if (unlikely(qh->clearing_tt))
980 return;
981
982 WARN_ON(qh->qh_state != QH_STATE_IDLE);
983
984 /* (re)start the async schedule? */
985 head = ehci->async;
986 timer_action_done (ehci, TIMER_ASYNC_OFF);
987 if (!head->qh_next.qh) {
988 u32 cmd = ehci_readl(ehci, &ehci->regs->command);
989
990 if (!(cmd & CMD_ASE)) {
991 /* in case a clear of CMD_ASE didn't take yet */
992 (void)handshake(ehci, &ehci->regs->status,
993 STS_ASS, 0, 150);
994 cmd |= CMD_ASE;
995 ehci_writel(ehci, cmd, &ehci->regs->command);
996 /* posted write need not be known to HC yet ... */
997 }
998 }
999
1000 /* clear halt and/or toggle; and maybe recover from silicon quirk */
1001 qh_refresh(ehci, qh);
1002
1003 /* splice right after start */
1004 qh->qh_next = head->qh_next;
1005 qh->hw->hw_next = head->hw->hw_next;
1006 wmb ();
1007
1008 head->qh_next.qh = qh;
1009 head->hw->hw_next = dma;
1010
1011 qh_get(qh);
1012 qh->xacterrs = 0;
1013 qh->qh_state = QH_STATE_LINKED;
1014 /* qtd completions reported later by interrupt */
1015}
1016
1017/*-------------------------------------------------------------------------*/
1018
1019/*
1020 * For control/bulk/interrupt, return QH with these TDs appended.
1021 * Allocates and initializes the QH if necessary.
1022 * Returns null if it can't allocate a QH it needs to.
1023 * If the QH has TDs (urbs) already, that's great.
1024 */
1025static struct ehci_qh *qh_append_tds (
1026 struct ehci_hcd *ehci,
1027 struct urb *urb,
1028 struct list_head *qtd_list,
1029 int epnum,
1030 void **ptr
1031)
1032{
1033 struct ehci_qh *qh = NULL;
1034 __hc32 qh_addr_mask = cpu_to_hc32(ehci, 0x7f);
1035
1036 qh = (struct ehci_qh *) *ptr;
1037 if (unlikely (qh == NULL)) {
1038 /* can't sleep here, we have ehci->lock... */
1039 qh = qh_make (ehci, urb, GFP_ATOMIC);
1040 *ptr = qh;
1041 }
1042 if (likely (qh != NULL)) {
1043 struct ehci_qtd *qtd;
1044
1045 if (unlikely (list_empty (qtd_list)))
1046 qtd = NULL;
1047 else
1048 qtd = list_entry (qtd_list->next, struct ehci_qtd,
1049 qtd_list);
1050
1051 /* control qh may need patching ... */
1052 if (unlikely (epnum == 0)) {
1053
1054 /* usb_reset_device() briefly reverts to address 0 */
1055 if (usb_pipedevice (urb->pipe) == 0)
1056 qh->hw->hw_info1 &= ~qh_addr_mask;
1057 }
1058
1059 /* just one way to queue requests: swap with the dummy qtd.
1060 * only hc or qh_refresh() ever modify the overlay.
1061 */
1062 if (likely (qtd != NULL)) {
1063 struct ehci_qtd *dummy;
1064 dma_addr_t dma;
1065 __hc32 token;
1066
1067 /* to avoid racing the HC, use the dummy td instead of
1068 * the first td of our list (becomes new dummy). both
1069 * tds stay deactivated until we're done, when the
1070 * HC is allowed to fetch the old dummy (4.10.2).
1071 */
1072 token = qtd->hw_token;
1073 qtd->hw_token = HALT_BIT(ehci);
1074
1075 dummy = qh->dummy;
1076
1077 dma = dummy->qtd_dma;
1078 *dummy = *qtd;
1079 dummy->qtd_dma = dma;
1080
1081 list_del (&qtd->qtd_list);
1082 list_add (&dummy->qtd_list, qtd_list);
1083 list_splice_tail(qtd_list, &qh->qtd_list);
1084
1085 ehci_qtd_init(ehci, qtd, qtd->qtd_dma);
1086 qh->dummy = qtd;
1087
1088 /* hc must see the new dummy at list end */
1089 dma = qtd->qtd_dma;
1090 qtd = list_entry (qh->qtd_list.prev,
1091 struct ehci_qtd, qtd_list);
1092 qtd->hw_next = QTD_NEXT(ehci, dma);
1093
1094 /* let the hc process these next qtds */
1095 wmb ();
1096 dummy->hw_token = token;
1097
1098 urb->hcpriv = qh_get (qh);
1099 }
1100 }
1101 return qh;
1102}
1103
1104/*-------------------------------------------------------------------------*/
1105
1106static int
1107submit_async (
1108 struct ehci_hcd *ehci,
1109 struct urb *urb,
1110 struct list_head *qtd_list,
1111 gfp_t mem_flags
1112) {
1113 int epnum;
1114 unsigned long flags;
1115 struct ehci_qh *qh = NULL;
1116 int rc;
1117
1118 epnum = urb->ep->desc.bEndpointAddress;
1119
1120#ifdef EHCI_URB_TRACE
1121 {
1122 struct ehci_qtd *qtd;
1123 qtd = list_entry(qtd_list->next, struct ehci_qtd, qtd_list);
1124 ehci_dbg(ehci,
1125 "%s %s urb %p ep%d%s len %d, qtd %p [qh %p]\n",
1126 __func__, urb->dev->devpath, urb,
1127 epnum & 0x0f, (epnum & USB_DIR_IN) ? "in" : "out",
1128 urb->transfer_buffer_length,
1129 qtd, urb->ep->hcpriv);
1130 }
1131#endif
1132
1133 spin_lock_irqsave (&ehci->lock, flags);
1134 if (unlikely(!HCD_HW_ACCESSIBLE(ehci_to_hcd(ehci)))) {
1135 rc = -ESHUTDOWN;
1136 goto done;
1137 }
1138 rc = usb_hcd_link_urb_to_ep(ehci_to_hcd(ehci), urb);
1139 if (unlikely(rc))
1140 goto done;
1141
1142 qh = qh_append_tds(ehci, urb, qtd_list, epnum, &urb->ep->hcpriv);
1143 if (unlikely(qh == NULL)) {
1144 usb_hcd_unlink_urb_from_ep(ehci_to_hcd(ehci), urb);
1145 rc = -ENOMEM;
1146 goto done;
1147 }
1148
1149 /* Control/bulk operations through TTs don't need scheduling,
1150 * the HC and TT handle it when the TT has a buffer ready.
1151 */
1152 if (likely (qh->qh_state == QH_STATE_IDLE))
1153 qh_link_async(ehci, qh);
1154 done:
1155 spin_unlock_irqrestore (&ehci->lock, flags);
1156 if (unlikely (qh == NULL))
1157 qtd_list_free (ehci, urb, qtd_list);
1158 return rc;
1159}
1160
1161/*-------------------------------------------------------------------------*/
1162
1163/* the async qh for the qtds being reclaimed are now unlinked from the HC */
1164
1165static void end_unlink_async (struct ehci_hcd *ehci)
1166{
1167 struct ehci_qh *qh = ehci->reclaim;
1168 struct ehci_qh *next;
1169
1170 iaa_watchdog_done(ehci);
1171
1172 // qh->hw_next = cpu_to_hc32(qh->qh_dma);
1173 qh->qh_state = QH_STATE_IDLE;
1174 qh->qh_next.qh = NULL;
1175 qh_put (qh); // refcount from reclaim
1176
1177 /* other unlink(s) may be pending (in QH_STATE_UNLINK_WAIT) */
1178 next = qh->reclaim;
1179 ehci->reclaim = next;
1180 qh->reclaim = NULL;
1181
1182 qh_completions (ehci, qh);
1183
1184 if (!list_empty(&qh->qtd_list) && ehci->rh_state == EHCI_RH_RUNNING) {
1185 qh_link_async (ehci, qh);
1186 } else {
1187 /* it's not free to turn the async schedule on/off; leave it
1188 * active but idle for a while once it empties.
1189 */
1190 if (ehci->rh_state == EHCI_RH_RUNNING
1191 && ehci->async->qh_next.qh == NULL)
1192 timer_action (ehci, TIMER_ASYNC_OFF);
1193 }
1194 qh_put(qh); /* refcount from async list */
1195
1196 if (next) {
1197 ehci->reclaim = NULL;
1198 start_unlink_async (ehci, next);
1199 }
1200
1201 if (ehci->has_synopsys_hc_bug)
1202 ehci_writel(ehci, (u32) ehci->async->qh_dma,
1203 &ehci->regs->async_next);
1204}
1205
1206/* makes sure the async qh will become idle */
1207/* caller must own ehci->lock */
1208
1209static void start_unlink_async (struct ehci_hcd *ehci, struct ehci_qh *qh)
1210{
1211 int cmd = ehci_readl(ehci, &ehci->regs->command);
1212 struct ehci_qh *prev;
1213
1214#ifdef DEBUG
1215 assert_spin_locked(&ehci->lock);
1216 if (ehci->reclaim
1217 || (qh->qh_state != QH_STATE_LINKED
1218 && qh->qh_state != QH_STATE_UNLINK_WAIT)
1219 )
1220 BUG ();
1221#endif
1222
1223 /* stop async schedule right now? */
1224 if (unlikely (qh == ehci->async)) {
1225 /* can't get here without STS_ASS set */
1226 if (ehci->rh_state != EHCI_RH_HALTED
1227 && !ehci->reclaim) {
1228 /* ... and CMD_IAAD clear */
1229 ehci_writel(ehci, cmd & ~CMD_ASE,
1230 &ehci->regs->command);
1231 wmb ();
1232 // handshake later, if we need to
1233 timer_action_done (ehci, TIMER_ASYNC_OFF);
1234 }
1235 return;
1236 }
1237
1238 qh->qh_state = QH_STATE_UNLINK;
1239 ehci->reclaim = qh = qh_get (qh);
1240
1241 prev = ehci->async;
1242 while (prev->qh_next.qh != qh)
1243 prev = prev->qh_next.qh;
1244
1245 prev->hw->hw_next = qh->hw->hw_next;
1246 prev->qh_next = qh->qh_next;
1247 if (ehci->qh_scan_next == qh)
1248 ehci->qh_scan_next = qh->qh_next.qh;
1249 wmb ();
1250
1251 /* If the controller isn't running, we don't have to wait for it */
1252 if (unlikely(ehci->rh_state != EHCI_RH_RUNNING)) {
1253 /* if (unlikely (qh->reclaim != 0))
1254 * this will recurse, probably not much
1255 */
1256 end_unlink_async (ehci);
1257 return;
1258 }
1259
1260 cmd |= CMD_IAAD;
1261 ehci_writel(ehci, cmd, &ehci->regs->command);
1262 (void)ehci_readl(ehci, &ehci->regs->command);
1263 iaa_watchdog_start(ehci);
1264}
1265
1266/*-------------------------------------------------------------------------*/
1267
1268static void scan_async (struct ehci_hcd *ehci)
1269{
1270 bool stopped;
1271 struct ehci_qh *qh;
1272 enum ehci_timer_action action = TIMER_IO_WATCHDOG;
1273
1274 timer_action_done (ehci, TIMER_ASYNC_SHRINK);
1275 stopped = (ehci->rh_state != EHCI_RH_RUNNING);
1276
1277 ehci->qh_scan_next = ehci->async->qh_next.qh;
1278 while (ehci->qh_scan_next) {
1279 qh = ehci->qh_scan_next;
1280 ehci->qh_scan_next = qh->qh_next.qh;
1281 rescan:
1282 /* clean any finished work for this qh */
1283 if (!list_empty(&qh->qtd_list)) {
1284 int temp;
1285
1286 /*
1287 * Unlinks could happen here; completion reporting
1288 * drops the lock. That's why ehci->qh_scan_next
1289 * always holds the next qh to scan; if the next qh
1290 * gets unlinked then ehci->qh_scan_next is adjusted
1291 * in start_unlink_async().
1292 */
1293 qh = qh_get(qh);
1294 temp = qh_completions(ehci, qh);
1295 if (qh->needs_rescan)
1296 unlink_async(ehci, qh);
1297 qh->unlink_time = jiffies + EHCI_SHRINK_JIFFIES;
1298 qh_put(qh);
1299 if (temp != 0)
1300 goto rescan;
1301 }
1302
1303 /* unlink idle entries, reducing DMA usage as well
1304 * as HCD schedule-scanning costs. delay for any qh
1305 * we just scanned, there's a not-unusual case that it
1306 * doesn't stay idle for long.
1307 * (plus, avoids some kind of re-activation race.)
1308 */
1309 if (list_empty(&qh->qtd_list)
1310 && qh->qh_state == QH_STATE_LINKED) {
1311 if (!ehci->reclaim && (stopped ||
1312 time_after_eq(jiffies, qh->unlink_time)))
1313 start_unlink_async(ehci, qh);
1314 else
1315 action = TIMER_ASYNC_SHRINK;
1316 }
1317 }
1318 if (action == TIMER_ASYNC_SHRINK)
1319 timer_action (ehci, TIMER_ASYNC_SHRINK);
1320}