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yuezonghe824eb0c2024-06-27 02:32:26 -07001#include <linux/init.h>
2#include <linux/linkage.h>
3
4#include <asm/assembler.h>
5#include <asm/asm-offsets.h>
6#include <asm/errno.h>
7#include <asm/thread_info.h>
8
9@ Bad Abort numbers
10@ -----------------
11@
12#define BAD_PREFETCH 0
13#define BAD_DATA 1
14#define BAD_ADDREXCPTN 2
15#define BAD_IRQ 3
16#define BAD_UNDEFINSTR 4
17
18@
19@ Most of the stack format comes from struct pt_regs, but with
20@ the addition of 8 bytes for storing syscall args 5 and 6.
21@ This _must_ remain a multiple of 8 for EABI.
22@
23#define S_OFF 8
24
25/*
26 * The SWI code relies on the fact that R0 is at the bottom of the stack
27 * (due to slow/fast restore user regs).
28 */
29#if S_R0 != 0
30#error "Please fix"
31#endif
32
33 .macro zero_fp
34#ifdef CONFIG_FRAME_POINTER
35 mov fp, #0
36#endif
37 .endm
38
39 .macro alignment_trap, rtemp
40#ifdef CONFIG_ALIGNMENT_TRAP
41 ldr \rtemp, .LCcralign
42 ldr \rtemp, [\rtemp]
43 mcr p15, 0, \rtemp, c1, c0
44#endif
45 .endm
46
47 @
48 @ Store/load the USER SP and LR registers by switching to the SYS
49 @ mode. Useful in Thumb-2 mode where "stm/ldm rd, {sp, lr}^" is not
50 @ available. Should only be called from SVC mode
51 @
52 .macro store_user_sp_lr, rd, rtemp, offset = 0
53 mrs \rtemp, cpsr
54 eor \rtemp, \rtemp, #(SVC_MODE ^ SYSTEM_MODE)
55 msr cpsr_c, \rtemp @ switch to the SYS mode
56
57 str sp, [\rd, #\offset] @ save sp_usr
58 str lr, [\rd, #\offset + 4] @ save lr_usr
59
60 eor \rtemp, \rtemp, #(SVC_MODE ^ SYSTEM_MODE)
61 msr cpsr_c, \rtemp @ switch back to the SVC mode
62 .endm
63
64 .macro load_user_sp_lr, rd, rtemp, offset = 0
65 mrs \rtemp, cpsr
66 eor \rtemp, \rtemp, #(SVC_MODE ^ SYSTEM_MODE)
67 msr cpsr_c, \rtemp @ switch to the SYS mode
68
69 ldr sp, [\rd, #\offset] @ load sp_usr
70 ldr lr, [\rd, #\offset + 4] @ load lr_usr
71
72 eor \rtemp, \rtemp, #(SVC_MODE ^ SYSTEM_MODE)
73 msr cpsr_c, \rtemp @ switch back to the SVC mode
74 .endm
75
76#ifndef CONFIG_THUMB2_KERNEL
77 .macro svc_exit, rpsr
78 msr spsr_cxsf, \rpsr
79#if defined(CONFIG_CPU_V6) || defined(CONFIG_CPU_32v6K)
80 @ We must avoid clrex due to Cortex-A15 erratum #830321
81 sub r0, sp, #4 @ uninhabited address
82 strex r1, r2, [r0] @ clear the exclusive monitor
83#endif
84 ldmia sp, {r0 - pc}^ @ load r0 - pc, cpsr
85 .endm
86
87 .macro restore_user_regs, fast = 0, offset = 0
88 ldr r1, [sp, #\offset + S_PSR] @ get calling cpsr
89 ldr lr, [sp, #\offset + S_PC]! @ get pc
90 msr spsr_cxsf, r1 @ save in spsr_svc
91#if defined(CONFIG_CPU_V6) || defined(CONFIG_CPU_32v6K)
92 @ We must avoid clrex due to Cortex-A15 erratum #830321
93 strex r1, r2, [sp] @ clear the exclusive monitor
94#endif
95 .if \fast
96 ldmdb sp, {r1 - lr}^ @ get calling r1 - lr
97 .else
98 ldmdb sp, {r0 - lr}^ @ get calling r0 - lr
99 .endif
100 mov r0, r0 @ ARMv5T and earlier require a nop
101 @ after ldm {}^
102 add sp, sp, #S_FRAME_SIZE - S_PC
103 movs pc, lr @ return & move spsr_svc into cpsr
104 .endm
105#ifndef CONFIG_STACK_SIZE
106 .macro get_thread_info, rd
107 mov \rd, sp, lsr #13
108 mov \rd, \rd, lsl #13
109 .endm
110#else
111 .extern current_kernel_thread
112 .macro get_thread_info, rd
113 ldr \rd, =current_kernel_thread
114 ldr \rd,[\rd]
115 .endm
116#endif
117 @
118 @ 32-bit wide "mov pc, reg"
119 @
120 .macro movw_pc, reg
121 mov pc, \reg
122 .endm
123#else /* CONFIG_THUMB2_KERNEL */
124 .macro svc_exit, rpsr
125 ldr lr, [sp, #S_SP] @ top of the stack
126 ldrd r0, r1, [sp, #S_LR] @ calling lr and pc
127
128 @ We must avoid clrex due to Cortex-A15 erratum #830321
129 strex r2, r1, [sp, #S_LR] @ clear the exclusive monitor
130
131 stmdb lr!, {r0, r1, \rpsr} @ calling lr and rfe context
132 ldmia sp, {r0 - r12}
133 mov sp, lr
134 ldr lr, [sp], #4
135 rfeia sp!
136 .endm
137
138 .macro restore_user_regs, fast = 0, offset = 0
139 mov r2, sp
140 load_user_sp_lr r2, r3, \offset + S_SP @ calling sp, lr
141 ldr r1, [sp, #\offset + S_PSR] @ get calling cpsr
142 ldr lr, [sp, #\offset + S_PC] @ get pc
143 add sp, sp, #\offset + S_SP
144 msr spsr_cxsf, r1 @ save in spsr_svc
145
146 @ We must avoid clrex due to Cortex-A15 erratum #830321
147 strex r1, r2, [sp] @ clear the exclusive monitor
148
149 .if \fast
150 ldmdb sp, {r1 - r12} @ get calling r1 - r12
151 .else
152 ldmdb sp, {r0 - r12} @ get calling r0 - r12
153 .endif
154 add sp, sp, #S_FRAME_SIZE - S_SP
155 movs pc, lr @ return & move spsr_svc into cpsr
156 .endm
157
158#ifndef CONFIG_STACK_SIZE
159 .macro get_thread_info, rd
160 mov \rd, sp
161 lsr \rd, \rd, #13
162 mov \rd, \rd, lsl #13
163 .endm
164#else
165 .extern current_kernel_thread
166 .macro get_thread_info, rd
167 ldr \rd, =current_kernel_thread
168 ldr \rd,[\rd]
169 .endm
170#endif
171
172 @
173 @ 32-bit wide "mov pc, reg"
174 @
175 .macro movw_pc, reg
176 mov pc, \reg
177 nop
178 .endm
179#endif /* !CONFIG_THUMB2_KERNEL */
180
181/*
182 * These are the registers used in the syscall handler, and allow us to
183 * have in theory up to 7 arguments to a function - r0 to r6.
184 *
185 * r7 is reserved for the system call number for thumb mode.
186 *
187 * Note that tbl == why is intentional.
188 *
189 * We must set at least "tsk" and "why" when calling ret_with_reschedule.
190 */
191scno .req r7 @ syscall number
192tbl .req r8 @ syscall table pointer
193why .req r8 @ Linux syscall (!= 0)
194tsk .req r9 @ current thread_info