yuezonghe | 824eb0c | 2024-06-27 02:32:26 -0700 | [diff] [blame] | 1 | /* |
| 2 | * Copyright (C) 2009 Texas Instruments Inc. |
| 3 | * |
| 4 | * This program is free software; you can redistribute it and/or modify |
| 5 | * it under the terms of the GNU General Public License version 2 as |
| 6 | * published by the Free Software Foundation. |
| 7 | */ |
| 8 | |
| 9 | #include <linux/kernel.h> |
| 10 | #include <linux/init.h> |
| 11 | #include <linux/platform_device.h> |
| 12 | #include <linux/input.h> |
| 13 | #include <linux/gpio.h> |
| 14 | #include <linux/mtd/nand.h> |
| 15 | |
| 16 | #include <asm/mach-types.h> |
| 17 | #include <asm/mach/arch.h> |
| 18 | |
| 19 | #include "common.h" |
| 20 | #include <plat/board.h> |
| 21 | #include <plat/gpmc-smc91x.h> |
| 22 | #include <plat/usb.h> |
| 23 | |
| 24 | #include <mach/board-zoom.h> |
| 25 | |
| 26 | #include "board-flash.h" |
| 27 | #include "mux.h" |
| 28 | #include "sdram-hynix-h8mbx00u0mer-0em.h" |
| 29 | |
| 30 | #if defined(CONFIG_SMC91X) || defined(CONFIG_SMC91X_MODULE) |
| 31 | |
| 32 | static struct omap_smc91x_platform_data board_smc91x_data = { |
| 33 | .cs = 3, |
| 34 | .flags = GPMC_MUX_ADD_DATA | IORESOURCE_IRQ_LOWLEVEL, |
| 35 | }; |
| 36 | |
| 37 | static void __init board_smc91x_init(void) |
| 38 | { |
| 39 | board_smc91x_data.gpio_irq = 158; |
| 40 | gpmc_smc91x_init(&board_smc91x_data); |
| 41 | } |
| 42 | |
| 43 | #else |
| 44 | |
| 45 | static inline void board_smc91x_init(void) |
| 46 | { |
| 47 | } |
| 48 | |
| 49 | #endif /* defined(CONFIG_SMC91X) || defined(CONFIG_SMC91X_MODULE) */ |
| 50 | |
| 51 | static void enable_board_wakeup_source(void) |
| 52 | { |
| 53 | /* T2 interrupt line (keypad) */ |
| 54 | omap_mux_init_signal("sys_nirq", |
| 55 | OMAP_WAKEUP_EN | OMAP_PIN_INPUT_PULLUP); |
| 56 | } |
| 57 | |
| 58 | static const struct usbhs_omap_board_data usbhs_bdata __initconst = { |
| 59 | |
| 60 | .port_mode[0] = OMAP_EHCI_PORT_MODE_PHY, |
| 61 | .port_mode[1] = OMAP_EHCI_PORT_MODE_PHY, |
| 62 | .port_mode[2] = OMAP_USBHS_PORT_MODE_UNUSED, |
| 63 | |
| 64 | .phy_reset = true, |
| 65 | .reset_gpio_port[0] = 126, |
| 66 | .reset_gpio_port[1] = 61, |
| 67 | .reset_gpio_port[2] = -EINVAL |
| 68 | }; |
| 69 | |
| 70 | static struct omap_board_config_kernel sdp_config[] __initdata = { |
| 71 | }; |
| 72 | |
| 73 | #ifdef CONFIG_OMAP_MUX |
| 74 | static struct omap_board_mux board_mux[] __initdata = { |
| 75 | { .reg_offset = OMAP_MUX_TERMINATOR }, |
| 76 | }; |
| 77 | #endif |
| 78 | |
| 79 | /* |
| 80 | * SDP3630 CS organization |
| 81 | * See also the Switch S8 settings in the comments. |
| 82 | */ |
| 83 | static char chip_sel_sdp[][GPMC_CS_NUM] = { |
| 84 | {PDC_NOR, PDC_NAND, PDC_ONENAND, DBG_MPDB, 0, 0, 0, 0}, /* S8:1111 */ |
| 85 | {PDC_ONENAND, PDC_NAND, PDC_NOR, DBG_MPDB, 0, 0, 0, 0}, /* S8:1110 */ |
| 86 | {PDC_NAND, PDC_ONENAND, PDC_NOR, DBG_MPDB, 0, 0, 0, 0}, /* S8:1101 */ |
| 87 | }; |
| 88 | |
| 89 | static struct mtd_partition sdp_nor_partitions[] = { |
| 90 | /* bootloader (U-Boot, etc) in first sector */ |
| 91 | { |
| 92 | .name = "Bootloader-NOR", |
| 93 | .offset = 0, |
| 94 | .size = SZ_256K, |
| 95 | .mask_flags = MTD_WRITEABLE, /* force read-only */ |
| 96 | }, |
| 97 | /* bootloader params in the next sector */ |
| 98 | { |
| 99 | .name = "Params-NOR", |
| 100 | .offset = MTDPART_OFS_APPEND, |
| 101 | .size = SZ_256K, |
| 102 | .mask_flags = 0, |
| 103 | }, |
| 104 | /* kernel */ |
| 105 | { |
| 106 | .name = "Kernel-NOR", |
| 107 | .offset = MTDPART_OFS_APPEND, |
| 108 | .size = SZ_2M, |
| 109 | .mask_flags = 0 |
| 110 | }, |
| 111 | /* file system */ |
| 112 | { |
| 113 | .name = "Filesystem-NOR", |
| 114 | .offset = MTDPART_OFS_APPEND, |
| 115 | .size = MTDPART_SIZ_FULL, |
| 116 | .mask_flags = 0 |
| 117 | } |
| 118 | }; |
| 119 | |
| 120 | static struct mtd_partition sdp_onenand_partitions[] = { |
| 121 | { |
| 122 | .name = "X-Loader-OneNAND", |
| 123 | .offset = 0, |
| 124 | .size = 4 * (64 * 2048), |
| 125 | .mask_flags = MTD_WRITEABLE /* force read-only */ |
| 126 | }, |
| 127 | { |
| 128 | .name = "U-Boot-OneNAND", |
| 129 | .offset = MTDPART_OFS_APPEND, |
| 130 | .size = 2 * (64 * 2048), |
| 131 | .mask_flags = MTD_WRITEABLE /* force read-only */ |
| 132 | }, |
| 133 | { |
| 134 | .name = "U-Boot Environment-OneNAND", |
| 135 | .offset = MTDPART_OFS_APPEND, |
| 136 | .size = 1 * (64 * 2048), |
| 137 | }, |
| 138 | { |
| 139 | .name = "Kernel-OneNAND", |
| 140 | .offset = MTDPART_OFS_APPEND, |
| 141 | .size = 16 * (64 * 2048), |
| 142 | }, |
| 143 | { |
| 144 | .name = "File System-OneNAND", |
| 145 | .offset = MTDPART_OFS_APPEND, |
| 146 | .size = MTDPART_SIZ_FULL, |
| 147 | }, |
| 148 | }; |
| 149 | |
| 150 | static struct mtd_partition sdp_nand_partitions[] = { |
| 151 | /* All the partition sizes are listed in terms of NAND block size */ |
| 152 | { |
| 153 | .name = "X-Loader-NAND", |
| 154 | .offset = 0, |
| 155 | .size = 4 * (64 * 2048), |
| 156 | .mask_flags = MTD_WRITEABLE, /* force read-only */ |
| 157 | }, |
| 158 | { |
| 159 | .name = "U-Boot-NAND", |
| 160 | .offset = MTDPART_OFS_APPEND, /* Offset = 0x80000 */ |
| 161 | .size = 10 * (64 * 2048), |
| 162 | .mask_flags = MTD_WRITEABLE, /* force read-only */ |
| 163 | }, |
| 164 | { |
| 165 | .name = "Boot Env-NAND", |
| 166 | |
| 167 | .offset = MTDPART_OFS_APPEND, /* Offset = 0x1c0000 */ |
| 168 | .size = 6 * (64 * 2048), |
| 169 | }, |
| 170 | { |
| 171 | .name = "Kernel-NAND", |
| 172 | .offset = MTDPART_OFS_APPEND, /* Offset = 0x280000 */ |
| 173 | .size = 40 * (64 * 2048), |
| 174 | }, |
| 175 | { |
| 176 | .name = "File System - NAND", |
| 177 | .size = MTDPART_SIZ_FULL, |
| 178 | .offset = MTDPART_OFS_APPEND, /* Offset = 0x780000 */ |
| 179 | }, |
| 180 | }; |
| 181 | |
| 182 | static struct flash_partitions sdp_flash_partitions[] = { |
| 183 | { |
| 184 | .parts = sdp_nor_partitions, |
| 185 | .nr_parts = ARRAY_SIZE(sdp_nor_partitions), |
| 186 | }, |
| 187 | { |
| 188 | .parts = sdp_onenand_partitions, |
| 189 | .nr_parts = ARRAY_SIZE(sdp_onenand_partitions), |
| 190 | }, |
| 191 | { |
| 192 | .parts = sdp_nand_partitions, |
| 193 | .nr_parts = ARRAY_SIZE(sdp_nand_partitions), |
| 194 | }, |
| 195 | }; |
| 196 | |
| 197 | static void __init omap_sdp_init(void) |
| 198 | { |
| 199 | omap3_mux_init(board_mux, OMAP_PACKAGE_CBP); |
| 200 | omap_board_config = sdp_config; |
| 201 | omap_board_config_size = ARRAY_SIZE(sdp_config); |
| 202 | zoom_peripherals_init(); |
| 203 | omap_sdrc_init(h8mbx00u0mer0em_sdrc_params, |
| 204 | h8mbx00u0mer0em_sdrc_params); |
| 205 | zoom_display_init(); |
| 206 | board_smc91x_init(); |
| 207 | board_flash_init(sdp_flash_partitions, chip_sel_sdp, NAND_BUSWIDTH_16); |
| 208 | enable_board_wakeup_source(); |
| 209 | usbhs_init(&usbhs_bdata); |
| 210 | } |
| 211 | |
| 212 | MACHINE_START(OMAP_3630SDP, "OMAP 3630SDP board") |
| 213 | .atag_offset = 0x100, |
| 214 | .reserve = omap_reserve, |
| 215 | .map_io = omap3_map_io, |
| 216 | .init_early = omap3630_init_early, |
| 217 | .init_irq = omap3_init_irq, |
| 218 | .handle_irq = omap3_intc_handle_irq, |
| 219 | .init_machine = omap_sdp_init, |
| 220 | .timer = &omap3_timer, |
| 221 | .restart = omap_prcm_restart, |
| 222 | MACHINE_END |