blob: 82db90fe62d2199cfbed20e19b2f2559f0aac88f [file] [log] [blame]
yuezonghe824eb0c2024-06-27 02:32:26 -07001/*******************************************************************************
2 * Copyright (C) 2016, ZXIC Corporation.
3 *
4 * File Name:
5 * File Mark:
6 * Description:
7 * Others:
8 * Version: v1.0
9 * Author: zhouqi
10 * Date: 2013-4-2
11 * History 1:
12 * Date:
13 * Version:
14 * Author:
15 * Modification:
16 * History 2:
17 ********************************************************************************/
18#ifndef __GPIO_7520_H__
19#define __GPIO_7520_H__
20
21
22/*
23*******************************************************************************
24 * GPIO MUX UART1
25 ******************************************************************************
26 */
27#if 0
28#define STANDBY_PAD 0x0010E000
29#define STANDBY_PAD_UART1_RXD (STANDBY_PAD + 0x5C)
30#define UART1_RXD (0x1 << 24)
31#define STANDBY_PAD_UART1_TXD (STANDBY_PAD + 0x60)
32#define UART1_TXD (0x1 << 24)
33
34#define STANDBY_PAD_UART_MASK (0x7 << 24)
35#endif
36
37/*PIN MUX*/
38#define ZX29_PIN_MUX 0x01303000
39#define GPIO_PINMUX_REG_BASE ZX29_PIN_MUX
40
41/*PAD*/
42#define ZX29_A1_PAD_CTRL0 0x0013C000
43#define PAD_CTRL_REG_BASE ZX29_A1_PAD_CTRL0
44
45
46#define PD_FUNC_SEL_BASE (GPIO_PINMUX_REG_BASE)
47#define AON_FUNC_SEL_BASE (PAD_CTRL_REG_BASE)
48#define TOP_FUNC_SEL_BASE (PAD_CTRL_REG_BASE)
49#define IO_CFG_BASE (PAD_CTRL_REG_BASE+0x800)
50
51
52#endif /*__GPIO_7520_H__*/
53