| yuezonghe | 824eb0c | 2024-06-27 02:32:26 -0700 | [diff] [blame^] | 1 | /*******************************************************************************
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| 2 | * Copyright by ZTE Corporation.
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| 3 | *
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| 4 | * File Name:
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| 5 | * File Mark:
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| 6 | * Description:
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| 7 | * Others:
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| 8 | * Version: v0.1
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| 9 | * Author: wuhui
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| 10 | * Date: 2016-12-17
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| 11 | * History 1:
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| 12 | * Date:
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| 13 | * Version:
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| 14 | * Author:
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| 15 | * Modification:
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| 16 | * History 2:
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| 17 | ********************************************************************************/
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| 18 |
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| 19 | #ifndef _DRVS_VOU_REF_H
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| 20 | #define _DRVS_VOU_REF_H
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| 21 |
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| 22 |
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| 23 |
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| 24 | /****************************************************************************
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| 25 | * Include files
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| 26 | ****************************************************************************/
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| 27 | #include "drvs_chip_cfg.h"
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| 28 | #include "drvs_sys.h"
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| 29 | #include "drvs_vou.h"
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| 30 |
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| 31 |
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| 32 | /****************************************************************************
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| 33 | * Macros
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| 34 | ****************************************************************************/
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| 35 | #define MAIN_CHANNEL 0
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| 36 | #define MCU_LCD 1
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| 37 |
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| 38 | //BASE ADDRESSS
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| 39 | #define OSD_CSC_BASE (VOU_CTRL_BASE+0x0000)
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| 40 | #define OSD_GLOBAL_BASE (VOU_CTRL_BASE+0x2000)
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| 41 |
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| 42 | #define OSD_VL_CFG_BASE (OSD_GLOBAL_BASE+0x024)
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| 43 | #define OSD_GL_CFG_BASE (OSD_GLOBAL_BASE+0x090)
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| 44 | #define OSD_MAIN_CHANL_BASE (OSD_GLOBAL_BASE+0x114)
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| 45 | #define OSD_WB_CFG_BASE (OSD_GLOBAL_BASE+0x14C)
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| 46 |
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| 47 | /*VOU CLK CFG ADDRESS*/
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| 48 | #define VOU_DIF_CFG_BASE (SOC_CRM_REG_BASE+0x164)
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| 49 | #define VOU_DIF_CTRL_OFFSET 16
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| 50 |
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| 51 | #define MAX_OSD_OUTSTAND_DEPTH 15
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| 52 | #define OSD_VALID_FMARK_OFFSET 18
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| 53 | #define OSDCTRL1_H_BLANK_OFFSET 2
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| 54 | #define OSDCTRL1_V_BLANK_OFFSET 10
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| 55 | #define OSDCTRL1_BLANK_SIZE 8
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| 56 | #define OSDCTRL1_MCU_OFFSET 0
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| 57 |
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| 58 | #define OSDCTRL0_OUTSTAND_DEPTH_OFFSET 16
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| 59 | #define OSDCTRL0_OUTSTAND_DEPTH_SIZE 4
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| 60 | #define OSDCTRL0_VL_ENABLE_OFFSET 11
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| 61 | #define OSDCTRL0_VL_CHANNEL_OFFSET 10
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| 62 | #define OSDVL0CTRL0_VL_PRIO_OFFSET 24
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| 63 | #define OSDVL0CTRL0_VL_PRIO_SIZE 3
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| 64 | #define OSDVL0CTRL0_VL_STARTX_OFFSET 12
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| 65 | #define OSDVL0CTRL0_VL_STARTXY_SIZE 12
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| 66 | #define OSDVL0CTRL0_VL_STARTY_OFFSET 0
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| 67 | #define OSDVL0CTRL0_VL_YUV420PLA_OFFSET 24
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| 68 | #define OSDVL0CTRL0_VL_YUV422ENABLE_OFFSET 25
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| 69 | #define OSDVL0CTRL0_VL_YUV422SEQ_OFFSET 26
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| 70 | #define OSDVL0CTRL0_VL_YUV422SEQ_SIZE 2
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| 71 | #define OSDVL0STRI_VL_LUMASTR_OFFSET 16
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| 72 | #define OSDVL0STRI_VL_STR_SIZE 16
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| 73 | #define OSDVL0STRI_VL_CHROMSTR_OFFSET 0
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| 74 | #define OSDVL0SRCHW_VL_SRCW_OFFSET 16
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| 75 | #define OSDVL0SRCHW_VL_SRCHW_SIZE 14
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| 76 | #define OSDVL0SRCHW_VL_SRCH_OFFSET 0
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| 77 | #define OSDVL0ALP_VL_GALPENABLE_OFFSET 0
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| 78 | #define OSDVL0ALP_VL_GALPVAL_OFFSET 8
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| 79 | #define OSDVL0ALP_VL_GALPVAL_SIZE 8
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| 80 |
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| 81 | #define OSDCTRL0_GL_ENABLE_OFFSET 5
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| 82 | #define OSDCTRL0_GL_CHANNEL_OFFSET 4
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| 83 | #define OSDGL0CTRL0_GL_PRIO_OFFSET 24
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| 84 | #define OSDGL0CTRL0_GL_PRIO_SIZE 3
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| 85 | #define OSDCTRL0_GL_ENDIANSEL_OFFSET 27
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| 86 | #define OSDGL0CTRL0_GL_POSX_OFFSET 12
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| 87 | #define OSDGL0CTRL0_GL_POSXY_SIZE 12
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| 88 | #define OSDGL0CTRL0_GL_POSY_OFFSET 0
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| 89 | #define OSDGL0CTRL1_GL_FORMAT_OFFSET 24
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| 90 | #define OSDGL0CTRL1_GL_FORMAT_SIZE 4
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| 91 | #define OSDGL0CTRL2_GL_ALP_A0RGB1555_OFFSET 24
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| 92 | #define OSDGL0CTRL2_GL_ALP_VAL_SIZE 8
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| 93 | #define OSDGL0CTRL2_GL_ALP_A1RGB1555_OFFSET 16
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| 94 | #define OSDGL0CTRL2_GL_GALP_OFFSET 8
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| 95 | #define OSDGL0CTRL2_GL_ALPRANG_OFFSET 3
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| 96 | #define OSDGL0CTRL2_GL_ALPMODE_OFFSET 4
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| 97 | #define OSDGL0CTRL2_GL_ALPMODE_SIZE 2
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| 98 | #define OSDGL0CTRL2_GL_EXTDIR_OFFSET 2
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| 99 | #define OSDGL0CTRL2_GL_EXTTYPE_OFFSET 0
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| 100 | #define OSDGL0CTRL2_GL_EXTTYPE_SIZE 2
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| 101 | #define OSDGL0STRI_GL_STRI_OFFSET 0
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| 102 | #define OSDGL0STRI_GL_STRI_SIZE 14
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| 103 | #define OSDGL0KEY_GL_CKALP_OFFSET 24
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| 104 | #define OSDGL0KEY_GL_CKALP_SIZE 8
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| 105 | #define OSDGL0KEY_GL_CKRGB_SIZE 8
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| 106 | #define OSDGL0KEY_GL_CKR_OFFSET 16
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| 107 | #define OSDGL0KEY_GL_CKG_OFFSET 8
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| 108 | #define OSDGL0KEY_GL_CKB_OFFSET 0
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| 109 | #define OSDGL0KEYMIN1_GL_CKREG1_ENABLE_OFFSET 31
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| 110 | #define OSDMCTRL1_MC_SCRW_OFFSET 20
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| 111 | #define OSDMCTRL1_MC_SCRWH_SIZE 12
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| 112 | #define OSDMCTRL1_MC_SCRH_OFFSET 8
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| 113 | #define OSDMBGCTRL_MC_R_OFFSET 16
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| 114 | #define OSDMBGCTRL_MC_G_OFFSET 8
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| 115 | #define OSDMBGCTRL_MC_B_OFFSET 0
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| 116 | #define OSDMBGCTRL_MC_RGB_SIZE 8
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| 117 | #define OSDMCTRL0_MC_ENABLE_OFFSET 0
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| 118 | #define OSDMUPT_ENABLE_OFFSET 0
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| 119 |
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| 120 |
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| 121 | #define OSDWBCTRL0_WB_STRIDE_OFFSET 12
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| 122 | #define OSDWBCTRL0_WB_STRIDE_SIZE 16
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| 123 | #define OSDWBCTRL0_WB_ENABLE_OFFSET 0
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| 124 | #define OSDWBCTRL0_WB_BUFNUM_OFFSET 10
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| 125 | #define OSDWBCTRL0_WB_BUFNUM_SIZE 2
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| 126 | #define OSDWBCTRL0_WB_PERIOD_OFFSET 7
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| 127 | #define OSDWBCTRL0_WB_PERIOD_SIZE 3
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| 128 | #define OSDWBCTRL0_WB_FORMAT_OFFSET1 3
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| 129 | #define OSDWBCTRL0_WB_FORMAT_OFFSET2 4
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| 130 |
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| 131 | #define CSC_ENABLE_OFFSET 16
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| 132 | #define CSC_MODE_OFFSET 0
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| 133 | #define CSC_MODE_SIZE 16
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| 134 | #define CSC_AC_OFFSET 16
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| 135 | #define CSC_BD_OFFSET 0
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| 136 | #define CSC_ACBD_SIZE 16
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| 137 | #define CSC_SPACE_FLOOR_OFFSET 16
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| 138 | #define CSC_SPACE_TOP_OFFSET 0
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| 139 | #define CSC_SPACE_LEVEL_SIZE 8
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| 140 |
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| 141 | /*OSD interrupt status bit offset*/
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| 142 | #define OSD_MC_FINISH_OFFSET 0
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| 143 | #define OSD_CFG_ERROR_OFFSET 2
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| 144 | #define OSD_BUS_ERROR_OFFSET 3
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| 145 | #define OSD_VL_BWLOW_OFFSET 7
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| 146 | #define OSD_GL_BWLOW_OFFSET 10
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| 147 | #define OSD_MC_REGUPT_OFFSET 13
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| 148 | #define OSD_WR_FINISH_OFFSET 24
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| 149 | #define OSD_WR_OVERFLOW_OFFSET 25
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| 150 |
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| 151 | #define set_reg_bit(regName, bitAddr, bitValue) \
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| 152 | do{ \
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| 153 | if(bitValue == TRUE) \
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| 154 | reg32(regName) |= (0x1<<bitAddr); \
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| 155 | else \
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| 156 | reg32(regName) &= ~(0x1<<bitAddr); \
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| 157 | }while(0)
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| 158 |
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| 159 | #define set_reg_bits(regName, bitsAddr, bitsLen, bitsValue) \
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| 160 | do{ \
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| 161 | reg32(regName) = (reg32(regName)&(~(((0x1<<bitsLen)-0x1)<<bitsAddr)))|(bitsValue<<bitsAddr);\
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| 162 | }while(0)
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| 163 |
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| 164 |
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| 165 | /****************************************************************************
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| 166 | * Types
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| 167 | ****************************************************************************/
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| 168 | typedef enum
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| 169 | {
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| 170 | EPOSEDGE_VALID = 0,
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| 171 | eNEGEDGE_VALID = 1,
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| 172 | MAX_POLARITY_TYPE =2
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| 173 | }E_MCU_FMARK_POLARITY;
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| 174 |
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| 175 | typedef volatile struct _T_OSDGlobal_Regs
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| 176 | {
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| 177 | UINT32 OSD_VER; //0x00
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| 178 | UINT32 OSD_INT_STA; //0x04
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| 179 | UINT32 OSD_CLRINT_STA; //0x08
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| 180 | UINT32 OSD_INT_MSK; //0x0C
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| 181 | UINT32 OSD_CTRL0; //0x10
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| 182 | }T_OSDGlobal_Regs;
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| 183 |
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| 184 | typedef volatile struct _T_OSD_VL_Regs
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| 185 | {
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| 186 | UINT32 OSD_VL0_CTRL0; //0x024
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| 187 | UINT32 OSD_VL0_CTRL1; //0x028
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| 188 | UINT32 RESERVED0;
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| 189 | UINT32 OSD_VL0_STRI; //0x30
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| 190 | UINT32 OSD_VL0_SRC_HW; //0x34
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| 191 | UINT32 OSD_VL0_Y; //0x38
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| 192 | UINT32 OSD_VL0_U; //0x3C
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| 193 | UINT32 OSD_VL0_V; //0x40
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| 194 | UINT32 OSD_VL0_ALP; //0x44
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| 195 | }T_OSD_VL_Regs;
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| 196 |
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| 197 | typedef volatile struct _T_OSD_GL_Regs
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| 198 | {
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| 199 | UINT32 OSD_GL0_CTRL0; //0x090
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| 200 | UINT32 OSD_GL0_CTRL1; //0x094
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| 201 | UINT32 OSD_GL0_CTRL2; //0x098
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| 202 | UINT32 RESERVED0; //0x09C
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| 203 | UINT32 OSD_GL0_STRI; //0x0A0
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| 204 | UINT32 OSD_GL0_ADDR; //0x0A4
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| 205 | UINT32 RESERVED1; //0x0A8
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| 206 | UINT32 OSD_GL0_KEY_MIN0; //0x0AC
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| 207 | UINT32 OSD_GL0_KEY_MAX0; //0x0B0
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| 208 | UINT32 OSD_GL0_KEY_MIN1; //0x0B4
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| 209 | UINT32 OSD_GL0_KEY_MAX1; //0x0B8
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| 210 | }T_OSD_GL_Regs;
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| 211 |
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| 212 | typedef volatile struct _T_OSD_MainChanel_Regs
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| 213 | {
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| 214 | UINT32 OSD_MAIN_CHANL_CTRL0; //0x114
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| 215 | UINT32 OSD_MAIN_CHANL_CTRL1; //0x118
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| 216 | UINT32 OSD_MAIN_CHANL_UPT; //0x11C
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| 217 | UINT32 RESERVED0; //0x120
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| 218 | UINT32 OSD_MAIN_BG_CTRL; //0x124
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| 219 | UINT32 RESERVED[5]; //0x128~0x138
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| 220 | UINT32 OSD_CTRL1; //0x13C
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| 221 | }T_OSD_MainChanel_Regs;
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| 222 |
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| 223 | typedef volatile struct _T_OSD_WB_Regs
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| 224 | {
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| 225 | UINT32 OSD_WB_CTRL0; //0x14C
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| 226 | UINT32 OSD_WB_CTRL1; //0x150
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| 227 | UINT32 OSD_WB_ADDR0; //0x154
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| 228 | UINT32 OSD_WB_ADDR1; //0x158
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| 229 | UINT32 OSD_WB_ADDR2; //0x15C
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| 230 | UINT32 OSD_WB_ADDR3; //0x160
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| 231 | }T_OSD_WB_Regs;
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| 232 |
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| 233 | typedef volatile struct _T_OSD_CSC_Regs
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| 234 | {
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| 235 | UINT32 OSD_CSC_MODE; //0x00
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| 236 | UINT32 OSD_A1_B1; //0x04
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| 237 | UINT32 OSD_C1_D1; //0x08
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| 238 | UINT32 OSD_A2_B2; //0x0C
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| 239 | UINT32 OSD_C2_D2; //0x10
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| 240 | UINT32 OSD_A3_B3; //0x14
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| 241 | UINT32 OSD_C3_D3; //0x18
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| 242 | UINT32 OSD_SPACE_IN1; //0x1C
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| 243 | UINT32 OSD_SPACE_IN2; //0x20
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| 244 | UINT32 OSD_SPACE_IN3; //0x24
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| 245 | UINT32 OSD_SPACE_OUT1; //0x28
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| 246 | UINT32 OSD_SPACE_OUT2; //0x2C
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| 247 | UINT32 OSD_SPACE_OUT3; //0x30
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| 248 | }T_CSC_Regs;
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| 249 |
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| 250 | typedef volatile struct _T_VOU_Regs
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| 251 | {
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| 252 | T_OSDGlobal_Regs *ptOSDGlobal;
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| 253 | T_OSD_VL_Regs *ptOSDVL;
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| 254 | T_OSD_GL_Regs *ptOSDGL;
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| 255 | T_OSD_MainChanel_Regs *ptOSDMC;
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| 256 | T_OSD_WB_Regs *ptOSDWB;
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| 257 | T_CSC_Regs *ptOSDCSC;
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| 258 | }T_VOU_Regs;
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| 259 |
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| 260 | /****************************************************************************
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| 261 | * Constants
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| 262 | ****************************************************************************/
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| 263 |
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| 264 | /****************************************************************************
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| 265 | * Global Variables
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| 266 | ****************************************************************************/
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| 267 |
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| 268 | /****************************************************************************
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| 269 | * Function Prototypes
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| 270 | ****************************************************************************/
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| 271 | SINT32 zDrvVOU_Open(void);
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| 272 | void zDrvVOU_GetDevInfo(T_ZDrv_OSDInfo *ptDevInfo);
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| 273 | SINT32 zDrvVOU_Close(VOID);
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| 274 | SINT32 zDrvVOU_OneFrame(T_ZDrv_VOU_OSDPara *ptOSDPara);
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| 275 | SINT32 zDrvVOU_WBParaUpdate(T_ZDrv_VOU_WBPara *ptWBPara);
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| 276 | void zDrvVOU_ClkCtrl(T_ZDrvSysClk_Gate ClkCtrl);
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| 277 |
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| 278 |
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| 279 |
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| 280 | #endif/*_FILENAME_H*/
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| 281 |
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