blob: 7703efdaf78dc6752ba1f0df9f89d4f7195711d7 [file] [log] [blame]
yuezonghe824eb0c2024-06-27 02:32:26 -07001/*********************************************************************
2 Copyright 2016 by ZXIC Corporation.
3*
4* FileName:: spifc.c
5* File Mark:
6* Description:
7* Others:
8* Version:
9* Author:
10* Date:
11
12* History 1:
13* Date:
14* Version:
15* Author:
16* Modification:
17* History 2:
18**********************************************************************/
19#include <common.h>
20#include <asm/arch/spifc.h>
21#include <asm/io.h>
22#include <bbt.h>
23
24#include "flash.h"
25
26
27static const struct spi_flash_device_para *spi_flash_info = NULL;
28/* spi flash parameter config */
29static const struct spi_flash_device_para spi_flash_para[] = {
30 /* GIGADEVICE GD5F1GQ4R 128MB 1.8V SPI-NAND */
31 {0xC8, 0xC1, 0x77, 2048, 11, 128, 17, 1024, 0x20000, 1},
32 /* GIGADEVICE GD5F1GQ5RExxG 128MB 1.8V SPI-NAND */
33 {0xC8, 0x41, 0x77, 2048, 11, 64, 17, 1024, 0x20000, 1},
34 /* GIGADEVICE GD5F2GQ4R 256MB SPI-NAND */
35 {0xC8, 0xC2, 0x77, 2048, 11, 128, 17, 2048, 0x20000, 1},
36 /* GIGADEVICE GD5F4GQ4U 512MB SPI-NAND */
37 {0xC8, 0xC4, 0x77, 4096, 12, 256, 18, 2048, 0x40000, 1},
38
39 /* PARAGON PN26Q01AWSIUG 128MB SPI-NAND */
40 {0xA1, 0xC1, 0x77, 2048, 11, 128, 17, 1024, 0x20000, 1},
41 /* PN26Q02AWSIUG 1.8V 2G-BIT SPI NAND */
42 {0xA1, 0xC2, 0x77, 2048, 11, 128, 17, 2048, 0x20000, 1},
43
44 /* HYF1GQ4IAACAE SPI-NAND */
45 {0xC9, 0x51, 0x77, 2048, 11, 128, 17, 1024, 0x20000, 1},
46 /* HYF2GQ4IAACAE SPI-NAND */
47 {0xC9, 0x52, 0x77, 2048, 11, 128, 17, 2048, 0x20000, 1},
48 /*winbond W25N01G*/
49 {0xEF, 0xBA, 0x77, 2048, 11, 64, 17, 1024, 0x20000, 1},
50 /*winbond W25N02G*/
51 {0xEF, 0xBB, 0x77, 2048, 11, 64, 17, 2048, 0x20000, 1},
52 /* TOSHIBA TC58CYG0S3HRAIG 128MB SPI-NAND*/
53 {0x98, 0xB2, 0x77, 2048, 11, 64, 17, 1024, 0x20000, 1},
54 /* TOSHIBA TC58CYG1S3HRAIG 256MB SPI-NAND*/
55 {0x98, 0xBB, 0x77, 2048, 11, 64, 17, 2048, 0x20000, 1},
56 /* ZETTA ZD35X1GAXXX 128MB SPI-NAND*/
57 {0xBA, 0x21, 0x77, 2048, 11, 64, 17, 1024, 0x20000, 1},
58 /* DOSILICON DS35X1GAXXX 128MB SPI-NAND*/
59 {0xE5, 0x21, 0x77, 2048, 11, 64, 17, 1024, 0x20000, 1},
60 /* DOSILICON DS35X12BXXX 64MB SPI-NAND*/
61 {0xE5, 0xA5, 0x77, 2048, 11, 128, 17, 512, 0x20000, 1},
62 /* FUDANWEI FM25LS01 128MB SPI-NAND*/
63 {0xA1, 0xA5, 0x77, 2048, 11, 128, 17, 1024, 0x20000, 1},
64 /* hosin HG-SPIXGb-1XAIA 128MB SPI-NAND*/
65 {0xD6, 0x21, 0x77, 2048, 11, 64, 17, 1024, 0x20000, 1},
66 /* EMST F50D1G41LB (2M) 128MB SPI-NAND */
67 {0xC8, 0x11, 0x77, 2048, 11, 64, 17, 1024, 0x20000, 1},
68 /* FORESEE F35UQA001G 128MB SPI-NAND */
69 {0xCD, 0x61, 0x77, 2048, 11, 64, 17, 1024, 0x20000, 1},
70 /* FORESEE F35UQA512M 64MB SPI-NAND */
71 {0xCD, 0x60, 0x77, 2048, 11, 64, 17, 512, 0x20000, 1},
72 /* micron-MT29F2G01ABAGDWB-ITG 256MB SPI-NAND */
73 {0x2C, 0x25, 0x77, 2048, 11, 128, 17, 2048, 0x20000, 2},
74 /* ESMT F50D44G41XB (2X) 512MB SPI-NAND*/
75 {0x2C, 0x35, 0x77, 4096, 12, 256, 18, 2048, 0x40000, 1},
76 {0}
77};
78
79
80/*
81 ******************************************************************************
82 * Function: spifc_enable
83 * Description:
84 * Parameters:
85 * Input:
86 * Output:
87 * Returns:
88 * Others:
89 *******************************************************************************
90 */
91static void spifc_enable(void)
92{
93 volatile struct spi_t* spi = (struct spi_t*)SYS_SPI_NAND_BASE;
94
95 if( spi->SFC_EN & FC_EN_BACK )
96 return;
97
98 spi->SFC_EN |= FC_EN;
99 spi->SFC_CTRL0 |= FC_SCLK_PAUSE_EN;
100}
101
102/*
103 ******************************************************************************
104 * Function: spifc_clear_fifo
105 * Description:
106 * Parameters:
107 * Input:
108 * Output:
109 * Returns:
110 * Others:
111 *******************************************************************************
112 */
113void spifc_clear_fifo( void )
114{
115 volatile struct spi_t* spi = (struct spi_t*)SYS_SPI_NAND_BASE;
116
117 spi->SFC_CTRL0 |= (FC_RXFIFO_THRES | FC_TXFIFO_THRES |
118 FC_RXFIFO_CLR | FC_TXFIFO_CLR);
119}
120
121
122/*
123 ******************************************************************************
124 * Function: spifc_setup_cmd
125 * Description:
126 * Parameters:
127 * Input:
128 * Output:
129 * Returns:
130 * Others:
131 *******************************************************************************
132 */
133static void spifc_setup_cmd( struct spiflash_cmd_t *cmd,
134 uint32_t addr, uint32_t len )
135{
136 volatile struct spi_t* spi = (struct spi_t*)SYS_SPI_NAND_BASE;
137 uint32_t wrap = 0;
138 uint32_t tmp = 0;
139
140 /* ÃüÁîÂë */
141 spi->SFC_INS = cmd->cmd;
142
143 /* Êý¾Ý³¤¶È */
144 if( len )
145 spi->SFC_BYTE_NUM = len - 1;
146 else
147 spi->SFC_BYTE_NUM = 0;
148
149 switch( len )
150 {
151 case 2048:
152 wrap = WRAP_SIZE_MAIN;
153 break;
154 case 2112:
155 wrap = WRAP_SIZE_MAIN_OOB;;
156 break;
157 case 64:
158 wrap = WRAP_SIZE_OOB;;
159 break;
160 default:
161 wrap = 0;
162 break;
163 }
164
165 /* µØÖ·Âë */
166 switch( spi->SFC_INS )
167 {
168 case CMD_READ_FROM_CACHE:
169 // case CMD_READ_FROM_CACHE_X2:
170 case CMD_READ_FROM_CACHE_X4:
171 case CMD_READ_FROM_CACHE_QIO:
172 case CMD_PROGRAM_LOAD:
173 case CMD_PROGRAM_LOAD_X4:
174 // case CMD_PROGRAM_LOAD_RANDOM:
175 // case CMD_PROGRAM_LOAD_RANDOM_X4:
176 //case CMD_PROGRAM_LOAD_RANDOM_QIO:
177 addr |= wrap;
178 break;
179
180 default:
181 addr = addr;
182 break;
183 }
184 spi->SFC_ADDR = addr;
185
186 /* µØÖ·Âë¡¢¿ÕÖÜÆÚ¡¢¶Á/д ʹÄÜÉèÖà */
187 spi->SFC_CTRL1 = 0;
188 spi->SFC_CTRL1 = ((cmd->addr_tx_en << FC_ADDR_TX_EN) |
189 (cmd->dumy_tx_en << FC_DUMMY_TX_EN) |
190 (cmd->data_rx_en << FC_READ_DAT_EN) |
191 (cmd->data_tx_en << FC_WRITE_DAT_EN));
192
193
194 /* ¿ÕÖÜÆÚÊý¡¢µØÖ·¿í¶È(1£¬2£¬3£¬4×Ö½Ú)¡¢
195 * µØÖ·/Êý¾ÝÏß¶È¡¢´«Êäģʽ
196 */
197#if 0
198 tmp = spi->SFC_CTRL2;
199 tmp &= 0x1f;
200 tmp |= ((cmd->dumy_bytes << FC_DUMMY_BYTE_NUM) |
201 (cmd->dumy_bits << FC_DUMMY_BIT_NUM) |
202 (cmd->addr_width << FC_ADDR_BYTE_NUM));
203 spi->SFC_CTRL2 = tmp;
204#else
205 spi->SFC_CTRL2 = 0;
206 tmp |= ((cmd->dumy_bytes << FC_DUMMY_BYTE_NUM) |
207 (cmd->dumy_bits << FC_DUMMY_BIT_NUM) |
208 (cmd->addr_width << FC_ADDR_BYTE_NUM));
209 tmp &= ~0x700;
210 spi->SFC_CTRL2 = tmp;
211#endif
212
213}
214
215
216/*
217 ******************************************************************************
218 * Function: spifc_clear_int
219 * Description:
220 * Parameters:
221 * Input:
222 * Output:
223 * Returns:
224 * Others:
225 *******************************************************************************
226 */
227 void spifc_clear_int( void )
228{
229 volatile struct spi_t* spi = (struct spi_t*)SYS_SPI_NAND_BASE;
230
231 if(spi->SFC_INT_RAW & 0x2)
232 printf("\n");
233
234 spi->SFC_INT_SW_CLR = 0xFF; //clear int ?
235}
236
237
238/*
239 ******************************************************************************
240 * Function: spifc_wait_cmd_end
241 * Description:
242 * Parameters:
243 * Input:
244 * Output:
245 * Returns:
246 * Others:
247 *******************************************************************************
248 */
249static int spifc_wait_cmd_end( void )
250{
251 volatile struct spi_t* spi = (struct spi_t*)SYS_SPI_NAND_BASE;
252 uint32_t int_status = 0;
253
254 while(!(spi->SFC_INT_RAW & FC_INT_RAW_MASK));
255
256 int_status = spi->SFC_INT_RAW;
257 spi->SFC_INT_SW_CLR = int_status; /* clear intrrupt */
258
259 if(int_status & FC_INT_RAW_CMD_END)
260 {
261 return 0;
262 }
263 else
264 {
265 printf("intr err.\n");
266 return -1;
267 }
268
269}
270
271
272/*
273 ******************************************************************************
274 * Function: spifc_read_fifo_one_byte
275 * Description:
276 * Parameters:
277 * Input:
278 * Output:
279 * Returns:
280 *
281 * Others: only for:
282 [Instruction] |--addr width is 8 bit
283 [addr] |--get feature
284 [data_rx]
285 *******************************************************************************
286 */
287static int spifc_read_fifo_one_byte( uint8_t *value )
288{
289 uint32_t sw = 0;
290 volatile struct spi_t* spi = (struct spi_t*)SYS_SPI_NAND_BASE;
291
292 sw = spi->SFC_SW;
293
294 if( ((sw >> FC_RX_FIFO_CNT) & FC_RX_FIFO_CNT_MASK) != 1 )
295 {
296 return -1;
297 }
298
299 *value = (uint8_t)spi->SFC_DATA;
300
301 return 0;
302}
303
304
305/*
306 ******************************************************************************
307 * Function: spifc_read_fifo
308 * Description:
309 * Parameters:
310 * Input:
311 * Output:
312 * Returns:
313 * Others:
314 *******************************************************************************
315 */
316static uint32_t spifc_read_fifo( uint32_t len, uint8_t *buf )
317{
318 volatile struct spi_t* spi = (struct spi_t*)SYS_SPI_NAND_BASE;
319 uint32_t *p = (uint32_t *)buf;
320 uint32_t cnt = 0;
321
322 while(cnt < ((len+3)>>2))
323 {
324 if(spi->SFC_SW & (FC_RX_FIFO_CNT_MASK<<FC_RX_FIFO_CNT))//rx fifo not empty
325 {
326 p[cnt++]= spi->SFC_DATA;
327 }
328 }
329
330 return (cnt<<2);
331}
332
333
334/*
335 ******************************************************************************
336 * Function: spifc_start
337 * Description:
338 * Parameters:
339 * Input:
340 * Output:
341 * Returns:
342 * Others:
343 *******************************************************************************
344 */
345static void spifc_start( void )
346{
347 volatile struct spi_t* spi = (struct spi_t*)SYS_SPI_NAND_BASE;
348
349 spi->SFC_START |= FC_START;
350}
351
352/*
353 ******************************************************************************
354 * Function: spifc_get_feature
355 * Description:
356 * Parameters:
357 * Input:
358 * Output:
359 * Returns:
360 *
361 * Others: [Instruction] |--addr width is 8 bit
362 [addr] |--get feature
363 [data_rx] |--read id
364
365 *******************************************************************************
366 */
367 static int spifc_get_feature( uint32_t reg_addr, uint8_t *value)
368 {
369 int ret = 0;
370
371 struct spiflash_cmd_t cmd = {CMD_GET_FEATURE,
372 1,
373 FC_ADDR_BYTE_NUM_8,
374 0,
375 1,
376 0,
377 0,
378 0
379 };
380
381 spifc_clear_fifo();
382 spifc_clear_int();
383
384 spifc_setup_cmd(&cmd, reg_addr, 1);
385 spifc_start();
386 ret = spifc_wait_cmd_end();
387 if(ret != 0)
388 {
389 return ret;
390 }
391
392 ret = spifc_read_fifo_one_byte(value);
393 if(ret != 0)
394 {
395 return ret;
396 }
397
398 return 0;
399}
400
401/*
402 ******************************************************************************
403 * Function: spifc_read_id
404 * Description:
405 * Parameters:
406 * Input:
407 * Output:
408 * Returns:
409 *
410 * Others: [Instruction] |--addr width is 8 bit
411 [addr] |--get feature
412 [data_rx] |--read id
413 *******************************************************************************
414 */
415static int spifc_read_id(uint32_t reg_addr, uint8_t *value, uint8_t len)
416{
417 int ret = 0;
418
419 struct spiflash_cmd_t cmd = { CMD_READ_ID,
420 1,
421 FC_ADDR_BYTE_NUM_8,
422 0,
423 1,
424 0,
425 0,
426 0
427 };
428
429 spifc_clear_fifo();
430 spifc_clear_int();
431 spifc_setup_cmd(&cmd, reg_addr, len);
432 spifc_start();
433 ret = spifc_wait_cmd_end();
434 if(ret != 0)
435 {
436 return ret;
437 }
438
439 ret = spifc_read_fifo(len, value);
440 if(ret != 0)
441 {
442 return ret;
443 }
444
445 return 0;
446}
447
448
449/*
450 ******************************************************************************
451 * Function: spifc_read_page_to_cache
452 * Description:
453 * Parameters:
454 * Input:
455 * Output:
456 * Returns:
457 * Others: [Instruction] |--addr width is 24 bit(page/block addr!!!!)
458 [addr] |--page read
459 |--block erase
460 |--program execute
461 *******************************************************************************
462 */
463static int spifc_read_page_to_cache(uint32_t page_addr)
464{
465 int ret = 0;
466 uint8_t status = 0;
467
468 struct spiflash_cmd_t cmd = { CMD_READ_PAGE_TO_CACHE,
469 1,
470 FC_ADDR_BYTE_NUM_24,
471 0,
472 0,
473 0,
474 0,
475 0
476 };
477
478 spifc_clear_fifo();
479 spifc_clear_int();
480 spifc_setup_cmd(&cmd, page_addr, 0);
481 spifc_start();
482 ret = spifc_wait_cmd_end();
483 if(ret != 0)
484 {
485 return ret;
486 }
487
488 do
489 {
490 spifc_get_feature(REG_STATUS, &status);
491 }while( status & OIP);
492
493 return 0;
494}
495
496/*
497 ******************************************************************************
498 * Function: spifc_read_from_cache
499 * Description:
500 * Parameters:
501 * Input:
502 * Output:
503 * Returns:
504 * Others: [Instruction] |--addr width is 16 bit
505 [addr] |--dummy cycel 8/4/2
506 [dummy] |--read form cache(X1,X2,X4)
507 [data_rx] |--read form cache(dual,quad)IO
508 *******************************************************************************
509 */
510static int spifc_read_from_cache(uint32_t column_addr, uint32_t len, uint8_t *buf)
511{
512 int ret = 0;
513
514 uint32_t len_tmp = 0;
515 struct spiflash_cmd_t cmd;
516
517 cmd.cmd = CMD_READ_FROM_CACHE;
518 cmd.dumy_bytes = 1;
519 cmd.dumy_bits = 0;
520 cmd.addr_tx_en = 1;
521 cmd.addr_width = FC_ADDR_BYTE_NUM_16;
522 cmd.data_tx_en = 0;
523 cmd.data_rx_en = 1;
524 cmd.dumy_tx_en = 1;
525
526 spifc_clear_fifo();
527 spifc_clear_int();
528 spifc_setup_cmd(&cmd, column_addr, len);
529 spifc_start();
530
531 len_tmp = spifc_read_fifo(len, buf);
532 if( len_tmp != len )
533 {
534 ret = -2;
535 return ret;
536 }
537
538 ret = spifc_wait_cmd_end();
539 if( ret != 0 )
540 {
541 return ret;
542 }
543
544 return 0;
545}
546
547
548/*
549 ******************************************************************************
550 * Function: nand_read_oob
551 * Description:
552 * Parameters:
553 * Input:
554 * Output:
555 * Returns:
556 * Others:
557 *******************************************************************************
558 */
559void spifc_read_oob(uint8_t *buf, uint32_t offset, uint32_t len)
560{
561 uint32_t column_offset = spi_flash_info->page_size;
562 uint32_t page = offset >> (spi_flash_info->page_size_shift);
563 uint32_t blocks = offset >> (spi_flash_info->block_size_shift);
564
565 spifc_read_page_to_cache(page);
566
567 if((spi_flash_info->planes == 2) && ((blocks%2) != 0))
568 {
569 column_offset |= (0x1 << 12);
570 }
571 spifc_read_from_cache(column_offset, spi_flash_info->oob_size, buf);
572}
573
574
575/*
576 ******************************************************************************
577 * Function: read_page
578 * Description:
579 * Parameters:
580 * Input:
581 * Output:
582 * Returns:
583 * Others:
584 *******************************************************************************
585 */
586int32_t spifc_read_page(uint32_t buf, uint32_t offset)
587{
588 int ret = 0;
589 uint8_t feature = 0x0;
590
591 uint32_t page = offset >> (spi_flash_info->page_size_shift);
592 uint32_t blocks = offset >> (spi_flash_info->block_size_shift);
593 uint32_t column_offset = 0;
594
595 if( (buf & 0x3) != 0 ) /* DMAµØÖ·ÒªÇó4×Ö½Ú¶ÔÆë */
596 {
597 printf("addr err.\n");
598 return -1;
599 }
600
601 ret = spifc_read_page_to_cache(page);
602 if( ret != 0 )
603 return ret;
604
605 ret = spifc_get_feature(REG_STATUS, &feature);
606 if(ret != 0)
607 return ret;
608
609 if((feature>>ECC_ERR_BIT & 0x3) == 0x2)
610 {
611 printf("ecc err.\n");
612 return -1;
613 }
614 if((spi_flash_info->planes == 2) && ((blocks%2) != 0))
615 {
616 column_offset |= (0x1 << 12);
617 }
618 ret = spifc_read_from_cache(column_offset, spi_flash_info->page_size, (uint8_t *)buf);
619 if(ret != 0)
620 return ret;
621
622 return 0;
623}
624
625/*
626 ******************************************************************************
627 * Function: read_page
628 * Description:
629 * Parameters:
630 * Input:
631 * Output:
632 * Returns:
633 * Others:
634 *******************************************************************************
635 */
636int32_t spifc_read_page_raw(uint32_t buf, uint32_t offset)
637{
638 int ret = 0;
639 uint8_t feature = 0x0;
640
641 uint32_t page = offset >> (spi_flash_info->page_size_shift);
642
643 if( (buf & 0x3) != 0 ) /* DMAµØÖ·ÒªÇó4×Ö½Ú¶ÔÆë */
644 {
645 printf("addr err.\n");
646 return -1;
647 }
648
649 ret = spifc_read_page_to_cache(page);
650 if( ret != 0 )
651 return ret;
652
653 ret = spifc_read_from_cache(0, spi_flash_info->page_size, (uint8_t *)buf);
654 if(ret != 0)
655 return ret;
656
657 return 0;
658}
659
660
661/*
662 ******************************************************************************
663 * Function: nand_read
664 * Description:
665 * Parameters:
666 * Input:
667 * Output:
668 * Returns:
669 * Others: from: must page align len: must page align
670 *******************************************************************************
671 */
672int32_t spifc_read(uint32_t from, uint32_t len, uint32_t to)
673{
674 uint32_t offset = from;
675 uint32_t left_to_read = len;
676 uint32_t p_to = to;
677 int32_t ret = 0;
678 int32_t page_size = (spi_flash_info->page_size);
679
680 if((offset & (page_size - 1)) || (len & (page_size - 1)) )
681 {
682 return -1;
683 }
684
685 while( left_to_read > 0 )
686 {
687 ret = spifc_read_page(p_to, offset);
688 if(ret != 0)
689 {
690 return -1;
691 }
692
693 left_to_read -= page_size;
694 offset += page_size;
695 p_to += page_size;
696 }
697 return 0;
698}
699
700
701/*******************************************************************************
702 * Function: nand_read_id
703 * Description:
704 * Parameters:
705 * Input:
706 *
707 * Output:
708 *
709 * Returns:
710 *
711 *
712 * Others:
713 ********************************************************************************/
714 int32_t read_id (void)
715{
716 uint8_t id[4];
717 const struct spi_flash_device_para *spi_flash = &spi_flash_para[0];
718
719 spifc_read_id(0x0, id, 2);
720
721 while( spi_flash->manuf_id != 0 )
722 {
723 if( ((uint8_t)id[0] == spi_flash->manuf_id) &&
724 ((uint8_t)id[1] == spi_flash->device_id) )
725 {
726 spi_flash_info = spi_flash;
727 return 0;
728 };
729 spi_flash++;
730 }
731
732 return -1;
733}
734
735/*******************************************************************************
736 * Function:
737 * Description:
738 * Parameters:
739 * Input:
740 *
741 * Output:
742 *
743 * Returns:
744 *
745 *
746 * Others:
747 ********************************************************************************/
748int32_t read_data(uint32_t from, uint32_t len, uint32_t to)
749{
750 uint32_t offset = from;
751 uint32_t left_to_read = len;
752 uint32_t p_to = to;
753 int32_t ret = 0;
754 int32_t block_size = (spi_flash_info->block_size);
755
756 while(left_to_read > 0)
757 {
758 uint32_t block_offset = offset & (block_size - 1);
759 uint32_t read_length;
760
761 if( nand_block_isbad(offset) )
762 {
763 offset += block_size;
764 continue;
765 }
766
767 if (left_to_read < (block_size - block_offset))
768 read_length = left_to_read;
769 else
770 read_length = block_size - block_offset;
771
772 ret = spifc_read(offset, read_length, p_to);
773 if(ret != 0)
774 {
775 return -1;
776 }
777
778 left_to_read -= read_length;
779 offset += read_length;
780 p_to += read_length;
781 }
782
783 return 0;
784}
785
786/*******************************************************************************
787 * Function: nand_init
788 * Description:
789 * Parameters:
790 * Input:
791 *
792 * Output:
793 *
794 * Returns:
795 *
796 *
797 * Others:
798 ********************************************************************************/
799int32_t spifc_init (void)
800{
801 int32_t ret = 0;
802 spifc_enable();
803 ret = read_id();
804 if(ret != 0)
805 {
806 printf("id err!\n");
807 return -1;
808 }
809
810 flash.flash_type = SPI_NAND_BOOT;
811 flash.manuf_id = spi_flash_info->manuf_id;
812 flash.device_id = spi_flash_info->device_id;
813 flash.page_size = spi_flash_info->page_size;
814 flash.page_size_shift = spi_flash_info->page_size_shift;
815 flash.oob_size = spi_flash_info->oob_size;
816 flash.block_size = spi_flash_info->block_size;
817 flash.block_size_shift = spi_flash_info->block_size_shift;
818 flash.block_num = spi_flash_info->block_num;
819 flash.read_page_raw = spifc_read_page_raw;
820 flash.read_oob = spifc_read_oob;
821 flash.read = read_data;
822
823 return 0;
824
825}
826
827/*
828 ******************************************************************************
829 * Function:
830 * Description:
831 * Parameters:
832 * Input:
833 * Output:
834 * Returns:
835 * Others:
836 *******************************************************************************
837 */
838int board_flash_init(void)
839{
840 int ret = 0;
841 char boot_mode = 0;
842
843 printf("spi-nand:");
844
845 boot_mode = get_boot_mode();
846 if(boot_mode != SPI_NAND_BOOT)
847 {
848 printf("mode err.\n");
849 return -1;
850 }
851
852 writel(CFG_START_MODE_SPI_NAND, CFG_BOOT_MODE_START_MODE_FOR_UBOOT);
853 ret = spifc_init();
854 if(ret != 0)
855 {
856 printf("init err.\n");
857 return -1;
858 }
859 printf("init ok.\n");
860
861// nand_creat_bbt();
862nand_creat_ram_bbt();
863
864 return 0;
865}
866
867