blob: 53dafbe1ec6a2bd10ddca4ce34da0fc2bfe43dff [file] [log] [blame]
yuezonghe824eb0c2024-06-27 02:32:26 -07001/*
2 * Copyright (C) 2016 ZXIC Inc.
3 *
4 */
5#include <common.h>
6#include <version.h>
7#include <asm/io.h>
8#include <asm/string.h>
9#include <asm/arch/cpu.h>
10#include <image.h>
11#include <linux/byteorder/generic.h>
12#include <load_mode.h>
13#include <asm/arch/top_clock.h>
14#include <asm/arch/uart.h>
15
16#include "config.h"
17#include "ddr.h"
18#include "../drivers/efuse.h"
19#include "../drivers/flash.h"
20
21#define FLAGS_PARTITION_ERROR (0x1111) /*·ÖÇøÒì³£*/
22
23typedef short (init_fnc_t) (void);
24
25int print_info(void)
26{
27#if defined(CFG_ZLOAD)
28 printf ("\nInc zloader 1.3.4\n");
29#else
30 printf ("\nInc tLoader 1.3.4\n");
31#endif
32 return 0;
33}
34
35void copy_to_iram1(void)
36{
37 memcpy(0x100000, 0x8a000, 0x2000); /* TEXT_BASE=0x100000 */
38 writel(CFG_START_STAGE1_STATE, CFG_START_STAGE1_ADDR);
39}
40
41/*
42 ******************************************************************************
43 * Function:
44 * Description:
45 * Parameters:
46 * Input:
47 * Output:
48 * Returns:
49 * Others: IRAM addr is provided from ap
50 *******************************************************************************
51 */
52void clear_iram( void )
53{
54 uint32_t i = 0;
55
56 for( i=0x82000400; i<=0x82003400; i+=4 )
57 {
58 writel(0x0, i);
59 }
60}
61
62/*
63 ******************************************************************************
64 * Function:
65 * Description:
66 * Parameters:
67 * Input:
68 * Output:
69 * Returns:
70 * Others:
71 *******************************************************************************
72 */
73 void write_loader_mode(uint32_t mode)
74{
75 writel(mode, CFG_BOOT_MODE_SAVE_ADDR_FOR_UBOOT);
76}
77
78void hang (void)
79{
80 /* call board specific hang function */
81 for (;;);
82}
83
84/*******************************************************************************
85 * Function:
86 * Description:
87 * Parameters:
88 * Input:
89 *
90 * Output:
91 *
92 * Returns:
93 *
94 *
95 * Others:
96 ********************************************************************************/
97void usb_apcore_poweroff(void)
98{
99 u32 tmp;
100
101 tmp =readl(USB_RESET); /*usb hsic reset*/
102 tmp &= ~0x7;
103 writel(tmp, USB_RESET);
104
105 tmp =readl(CORE_OUTPUT_SWITCH_CONFIG_REG);/*ap clk&mg control by sw*/
106 tmp &= ~((0x1<<2)|(0x1<<5));
107 writel(tmp, CORE_OUTPUT_SWITCH_CONFIG_REG);
108
109 tmp =readl(CORE_OUTPUT_SW_CONFIG_REG1);/*ap clk off*/
110 tmp &= ~(0x1<<2);
111 writel(tmp, CORE_OUTPUT_SW_CONFIG_REG1);
112
113 tmp =readl(CORE_OUTPUT_SW_CONFIG_REG2);/*ap mg iso*/
114 tmp |= (0x1<<5);
115 writel(tmp, CORE_OUTPUT_SW_CONFIG_REG2);
116
117 usdelay(1);
118
119 tmp =readl(CORE_OUTPUT_SW_CONFIG_REG2);/*ap mg rst*/
120 tmp |= (0x1<<4);
121 writel(tmp, CORE_OUTPUT_SW_CONFIG_REG2);
122
123 usdelay(1);
124
125 tmp =readl(CORE_OUTPUT_SW_CONFIG_REG2);/*ap mg off*/
126 tmp &= ~(0x1<<3);
127 writel(tmp, CORE_OUTPUT_SW_CONFIG_REG2);
128
129 //__REG(0x0013a0ac) &= ~((0x1<<2)|(0x1<<5)); /*ap clk&mg control by sw*/
130 //__REG(0x0013a0b8) &= ~(0x1<<2); /*ap clk off*/
131 //__REG(0x0013a0bc) |= (0x1<<5); /*ap mg iso*/
132 //__REG(0x0013a0bc) |= (0x1<<4); /*ap mg rst*/
133 //__REG(0x0013a0bc) &= ~(0x1<<3); /*ap mg off*/
134}
135
136#ifdef CONFIG_ZX297520V3E_MDL_AB
137void start_armboot (void)
138{
139 int32_t ret = 0;
140 int32_t add;
141 uint32_t amt_value = 0;
142 int32_t err_flag = 0;
143 T_BOOT_TARGET bootTarget;
144 T_BOOT_FOTA_FLAG flagsData;
145 T_BOOT_FOTA_FLAG *fotaFlag;
146 T_FOTA_FLAG_INFO *fotaFlagInfo;
147 T_BOOT_DUALSYSTEM_TYPE dualSystemType;
148
149 clk_init();
150 timer_init();
151#if CFG_PRINTF
152 uart_init();
153#endif
154 print_info();
155
156 /* After reset, Copy zloader forcely. */
157 /* Now IRAM1 maybe occupied by dirty data. */
158 writel(0, CFG_START_STAGE1_ADDR);
159 amt_value = readl(CFG_AMT_MODE_SWITCH_ADDR);
160 clear_iram();
161 writel(amt_value, CFG_AMT_MODE_SWITCH_ADDR);
162
163 ret = board_flash_init();
164 if(ret != 0)
165 {
166 goto error;
167 }
168
169 efuse_init();
170
171 if(get_ddr_flag() == CHIP_DDR_IS_32M)
172 {
173 ddr_init(CHIP_DDR_IS_32M);
174 }
175 else if(get_ddr_flag() == CHIP_DDR_IS_64M)
176 {
177 ddr_init(CHIP_DDR_IS_64M);
178 }
179 else if(get_ddr_flag() == CHIP_DDR_IS_128M)
180 {
181 ddr_init(CHIP_DDR_IS_128M);
182 }
183 else
184 {
185 ddr_init(CHIP_DDR_IS_256M);
186 }
187
188 usb_apcore_poweroff();
189/********************* ÔËÐÐT-LOAD,½øÈëÏÂÔØÄ£Ê½ ******************/
190#if defined(CFG_TLOAD)
191 write_loader_mode(CFG_TLOAD_MODE);
192
193#if CFG_USB
194 usb_boot(SYS_USB_BASE);
195#endif
196
197#if CFG_UART
198 uart_boot();
199#endif
200
201#endif /* CFG_TLOAD */
202
203/********************* ÔËÐÐZ-LOAD,½øÈëÕý³£Æô¶¯Ä£Ê½ **********/
204#if defined(CFG_ZLOAD)
205 uint32_t uboot_entry_point = 0;
206 char boot_mode = 0;
207
208 write_loader_mode(CFG_ZLOAD_MODE);
209
210 /*read flags·ÖÇø*/
211 ret = read_flags_image((uint8_t *)FLAGS_IMAGE);
212
213 if( ret != 0 )
214 {
215 printf("read flags partition error! Use default parameters\n");
216 //goto error;
217 err_flag = 1;
218
219 /*ĬÈÏflags·ÖÇøÊý¾Ý*/
220 flagsData.magic = FLAGS_MAGIC;
221 flagsData.boot_to = DUAL_SYSTEM;
222 flagsData.fota_status = 1;
223 flagsData.system.status = DUALSYSTEM_STATUS_BOOTABLE;
224 flagsData.system2.status = DUALSYSTEM_STATUS_BOOTABLE;
225 fotaFlag = &flagsData;
226 }
227 else
228 {
229 fotaFlag = (T_BOOT_FOTA_FLAG *)(CFG_TEMP_ADDR);
230 }
231
232 bootTarget = fotaFlag->boot_to;
233
234 writel(DUALSYSTEM_STATUS_BOOTABLE, BOOT_FLAG_ADDR);/*ĬÈÏ¿ÉÆô¶¯*/
235
236 if(bootTarget == DUAL_SYSTEM)
237 {
238 if (fotaFlag->system.status == DUALSYSTEM_STATUS_UNBOOTABLE)
239 {
240 printf("dual_system status is unbootable!");
241 goto error;
242 }
243 ret = read_uboot_image((uint8_t *)UBOOT_IMAGE, &uboot_entry_point);
244 if( ret != 0)
245 {
246 printf("read uboot1 image error, goto uboot2!");
247 writel(DUALSYSTEM_STATUS_UNBOOTABLE, BOOT_FLAG_ADDR);
248 ret = read_uboot_image((uint8_t *)UBOOT2_IMAGE, &uboot_entry_point);
249 if( ret != 0)
250 {
251 printf("read uboot2 iamge error!");
252 goto error;
253 }
254 }
255 else
256 printf("goto uboot!");
257 }
258 else if(bootTarget == DUAL_SYSTEM2)
259 {
260 if (fotaFlag->system2.status == DUALSYSTEM_STATUS_UNBOOTABLE)
261 {
262 printf("dual_system2 status is unbootable!");
263 goto error;
264 }
265 ret = read_uboot_image((uint8_t *)UBOOT2_IMAGE, &uboot_entry_point);
266 if( ret != 0)
267 {
268 printf("read uboot2 iamge error, goto uboot!");
269 writel(DUALSYSTEM_STATUS_UNBOOTABLE, BOOT_FLAG_ADDR);
270 ret = read_uboot_image((uint8_t *)UBOOT_IMAGE, &uboot_entry_point);
271 if( ret != 0)
272 {
273 printf("read uboot iamge error!");
274 goto error;
275 }
276 }
277 else
278 printf("goto uboot2!");
279 }
280 else
281 {
282 printf("boot target get error!");
283 goto error;
284 }
285
286 if(err_flag == 1)
287 {
288 writel(FLAGS_PARTITION_ERROR, BOOT_FLAG_ADDR);
289 }
290
291 printf("read uboot ok.\n");
292
293 /* set arm jump PC start code */
294 writel(0xE59ff000, SYS_IRAM1_BASE);
295 writel(uboot_entry_point, SYS_IRAM1_BASE + 8);
296
297 printf("start uboot...\n");
298 /* Relese A9 Core, A9 start to run uboot right now. */
299 writel(CPU_UFI_SW_RSTEN, CPU_A9_SUBSYS_CFG);
300
301
302 /* waiting for uboot read m0 image. */
303 uint32_t m0_entry_point = 0;
304 ret = nand_read_m0(&m0_entry_point);
305 if(ret != 0)
306 {
307 goto error;
308 }
309
310 /* M0 Core start to run cpurpm right now. */
311 ((init_fnc_t *)m0_entry_point)();
312
313#endif
314
315error:
316 printf("ERR\n");
317 hang();
318}
319#else
320void start_armboot (void)
321{
322 int32_t ret = 0;
323 uint32_t amt_value = 0;
324
325
326 clk_init();
327 timer_init();
328#if CFG_PRINTF
329 uart_init();
330#endif
331 print_info();
332
333 /* After reset, Copy zloader forcely. */
334 /* Now IRAM1 maybe occupied by dirty data. */
335 writel(0, CFG_START_STAGE1_ADDR);
336 amt_value = readl(CFG_AMT_MODE_SWITCH_ADDR);
337 clear_iram();
338 writel(amt_value, CFG_AMT_MODE_SWITCH_ADDR);
339
340 ret = board_flash_init();
341 if(ret != 0)
342 {
343 goto error;
344 }
345
346 efuse_init();
347
348 if(get_ddr_flag() == CHIP_DDR_IS_32M)
349 {
350 ddr_init(CHIP_DDR_IS_32M);
351 }
352 else if(get_ddr_flag() == CHIP_DDR_IS_64M)
353 {
354 ddr_init(CHIP_DDR_IS_64M);
355 }
356 else if(get_ddr_flag() == CHIP_DDR_IS_128M)
357 {
358 ddr_init(CHIP_DDR_IS_128M);
359 }
360 else
361 {
362 ddr_init(CHIP_DDR_IS_256M);
363 }
364
365
366 usb_apcore_poweroff();
367/********************* ÔËÐÐT-LOAD,½øÈëÏÂÔØÄ£Ê½ ******************/
368#if defined(CFG_TLOAD)
369 write_loader_mode(CFG_TLOAD_MODE);
370
371#if CFG_USB
372 usb_boot(SYS_USB_BASE);
373#endif
374
375#if CFG_UART
376 uart_boot();
377#endif
378
379#endif /* CFG_TLOAD */
380
381/********************* ÔËÐÐZ-LOAD,½øÈëÕý³£Æô¶¯Ä£Ê½ **********/
382#if defined(CFG_ZLOAD)
383 uint32_t uboot_entry_point = 0;
384 char boot_mode = 0;
385
386 write_loader_mode(CFG_ZLOAD_MODE);
387
388 ret = read_uboot_image((uint8_t *)UBOOT_IMAGE, &uboot_entry_point);
389 if( ret != 0 )
390 {
391 boot_mode = get_boot_mode();
392 if((boot_mode == SPI_NAND_BOOT) || (boot_mode == NAND_BOOT))
393 {
394 ret = read_uboot_image((uint8_t *)UBOOT_MIRROR_IMAGE,
395 &uboot_entry_point);
396 if(ret != 0)
397 {
398 goto error;
399 }
400 }
401 else
402 {
403 goto error;
404 }
405 }
406 printf("read uboot ok.\n");
407
408 /* set arm jump PC start code */
409 writel(0xE59ff000, SYS_IRAM1_BASE);
410 writel(uboot_entry_point, SYS_IRAM1_BASE + 8);
411
412 printf("start uboot...\n");
413 /* Relese A9 Core, A9 start to run uboot right now. */
414 writel(CPU_UFI_SW_RSTEN, CPU_A9_SUBSYS_CFG);
415
416
417 /* waiting for uboot read m0 image. */
418 uint32_t m0_entry_point = 0;
419 ret = nand_read_m0(&m0_entry_point);
420 if(ret != 0)
421 {
422 goto error;
423 }
424
425 /* M0 Core start to run cpurpm right now. */
426 ((init_fnc_t *)m0_entry_point)();
427
428#endif
429
430error:
431 printf("ERR\n");
432 hang();
433}
434#endif