| yuezonghe | 824eb0c | 2024-06-27 02:32:26 -0700 | [diff] [blame] | 1 | /* |
| 2 | * This program is free software; you can redistribute it and/or modify |
| 3 | * it under the terms of the GNU General Public License version 2 as |
| 4 | * published by the Free Software Foundation. |
| 5 | */ |
| 6 | #include <linux/kernel.h> |
| 7 | #include <linux/module.h> |
| 8 | #include <linux/delay.h> |
| 9 | #include <linux/gpio.h> |
| 10 | #include <linux/io.h> |
| 11 | #include <asm/proc-fns.h> |
| 12 | #include <asm/system_misc.h> |
| 13 | |
| 14 | #include <mach/regs-ost.h> |
| 15 | #include <mach/reset.h> |
| 16 | #include <mach/smemc.h> |
| 17 | |
| 18 | unsigned int reset_status; |
| 19 | EXPORT_SYMBOL(reset_status); |
| 20 | |
| 21 | static void do_hw_reset(void); |
| 22 | |
| 23 | static int reset_gpio = -1; |
| 24 | |
| 25 | int init_gpio_reset(int gpio, int output, int level) |
| 26 | { |
| 27 | int rc; |
| 28 | |
| 29 | rc = gpio_request(gpio, "reset generator"); |
| 30 | if (rc) { |
| 31 | printk(KERN_ERR "Can't request reset_gpio\n"); |
| 32 | goto out; |
| 33 | } |
| 34 | |
| 35 | if (output) |
| 36 | rc = gpio_direction_output(gpio, level); |
| 37 | else |
| 38 | rc = gpio_direction_input(gpio); |
| 39 | if (rc) { |
| 40 | printk(KERN_ERR "Can't configure reset_gpio\n"); |
| 41 | gpio_free(gpio); |
| 42 | goto out; |
| 43 | } |
| 44 | |
| 45 | out: |
| 46 | if (!rc) |
| 47 | reset_gpio = gpio; |
| 48 | |
| 49 | return rc; |
| 50 | } |
| 51 | |
| 52 | /* |
| 53 | * Trigger GPIO reset. |
| 54 | * This covers various types of logic connecting gpio pin |
| 55 | * to RESET pins (nRESET or GPIO_RESET): |
| 56 | */ |
| 57 | static void do_gpio_reset(void) |
| 58 | { |
| 59 | BUG_ON(reset_gpio == -1); |
| 60 | |
| 61 | /* drive it low */ |
| 62 | gpio_direction_output(reset_gpio, 0); |
| 63 | mdelay(2); |
| 64 | /* rising edge or drive high */ |
| 65 | gpio_set_value(reset_gpio, 1); |
| 66 | mdelay(2); |
| 67 | /* falling edge */ |
| 68 | gpio_set_value(reset_gpio, 0); |
| 69 | |
| 70 | /* give it some time */ |
| 71 | mdelay(10); |
| 72 | |
| 73 | WARN_ON(1); |
| 74 | /* fallback */ |
| 75 | do_hw_reset(); |
| 76 | } |
| 77 | |
| 78 | static void do_hw_reset(void) |
| 79 | { |
| 80 | /* Initialize the watchdog and let it fire */ |
| 81 | OWER = OWER_WME; |
| 82 | OSSR = OSSR_M3; |
| 83 | OSMR3 = OSCR + 368640; /* ... in 100 ms */ |
| 84 | /* |
| 85 | * SDRAM hangs on watchdog reset on Marvell PXA270 (erratum 71) |
| 86 | * we put SDRAM into self-refresh to prevent that |
| 87 | */ |
| 88 | while (1) |
| 89 | writel_relaxed(MDREFR_SLFRSH, MDREFR); |
| 90 | } |
| 91 | |
| 92 | void pxa_restart(char mode, const char *cmd) |
| 93 | { |
| 94 | local_irq_disable(); |
| 95 | local_fiq_disable(); |
| 96 | |
| 97 | clear_reset_status(RESET_STATUS_ALL); |
| 98 | |
| 99 | switch (mode) { |
| 100 | case 's': |
| 101 | /* Jump into ROM at address 0 */ |
| 102 | soft_restart(0); |
| 103 | break; |
| 104 | case 'g': |
| 105 | do_gpio_reset(); |
| 106 | break; |
| 107 | case 'h': |
| 108 | default: |
| 109 | do_hw_reset(); |
| 110 | break; |
| 111 | } |
| 112 | } |