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yuezonghe824eb0c2024-06-27 02:32:26 -07001/* linux/arch/arm/mach-s3c2410/mach-vr1000.c
2 *
3 * Copyright (c) 2003-2008 Simtec Electronics
4 * Ben Dooks <ben@simtec.co.uk>
5 *
6 * Machine support for Thorcom VR1000 board. Designed for Thorcom by
7 * Simtec Electronics, http://www.simtec.co.uk/
8 *
9 * This program is free software; you can redistribute it and/or modify
10 * it under the terms of the GNU General Public License version 2 as
11 * published by the Free Software Foundation.
12 *
13*/
14
15#include <linux/kernel.h>
16#include <linux/types.h>
17#include <linux/interrupt.h>
18#include <linux/list.h>
19#include <linux/timer.h>
20#include <linux/init.h>
21#include <linux/gpio.h>
22#include <linux/dm9000.h>
23#include <linux/i2c.h>
24
25#include <linux/serial.h>
26#include <linux/tty.h>
27#include <linux/serial_8250.h>
28#include <linux/serial_reg.h>
29#include <linux/io.h>
30
31#include <asm/mach/arch.h>
32#include <asm/mach/map.h>
33#include <asm/mach/irq.h>
34
35#include <mach/bast-map.h>
36#include <mach/vr1000-map.h>
37#include <mach/vr1000-irq.h>
38#include <mach/vr1000-cpld.h>
39
40#include <mach/hardware.h>
41#include <asm/irq.h>
42#include <asm/mach-types.h>
43
44#include <plat/regs-serial.h>
45#include <mach/regs-gpio.h>
46#include <mach/leds-gpio.h>
47
48#include <plat/clock.h>
49#include <plat/devs.h>
50#include <plat/cpu.h>
51#include <plat/iic.h>
52#include <plat/audio-simtec.h>
53
54#include "simtec.h"
55#include "common.h"
56
57/* macros for virtual address mods for the io space entries */
58#define VA_C5(item) ((unsigned long)(item) + BAST_VAM_CS5)
59#define VA_C4(item) ((unsigned long)(item) + BAST_VAM_CS4)
60#define VA_C3(item) ((unsigned long)(item) + BAST_VAM_CS3)
61#define VA_C2(item) ((unsigned long)(item) + BAST_VAM_CS2)
62
63/* macros to modify the physical addresses for io space */
64
65#define PA_CS2(item) (__phys_to_pfn((item) + S3C2410_CS2))
66#define PA_CS3(item) (__phys_to_pfn((item) + S3C2410_CS3))
67#define PA_CS4(item) (__phys_to_pfn((item) + S3C2410_CS4))
68#define PA_CS5(item) (__phys_to_pfn((item) + S3C2410_CS5))
69
70static struct map_desc vr1000_iodesc[] __initdata = {
71 /* ISA IO areas */
72 {
73 .virtual = (u32)S3C24XX_VA_ISA_BYTE,
74 .pfn = PA_CS2(BAST_PA_ISAIO),
75 .length = SZ_16M,
76 .type = MT_DEVICE,
77 }, {
78 .virtual = (u32)S3C24XX_VA_ISA_WORD,
79 .pfn = PA_CS3(BAST_PA_ISAIO),
80 .length = SZ_16M,
81 .type = MT_DEVICE,
82 },
83
84 /* CPLD control registers, and external interrupt controls */
85 {
86 .virtual = (u32)VR1000_VA_CTRL1,
87 .pfn = __phys_to_pfn(VR1000_PA_CTRL1),
88 .length = SZ_1M,
89 .type = MT_DEVICE,
90 }, {
91 .virtual = (u32)VR1000_VA_CTRL2,
92 .pfn = __phys_to_pfn(VR1000_PA_CTRL2),
93 .length = SZ_1M,
94 .type = MT_DEVICE,
95 }, {
96 .virtual = (u32)VR1000_VA_CTRL3,
97 .pfn = __phys_to_pfn(VR1000_PA_CTRL3),
98 .length = SZ_1M,
99 .type = MT_DEVICE,
100 }, {
101 .virtual = (u32)VR1000_VA_CTRL4,
102 .pfn = __phys_to_pfn(VR1000_PA_CTRL4),
103 .length = SZ_1M,
104 .type = MT_DEVICE,
105 },
106};
107
108#define UCON S3C2410_UCON_DEFAULT | S3C2410_UCON_UCLK
109#define ULCON S3C2410_LCON_CS8 | S3C2410_LCON_PNONE | S3C2410_LCON_STOPB
110#define UFCON S3C2410_UFCON_RXTRIG8 | S3C2410_UFCON_FIFOMODE
111
112static struct s3c2410_uartcfg vr1000_uartcfgs[] __initdata = {
113 [0] = {
114 .hwport = 0,
115 .flags = 0,
116 .ucon = UCON,
117 .ulcon = ULCON,
118 .ufcon = UFCON,
119 },
120 [1] = {
121 .hwport = 1,
122 .flags = 0,
123 .ucon = UCON,
124 .ulcon = ULCON,
125 .ufcon = UFCON,
126 },
127 /* port 2 is not actually used */
128 [2] = {
129 .hwport = 2,
130 .flags = 0,
131 .ucon = UCON,
132 .ulcon = ULCON,
133 .ufcon = UFCON,
134 }
135};
136
137/* definitions for the vr1000 extra 16550 serial ports */
138
139#define VR1000_BAUDBASE (3692307)
140
141#define VR1000_SERIAL_MAPBASE(x) (VR1000_PA_SERIAL + 0x80 + ((x) << 5))
142
143static struct plat_serial8250_port serial_platform_data[] = {
144 [0] = {
145 .mapbase = VR1000_SERIAL_MAPBASE(0),
146 .irq = IRQ_VR1000_SERIAL + 0,
147 .flags = UPF_BOOT_AUTOCONF | UPF_IOREMAP,
148 .iotype = UPIO_MEM,
149 .regshift = 0,
150 .uartclk = VR1000_BAUDBASE,
151 },
152 [1] = {
153 .mapbase = VR1000_SERIAL_MAPBASE(1),
154 .irq = IRQ_VR1000_SERIAL + 1,
155 .flags = UPF_BOOT_AUTOCONF | UPF_IOREMAP,
156 .iotype = UPIO_MEM,
157 .regshift = 0,
158 .uartclk = VR1000_BAUDBASE,
159 },
160 [2] = {
161 .mapbase = VR1000_SERIAL_MAPBASE(2),
162 .irq = IRQ_VR1000_SERIAL + 2,
163 .flags = UPF_BOOT_AUTOCONF | UPF_IOREMAP,
164 .iotype = UPIO_MEM,
165 .regshift = 0,
166 .uartclk = VR1000_BAUDBASE,
167 },
168 [3] = {
169 .mapbase = VR1000_SERIAL_MAPBASE(3),
170 .irq = IRQ_VR1000_SERIAL + 3,
171 .flags = UPF_BOOT_AUTOCONF | UPF_IOREMAP,
172 .iotype = UPIO_MEM,
173 .regshift = 0,
174 .uartclk = VR1000_BAUDBASE,
175 },
176 { },
177};
178
179static struct platform_device serial_device = {
180 .name = "serial8250",
181 .id = PLAT8250_DEV_PLATFORM,
182 .dev = {
183 .platform_data = serial_platform_data,
184 },
185};
186
187/* DM9000 ethernet devices */
188
189static struct resource vr1000_dm9k0_resource[] = {
190 [0] = {
191 .start = S3C2410_CS5 + VR1000_PA_DM9000,
192 .end = S3C2410_CS5 + VR1000_PA_DM9000 + 3,
193 .flags = IORESOURCE_MEM
194 },
195 [1] = {
196 .start = S3C2410_CS5 + VR1000_PA_DM9000 + 0x40,
197 .end = S3C2410_CS5 + VR1000_PA_DM9000 + 0x7f,
198 .flags = IORESOURCE_MEM
199 },
200 [2] = {
201 .start = IRQ_VR1000_DM9000A,
202 .end = IRQ_VR1000_DM9000A,
203 .flags = IORESOURCE_IRQ | IORESOURCE_IRQ_HIGHLEVEL,
204 }
205
206};
207
208static struct resource vr1000_dm9k1_resource[] = {
209 [0] = {
210 .start = S3C2410_CS5 + VR1000_PA_DM9000 + 0x80,
211 .end = S3C2410_CS5 + VR1000_PA_DM9000 + 0x83,
212 .flags = IORESOURCE_MEM
213 },
214 [1] = {
215 .start = S3C2410_CS5 + VR1000_PA_DM9000 + 0xC0,
216 .end = S3C2410_CS5 + VR1000_PA_DM9000 + 0xFF,
217 .flags = IORESOURCE_MEM
218 },
219 [2] = {
220 .start = IRQ_VR1000_DM9000N,
221 .end = IRQ_VR1000_DM9000N,
222 .flags = IORESOURCE_IRQ | IORESOURCE_IRQ_HIGHLEVEL,
223 }
224};
225
226/* for the moment we limit ourselves to 16bit IO until some
227 * better IO routines can be written and tested
228*/
229
230static struct dm9000_plat_data vr1000_dm9k_platdata = {
231 .flags = DM9000_PLATF_16BITONLY,
232};
233
234static struct platform_device vr1000_dm9k0 = {
235 .name = "dm9000",
236 .id = 0,
237 .num_resources = ARRAY_SIZE(vr1000_dm9k0_resource),
238 .resource = vr1000_dm9k0_resource,
239 .dev = {
240 .platform_data = &vr1000_dm9k_platdata,
241 }
242};
243
244static struct platform_device vr1000_dm9k1 = {
245 .name = "dm9000",
246 .id = 1,
247 .num_resources = ARRAY_SIZE(vr1000_dm9k1_resource),
248 .resource = vr1000_dm9k1_resource,
249 .dev = {
250 .platform_data = &vr1000_dm9k_platdata,
251 }
252};
253
254/* LEDS */
255
256static struct s3c24xx_led_platdata vr1000_led1_pdata = {
257 .name = "led1",
258 .gpio = S3C2410_GPB(0),
259 .def_trigger = "",
260};
261
262static struct s3c24xx_led_platdata vr1000_led2_pdata = {
263 .name = "led2",
264 .gpio = S3C2410_GPB(1),
265 .def_trigger = "",
266};
267
268static struct s3c24xx_led_platdata vr1000_led3_pdata = {
269 .name = "led3",
270 .gpio = S3C2410_GPB(2),
271 .def_trigger = "",
272};
273
274static struct platform_device vr1000_led1 = {
275 .name = "s3c24xx_led",
276 .id = 1,
277 .dev = {
278 .platform_data = &vr1000_led1_pdata,
279 },
280};
281
282static struct platform_device vr1000_led2 = {
283 .name = "s3c24xx_led",
284 .id = 2,
285 .dev = {
286 .platform_data = &vr1000_led2_pdata,
287 },
288};
289
290static struct platform_device vr1000_led3 = {
291 .name = "s3c24xx_led",
292 .id = 3,
293 .dev = {
294 .platform_data = &vr1000_led3_pdata,
295 },
296};
297
298/* I2C devices. */
299
300static struct i2c_board_info vr1000_i2c_devs[] __initdata = {
301 {
302 I2C_BOARD_INFO("tlv320aic23", 0x1a),
303 }, {
304 I2C_BOARD_INFO("tmp101", 0x48),
305 }, {
306 I2C_BOARD_INFO("m41st87", 0x68),
307 },
308};
309
310/* devices for this board */
311
312static struct platform_device *vr1000_devices[] __initdata = {
313 &s3c_device_ohci,
314 &s3c_device_lcd,
315 &s3c_device_wdt,
316 &s3c_device_i2c0,
317 &s3c_device_adc,
318 &serial_device,
319 &vr1000_dm9k0,
320 &vr1000_dm9k1,
321 &vr1000_led1,
322 &vr1000_led2,
323 &vr1000_led3,
324};
325
326static struct clk *vr1000_clocks[] __initdata = {
327 &s3c24xx_dclk0,
328 &s3c24xx_dclk1,
329 &s3c24xx_clkout0,
330 &s3c24xx_clkout1,
331 &s3c24xx_uclk,
332};
333
334static void vr1000_power_off(void)
335{
336 gpio_direction_output(S3C2410_GPB(9), 1);
337}
338
339static void __init vr1000_map_io(void)
340{
341 /* initialise clock sources */
342
343 s3c24xx_dclk0.parent = &clk_upll;
344 s3c24xx_dclk0.rate = 12*1000*1000;
345
346 s3c24xx_dclk1.parent = NULL;
347 s3c24xx_dclk1.rate = 3692307;
348
349 s3c24xx_clkout0.parent = &s3c24xx_dclk0;
350 s3c24xx_clkout1.parent = &s3c24xx_dclk1;
351
352 s3c24xx_uclk.parent = &s3c24xx_clkout1;
353
354 s3c24xx_register_clocks(vr1000_clocks, ARRAY_SIZE(vr1000_clocks));
355
356 pm_power_off = vr1000_power_off;
357
358 s3c24xx_init_io(vr1000_iodesc, ARRAY_SIZE(vr1000_iodesc));
359 s3c24xx_init_clocks(0);
360 s3c24xx_init_uarts(vr1000_uartcfgs, ARRAY_SIZE(vr1000_uartcfgs));
361}
362
363static void __init vr1000_init(void)
364{
365 s3c_i2c0_set_platdata(NULL);
366 platform_add_devices(vr1000_devices, ARRAY_SIZE(vr1000_devices));
367
368 i2c_register_board_info(0, vr1000_i2c_devs,
369 ARRAY_SIZE(vr1000_i2c_devs));
370
371 nor_simtec_init();
372 simtec_audio_add(NULL, true, NULL);
373
374 WARN_ON(gpio_request(S3C2410_GPB(9), "power off"));
375}
376
377MACHINE_START(VR1000, "Thorcom-VR1000")
378 /* Maintainer: Ben Dooks <ben@simtec.co.uk> */
379 .atag_offset = 0x100,
380 .map_io = vr1000_map_io,
381 .init_machine = vr1000_init,
382 .init_irq = s3c24xx_init_irq,
383 .timer = &s3c24xx_timer,
384 .restart = s3c2410_restart,
385MACHINE_END