yuezonghe | 824eb0c | 2024-06-27 02:32:26 -0700 | [diff] [blame] | 1 | /* |
| 2 | * linux/arch/arm/mach-zx297520v2/gpio.c |
| 3 | * |
| 4 | * Copyright (C) 2013 ZTE-TSP |
| 5 | * |
| 6 | * This program is free software; you can redistribute it and/or modify |
| 7 | * it under the terms of the GNU General Public License as published by |
| 8 | * the Free Software Foundation; either version 2 of the License, or |
| 9 | * (at your option) any later version. |
| 10 | */ |
| 11 | |
| 12 | #include <linux/clk.h> |
| 13 | #include <linux/errno.h> |
| 14 | #include <linux/interrupt.h> |
| 15 | #include <linux/irq.h> |
| 16 | #include <linux/debugfs.h> |
| 17 | #include <linux/seq_file.h> |
| 18 | #include <linux/kernel.h> |
| 19 | #include <linux/list.h> |
| 20 | #include <linux/module.h> |
| 21 | #include <linux/io.h> |
| 22 | |
| 23 | #include <mach/iomap.h> |
| 24 | #include <mach/gpio.h> |
| 25 | #include <mach/gpio_def.h> |
| 26 | #include <mach/pcu.h> |
| 27 | #include <mach/debug.h> |
| 28 | #include <mach/spinlock.h> |
| 29 | |
| 30 | #define GPIO0_NUM 128 |
| 31 | |
| 32 | #define gpio_write_reg_lock(a, v) \ |
| 33 | do { \ |
| 34 | reg_spin_lock(); \ |
| 35 | zx_write_reg(a, v); \ |
| 36 | reg_spin_unlock(); \ |
| 37 | } while (0) |
| 38 | |
| 39 | #define gpio_write_bits_lock(a, o, w, v) \ |
| 40 | do { \ |
| 41 | reg_spin_lock(); \ |
| 42 | zx_write_bits(a, o, w, v); \ |
| 43 | reg_spin_unlock(); \ |
| 44 | } while (0) |
| 45 | |
| 46 | /* |
| 47 | * select gpio multiplex function |
| 48 | * gpio: gpio number |
| 49 | * func: PIN_FUNC_SEL_AON/PIN_FUNC_SEL_PD |
| 50 | * according with register defination |
| 51 | */ |
| 52 | int zx29_gpio_function_sel(unsigned int gpio, gpio_func_id func ) |
| 53 | { |
| 54 | int i ; |
| 55 | unsigned int func_sel = (func>>12)&0x1; |
| 56 | unsigned int value = func&0x3ff; |
| 57 | |
| 58 | if((gpio != (func>>24))||(gpio > ZX29_GPIO_MAX)) |
| 59 | return -EINVAL; |
| 60 | |
| 61 | for(i=0; i<ARRAY_SIZE(pin_info); i++) |
| 62 | { |
| 63 | if(pin_info[i].gpio == gpio) |
| 64 | break; |
| 65 | |
| 66 | |
| 67 | /* no support */ |
| 68 | if(pin_info[i].gpio == ZX29_GPIO_NULL) |
| 69 | return -ENODATA; |
| 70 | } |
| 71 | |
| 72 | /* top_func_sel */ |
| 73 | if(pin_info[i].top_func_sel_reg.reg_addr) |
| 74 | gpio_write_bits_lock(pin_info[i].top_func_sel_reg.reg_addr, |
| 75 | pin_info[i].top_func_sel_reg.reg_bit_offset, |
| 76 | pin_info[i].top_func_sel_reg.reg_bit_size, |
| 77 | func_sel); |
| 78 | |
| 79 | if(PIN_FUNC_SEL_AON == func_sel) |
| 80 | { |
| 81 | if(pin_info[i].aon_func_sel_reg.reg_addr) |
| 82 | gpio_write_bits_lock(pin_info[i].aon_func_sel_reg.reg_addr, |
| 83 | pin_info[i].aon_func_sel_reg.reg_bit_offset, |
| 84 | pin_info[i].aon_func_sel_reg.reg_bit_size, |
| 85 | value); |
| 86 | } |
| 87 | else |
| 88 | { |
| 89 | if(pin_info[i].pd_func_sel_reg.reg_addr) |
| 90 | gpio_write_bits_lock(pin_info[i].pd_func_sel_reg.reg_addr, |
| 91 | pin_info[i].pd_func_sel_reg.reg_bit_offset, |
| 92 | pin_info[i].pd_func_sel_reg.reg_bit_size, |
| 93 | value); |
| 94 | } |
| 95 | |
| 96 | return 0; |
| 97 | } |
| 98 | |
| 99 | static unsigned int get_gpio_by_name(const char *pin_name) |
| 100 | { |
| 101 | int i ; |
| 102 | |
| 103 | for(i=0; i<ARRAY_SIZE(pin_info); i++) |
| 104 | { |
| 105 | if (!strcmp(pin_name, pin_info[i].pin_name)) |
| 106 | { |
| 107 | return pin_info[i].gpio; |
| 108 | } |
| 109 | } |
| 110 | |
| 111 | return ZX29_GPIO_NULL; |
| 112 | } |
| 113 | |
| 114 | int zx29_func_sel_by_name(const char *pin_name, gpio_func_id func) |
| 115 | { |
| 116 | unsigned int gpio = get_gpio_by_name(pin_name); |
| 117 | |
| 118 | if(gpio == ZX29_GPIO_NULL) |
| 119 | { |
| 120 | pr_err("zx29_func_sel_by_name(%s) failed. \n", pin_name); |
| 121 | return -ENODATA; |
| 122 | } |
| 123 | |
| 124 | return zx29_gpio_function_sel(gpio, func); |
| 125 | } |
| 126 | |
| 127 | int zx29_gpio_function_sel_get(unsigned int gpio) |
| 128 | { |
| 129 | int i=0; |
| 130 | unsigned int func_sel = 0; |
| 131 | unsigned int top_func = 0; |
| 132 | unsigned int value = 0; |
| 133 | unsigned int temp=0,mask=0; |
| 134 | |
| 135 | if((gpio<0)||(gpio > ZX29_GPIO_MAX)) |
| 136 | return -EINVAL; |
| 137 | |
| 138 | for(i=0; i<ARRAY_SIZE(pin_info); i++) |
| 139 | { |
| 140 | if(pin_info[i].gpio == gpio) |
| 141 | break; |
| 142 | /* not support*/ |
| 143 | if(pin_info[i].gpio == ZX29_GPIO_NULL) |
| 144 | return -ENODATA; |
| 145 | } |
| 146 | |
| 147 | /*top_func*/ |
| 148 | if(pin_info[i].top_func_sel_reg.reg_addr) |
| 149 | { |
| 150 | temp=zx_read_reg(pin_info[i].top_func_sel_reg.reg_addr); |
| 151 | top_func = temp>>(pin_info[i].top_func_sel_reg.reg_bit_offset); |
| 152 | |
| 153 | top_func = top_func&0x01; |
| 154 | } |
| 155 | else |
| 156 | { |
| 157 | top_func = PIN_FUNC_SEL_AON; |
| 158 | } |
| 159 | |
| 160 | /*aon_func*/ |
| 161 | if(top_func == PIN_FUNC_SEL_AON) |
| 162 | { |
| 163 | if(pin_info[i].aon_func_sel_reg.reg_addr) |
| 164 | { |
| 165 | temp = zx_read_reg(pin_info[i].aon_func_sel_reg.reg_addr); |
| 166 | value = temp>>(pin_info[i].aon_func_sel_reg.reg_bit_offset); |
| 167 | mask =(1<<pin_info[i].aon_func_sel_reg.reg_bit_size)-1; |
| 168 | value = value&mask; |
| 169 | } |
| 170 | else |
| 171 | value = 0; |
| 172 | } |
| 173 | else/*pd_func*/ |
| 174 | { |
| 175 | if(pin_info[i].pd_func_sel_reg.reg_addr) |
| 176 | { |
| 177 | temp = zx_read_reg(pin_info[i].pd_func_sel_reg.reg_addr); |
| 178 | value = temp>>(pin_info[i].pd_func_sel_reg.reg_bit_offset); |
| 179 | mask =(1<<pin_info[i].pd_func_sel_reg.reg_bit_size)-1; |
| 180 | value =value&mask; |
| 181 | } |
| 182 | else |
| 183 | value = 0; |
| 184 | } |
| 185 | |
| 186 | func_sel = (gpio<<24)|(top_func<<12)|value; |
| 187 | |
| 188 | return func_sel; |
| 189 | } |
| 190 | |
| 191 | |
| 192 | /* |
| 193 | * set gpio resistance of pull-up and pull-down status |
| 194 | *@ gpio: gpio pin number |
| 195 | *@ config: IO_CFG enum |
| 196 | *@ |
| 197 | *@ This function is only for config pu/pd, if select driver capacity, |
| 198 | *@ use another interface. |
| 199 | */ |
| 200 | void zx29_gpio_pd_pu_set(unsigned int gpio, unsigned int config) |
| 201 | { |
| 202 | int i ; |
| 203 | |
| 204 | if(gpio > ZX29_GPIO_MAX) |
| 205 | return; |
| 206 | |
| 207 | for(i=0; i<ARRAY_SIZE(pin_info); i++) |
| 208 | { |
| 209 | if(pin_info[i].gpio == gpio) |
| 210 | break; |
| 211 | /* no support */ |
| 212 | if(pin_info[i].gpio == ZX29_GPIO_NULL) |
| 213 | return; |
| 214 | } |
| 215 | |
| 216 | if(pin_info[i].io_cfg_reg.reg_addr) |
| 217 | gpio_write_bits_lock(pin_info[i].io_cfg_reg.reg_addr, |
| 218 | pin_info[i].io_cfg_reg.reg_bit_offset, |
| 219 | pin_info[i].io_cfg_reg.reg_bit_size, |
| 220 | config); |
| 221 | } |
| 222 | EXPORT_SYMBOL(zx29_gpio_pd_pu_set); |
| 223 | |
| 224 | /**************************************************************** |
| 225 | ** gpio function |
| 226 | ** |
| 227 | ***************************************************************/ |
| 228 | /* |
| 229 | * set direction |
| 230 | * |
| 231 | * 0:input 1:out |
| 232 | */ |
| 233 | void zx29_gpio_set_direction(unsigned int gpio, unsigned int dir) |
| 234 | { |
| 235 | unsigned int temp=0; |
| 236 | void __iomem *regaddr = NULL; |
| 237 | |
| 238 | if(gpio < GPIO0_NUM) |
| 239 | regaddr = GPIOPDD_REG0(gpio); |
| 240 | else |
| 241 | { |
| 242 | gpio -= GPIO0_NUM; |
| 243 | regaddr = GPIOPDD_REG1(gpio); |
| 244 | } |
| 245 | |
| 246 | temp = zx_read_reg(regaddr); |
| 247 | if(dir == GPIO_IN) |
| 248 | temp &= ~(1 << (gpio % 16)); |
| 249 | else |
| 250 | temp |= (1 << (gpio % 16)); |
| 251 | |
| 252 | gpio_write_reg_lock(regaddr, temp); |
| 253 | } |
| 254 | |
| 255 | /* |
| 256 | * get direction |
| 257 | * |
| 258 | * 0:input 1:out |
| 259 | */ |
| 260 | unsigned int zx29_gpio_get_direction(unsigned int gpio) |
| 261 | { |
| 262 | unsigned int temp=0; |
| 263 | |
| 264 | if(gpio <GPIO0_NUM) |
| 265 | temp = zx_read_reg(GPIOPDD_REG0(gpio)); |
| 266 | else |
| 267 | { |
| 268 | gpio -= GPIO0_NUM; |
| 269 | temp = zx_read_reg(GPIOPDD_REG1(gpio)); |
| 270 | } |
| 271 | |
| 272 | temp = temp >> (gpio % 16); |
| 273 | temp &= 0x1; |
| 274 | |
| 275 | return temp; |
| 276 | } |
| 277 | |
| 278 | /* |
| 279 | * gpio out |
| 280 | * |
| 281 | * 0:low 1:high |
| 282 | */ |
| 283 | void zx29_gpio_output_data(unsigned int gpio, unsigned int value) |
| 284 | { |
| 285 | unsigned int temp=0; |
| 286 | |
| 287 | if(value == GPIO_LOW) |
| 288 | { |
| 289 | if(gpio <GPIO0_NUM) |
| 290 | { |
| 291 | temp = zx_read_reg(SET0_SEND_REG0(gpio)); |
| 292 | temp |= (1 << (gpio % 16)); |
| 293 | gpio_write_reg_lock(SET0_SEND_REG0(gpio), temp); |
| 294 | } |
| 295 | else{ |
| 296 | gpio -= GPIO0_NUM; |
| 297 | temp = zx_read_reg(SET0_SEND_REG1(gpio)); |
| 298 | temp |= (1 << (gpio % 16)); |
| 299 | gpio_write_reg_lock(SET0_SEND_REG1(gpio), temp); |
| 300 | } |
| 301 | }else if(value == GPIO_HIGH) |
| 302 | { |
| 303 | if(gpio <GPIO0_NUM) |
| 304 | { |
| 305 | temp = zx_read_reg(SET1_SEND_REG0(gpio)); |
| 306 | temp |= (1 << (gpio % 16)); |
| 307 | gpio_write_reg_lock(SET1_SEND_REG0(gpio), temp); |
| 308 | } |
| 309 | else{ |
| 310 | gpio -= GPIO0_NUM; |
| 311 | temp = zx_read_reg(SET1_SEND_REG1(gpio)); |
| 312 | temp |= (1 << (gpio % 16)); |
| 313 | gpio_write_reg_lock(SET1_SEND_REG1(gpio), temp); |
| 314 | } |
| 315 | } |
| 316 | } |
| 317 | |
| 318 | /* |
| 319 | * gpio input |
| 320 | * |
| 321 | * 0:low 1:high |
| 322 | */ |
| 323 | unsigned int zx29_gpio_input_data(unsigned int gpio) |
| 324 | { |
| 325 | unsigned int value=0; |
| 326 | |
| 327 | if(gpio < GPIO0_NUM) |
| 328 | value = zx_read_reg(RECV_REG0(gpio)); |
| 329 | else |
| 330 | { |
| 331 | gpio -= GPIO0_NUM; |
| 332 | value = zx_read_reg(RECV_REG1(gpio)); |
| 333 | } |
| 334 | |
| 335 | return (value >> (gpio % 16)) & 0x1; |
| 336 | } |
| 337 | |
| 338 | /* |
| 339 | * set extern int source type |
| 340 | * |
| 341 | * gpio: gpio number |
| 342 | * |
| 343 | * type: IRQ_TYPE_LEVEL_HIGH |
| 344 | * IRQ_TYPE_LEVEL_LOW |
| 345 | * IRQ_TYPE_EDGE_RISING |
| 346 | * IRQ_TYPE_EDGE_FALLING |
| 347 | */ |
| 348 | void zx29_gpio_set_inttype(unsigned int gpio, unsigned int type) |
| 349 | { |
| 350 | unsigned int index = 0; |
| 351 | |
| 352 | /***************************** |
| 353 | ** gpio50~~57 ---- ext0~~7 |
| 354 | ** gpio70~~77 ---- ext8~~15 |
| 355 | *****************************/ |
| 356 | if ((gpio>=50) && (gpio<=57)) |
| 357 | index = gpio - 50 + (unsigned int)PCU_EX0_INT; |
| 358 | else if ((gpio>=70) && (gpio<=77)) |
| 359 | index = gpio - 70 + (unsigned int)PCU_EX8_INT; |
| 360 | else |
| 361 | return; |
| 362 | |
| 363 | pcu_int_set_type((PCU_INT_INDEX)index,type); |
| 364 | } |
| 365 | EXPORT_SYMBOL(zx29_gpio_set_inttype); |
| 366 | |
| 367 | int zx29_gpio2irq(unsigned int gpio) |
| 368 | { |
| 369 | if ((gpio>=50) && (gpio<=57)) |
| 370 | return(gpio - 50 + EX0_INT); |
| 371 | else if ((gpio>=70) && (gpio<=77)) |
| 372 | return (gpio - 70 + EX8_INT); |
| 373 | |
| 374 | return -EINVAL; |
| 375 | } |
| 376 | |
| 377 | /********************************************************************************************* |
| 378 | *** jtag0: sd1_cmd/sd1_data0/sd1_data1/sd1_data2/sd1_data3 |
| 379 | *** pd_func: 0: sd1 1:ps_jtag 2:phy_jtag 3:ap_jtag aon_func: 0:gpio 1:m0_jtag |
| 380 | *** |
| 381 | *** jtag1: jtag_tck/jtag_tdi/jtag_tdo/jtag_tms/jtag_trst |
| 382 | *** pd_func: 0: ps_jtag 1:phy_jtag 2:ap_jtag aon_func: 0:m0_jtag 1:gpio |
| 383 | *** |
| 384 | *** jtag2: kbc_0/kbc_2/kbr_0/kbr_1/kbr_2 |
| 385 | *** pd_func: 0: ps_jtag 1:phy_jtag 2:ap_jtag aon_func: 0:key 1:gpio 2:ext_int 3:m0_jtag |
| 386 | *********************************************************************************************** |
| 387 | */ |
| 388 | void jtag_config(unsigned int jtag_num, unsigned int function) |
| 389 | { |
| 390 | //unsigned int tmp = 0; |
| 391 | |
| 392 | return ; |
| 393 | } |
| 394 | |
| 395 | unsigned int zx29_gpio_outputdata_get(unsigned int gpio) |
| 396 | { |
| 397 | unsigned int temp=0; |
| 398 | if(gpio <GPIO0_NUM) |
| 399 | temp = zx_read_reg(SEND_REG0(gpio)); |
| 400 | else |
| 401 | { |
| 402 | gpio -=GPIO0_NUM; |
| 403 | temp = zx_read_reg(SEND_REG1(gpio)); |
| 404 | } |
| 405 | return (temp>>(gpio%16))&0x01; |
| 406 | } |
| 407 | |
| 408 | #ifdef CONFIG_DEBUG_FS |
| 409 | |
| 410 | #include <linux/debugfs.h> |
| 411 | #include <linux/seq_file.h> |
| 412 | #include <asm/uaccess.h> |
| 413 | #include <asm/string.h> |
| 414 | |
| 415 | static char temp_buf[50],temp[30]; |
| 416 | unsigned char buf = 0; |
| 417 | |
| 418 | static struct gpio_status{ |
| 419 | char *function; |
| 420 | char *direction; |
| 421 | char *level; |
| 422 | }gpio_status_get; |
| 423 | |
| 424 | struct zx29_gpio_def |
| 425 | { |
| 426 | char * gpio_name; |
| 427 | unsigned int gpio_num; |
| 428 | unsigned int gpio_func; |
| 429 | }; |
| 430 | |
| 431 | static struct zx29_gpio_def gpio_def[] = |
| 432 | { |
| 433 | {"GPIO0_GPIO0", 0, GPIO0_GPIO0}, |
| 434 | {"GPIO0_NAND_WE", 0, GPIO0_NAND_WE}, |
| 435 | {"GPIO1_GPIO1", 1, GPIO1_GPIO1}, |
| 436 | {"GPIO1_NAND_CS0", 1, GPIO1_NAND_CS0}, |
| 437 | {"GPIO2_GPIO2", 2, GPIO2_GPIO2}, |
| 438 | {"GPIO2_NAND_READY", 2, GPIO2_NAND_READY}, |
| 439 | {"GPIO3_GPIO3", 3, GPIO3_GPIO3}, |
| 440 | {"GPIO3_NAND_CLE", 3, GPIO3_NAND_CLE}, |
| 441 | {"GPIO3_SPIFC0_SCLK", 3, GPIO3_SPIFC0_SCLK}, |
| 442 | {"GPIO4_GPIO4", 4, GPIO4_GPIO4}, |
| 443 | {"GPIO4_NAND_ALE", 4, GPIO4_NAND_ALE}, |
| 444 | {"GPIO5_GPIO5", 5, GPIO5_GPIO5}, |
| 445 | {"GPIO5_NAND_RE", 5, GPIO5_NAND_RE}, |
| 446 | {"GPIO5_SPIFC0_CS", 5, GPIO5_SPIFC0_CS}, |
| 447 | {"GPIO6_GPIO6", 6, GPIO6_GPIO6}, |
| 448 | {"GPIO6_NAND_WRITE_PROTECT",6,GPIO6_NAND_WRITE_PROTECT}, |
| 449 | {"GPIO7_GPIO7", 7, GPIO7_GPIO7}, |
| 450 | {"GPIO7_NAND_DATA0", 7, GPIO7_NAND_DATA0}, |
| 451 | {"GPIO7_SSP1_CS", 7, GPIO7_SSP1_CS}, |
| 452 | {"GPIO8_GPIO8", 8, GPIO8_GPIO8}, |
| 453 | {"GPIO8_NAND_DATA1", 8, GPIO8_NAND_DATA1}, |
| 454 | {"GPIO8_SSP1_CLK", 8, GPIO8_SSP1_CLK}, |
| 455 | {"GPIO9_GPIO9", 9, GPIO9_GPIO9}, |
| 456 | {"GPIO9_NAND_DATA2", 9, GPIO9_NAND_DATA2}, |
| 457 | {"GPIO9_SPIFC0_DATA0", 9, GPIO9_SPIFC0_DATA0}, |
| 458 | {"GPIO10_GPIO10", 10, GPIO10_GPIO10}, |
| 459 | {"GPIO10_NAND_DATA3", 10, GPIO10_NAND_DATA3}, |
| 460 | {"GPIO10_SPIFC0_DATA1", 10, GPIO10_SPIFC0_DATA1}, |
| 461 | {"GPIO11_GPIO11", 11, GPIO11_GPIO11}, |
| 462 | {"GPIO11_NAND_DATA4", 11, GPIO11_NAND_DATA4}, |
| 463 | {"GPIO11_SPIFC0_DATA2", 11, GPIO11_SPIFC0_DATA2}, |
| 464 | {"GPIO12_GPIO12", 12, GPIO12_GPIO12}, |
| 465 | {"GPIO12_NAND_DATA5", 12, GPIO12_NAND_DATA5}, |
| 466 | {"GPIO12_SPIFC0_DATA3", 12, GPIO12_SPIFC0_DATA3}, |
| 467 | {"GPIO13_GPIO13", 13, GPIO13_GPIO13}, |
| 468 | {"GPIO13_NAND_DATA6", 13, GPIO13_NAND_DATA6}, |
| 469 | {"GPIO13_SSP1_RXD", 13, GPIO13_SSP1_RXD}, |
| 470 | {"GPIO14_GPIO14", 14, GPIO14_GPIO14}, |
| 471 | {"GPIO14_NAND_DATA7", 14, GPIO14_NAND_DATA7}, |
| 472 | {"GPIO14_SSP1_TXD", 14, GPIO14_SSP1_TXD}, |
| 473 | {"GPIO23_CLK_OUT0", 23, GPIO23_CLK_OUT0}, |
| 474 | {"GPIO23_GPIO23", 23, GPIO23_GPIO23}, |
| 475 | {"GPIO24_GPIO24", 24, GPIO24_GPIO24}, |
| 476 | {"GPIO24_CLK_OUT1", 24, GPIO24_CLK_OUT1}, |
| 477 | {"GPIO25_GPIO25", 25, GPIO25_GPIO25}, |
| 478 | {"GPIO25_CLK_OUT2", 25, GPIO25_CLK_OUT2}, |
| 479 | {"GPIO25_TEST_CLK_OUT", 25, GPIO25_TEST_CLK_OUT}, |
| 480 | {"GPIO26_GPIO26", 26, GPIO26_GPIO26}, |
| 481 | {"GPIO26_CLK_32K_OUT", 26, GPIO26_CLK_32K_OUT}, |
| 482 | {"GPIO27_CLK_REQ0", 27, GPIO27_CLK_REQ0}, |
| 483 | {"GPIO27_GPIO27", 27, GPIO27_GPIO27}, |
| 484 | {"GPIO29_PWRCTRL1", 29, GPIO29_PWRCTRL1}, |
| 485 | {"GPIO29_GPIO29", 29, GPIO29_GPIO29}, |
| 486 | {"GPIO30_GPIO30", 30, GPIO30_GPIO30}, |
| 487 | {"GPIO30_SSP0_CS", 30, GPIO30_SSP0_CS}, |
| 488 | {"GPIO31_GPIO31", 31, GPIO31_GPIO31}, |
| 489 | {"GPIO31_SSP0_CLK", 31, GPIO31_SSP0_CLK}, |
| 490 | {"GPIO32_GPIO32", 32, GPIO32_GPIO32}, |
| 491 | {"GPIO32_SSP0_RXD", 32, GPIO32_SSP0_RXD}, |
| 492 | {"GPIO33_GPIO33", 33, GPIO33_GPIO33}, |
| 493 | {"GPIO33_SSP0_TXD", 33, GPIO33_SSP0_TXD}, |
| 494 | {"GPIO34_UART0_RXD", 34, GPIO34_UART0_RXD}, |
| 495 | {"GPIO34_GPIO34", 34, GPIO34_GPIO34}, |
| 496 | {"GPIO34_UART0_TXD", 34, GPIO34_UART0_TXD}, |
| 497 | {"GPIO34_FRAME_SYNC", 34, GPIO34_FRAME_SYNC}, |
| 498 | {"GPIO34_TEST_PIN10", 34, GPIO34_TEST_PIN10}, |
| 499 | {"GPIO35_UART0_TXD", 35, GPIO35_UART0_TXD}, |
| 500 | {"GPIO35_GPIO35", 35, GPIO35_GPIO35}, |
| 501 | {"GPIO35_UART0_RXD", 35, GPIO35_UART0_RXD}, |
| 502 | {"GPIO35_LTE_PRE_TX", 35, GPIO35_LTE_PRE_TX}, |
| 503 | {"GPIO35_TEST_PIN11", 35, GPIO35_TEST_PIN11}, |
| 504 | {"GPIO36_UART0_CTS", 36, GPIO36_UART0_CTS}, |
| 505 | {"GPIO36_GPIO36", 36, GPIO36_GPIO36}, |
| 506 | {"GPIO36_UART1_RXD", 36, GPIO36_UART1_RXD}, |
| 507 | {"GPIO36_LTE_TPU_OUT3", 36, GPIO36_LTE_TPU_OUT3}, |
| 508 | {"GPIO36_TEST_PIN12", 36, GPIO36_TEST_PIN12}, |
| 509 | {"GPIO36_UART1_TXD", 36, GPIO36_UART1_TXD}, |
| 510 | {"GPIO37_UART0_RTS", 37, GPIO37_UART0_RTS}, |
| 511 | {"GPIO37_GPIO37", 37, GPIO37_GPIO37}, |
| 512 | {"GPIO37_UART1_TXD", 37, GPIO37_UART1_TXD}, |
| 513 | {"GPIO37_LTE_TPU_OUT4", 37, GPIO37_LTE_TPU_OUT4}, |
| 514 | {"GPIO37_UART1_RXD", 37, GPIO37_UART1_RXD}, |
| 515 | {"GPIO38_GPIO38", 38, GPIO38_GPIO38}, |
| 516 | {"GPIO38_I2S0_WS", 38, GPIO38_I2S0_WS}, |
| 517 | {"GPIO38_TEST_PIN0", 38, GPIO38_TEST_PIN0}, |
| 518 | {"GPIO38_LTE_DATA_DONGLE_CLK", 38,GPIO38_LTE_DATA_DONGLE_CLK}, |
| 519 | {"GPIO38_TDM_FS", 38, GPIO38_TDM_FS}, |
| 520 | {"GPIO39_GPIO39", 39, GPIO39_GPIO39}, |
| 521 | {"GPIO39_I2S0_CLK", 39, GPIO39_I2S0_CLK}, |
| 522 | {"GPIO39_TEST_PIN1", 39, GPIO39_TEST_PIN1}, |
| 523 | {"GPIO39_LTE_DATA_DONGLE_CMD", 39,GPIO39_LTE_DATA_DONGLE_CMD}, |
| 524 | {"GPIO39_TDM_CLK", 39, GPIO39_TDM_CLK}, |
| 525 | {"GPIO40_GPIO40", 40, GPIO40_GPIO40}, |
| 526 | {"GPIO40_I2S0_DIN", 40, GPIO40_I2S0_DIN}, |
| 527 | {"GPIO40_TEST_PIN2", 40, GPIO40_TEST_PIN2}, |
| 528 | {"GPIO40_LTE_DATA_DONGLE0", 40, GPIO40_LTE_DATA_DONGLE0}, |
| 529 | {"GPIO40_TDM_DATA_IN", 40, GPIO40_TDM_DATA_IN}, |
| 530 | {"GPIO41_GPIO41", 41, GPIO41_GPIO41}, |
| 531 | {"GPIO41_I2S0_DOUT", 41, GPIO41_I2S0_DOUT}, |
| 532 | {"GPIO41_TEST_PIN3", 41, GPIO41_TEST_PIN3}, |
| 533 | {"GPIO41_LTE_DATA_DONGLE1", 41, GPIO41_LTE_DATA_DONGLE1}, |
| 534 | {"GPIO41_TDM_DATA_OUT", 41, GPIO41_TDM_DATA_OUT}, |
| 535 | {"GPIO42_GPIO42", 42, GPIO42_GPIO42}, |
| 536 | {"GPIO42_I2S1_WS", 42, GPIO42_I2S1_WS}, |
| 537 | {"GPIO42_TEST_PIN4", 42, GPIO42_TEST_PIN4}, |
| 538 | {"GPIO42_LTE_DATA_DONGLE2", 42, GPIO42_LTE_DATA_DONGLE2}, |
| 539 | {"GPIO42_TDM_FS", 42, GPIO42_TDM_FS}, |
| 540 | {"GPIO43_GPIO43", 43, GPIO43_GPIO43}, |
| 541 | {"GPIO43_I2S1_CLK", 43, GPIO43_I2S1_CLK}, |
| 542 | {"GPIO43_TEST_PIN5", 43, GPIO43_TEST_PIN5}, |
| 543 | {"GPIO43_LTE_DATA_DONGLE3", 43, GPIO43_LTE_DATA_DONGLE3}, |
| 544 | {"GPIO43_TDM_CLK", 43, GPIO43_TDM_CLK}, |
| 545 | {"GPIO44_GPIO44", 44, GPIO44_GPIO44}, |
| 546 | {"GPIO44_I2S1_DIN", 44, GPIO44_I2S1_DIN}, |
| 547 | {"GPIO44_TEST_PIN6", 44, GPIO44_TEST_PIN6}, |
| 548 | {"GPIO44_TDM_DATA_IN", 44, GPIO44_TDM_DATA_IN}, |
| 549 | {"GPIO45_GPIO45", 45, GPIO45_GPIO45}, |
| 550 | {"GPIO45_I2S1_DOUT", 45, GPIO45_I2S1_DOUT}, |
| 551 | {"GPIO45_TEST_PIN7", 45, GPIO45_TEST_PIN7}, |
| 552 | {"GPIO45_TDM_DATA_OUT", 45, GPIO45_TDM_DATA_OUT}, |
| 553 | {"GPIO46_SCL0", 46, GPIO46_SCL0}, |
| 554 | {"GPIO46_GPIO46", 46, GPIO46_GPIO46}, |
| 555 | {"GPIO47_SDA0", 47, GPIO47_SDA0}, |
| 556 | {"GPIO47_GPIO47", 47, GPIO47_GPIO47}, |
| 557 | {"GPIO48_GPIO48", 48, GPIO48_GPIO48}, |
| 558 | {"GPIO48_SCL1", 48, GPIO48_SCL1}, |
| 559 | {"GPIO49_GPIO49", 49, GPIO49_GPIO49}, |
| 560 | {"GPIO49_SDA1", 49, GPIO49_SDA1}, |
| 561 | {"GPIO50_GPIO50", 50, GPIO50_GPIO50}, |
| 562 | {"GPIO50_EXT_INT0", 50, GPIO50_EXT_INT0}, |
| 563 | {"GPIO51_GPIO51", 51, GPIO51_GPIO51}, |
| 564 | {"GPIO51_EXT_INT1", 51, GPIO51_EXT_INT1}, |
| 565 | {"GPIO52_GPIO52", 52, GPIO52_GPIO52}, |
| 566 | {"GPIO52_EXT_INT2", 52, GPIO52_EXT_INT2}, |
| 567 | {"GPIO53_GPIO53", 53, GPIO53_GPIO53}, |
| 568 | {"GPIO53_EXT_INT3", 53, GPIO53_EXT_INT3}, |
| 569 | {"GPIO53_TEST_PIN8", 53, GPIO53_TEST_PIN8}, |
| 570 | {"GPIO54_GPIO54", 54, GPIO54_GPIO54}, |
| 571 | {"GPIO54_EXT_INT4", 54, GPIO54_EXT_INT4}, |
| 572 | {"GPIO54_TEST_PIN9", 54, GPIO54_TEST_PIN9}, |
| 573 | {"GPIO55_GPIO55", 55, GPIO55_GPIO55}, |
| 574 | {"GPIO55_EXT_INT5", 55, GPIO55_EXT_INT5}, |
| 575 | {"GPIO55_TEST_PIN13", 55, GPIO55_TEST_PIN13}, |
| 576 | {"GPIO56_GPIO56", 56, GPIO56_GPIO56}, |
| 577 | {"GPIO56_EXT_INT6", 56, GPIO56_EXT_INT6}, |
| 578 | {"GPIO56_CLK_REQ1", 56, GPIO56_CLK_REQ1}, |
| 579 | {"GPIO56_TEST_PIN14", 56, GPIO56_TEST_PIN14}, |
| 580 | {"GPIO57_GPIO57", 57, GPIO57_GPIO57}, |
| 581 | {"GPIO57_EXT_INT7", 57, GPIO57_EXT_INT7}, |
| 582 | {"GPIO57_TEST_PIN15", 57, GPIO57_TEST_PIN15}, |
| 583 | {"GPIO58_GPIO58", 58, GPIO58_GPIO58}, |
| 584 | {"GPIO58_SD1_HOST_SDCLK", 58, GPIO58_SD1_HOST_SDCLK}, |
| 585 | {"GPIO59_GPIO59", 59, GPIO59_GPIO59}, |
| 586 | {"GPIO59_M_JTAG_TDO", 59, GPIO59_M_JTAG_TDO}, |
| 587 | {"GPIO59_SD1_CMD", 59, GPIO59_SD1_CMD}, |
| 588 | {"GPIO59_PS_JTAG_TDO", 59, GPIO59_PS_JTAG_TDO}, |
| 589 | {"GPIO59_PHY_JTAG_TDO", 59, GPIO59_PHY_JTAG_TDO}, |
| 590 | {"GPIO59_AP_JTAG_TDO", 59, GPIO59_AP_JTAG_TDO}, |
| 591 | {"GPIO60_GPIO60", 60, GPIO60_GPIO60}, |
| 592 | {"GPIO60_M_JTAG_TCK", 60, GPIO60_M_JTAG_TCK}, |
| 593 | {"GPIO60_SD1_DATA0", 60, GPIO60_SD1_DATA0}, |
| 594 | {"GPIO60_PS_JTAG_TCK", 60, GPIO60_PS_JTAG_TCK}, |
| 595 | {"GPIO60_PHY_JTAG_TCK", 60, GPIO60_PHY_JTAG_TCK}, |
| 596 | {"GPIO60_AP_JTAG_TCK", 60, GPIO60_AP_JTAG_TCK}, |
| 597 | {"GPIO61_GPIO61", 61, GPIO61_GPIO61}, |
| 598 | {"GPIO61_M_JTAG_TRST", 61, GPIO61_M_JTAG_TRST}, |
| 599 | {"GPIO61_SD1_DATA1", 61, GPIO61_SD1_DATA1}, |
| 600 | {"GPIO61_PS_JTAG_TRST", 61, GPIO61_PS_JTAG_TRST}, |
| 601 | {"GPIO61_PHY_JTAG_TRST", 61, GPIO61_PHY_JTAG_TRST}, |
| 602 | {"GPIO61_AP_JTAG_TRST", 61, GPIO61_AP_JTAG_TRST}, |
| 603 | {"GPIO62_GPIO62", 62, GPIO62_GPIO62}, |
| 604 | {"GPIO62_M_JTAG_TMS", 62, GPIO62_M_JTAG_TMS}, |
| 605 | {"GPIO62_SD1_DATA2", 62, GPIO62_SD1_DATA2}, |
| 606 | {"GPIO62_PS_JTAG_TMS", 62, GPIO62_PS_JTAG_TMS}, |
| 607 | {"GPIO62_PHY_JTAG_TMS", 62, GPIO62_PHY_JTAG_TMS}, |
| 608 | {"GPIO62_AP_JTAG_TMS", 62, GPIO62_AP_JTAG_TMS}, |
| 609 | {"GPIO63_GPIO63", 63, GPIO63_GPIO63}, |
| 610 | {"GPIO63_M_JTAG_TDI", 63, GPIO63_M_JTAG_TDI}, |
| 611 | {"GPIO63_SD1_DATA2", 63, GPIO63_SD1_DATA2}, |
| 612 | {"GPIO63_PS_JTAG_TDI", 63, GPIO63_PS_JTAG_TDI}, |
| 613 | {"GPIO63_PHY_JTAG_TDI", 63, GPIO63_PHY_JTAG_TDI}, |
| 614 | {"GPIO63_AP_JTAG_TDI", 63, GPIO63_AP_JTAG_TDI}, |
| 615 | {"GPIO64_M_JTAG_TCK", 64, GPIO64_M_JTAG_TCK}, |
| 616 | {"GPIO64_GPIO64", 64, GPIO64_GPIO64}, |
| 617 | {"GPIO64_PS_JTAG_TCK", 64, GPIO64_PS_JTAG_TCK}, |
| 618 | {"GPIO64_PHY_JTAG_TCK", 64, GPIO64_PHY_JTAG_TCK}, |
| 619 | {"GPIO64_AP_JTAG_TCK", 64, GPIO64_AP_JTAG_TCK}, |
| 620 | {"GPIO66_M_JTAG_TDI", 66, GPIO66_M_JTAG_TDI}, |
| 621 | {"GPIO66_GPIO66", 66, GPIO66_GPIO66}, |
| 622 | {"GPIO66_PS_JTAG_TDI", 66, GPIO66_PS_JTAG_TDI}, |
| 623 | {"GPIO66_PHY_JTAG_TDI", 66, GPIO66_PHY_JTAG_TDI}, |
| 624 | {"GPIO66_AP_JTAG_TDI", 66, GPIO66_AP_JTAG_TDI}, |
| 625 | {"GPIO67_M_JTAG_TDO", 67, GPIO67_M_JTAG_TDO}, |
| 626 | {"GPIO67_GPIO67", 67, GPIO67_GPIO67}, |
| 627 | {"GPIO67_PS_JTAG_TDO", 67, GPIO67_PS_JTAG_TDO}, |
| 628 | {"GPIO67_PHY_JTAG_TDO", 67, GPIO67_PHY_JTAG_TDO}, |
| 629 | {"GPIO67_AP_JTAG_TDO", 67, GPIO67_AP_JTAG_TDO}, |
| 630 | {"GPIO68_M_JTAG_TMS", 68, GPIO68_M_JTAG_TMS}, |
| 631 | {"GPIO68_GPIO68", 68, GPIO68_GPIO68}, |
| 632 | {"GPIO68_PS_JTAG_TMS", 68, GPIO68_PS_JTAG_TMS}, |
| 633 | {"GPIO68_PHY_JTAG_TMS", 68, GPIO68_PHY_JTAG_TMS}, |
| 634 | {"GPIO68_AP_JTAG_TMS", 68, GPIO68_AP_JTAG_TMS}, |
| 635 | {"GPIO69_M_JTAG_TRST", 69, GPIO69_M_JTAG_TRST}, |
| 636 | {"GPIO69_GPIO69", 69, GPIO69_GPIO69}, |
| 637 | {"GPIO69_PS_JTAG_TRST", 69, GPIO69_PS_JTAG_TRST}, |
| 638 | {"GPIO69_PHY_JTAG_TRST", 69, GPIO69_PHY_JTAG_TRST}, |
| 639 | {"GPIO69_AP_JTAG_TRST", 69, GPIO69_AP_JTAG_TRST}, |
| 640 | {"GPIO70_KEY_COL0", 70, GPIO70_KEY_COL0}, |
| 641 | {"GPIO70_GPIO70", 70, GPIO70_GPIO70}, |
| 642 | {"GPIO70_EXT_INT8", 70, GPIO70_EXT_INT8}, |
| 643 | {"GPIO70_M_JTAG_TDO", 70, GPIO70_M_JTAG_TDO}, |
| 644 | {"GPIO70_PS_JTAG_TDO", 70, GPIO70_PS_JTAG_TDO}, |
| 645 | {"GPIO70_PHY_JTAG_TDO", 70, GPIO70_PHY_JTAG_TDO}, |
| 646 | {"GPIO70_AP_JTAG_TDO", 70, GPIO70_AP_JTAG_TDO}, |
| 647 | {"GPIO70_LTE_DATA_DONGLE4", 70, GPIO70_LTE_DATA_DONGLE4}, |
| 648 | {"GPIO71_KEY_COL1", 71, GPIO71_KEY_COL1}, |
| 649 | {"GPIO71_GPIO71", 71, GPIO71_GPIO71}, |
| 650 | {"GPIO71_EXT_INT9", 71, GPIO71_EXT_INT9}, |
| 651 | {"GPIO71_LTE_DATA_DONGLE5", 71, GPIO71_LTE_DATA_DONGLE5}, |
| 652 | {"GPIO72_KEY_COL2", 72, GPIO72_KEY_COL2}, |
| 653 | {"GPIO72_GPIO72", 72, GPIO72_GPIO72}, |
| 654 | {"GPIO72_EXT_INT10", 72, GPIO72_EXT_INT10}, |
| 655 | {"GPIO72_M_JTAG_TCK", 72, GPIO72_M_JTAG_TCK}, |
| 656 | {"GPIO72_PS_JTAG_TCK", 72, GPIO72_PS_JTAG_TCK}, |
| 657 | {"GPIO72_PHY_JTAG_TCK", 72, GPIO72_PHY_JTAG_TCK}, |
| 658 | {"GPIO72_AP_JTAG_TCK", 72, GPIO72_AP_JTAG_TCK}, |
| 659 | {"GPIO72_LTE_DATA_DONGLE6", 72, GPIO72_LTE_DATA_DONGLE6}, |
| 660 | {"GPIO73_KEY_COL3", 73, GPIO73_KEY_COL3}, |
| 661 | {"GPIO73_GPIO73", 73, GPIO73_GPIO73}, |
| 662 | {"GPIO73_EXT_INT11", 73, GPIO73_EXT_INT11}, |
| 663 | {"GPIO73_LTE_DATA_DONGLE7", 73, GPIO73_LTE_DATA_DONGLE7}, |
| 664 | {"GPIO74_KEY_ROW0", 74, GPIO74_KEY_ROW0}, |
| 665 | {"GPIO74_GPIO74", 74, GPIO74_GPIO74}, |
| 666 | {"GPIO74_EXT_INT12", 74, GPIO74_EXT_INT12}, |
| 667 | {"GPIO74_M_JTAG_TRST", 74, GPIO74_M_JTAG_TRST}, |
| 668 | {"GPIO74_PS_JTAG_TRST", 74, GPIO74_PS_JTAG_TRST}, |
| 669 | {"GPIO74_PHY_JTAG_TRST", 74, GPIO74_PHY_JTAG_TRST}, |
| 670 | {"GPIO74_AP_JTAG_TRST", 74, GPIO74_AP_JTAG_TRST}, |
| 671 | {"GPIO74_LTE_DATA_DONGLE8", 74, GPIO74_LTE_DATA_DONGLE8}, |
| 672 | {"GPIO75_KEY_ROW1", 75, GPIO75_KEY_ROW1}, |
| 673 | {"GPIO75_GPIO75", 75, GPIO75_GPIO75}, |
| 674 | {"GPIO75_EXT_INT13", 75, GPIO75_EXT_INT13}, |
| 675 | {"GPIO75_M_JTAG_TMS", 75, GPIO75_M_JTAG_TMS}, |
| 676 | {"GPIO75_PS_JTAG_TMS", 75, GPIO75_PS_JTAG_TMS}, |
| 677 | {"GPIO75_PHY_JTAG_TMS", 75, GPIO75_PHY_JTAG_TMS}, |
| 678 | {"GPIO75_AP_JTAG_TMS", 75, GPIO75_AP_JTAG_TMS}, |
| 679 | {"GPIO75_LTE_DATA_DONGLE9", 75, GPIO75_LTE_DATA_DONGLE9}, |
| 680 | {"GPIO76_KEY_ROW2", 76, GPIO76_KEY_ROW2}, |
| 681 | {"GPIO76_GPIO76", 76, GPIO76_GPIO76}, |
| 682 | {"GPIO76_EXT_INT14", 76, GPIO76_EXT_INT14}, |
| 683 | {"GPIO76_M_JTAG_TDI", 76, GPIO76_M_JTAG_TDI}, |
| 684 | {"GPIO76_PS_JTAG_TDI", 76, GPIO76_PS_JTAG_TDI}, |
| 685 | {"GPIO76_PHY_JTAG_TDI", 76, GPIO76_PHY_JTAG_TDI}, |
| 686 | {"GPIO76_AP_JTAG_TDI", 76, GPIO76_AP_JTAG_TDI}, |
| 687 | {"GPIO76_UART2_RXD", 76, GPIO76_UART2_RXD}, |
| 688 | {"GPIO77_KEY_ROW3", 77, GPIO77_KEY_ROW3}, |
| 689 | {"GPIO77_GPIO77", 77, GPIO77_GPIO77}, |
| 690 | {"GPIO77_EXT_INT15", 77, GPIO77_EXT_INT15}, |
| 691 | {"GPIO77_UART2_TXD", 77, GPIO77_UART2_TXD}, |
| 692 | {"GPIO78_GPIO78", 78, GPIO78_GPIO78}, |
| 693 | {"GPIO78_MODEM_TXRX_DATA0", 78, GPIO78_MODEM_TXRX_DATA0}, |
| 694 | {"GPIO79_GPIO79", 79, GPIO79_GPIO79}, |
| 695 | {"GPIO79_MODEM_TXRX_DATA1", 79, GPIO79_MODEM_TXRX_DATA1}, |
| 696 | {"GPIO80_GPIO80", 80, GPIO80_GPIO80}, |
| 697 | {"GPIO80_MODEM_TXRX_DATA2", 80, GPIO80_MODEM_TXRX_DATA2}, |
| 698 | {"GPIO81_GPIO81", 81, GPIO81_GPIO81}, |
| 699 | {"GPIO81_MODEM_TXRX_DATA3", 81, GPIO81_MODEM_TXRX_DATA3}, |
| 700 | {"GPIO82_GPIO82", 82, GPIO82_GPIO82}, |
| 701 | {"GPIO82_MODEM_TXRX_DATA4", 82, GPIO82_MODEM_TXRX_DATA4}, |
| 702 | {"GPIO83_GPIO83", 83, GPIO83_GPIO83}, |
| 703 | {"GPIO83_MODEM_TXRX_DATA5", 83, GPIO83_MODEM_TXRX_DATA5}, |
| 704 | {"GPIO84_GPIO84", 84, GPIO84_GPIO84}, |
| 705 | {"GPIO84_MODEM_TXRX_DATA6", 84, GPIO84_MODEM_TXRX_DATA6}, |
| 706 | {"GPIO85_GPIO85", 85, GPIO85_GPIO85}, |
| 707 | {"GPIO85_MODEM_TXRX_DATA7", 85, GPIO85_MODEM_TXRX_DATA7}, |
| 708 | {"GPIO86_GPIO86", 86, GPIO86_GPIO86}, |
| 709 | {"GPIO86_MODEM_TXRX_DATA8", 86, GPIO86_MODEM_TXRX_DATA8}, |
| 710 | {"GPIO87_GPIO87", 87, GPIO87_GPIO87}, |
| 711 | {"GPIO87_MODEM_TXRX_DATA9", 87, GPIO87_MODEM_TXRX_DATA9}, |
| 712 | {"GPIO88_GPIO88", 88, GPIO88_GPIO88}, |
| 713 | {"GPIO88_MODEM_TXRX_DATA10", 88, GPIO88_MODEM_TXRX_DATA10}, |
| 714 | {"GPIO89_GPIO89", 89, GPIO89_GPIO89}, |
| 715 | {"GPIO89_MODEM_TXRX_DATA11", 89, GPIO89_MODEM_TXRX_DATA11}, |
| 716 | {"GPIO90_GPIO90", 90, GPIO90_GPIO90}, |
| 717 | {"GPIO90_MODEM_RX_DATA0", 90, GPIO90_MODEM_RX_DATA0}, |
| 718 | {"GPIO91_GPIO91", 91, GPIO91_GPIO91}, |
| 719 | {"GPIO91_MODEM_RX_DATA1", 91, GPIO91_MODEM_RX_DATA1}, |
| 720 | {"GPIO92_GPIO92", 92, GPIO92_GPIO92}, |
| 721 | {"GPIO92_MODEM_RX_DATA2", 92, GPIO92_MODEM_RX_DATA2}, |
| 722 | {"GPIO93_GPIO93", 93, GPIO93_GPIO93}, |
| 723 | {"GPIO93_MODEM_RX_DATA3", 93, GPIO93_MODEM_RX_DATA3}, |
| 724 | {"GPIO94_GPIO94", 94, GPIO94_GPIO94}, |
| 725 | {"GPIO94_MODEM_RX_DATA4", 94, GPIO94_MODEM_RX_DATA4}, |
| 726 | {"GPIO95_GPIO95", 95, GPIO95_GPIO95}, |
| 727 | {"GPIO95_MODEM_RX_DATA5", 95, GPIO95_MODEM_RX_DATA5}, |
| 728 | {"GPIO96_GPIO96", 96, GPIO96_GPIO96}, |
| 729 | {"GPIO96_MODEM_RX_DATA6", 96, GPIO96_MODEM_RX_DATA6}, |
| 730 | {"GPIO97_GPIO97", 97, GPIO97_GPIO97}, |
| 731 | {"GPIO97_MODEM_RX_DATA7", 97, GPIO97_MODEM_RX_DATA7}, |
| 732 | {"GPIO98_GPIO98", 98, GPIO98_GPIO98}, |
| 733 | {"GPIO98_MODEM_RX_DATA8", 98, GPIO98_MODEM_RX_DATA8}, |
| 734 | {"GPIO99_GPIO99", 99, GPIO99_GPIO99}, |
| 735 | {"GPIO99_MODEM_RX_DATA9", 99, GPIO99_MODEM_RX_DATA9}, |
| 736 | {"GPIO100_GPIO100", 100, GPIO100_GPIO100}, |
| 737 | {"GPIO100_MODEM_RX_DATA10", 100, GPIO100_MODEM_RX_DATA10}, |
| 738 | {"GPIO101_GPIO101", 101, GPIO101_GPIO101}, |
| 739 | {"GPIO101_MODEM_RX_DATA11", 101, GPIO101_MODEM_RX_DATA11}, |
| 740 | {"GPIO102_GPIO102", 102, GPIO102_GPIO102}, |
| 741 | {"GPIO102_MODEM_FCLK_O", 102, GPIO102_MODEM_FCLK_O}, |
| 742 | {"GPIO103_GPIO103", 103, GPIO103_GPIO103}, |
| 743 | {"GPIO103_MODEM_FRAME_TX_O", 103, GPIO103_MODEM_FRAME_TX_O}, |
| 744 | {"GPIO104_GPIO104", 104, GPIO104_GPIO104}, |
| 745 | {"GPIO104_MODEM_FRAME_RX_I", 104, GPIO104_MODEM_FRAME_RX_I}, |
| 746 | {"GPIO105_GPIO105", 105, GPIO105_GPIO105}, |
| 747 | {"GPIO105_MODEM_MCLK_I", 105, GPIO105_MODEM_MCLK_I}, |
| 748 | {"GPIO106_GPIO106", 106, GPIO106_GPIO106}, |
| 749 | {"GPIO106_LTE_REF_CLK", 106, GPIO106_LTE_REF_CLK}, |
| 750 | {"GPIO109_GPIO109", 109, GPIO109_GPIO109}, |
| 751 | {"GPIO110_GPIO110", 110, GPIO110_GPIO110}, |
| 752 | {"GPIO110_GSM_OUT_OLD_O_12", 110, GPIO110_GSM_OUT_OLD_O_12}, |
| 753 | {"GPIO111_PWRCTRL2", 111, GPIO111_PWRCTRL2}, |
| 754 | {"GPIO111_GPIO111", 111, GPIO111_GPIO111}, |
| 755 | {"GPIO112_GPIO112", 112, GPIO112_GPIO112}, |
| 756 | {"GPIO112_RF_SPI0_STR0", 112, GPIO112_RF_SPI0_STR0}, |
| 757 | {"GPIO113_GPIO113", 113, GPIO113_GPIO113}, |
| 758 | {"GPIO113_RF_SPI0_STR1", 113, GPIO113_RF_SPI0_STR1}, |
| 759 | {"GPIO114_GPIO114", 114, GPIO114_GPIO114}, |
| 760 | {"GPIO114_RF_SPI0_CLK", 114, GPIO114_RF_SPI0_CLK}, |
| 761 | {"GPIO115_GPIO115", 115, GPIO115_GPIO115}, |
| 762 | {"GPIO115_RF_SPI0_DIN", 115, GPIO115_RF_SPI0_DIN}, |
| 763 | {"GPIO116_GPIO116", 116, GPIO116_GPIO116}, |
| 764 | {"GPIO116_RF_SPI0_DATA", 116, GPIO116_RF_SPI0_DATA}, |
| 765 | {"GPIO117_GPIO117", 117, GPIO117_GPIO117}, |
| 766 | {"GPIO117_RF_SPI1_STR0", 117, GPIO117_RF_SPI1_STR0}, |
| 767 | {"GPIO118_GPIO118", 118, GPIO118_GPIO118}, |
| 768 | {"GPIO118_RF_SPI1_CLK", 118, GPIO118_RF_SPI1_CLK}, |
| 769 | {"GPIO119_GPIO119", 119, GPIO119_GPIO119}, |
| 770 | {"GPIO119_RF_SPI1_DIN", 119, GPIO119_RF_SPI1_DIN}, |
| 771 | {"GPIO120_GPIO120", 120, GPIO120_GPIO120}, |
| 772 | {"GPIO120_RF_SPI1_DATA", 120, GPIO120_RF_SPI1_DATA}, |
| 773 | {"GPIO145_GPIO145", 145, GPIO145_GPIO145}, |
| 774 | {"GPIO145_RMII_TXEN", 145, GPIO145_RMII_TXEN}, |
| 775 | {"GPIO146_GPIO146", 146, GPIO146_GPIO146}, |
| 776 | {"GPIO146_RMII_RXEN", 146, GPIO146_RMII_RXEN}, |
| 777 | {"GPIO147_GPIO147", 147, GPIO147_GPIO147}, |
| 778 | {"GPIO147_RMII_RXD0", 147, GPIO147_RMII_RXD0}, |
| 779 | {"GPIO148_GPIO148", 148, GPIO148_GPIO148}, |
| 780 | {"GPIO148_RMII_RXD1", 148, GPIO148_RMII_RXD1}, |
| 781 | {"GPIO149_GPIO149", 149, GPIO149_GPIO149}, |
| 782 | {"GPIO149_RMII_TXD0", 149, GPIO149_RMII_TXD0}, |
| 783 | {"GPIO150_GPIO150", 150, GPIO150_GPIO150}, |
| 784 | {"GPIO150_RMII_TXD1", 150, GPIO150_RMII_TXD1}, |
| 785 | {"GPIO151_GPIO151", 151, GPIO151_GPIO151}, |
| 786 | {"GPIO151_MDC_SCLK", 151, GPIO151_MDC_SCLK}, |
| 787 | {"GPIO152_GPIO152", 152, GPIO152_GPIO152}, |
| 788 | {"GPIO152_MDC_SDIO", 152, GPIO152_MDC_SDIO}, |
| 789 | {"GPIO153_GPIO153", 153, GPIO153_GPIO153}, |
| 790 | {"GPIO153_PHY_RST", 153, GPIO153_PHY_RST}, |
| 791 | {"GPIO154_GPIO154", 154, GPIO154_GPIO154}, |
| 792 | {"GPIO154_RMII_CLK_O", 154, GPIO154_RMII_CLK_O}, |
| 793 | {"GPIO155_GPIO155", 155, GPIO155_GPIO155}, |
| 794 | {"GPIO155_RMII_CLK_I", 155, GPIO155_RMII_CLK_I}, |
| 795 | {"GPIO FUNCTION NOT EXIST", 255, ZX29_GPIO_NULL}, |
| 796 | }; |
| 797 | |
| 798 | void zx29_gpio_status_get(unsigned int gpio) |
| 799 | { |
| 800 | int temp = 0, n = 0; |
| 801 | |
| 802 | temp = zx29_gpio_function_sel_get(gpio); |
| 803 | |
| 804 | for(n=0; n<ARRAY_SIZE(gpio_def); n++) |
| 805 | { |
| 806 | if(gpio_def[n].gpio_func == temp) |
| 807 | { |
| 808 | gpio_status_get.function = gpio_def[n].gpio_name; |
| 809 | break; |
| 810 | } |
| 811 | if(gpio_def[n].gpio_num == ZX29_GPIO_NULL) |
| 812 | { |
| 813 | printk("GPIO%d function not exist, func[%d]\n",gpio,temp); |
| 814 | gpio_status_get.function = gpio_def[n].gpio_name; |
| 815 | } |
| 816 | } |
| 817 | |
| 818 | temp=zx29_gpio_get_direction(gpio); |
| 819 | |
| 820 | if(temp==GPIO_IN) |
| 821 | { |
| 822 | gpio_status_get.direction = "GPIO_IN"; |
| 823 | temp=zx29_gpio_input_data(gpio); |
| 824 | if(temp) |
| 825 | gpio_status_get.level = "GPIO_HIGH"; |
| 826 | else |
| 827 | gpio_status_get.level = "GPIO_LOW"; |
| 828 | } |
| 829 | else |
| 830 | { |
| 831 | gpio_status_get.direction = "GPIO_OUT"; |
| 832 | temp=zx29_gpio_outputdata_get(gpio); |
| 833 | if(temp) |
| 834 | gpio_status_get.level = "GPIO_HIGH"; |
| 835 | else |
| 836 | gpio_status_get.level = "GPIO_LOW"; |
| 837 | } |
| 838 | } |
| 839 | |
| 840 | /*sectionally get gpio seting parameters in temp_buf[50] */ |
| 841 | static void temp_buf_get(void) |
| 842 | { |
| 843 | unsigned char n = 0; |
| 844 | while((temp_buf[buf] != ' ')&&(temp_buf[buf] != '#')&&(temp_buf[buf] != '\0')) |
| 845 | { |
| 846 | temp[n++] = temp_buf[buf++]; |
| 847 | } |
| 848 | temp[n] = '\0'; |
| 849 | buf++; |
| 850 | } |
| 851 | |
| 852 | /* analysis seting parameters in temp_buf[50] to get setting parameters of gpio_num,gpio_function, gpio_dir and gpio_level */ |
| 853 | static int parse_temp_buf(char *tempbuf) |
| 854 | { |
| 855 | unsigned gpio_num = 0, gpio_dir = 0,gpio_level = 0; |
| 856 | unsigned int gpio_func = 0,n = 0; |
| 857 | unsigned char temp_k = 0, gpio_flag = 1; |
| 858 | int ret = 0; |
| 859 | |
| 860 | buf = 0; |
| 861 | /* get function setting parameters in"GPIO40_LTE_DATA_DONGLE0 OUT HIGH#"*/ |
| 862 | temp_buf_get(); |
| 863 | |
| 864 | for(n=0; n<ARRAY_SIZE(gpio_def); n++) |
| 865 | { |
| 866 | if(!strcmp(gpio_def[n].gpio_name,temp)) |
| 867 | { |
| 868 | gpio_num = gpio_def[n].gpio_num; |
| 869 | gpio_func = gpio_def[n].gpio_func; |
| 870 | break; |
| 871 | } |
| 872 | if(!strcmp(gpio_def[n].gpio_name ,"GPIO FUNCTION NOT EXIST")) |
| 873 | { |
| 874 | printk("gpio_func INVALID INPUT\n"); |
| 875 | return -EINVAL; |
| 876 | } |
| 877 | } |
| 878 | |
| 879 | ret = zx29_gpio_function_sel(gpio_num, gpio_func); |
| 880 | if(ret) |
| 881 | return ret; |
| 882 | |
| 883 | /*juge gpio is used as GPIO (GPIO40_GPIO40,the two strings besides the '_' are same) or multiplex function */ |
| 884 | temp_k = (strlen(temp)-1)/2; |
| 885 | for(n=0;n<temp_k;n++) |
| 886 | { |
| 887 | if(temp[n] != temp[temp_k+1+n]) |
| 888 | { |
| 889 | gpio_flag = 0; |
| 890 | break; |
| 891 | } |
| 892 | } |
| 893 | |
| 894 | if(!gpio_flag) |
| 895 | return 0; |
| 896 | |
| 897 | /* get direction setting parameters in"GPIO40_LTE_DATA_DONGLE0 OUT HIGH#"*/ |
| 898 | |
| 899 | temp_buf_get(); |
| 900 | |
| 901 | if(!strcmp(temp,""))/*just set GPIO function*/ |
| 902 | return 0; |
| 903 | else if(!strcmp(temp,"IN")) |
| 904 | gpio_dir = GPIO_IN; |
| 905 | else if(!strcmp(temp,"OUT")) |
| 906 | gpio_dir = GPIO_OUT; |
| 907 | else |
| 908 | { |
| 909 | printk("gpio_dir INVALID INPUT\n"); |
| 910 | return -EINVAL; |
| 911 | } |
| 912 | |
| 913 | zx29_gpio_set_direction(gpio_num,gpio_dir); |
| 914 | |
| 915 | if(gpio_dir == GPIO_IN) |
| 916 | return 0; |
| 917 | |
| 918 | /* get level setting parameters in"GPIO40_LTE_DATA_DONGLE0 OUT HIGH#"*/ |
| 919 | temp_buf_get(); |
| 920 | |
| 921 | if(!strcmp(temp,"HIGH")) |
| 922 | gpio_level = GPIO_HIGH; |
| 923 | else if(!strcmp(temp,"LOW")) |
| 924 | gpio_level = GPIO_LOW; |
| 925 | else |
| 926 | { |
| 927 | printk("gpio_level INVALID INPUT\n"); |
| 928 | return -EINVAL; |
| 929 | } |
| 930 | |
| 931 | zx29_gpio_output_data(gpio_num,gpio_level); |
| 932 | |
| 933 | return 0; |
| 934 | } |
| 935 | |
| 936 | unsigned int gpio_param_valid(unsigned int num) |
| 937 | { |
| 938 | unsigned int n,valid = 0; |
| 939 | |
| 940 | for(n=0; n<ARRAY_SIZE(pin_info); n++) |
| 941 | { if(pin_info[n].gpio == num) |
| 942 | { |
| 943 | valid = 1; |
| 944 | break; |
| 945 | } |
| 946 | } |
| 947 | return valid; |
| 948 | } |
| 949 | |
| 950 | static int dbg_gpio_show(struct seq_file *s, void *unused) |
| 951 | { |
| 952 | |
| 953 | unsigned int num; |
| 954 | |
| 955 | seq_printf(s,"The gpio module status:\n"); |
| 956 | |
| 957 | for(num = 0; num <= ZX29_GPIO_MAX; num++) |
| 958 | { |
| 959 | if(gpio_param_valid(num)) |
| 960 | { |
| 961 | zx29_gpio_status_get(num); |
| 962 | seq_printf(s,"%-30s",gpio_status_get.function); |
| 963 | seq_printf(s,"%-15s",gpio_status_get.direction); |
| 964 | seq_printf(s,"%-15s\n",gpio_status_get.level); |
| 965 | } |
| 966 | } |
| 967 | |
| 968 | return 0; |
| 969 | } |
| 970 | |
| 971 | ssize_t gpio_debug_write (struct file *file, const char __user *buf, size_t size, loff_t *p) |
| 972 | { |
| 973 | int ret; |
| 974 | |
| 975 | if(copy_from_user(temp_buf, buf, size)) |
| 976 | printk("copy user failed\n"); |
| 977 | |
| 978 | /*parse temp_buf*/ |
| 979 | ret=parse_temp_buf(temp_buf); |
| 980 | |
| 981 | if(!ret) |
| 982 | printk("GPIO setting succeed\n"); |
| 983 | else |
| 984 | { |
| 985 | printk("GPIO setting failed\n"); |
| 986 | printk("please follow the format to input GPIO parameters :\"GPIO40_GPI40 OUT HIGH#\"\n"); |
| 987 | } |
| 988 | return size; |
| 989 | } |
| 990 | |
| 991 | static int dbg_gpio_open(struct inode *inode, struct file *file) |
| 992 | { |
| 993 | return single_open(file, dbg_gpio_show, &inode->i_private); |
| 994 | } |
| 995 | |
| 996 | |
| 997 | static const struct file_operations debug_fops = { |
| 998 | .open = dbg_gpio_open, |
| 999 | .read = seq_read, |
| 1000 | .write = gpio_debug_write, |
| 1001 | .llseek = seq_lseek, |
| 1002 | .release = single_release, |
| 1003 | }; |
| 1004 | |
| 1005 | static void zx29_gpio_debuginit(void) |
| 1006 | { |
| 1007 | (void) debugfs_create_file("zx29_gpio", S_IRUGO, |
| 1008 | NULL, NULL, &debug_fops); |
| 1009 | } |
| 1010 | |
| 1011 | late_initcall(zx29_gpio_debuginit); |
| 1012 | |
| 1013 | #endif |
| 1014 | |
| 1015 | |