blob: d0a84bd3f3ebe5bca473e2c6c99711bf02069c3f [file] [log] [blame]
yuezonghe824eb0c2024-06-27 02:32:26 -07001/*
2 * Copyright 2005-2009 MontaVista Software, Inc.
3 * Copyright 2008 Freescale Semiconductor, Inc.
4 *
5 * This program is free software; you can redistribute it and/or modify it
6 * under the terms of the GNU General Public License as published by the
7 * Free Software Foundation; either version 2 of the License, or (at your
8 * option) any later version.
9 *
10 * This program is distributed in the hope that it will be useful, but
11 * WITHOUT ANY WARRANTY; without even the implied warranty of MERCHANTABILITY
12 * or FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
13 * for more details.
14 *
15 * You should have received a copy of the GNU General Public License
16 * along with this program; if not, write to the Free Software Foundation,
17 * Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
18 *
19 * Ported to 834x by Randy Vinson <rvinson@mvista.com> using code provided
20 * by Hunter Wu.
21 * Power Management support by Dave Liu <daveliu@freescale.com>,
22 * Jerry Huang <Chang-Ming.Huang@freescale.com> and
23 * Anton Vorontsov <avorontsov@ru.mvista.com>.
24 */
25
26#include <linux/kernel.h>
27#include <linux/types.h>
28#include <linux/delay.h>
29#include <linux/pm.h>
30#include <linux/platform_device.h>
31#include <linux/fsl_devices.h>
32
33#include "ehci-fsl.h"
34
35/* configure so an HC device and id are always provided */
36/* always called with process context; sleeping is OK */
37
38/**
39 * usb_hcd_fsl_probe - initialize FSL-based HCDs
40 * @drvier: Driver to be used for this HCD
41 * @pdev: USB Host Controller being probed
42 * Context: !in_interrupt()
43 *
44 * Allocates basic resources for this USB host controller.
45 *
46 */
47static int usb_hcd_fsl_probe(const struct hc_driver *driver,
48 struct platform_device *pdev)
49{
50 struct fsl_usb2_platform_data *pdata;
51 struct usb_hcd *hcd;
52 struct resource *res;
53 int irq;
54 int retval;
55
56 pr_debug("initializing FSL-SOC USB Controller\n");
57
58 /* Need platform data for setup */
59 pdata = (struct fsl_usb2_platform_data *)pdev->dev.platform_data;
60 if (!pdata) {
61 dev_err(&pdev->dev,
62 "No platform data for %s.\n", dev_name(&pdev->dev));
63 return -ENODEV;
64 }
65
66 /*
67 * This is a host mode driver, verify that we're supposed to be
68 * in host mode.
69 */
70 if (!((pdata->operating_mode == FSL_USB2_DR_HOST) ||
71 (pdata->operating_mode == FSL_USB2_MPH_HOST) ||
72 (pdata->operating_mode == FSL_USB2_DR_OTG))) {
73 dev_err(&pdev->dev,
74 "Non Host Mode configured for %s. Wrong driver linked.\n",
75 dev_name(&pdev->dev));
76 return -ENODEV;
77 }
78
79 res = platform_get_resource(pdev, IORESOURCE_IRQ, 0);
80 if (!res) {
81 dev_err(&pdev->dev,
82 "Found HC with no IRQ. Check %s setup!\n",
83 dev_name(&pdev->dev));
84 return -ENODEV;
85 }
86 irq = res->start;
87
88 hcd = usb_create_hcd(driver, &pdev->dev, dev_name(&pdev->dev));
89 if (!hcd) {
90 retval = -ENOMEM;
91 goto err1;
92 }
93
94 res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
95 if (!res) {
96 dev_err(&pdev->dev,
97 "Found HC with no register addr. Check %s setup!\n",
98 dev_name(&pdev->dev));
99 retval = -ENODEV;
100 goto err2;
101 }
102 hcd->rsrc_start = res->start;
103 hcd->rsrc_len = resource_size(res);
104 if (!request_mem_region(hcd->rsrc_start, hcd->rsrc_len,
105 driver->description)) {
106 dev_dbg(&pdev->dev, "controller already in use\n");
107 retval = -EBUSY;
108 goto err2;
109 }
110 hcd->regs = ioremap(hcd->rsrc_start, hcd->rsrc_len);
111
112 if (hcd->regs == NULL) {
113 dev_dbg(&pdev->dev, "error mapping memory\n");
114 retval = -EFAULT;
115 goto err3;
116 }
117
118 pdata->regs = hcd->regs;
119
120 if (pdata->power_budget)
121 hcd->power_budget = pdata->power_budget;
122
123 /*
124 * do platform specific init: check the clock, grab/config pins, etc.
125 */
126 if (pdata->init && pdata->init(pdev)) {
127 retval = -ENODEV;
128 goto err4;
129 }
130
131 /* Enable USB controller, 83xx or 8536 */
132 if (pdata->have_sysif_regs)
133 setbits32(hcd->regs + FSL_SOC_USB_CTRL, 0x4);
134
135 /* Don't need to set host mode here. It will be done by tdi_reset() */
136
137 retval = usb_add_hcd(hcd, irq, IRQF_SHARED);
138 if (retval != 0)
139 goto err4;
140
141#ifdef CONFIG_USB_OTG
142 if (pdata->operating_mode == FSL_USB2_DR_OTG) {
143 struct ehci_hcd *ehci = hcd_to_ehci(hcd);
144
145 ehci->transceiver = usb_get_transceiver();
146 dev_dbg(&pdev->dev, "hcd=0x%p ehci=0x%p, transceiver=0x%p\n",
147 hcd, ehci, ehci->transceiver);
148
149 if (ehci->transceiver) {
150 retval = otg_set_host(ehci->transceiver->otg,
151 &ehci_to_hcd(ehci)->self);
152 if (retval) {
153 if (ehci->transceiver)
154 put_device(ehci->transceiver->dev);
155 goto err4;
156 }
157 } else {
158 dev_err(&pdev->dev, "can't find transceiver\n");
159 retval = -ENODEV;
160 goto err4;
161 }
162 }
163#endif
164 return retval;
165
166 err4:
167 iounmap(hcd->regs);
168 err3:
169 release_mem_region(hcd->rsrc_start, hcd->rsrc_len);
170 err2:
171 usb_put_hcd(hcd);
172 err1:
173 dev_err(&pdev->dev, "init %s fail, %d\n", dev_name(&pdev->dev), retval);
174 if (pdata->exit)
175 pdata->exit(pdev);
176 return retval;
177}
178
179/* may be called without controller electrically present */
180/* may be called with controller, bus, and devices active */
181
182/**
183 * usb_hcd_fsl_remove - shutdown processing for FSL-based HCDs
184 * @dev: USB Host Controller being removed
185 * Context: !in_interrupt()
186 *
187 * Reverses the effect of usb_hcd_fsl_probe().
188 *
189 */
190static void usb_hcd_fsl_remove(struct usb_hcd *hcd,
191 struct platform_device *pdev)
192{
193 struct fsl_usb2_platform_data *pdata = pdev->dev.platform_data;
194 struct ehci_hcd *ehci = hcd_to_ehci(hcd);
195
196 if (ehci->transceiver) {
197 otg_set_host(ehci->transceiver->otg, NULL);
198 put_device(ehci->transceiver->dev);
199 }
200
201 usb_remove_hcd(hcd);
202
203 /*
204 * do platform specific un-initialization:
205 * release iomux pins, disable clock, etc.
206 */
207 if (pdata->exit)
208 pdata->exit(pdev);
209 iounmap(hcd->regs);
210 release_mem_region(hcd->rsrc_start, hcd->rsrc_len);
211 usb_put_hcd(hcd);
212}
213
214static void ehci_fsl_setup_phy(struct ehci_hcd *ehci,
215 enum fsl_usb2_phy_modes phy_mode,
216 unsigned int port_offset)
217{
218 u32 portsc;
219 struct usb_hcd *hcd = ehci_to_hcd(ehci);
220 void __iomem *non_ehci = hcd->regs;
221 struct fsl_usb2_platform_data *pdata;
222
223 pdata = hcd->self.controller->platform_data;
224
225 portsc = ehci_readl(ehci, &ehci->regs->port_status[port_offset]);
226 portsc &= ~(PORT_PTS_MSK | PORT_PTS_PTW);
227
228 switch (phy_mode) {
229 case FSL_USB2_PHY_ULPI:
230 portsc |= PORT_PTS_ULPI;
231 break;
232 case FSL_USB2_PHY_SERIAL:
233 portsc |= PORT_PTS_SERIAL;
234 break;
235 case FSL_USB2_PHY_UTMI_WIDE:
236 portsc |= PORT_PTS_PTW;
237 /* fall through */
238 case FSL_USB2_PHY_UTMI:
239 /* enable UTMI PHY */
240 if (pdata->have_sysif_regs)
241 setbits32(non_ehci + FSL_SOC_USB_CTRL,
242 CTRL_UTMI_PHY_EN);
243 portsc |= PORT_PTS_UTMI;
244 break;
245 case FSL_USB2_PHY_NONE:
246 break;
247 }
248 ehci_writel(ehci, portsc, &ehci->regs->port_status[port_offset]);
249}
250
251static void ehci_fsl_usb_setup(struct ehci_hcd *ehci)
252{
253 struct usb_hcd *hcd = ehci_to_hcd(ehci);
254 struct fsl_usb2_platform_data *pdata;
255 void __iomem *non_ehci = hcd->regs;
256 u32 temp;
257
258 pdata = hcd->self.controller->platform_data;
259
260 /* Enable PHY interface in the control reg. */
261 if (pdata->have_sysif_regs) {
262 temp = in_be32(non_ehci + FSL_SOC_USB_CTRL);
263 out_be32(non_ehci + FSL_SOC_USB_CTRL, temp | 0x00000004);
264
265 /*
266 * Turn on cache snooping hardware, since some PowerPC platforms
267 * wholly rely on hardware to deal with cache coherent
268 */
269
270 /* Setup Snooping for all the 4GB space */
271 /* SNOOP1 starts from 0x0, size 2G */
272 out_be32(non_ehci + FSL_SOC_USB_SNOOP1, 0x0 | SNOOP_SIZE_2GB);
273 /* SNOOP2 starts from 0x80000000, size 2G */
274 out_be32(non_ehci + FSL_SOC_USB_SNOOP2, 0x80000000 | SNOOP_SIZE_2GB);
275 }
276
277 if ((pdata->operating_mode == FSL_USB2_DR_HOST) ||
278 (pdata->operating_mode == FSL_USB2_DR_OTG))
279 ehci_fsl_setup_phy(ehci, pdata->phy_mode, 0);
280
281 if (pdata->operating_mode == FSL_USB2_MPH_HOST) {
282 unsigned int chip, rev, svr;
283
284 svr = mfspr(SPRN_SVR);
285 chip = svr >> 16;
286 rev = (svr >> 4) & 0xf;
287
288 /* Deal with USB Erratum #14 on MPC834x Rev 1.0 & 1.1 chips */
289 if ((rev == 1) && (chip >= 0x8050) && (chip <= 0x8055))
290 ehci->has_fsl_port_bug = 1;
291
292 if (pdata->port_enables & FSL_USB2_PORT0_ENABLED)
293 ehci_fsl_setup_phy(ehci, pdata->phy_mode, 0);
294 if (pdata->port_enables & FSL_USB2_PORT1_ENABLED)
295 ehci_fsl_setup_phy(ehci, pdata->phy_mode, 1);
296 }
297
298 if (pdata->have_sysif_regs) {
299#ifdef CONFIG_PPC_85xx
300 out_be32(non_ehci + FSL_SOC_USB_PRICTRL, 0x00000008);
301 out_be32(non_ehci + FSL_SOC_USB_AGECNTTHRSH, 0x00000080);
302#else
303 out_be32(non_ehci + FSL_SOC_USB_PRICTRL, 0x0000000c);
304 out_be32(non_ehci + FSL_SOC_USB_AGECNTTHRSH, 0x00000040);
305#endif
306 out_be32(non_ehci + FSL_SOC_USB_SICTRL, 0x00000001);
307 }
308}
309
310/* called after powerup, by probe or system-pm "wakeup" */
311static int ehci_fsl_reinit(struct ehci_hcd *ehci)
312{
313 ehci_fsl_usb_setup(ehci);
314 ehci_port_power(ehci, 0);
315
316 return 0;
317}
318
319/* called during probe() after chip reset completes */
320static int ehci_fsl_setup(struct usb_hcd *hcd)
321{
322 struct ehci_hcd *ehci = hcd_to_ehci(hcd);
323 int retval;
324 struct fsl_usb2_platform_data *pdata;
325 struct device *dev;
326
327 dev = hcd->self.controller;
328 pdata = hcd->self.controller->platform_data;
329 ehci->big_endian_desc = pdata->big_endian_desc;
330 ehci->big_endian_mmio = pdata->big_endian_mmio;
331
332 /* EHCI registers start at offset 0x100 */
333 ehci->caps = hcd->regs + 0x100;
334 ehci->regs = hcd->regs + 0x100 +
335 HC_LENGTH(ehci, ehci_readl(ehci, &ehci->caps->hc_capbase));
336 dbg_hcs_params(ehci, "reset");
337 dbg_hcc_params(ehci, "reset");
338
339 /* cache this readonly data; minimize chip reads */
340 ehci->hcs_params = ehci_readl(ehci, &ehci->caps->hcs_params);
341
342 hcd->has_tt = 1;
343
344 retval = ehci_halt(ehci);
345 if (retval)
346 return retval;
347
348 /* data structure init */
349 retval = ehci_init(hcd);
350 if (retval)
351 return retval;
352
353 ehci->sbrn = 0x20;
354
355 ehci_reset(ehci);
356
357 if (of_device_is_compatible(dev->parent->of_node,
358 "fsl,mpc5121-usb2-dr")) {
359 /*
360 * set SBUSCFG:AHBBRST so that control msgs don't
361 * fail when doing heavy PATA writes.
362 */
363 ehci_writel(ehci, SBUSCFG_INCR8,
364 hcd->regs + FSL_SOC_USB_SBUSCFG);
365 }
366
367 retval = ehci_fsl_reinit(ehci);
368 return retval;
369}
370
371struct ehci_fsl {
372 struct ehci_hcd ehci;
373
374#ifdef CONFIG_PM
375 /* Saved USB PHY settings, need to restore after deep sleep. */
376 u32 usb_ctrl;
377#endif
378};
379
380#ifdef CONFIG_PM
381
382#ifdef CONFIG_PPC_MPC512x
383static int ehci_fsl_mpc512x_drv_suspend(struct device *dev)
384{
385 struct usb_hcd *hcd = dev_get_drvdata(dev);
386 struct ehci_hcd *ehci = hcd_to_ehci(hcd);
387 struct fsl_usb2_platform_data *pdata = dev->platform_data;
388 u32 tmp;
389
390#ifdef DEBUG
391 u32 mode = ehci_readl(ehci, hcd->regs + FSL_SOC_USB_USBMODE);
392 mode &= USBMODE_CM_MASK;
393 tmp = ehci_readl(ehci, hcd->regs + 0x140); /* usbcmd */
394
395 dev_dbg(dev, "suspend=%d already_suspended=%d "
396 "mode=%d usbcmd %08x\n", pdata->suspended,
397 pdata->already_suspended, mode, tmp);
398#endif
399
400 /*
401 * If the controller is already suspended, then this must be a
402 * PM suspend. Remember this fact, so that we will leave the
403 * controller suspended at PM resume time.
404 */
405 if (pdata->suspended) {
406 dev_dbg(dev, "already suspended, leaving early\n");
407 pdata->already_suspended = 1;
408 return 0;
409 }
410
411 dev_dbg(dev, "suspending...\n");
412
413 ehci->rh_state = EHCI_RH_SUSPENDED;
414 dev->power.power_state = PMSG_SUSPEND;
415
416 /* ignore non-host interrupts */
417 clear_bit(HCD_FLAG_HW_ACCESSIBLE, &hcd->flags);
418
419 /* stop the controller */
420 tmp = ehci_readl(ehci, &ehci->regs->command);
421 tmp &= ~CMD_RUN;
422 ehci_writel(ehci, tmp, &ehci->regs->command);
423
424 /* save EHCI registers */
425 pdata->pm_command = ehci_readl(ehci, &ehci->regs->command);
426 pdata->pm_command &= ~CMD_RUN;
427 pdata->pm_status = ehci_readl(ehci, &ehci->regs->status);
428 pdata->pm_intr_enable = ehci_readl(ehci, &ehci->regs->intr_enable);
429 pdata->pm_frame_index = ehci_readl(ehci, &ehci->regs->frame_index);
430 pdata->pm_segment = ehci_readl(ehci, &ehci->regs->segment);
431 pdata->pm_frame_list = ehci_readl(ehci, &ehci->regs->frame_list);
432 pdata->pm_async_next = ehci_readl(ehci, &ehci->regs->async_next);
433 pdata->pm_configured_flag =
434 ehci_readl(ehci, &ehci->regs->configured_flag);
435 pdata->pm_portsc = ehci_readl(ehci, &ehci->regs->port_status[0]);
436 pdata->pm_usbgenctrl = ehci_readl(ehci,
437 hcd->regs + FSL_SOC_USB_USBGENCTRL);
438
439 /* clear the W1C bits */
440 pdata->pm_portsc &= cpu_to_hc32(ehci, ~PORT_RWC_BITS);
441
442 pdata->suspended = 1;
443
444 /* clear PP to cut power to the port */
445 tmp = ehci_readl(ehci, &ehci->regs->port_status[0]);
446 tmp &= ~PORT_POWER;
447 ehci_writel(ehci, tmp, &ehci->regs->port_status[0]);
448
449 return 0;
450}
451
452static int ehci_fsl_mpc512x_drv_resume(struct device *dev)
453{
454 struct usb_hcd *hcd = dev_get_drvdata(dev);
455 struct ehci_hcd *ehci = hcd_to_ehci(hcd);
456 struct fsl_usb2_platform_data *pdata = dev->platform_data;
457 u32 tmp;
458
459 dev_dbg(dev, "suspend=%d already_suspended=%d\n",
460 pdata->suspended, pdata->already_suspended);
461
462 /*
463 * If the controller was already suspended at suspend time,
464 * then don't resume it now.
465 */
466 if (pdata->already_suspended) {
467 dev_dbg(dev, "already suspended, leaving early\n");
468 pdata->already_suspended = 0;
469 return 0;
470 }
471
472 if (!pdata->suspended) {
473 dev_dbg(dev, "not suspended, leaving early\n");
474 return 0;
475 }
476
477 pdata->suspended = 0;
478
479 dev_dbg(dev, "resuming...\n");
480
481 /* set host mode */
482 tmp = USBMODE_CM_HOST | (pdata->es ? USBMODE_ES : 0);
483 ehci_writel(ehci, tmp, hcd->regs + FSL_SOC_USB_USBMODE);
484
485 ehci_writel(ehci, pdata->pm_usbgenctrl,
486 hcd->regs + FSL_SOC_USB_USBGENCTRL);
487 ehci_writel(ehci, ISIPHYCTRL_PXE | ISIPHYCTRL_PHYE,
488 hcd->regs + FSL_SOC_USB_ISIPHYCTRL);
489
490 ehci_writel(ehci, SBUSCFG_INCR8, hcd->regs + FSL_SOC_USB_SBUSCFG);
491
492 /* restore EHCI registers */
493 ehci_writel(ehci, pdata->pm_command, &ehci->regs->command);
494 ehci_writel(ehci, pdata->pm_intr_enable, &ehci->regs->intr_enable);
495 ehci_writel(ehci, pdata->pm_frame_index, &ehci->regs->frame_index);
496 ehci_writel(ehci, pdata->pm_segment, &ehci->regs->segment);
497 ehci_writel(ehci, pdata->pm_frame_list, &ehci->regs->frame_list);
498 ehci_writel(ehci, pdata->pm_async_next, &ehci->regs->async_next);
499 ehci_writel(ehci, pdata->pm_configured_flag,
500 &ehci->regs->configured_flag);
501 ehci_writel(ehci, pdata->pm_portsc, &ehci->regs->port_status[0]);
502
503 set_bit(HCD_FLAG_HW_ACCESSIBLE, &hcd->flags);
504 ehci->rh_state = EHCI_RH_RUNNING;
505 dev->power.power_state = PMSG_ON;
506
507 tmp = ehci_readl(ehci, &ehci->regs->command);
508 tmp |= CMD_RUN;
509 ehci_writel(ehci, tmp, &ehci->regs->command);
510
511 usb_hcd_resume_root_hub(hcd);
512
513 return 0;
514}
515#else
516static inline int ehci_fsl_mpc512x_drv_suspend(struct device *dev)
517{
518 return 0;
519}
520
521static inline int ehci_fsl_mpc512x_drv_resume(struct device *dev)
522{
523 return 0;
524}
525#endif /* CONFIG_PPC_MPC512x */
526
527static struct ehci_fsl *hcd_to_ehci_fsl(struct usb_hcd *hcd)
528{
529 struct ehci_hcd *ehci = hcd_to_ehci(hcd);
530
531 return container_of(ehci, struct ehci_fsl, ehci);
532}
533
534static int ehci_fsl_drv_suspend(struct device *dev)
535{
536 struct usb_hcd *hcd = dev_get_drvdata(dev);
537 struct ehci_fsl *ehci_fsl = hcd_to_ehci_fsl(hcd);
538 void __iomem *non_ehci = hcd->regs;
539
540 if (of_device_is_compatible(dev->parent->of_node,
541 "fsl,mpc5121-usb2-dr")) {
542 return ehci_fsl_mpc512x_drv_suspend(dev);
543 }
544
545 ehci_prepare_ports_for_controller_suspend(hcd_to_ehci(hcd),
546 device_may_wakeup(dev));
547 if (!fsl_deep_sleep())
548 return 0;
549
550 ehci_fsl->usb_ctrl = in_be32(non_ehci + FSL_SOC_USB_CTRL);
551 return 0;
552}
553
554static int ehci_fsl_drv_resume(struct device *dev)
555{
556 struct usb_hcd *hcd = dev_get_drvdata(dev);
557 struct ehci_fsl *ehci_fsl = hcd_to_ehci_fsl(hcd);
558 struct ehci_hcd *ehci = hcd_to_ehci(hcd);
559 void __iomem *non_ehci = hcd->regs;
560
561 if (of_device_is_compatible(dev->parent->of_node,
562 "fsl,mpc5121-usb2-dr")) {
563 return ehci_fsl_mpc512x_drv_resume(dev);
564 }
565
566 ehci_prepare_ports_for_controller_resume(ehci);
567 if (!fsl_deep_sleep())
568 return 0;
569
570 usb_root_hub_lost_power(hcd->self.root_hub);
571
572 /* Restore USB PHY settings and enable the controller. */
573 out_be32(non_ehci + FSL_SOC_USB_CTRL, ehci_fsl->usb_ctrl);
574
575 ehci_reset(ehci);
576 ehci_fsl_reinit(ehci);
577
578 return 0;
579}
580
581static int ehci_fsl_drv_restore(struct device *dev)
582{
583 struct usb_hcd *hcd = dev_get_drvdata(dev);
584
585 usb_root_hub_lost_power(hcd->self.root_hub);
586 return 0;
587}
588
589static struct dev_pm_ops ehci_fsl_pm_ops = {
590 .suspend = ehci_fsl_drv_suspend,
591 .resume = ehci_fsl_drv_resume,
592 .restore = ehci_fsl_drv_restore,
593};
594
595#define EHCI_FSL_PM_OPS (&ehci_fsl_pm_ops)
596#else
597#define EHCI_FSL_PM_OPS NULL
598#endif /* CONFIG_PM */
599
600#ifdef CONFIG_USB_OTG
601static int ehci_start_port_reset(struct usb_hcd *hcd, unsigned port)
602{
603 struct ehci_hcd *ehci = hcd_to_ehci(hcd);
604 u32 status;
605
606 if (!port)
607 return -EINVAL;
608
609 port--;
610
611 /* start port reset before HNP protocol time out */
612 status = readl(&ehci->regs->port_status[port]);
613 if (!(status & PORT_CONNECT))
614 return -ENODEV;
615
616 /* khubd will finish the reset later */
617 if (ehci_is_TDI(ehci)) {
618 writel(PORT_RESET |
619 (status & ~(PORT_CSC | PORT_PEC | PORT_OCC)),
620 &ehci->regs->port_status[port]);
621 } else {
622 writel(PORT_RESET, &ehci->regs->port_status[port]);
623 }
624
625 return 0;
626}
627#else
628#define ehci_start_port_reset NULL
629#endif /* CONFIG_USB_OTG */
630
631
632static const struct hc_driver ehci_fsl_hc_driver = {
633 .description = hcd_name,
634 .product_desc = "Freescale On-Chip EHCI Host Controller",
635 .hcd_priv_size = sizeof(struct ehci_fsl),
636
637 /*
638 * generic hardware linkage
639 */
640 .irq = ehci_irq,
641 .flags = HCD_USB2 | HCD_MEMORY,
642
643 /*
644 * basic lifecycle operations
645 */
646 .reset = ehci_fsl_setup,
647 .start = ehci_run,
648 .stop = ehci_stop,
649 .shutdown = ehci_shutdown,
650
651 /*
652 * managing i/o requests and associated device resources
653 */
654 .urb_enqueue = ehci_urb_enqueue,
655 .urb_dequeue = ehci_urb_dequeue,
656 .endpoint_disable = ehci_endpoint_disable,
657 .endpoint_reset = ehci_endpoint_reset,
658
659 /*
660 * scheduling support
661 */
662 .get_frame_number = ehci_get_frame,
663
664 /*
665 * root hub support
666 */
667 .hub_status_data = ehci_hub_status_data,
668 .hub_control = ehci_hub_control,
669 .bus_suspend = ehci_bus_suspend,
670 .bus_resume = ehci_bus_resume,
671 .start_port_reset = ehci_start_port_reset,
672 .relinquish_port = ehci_relinquish_port,
673 .port_handed_over = ehci_port_handed_over,
674
675 .clear_tt_buffer_complete = ehci_clear_tt_buffer_complete,
676};
677
678static int ehci_fsl_drv_probe(struct platform_device *pdev)
679{
680 if (usb_disabled())
681 return -ENODEV;
682
683 /* FIXME we only want one one probe() not two */
684 return usb_hcd_fsl_probe(&ehci_fsl_hc_driver, pdev);
685}
686
687static int ehci_fsl_drv_remove(struct platform_device *pdev)
688{
689 struct usb_hcd *hcd = platform_get_drvdata(pdev);
690
691 /* FIXME we only want one one remove() not two */
692 usb_hcd_fsl_remove(hcd, pdev);
693 return 0;
694}
695
696MODULE_ALIAS("platform:fsl-ehci");
697
698static struct platform_driver ehci_fsl_driver = {
699 .probe = ehci_fsl_drv_probe,
700 .remove = ehci_fsl_drv_remove,
701 .shutdown = usb_hcd_platform_shutdown,
702 .driver = {
703 .name = "fsl-ehci",
704 .pm = EHCI_FSL_PM_OPS,
705 },
706};