[Feature]add MT2731_MP2_MR2_SVN388 baseline version
Change-Id: Ief04314834b31e27effab435d3ca8ba33b499059
diff --git a/src/bsp/lk/arch/x86/arch.c b/src/bsp/lk/arch/x86/arch.c
new file mode 100755
index 0000000..2f90e87
--- /dev/null
+++ b/src/bsp/lk/arch/x86/arch.c
@@ -0,0 +1,67 @@
+/*
+ * Copyright (c) 2009 Corey Tabaka
+ * Copyright (c) 2015 Intel Corporation
+ *
+ * Permission is hereby granted, free of charge, to any person obtaining
+ * a copy of this software and associated documentation files
+ * (the "Software"), to deal in the Software without restriction,
+ * including without limitation the rights to use, copy, modify, merge,
+ * publish, distribute, sublicense, and/or sell copies of the Software,
+ * and to permit persons to whom the Software is furnished to do so,
+ * subject to the following conditions:
+ *
+ * The above copyright notice and this permission notice shall be
+ * included in all copies or substantial portions of the Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
+ * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
+ * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.
+ * IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY
+ * CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT,
+ * TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE
+ * SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
+ */
+
+#include <debug.h>
+#include <arch.h>
+#include <arch/ops.h>
+#include <arch/x86.h>
+#include <arch/x86/mmu.h>
+#include <arch/x86/descriptor.h>
+#include <arch/fpu.h>
+#include <arch/fpu.h>
+#include <platform.h>
+#include <sys/types.h>
+#include <string.h>
+
+tss_t system_tss;
+
+void arch_early_init(void)
+{
+ /* enable caches here for now */
+ clear_in_cr0(X86_CR0_NW | X86_CR0_CD);
+
+ memset(&system_tss, 0, sizeof(tss_t));
+
+ system_tss.esp0 = 0;
+ system_tss.ss0 = DATA_SELECTOR;
+ system_tss.ss1 = 0;
+ system_tss.ss2 = 0;
+ system_tss.eflags = 0x00003002;
+ system_tss.bitmap = offsetof(tss_t, tss_bitmap);
+ system_tss.trace = 1; // trap on hardware task switch
+ set_global_desc(TSS_SELECTOR, &system_tss, sizeof(tss_t), 1, 0, 0, SEG_TYPE_TSS, 0, 0);
+ x86_ltr(TSS_SELECTOR);
+}
+
+void arch_init(void)
+{
+#ifdef X86_WITH_FPU
+ fpu_init();
+#endif
+}
+
+void arch_chain_load(void *entry, ulong arg0, ulong arg1, ulong arg2, ulong arg3)
+{
+ PANIC_UNIMPLEMENTED;
+}