[Feature]add MT2731_MP2_MR2_SVN388 baseline version
Change-Id: Ief04314834b31e27effab435d3ca8ba33b499059
diff --git a/src/bsp/lk/platform/mt2701/platform.c b/src/bsp/lk/platform/mt2701/platform.c
new file mode 100644
index 0000000..5e9917c
--- /dev/null
+++ b/src/bsp/lk/platform/mt2701/platform.c
@@ -0,0 +1,153 @@
+/*
+ * Copyright (c) 2016 MediaTek Inc.
+ *
+ * Permission is hereby granted, free of charge, to any person obtaining
+ * a copy of this software and associated documentation files
+ * (the "Software"), to deal in the Software without restriction,
+ * including without limitation the rights to use, copy, modify, merge,
+ * publish, distribute, sublicense, and/or sell copies of the Software,
+ * and to permit persons to whom the Software is furnished to do so,
+ * subject to the following conditions:
+ *
+ * The above copyright notice and this permission notice shall be
+ * included in all copies or substantial portions of the Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
+ * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
+ * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.
+ * IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY
+ * CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT,
+ * TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE
+ * SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
+*/
+
+#include <arch.h>
+#include <dev/interrupt/arm_gic.h>
+#include <dev/uart.h>
+#include <dev/timer/arm_generic.h>
+#include <err.h>
+#include <kernel/vm.h>
+#include <kernel/spinlock.h>
+#include <lib/mempool.h>
+#include <platform.h>
+#include <platform/emi.h>
+#include <platform/memory.h>
+#include <platform/gic.h>
+#include <platform/memory.h>
+#include <platform/mtk_timer.h>
+#include <platform/mtk_wdt.h>
+#include <platform/pll.h>
+
+#if RAMBASE
+#define RSV_PAGE RAMBASE
+#else
+#define RSV_PAGE 0
+#endif
+
+#define L2C_MAPPING_IDX 0
+#define SRAM_MAPPING_IDX 1
+#define PERIPHERAL_MAPPING_IDX 2
+#define DRAM_MAPPING_IDX 3
+
+/* initial memory mappings. parsed by start.S */
+struct mmu_initial_mapping mmu_initial_mappings[] = {
+ {
+ .phys = SRAM_BASE_PHYS,
+ .virt = SRAM_BASE_VIRT,
+ .size = SRAM_BASE_SIZE,
+ .flags = 0,
+ .name = "sram"
+ },
+ {
+ .phys = MEMORY_BASE_PHYS,
+ .virt = KERNEL_BASE,
+ .size = MEMORY_APERTURE_SIZE,
+ .flags = 0,
+ .name = "memory"
+ },
+ {
+ .phys = PERIPHERAL_BASE_PHYS,
+ .virt = PERIPHERAL_BASE_VIRT,
+ .size = PERIPHERAL_BASE_SIZE,
+ .flags = MMU_INITIAL_MAPPING_FLAG_DEVICE,
+ .name = "peripherals"
+ },
+ /* reserved for dram */
+ { 0 },
+
+ /* null entry to terminate the list */
+ { 0 }
+};
+
+static pmm_arena_t arena = {
+ .name = "sdram",
+ .base = SRAM_BASE_PHYS,
+ .size = (SRAM_BASE_SIZE - RSV_PAGE),
+ .flags = PMM_ARENA_FLAG_KMAP,
+};
+
+static void arch_enable_mmu(void)
+{
+ arm_write_sctlr(arm_read_sctlr() | (1<<0)); // mmu enable
+}
+
+static void smp_mode_enable(void)
+{
+ uint32_t actlr = arm_read_actlr();
+
+ actlr |= (1<<6);
+ arm_write_actlr(actlr);
+}
+
+void platform_early_init(void)
+{
+ uart_init_early();
+#ifdef WITH_KERNEL_VM
+ pmm_add_arena(&arena);
+#endif
+ /* initialize the interrupt controller */
+ arm_gic_init();
+ /* init GPT6 */
+ mtk_timer_init();
+ /* initialize the timer block */
+ arm_generic_timer_init(ARM_GENERIC_TIMER_PHYSICAL_INT, 13000000);
+
+ arch_disable_cache(DCACHE);
+ arch_disable_mmu();
+ /* init pll */
+ mt_pll_init();
+
+ /* init AP watchdog and set timeout to 10 secs */
+ mtk_wdt_init();
+
+ /* init memory */
+ mt_mem_init();
+
+#if WITH_KERNEL_VM
+ /* add DRAM to mmu_initial_mappings for physical-to-virtual translation */
+ mmu_initial_mappings[DRAM_MAPPING_IDX].phys = DRAM_BASE_PHY;
+ mmu_initial_mappings[DRAM_MAPPING_IDX].virt = DRAM_BASE_PHY;
+ mmu_initial_mappings[DRAM_MAPPING_IDX].size = memory_size();
+ mmu_initial_mappings[DRAM_MAPPING_IDX].flags = 0;
+ mmu_initial_mappings[DRAM_MAPPING_IDX].name = "dram";
+#endif
+
+ arch_enable_mmu();
+ arch_enable_cache(DCACHE);
+ smp_mode_enable();
+}
+
+void platform_init(void)
+{
+ int ret;
+ unsigned int dram_size = 0;
+
+ /* map for app */
+ dram_size = memory_size();
+ arch_mmu_map(DRAM_PHY_ADDR, DRAM_PHY_ADDR, dram_size / PAGE_SIZE, 0);
+
+ ret = mempool_init((void *)CACHED_MEMPOOL_ADDR, CACHED_MEMPOOL_SIZE,
+ MEMPOOL_CACHE);
+ if (ret != NO_ERROR)
+ platform_halt(HALT_ACTION_REBOOT, HALT_REASON_SW_PANIC);
+}