[Feature]add MT2731_MP2_MR2_SVN388 baseline version
Change-Id: Ief04314834b31e27effab435d3ca8ba33b499059
diff --git a/src/bsp/lk/platform/qemu-virt/debug.c b/src/bsp/lk/platform/qemu-virt/debug.c
new file mode 100644
index 0000000..8869a13
--- /dev/null
+++ b/src/bsp/lk/platform/qemu-virt/debug.c
@@ -0,0 +1,73 @@
+/*
+ * Copyright (c) 2008-2014 Travis Geiselbrecht
+ *
+ * Permission is hereby granted, free of charge, to any person obtaining
+ * a copy of this software and associated documentation files
+ * (the "Software"), to deal in the Software without restriction,
+ * including without limitation the rights to use, copy, modify, merge,
+ * publish, distribute, sublicense, and/or sell copies of the Software,
+ * and to permit persons to whom the Software is furnished to do so,
+ * subject to the following conditions:
+ *
+ * The above copyright notice and this permission notice shall be
+ * included in all copies or substantial portions of the Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
+ * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
+ * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.
+ * IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY
+ * CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT,
+ * TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE
+ * SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
+ */
+#include <stdarg.h>
+#include <reg.h>
+#include <stdio.h>
+#include <kernel/thread.h>
+#include <dev/uart.h>
+#include <platform/debug.h>
+#include <platform/qemu-virt.h>
+#include <target/debugconfig.h>
+#include <reg.h>
+
+/* DEBUG_UART must be defined to 0 or 1 */
+#if defined(DEBUG_UART) && DEBUG_UART == 0
+#define DEBUG_UART_BASE UART0_BASE
+#elif defined(DEBUG_UART) && DEBUG_UART == 1
+#define DEBUG_UART_BASE UART1_BASE
+#else
+#error define DEBUG_UART to something valid
+#endif
+
+void platform_dputc(char c)
+{
+ if (c == '\n')
+ uart_putc(DEBUG_UART, '\r');
+ uart_putc(DEBUG_UART, c);
+}
+
+int platform_dgetc(char *c, bool wait)
+{
+ int ret = uart_getc(DEBUG_UART, wait);
+ if (ret == -1)
+ return -1;
+ *c = ret;
+ return 0;
+}
+
+void platform_pputc(char c)
+{
+ if (c == '\n')
+ uart_pputc(DEBUG_UART, '\r');
+ uart_pputc(DEBUG_UART, c);
+}
+
+int platform_pgetc(char *c, bool wait)
+{
+ int ret = uart_pgetc(DEBUG_UART);
+ if (ret < 0)
+ return ret;
+ *c = ret;
+ return 0;
+}
+
diff --git a/src/bsp/lk/platform/qemu-virt/include/platform/gic.h b/src/bsp/lk/platform/qemu-virt/include/platform/gic.h
new file mode 100644
index 0000000..167aa05
--- /dev/null
+++ b/src/bsp/lk/platform/qemu-virt/include/platform/gic.h
@@ -0,0 +1,30 @@
+/*
+ * Copyright (c) 2014-2015 Travis Geiselbrecht
+ *
+ * Permission is hereby granted, free of charge, to any person obtaining
+ * a copy of this software and associated documentation files
+ * (the "Software"), to deal in the Software without restriction,
+ * including without limitation the rights to use, copy, modify, merge,
+ * publish, distribute, sublicense, and/or sell copies of the Software,
+ * and to permit persons to whom the Software is furnished to do so,
+ * subject to the following conditions:
+ *
+ * The above copyright notice and this permission notice shall be
+ * included in all copies or substantial portions of the Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
+ * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
+ * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.
+ * IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY
+ * CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT,
+ * TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE
+ * SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
+ */
+#pragma once
+
+#include <platform/qemu-virt.h>
+
+#define GICBASE(n) (CPUPRIV_BASE_VIRT)
+#define GICD_OFFSET (0x00000)
+#define GICC_OFFSET (0x10000)
+
diff --git a/src/bsp/lk/platform/qemu-virt/include/platform/qemu-virt.h b/src/bsp/lk/platform/qemu-virt/include/platform/qemu-virt.h
new file mode 100644
index 0000000..4c3f14c
--- /dev/null
+++ b/src/bsp/lk/platform/qemu-virt/include/platform/qemu-virt.h
@@ -0,0 +1,96 @@
+/*
+ * Copyright (c) 2015 Travis Geiselbrecht
+ *
+ * Permission is hereby granted, free of charge, to any person obtaining
+ * a copy of this software and associated documentation files
+ * (the "Software"), to deal in the Software without restriction,
+ * including without limitation the rights to use, copy, modify, merge,
+ * publish, distribute, sublicense, and/or sell copies of the Software,
+ * and to permit persons to whom the Software is furnished to do so,
+ * subject to the following conditions:
+ *
+ * The above copyright notice and this permission notice shall be
+ * included in all copies or substantial portions of the Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
+ * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
+ * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.
+ * IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY
+ * CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT,
+ * TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE
+ * SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
+ */
+#pragma once
+
+/* up to 30 GB of ram */
+#define MEMORY_BASE_PHYS (0x40000000)
+#if ARCH_ARM64
+#define MEMORY_APERTURE_SIZE (30ULL * 1024 * 1024 * 1024)
+#else
+#define MEMORY_APERTURE_SIZE (1UL * 1024 * 1024 * 1024)
+#endif
+
+/* memory map of peripherals, from qemu hw/arm/virt.c */
+#if 0
+static const MemMapEntry a15memmap[] = {
+ /* Space up to 0x8000000 is reserved for a boot ROM */
+ [VIRT_FLASH] = { 0, 0x08000000 },
+ [VIRT_CPUPERIPHS] = { 0x08000000, 0x00020000 },
+ /* GIC distributor and CPU interfaces sit inside the CPU peripheral space */
+ [VIRT_GIC_DIST] = { 0x08000000, 0x00010000 },
+ [VIRT_GIC_CPU] = { 0x08010000, 0x00010000 },
+ [VIRT_GIC_V2M] = { 0x08020000, 0x00001000 },
+ [VIRT_UART] = { 0x09000000, 0x00001000 },
+ [VIRT_RTC] = { 0x09010000, 0x00001000 },
+ [VIRT_FW_CFG] = { 0x09020000, 0x0000000a },
+ [VIRT_MMIO] = { 0x0a000000, 0x00000200 },
+ /* ...repeating for a total of NUM_VIRTIO_TRANSPORTS, each of that size */
+ [VIRT_PLATFORM_BUS] = { 0x0c000000, 0x02000000 },
+ [VIRT_PCIE_MMIO] = { 0x10000000, 0x2eff0000 },
+ [VIRT_PCIE_PIO] = { 0x3eff0000, 0x00010000 },
+ [VIRT_PCIE_ECAM] = { 0x3f000000, 0x01000000 },
+ [VIRT_MEM] = { 0x40000000, 30ULL * 1024 * 1024 * 1024 },
+};
+
+static const int a15irqmap[] = {
+ [VIRT_UART] = 1,
+ [VIRT_RTC] = 2,
+ [VIRT_PCIE] = 3, /* ... to 6 */
+ [VIRT_MMIO] = 16, /* ...to 16 + NUM_VIRTIO_TRANSPORTS - 1 */
+ [VIRT_GIC_V2M] = 48, /* ...to 48 + NUM_GICV2M_SPIS - 1 */
+ [VIRT_PLATFORM_BUS] = 112, /* ...to 112 + PLATFORM_BUS_NUM_IRQS -1 */
+};
+#endif
+
+/* map all of 0-1GB into kernel space in one shot */
+#define PERIPHERAL_BASE_PHYS (0)
+#define PERIPHERAL_BASE_SIZE (0x40000000UL) // 1GB
+
+#if ARCH_ARM64
+#define PERIPHERAL_BASE_VIRT (0xffffffffc0000000ULL) // -1GB
+#else
+#define PERIPHERAL_BASE_VIRT (0xc0000000UL) // -1GB
+#endif
+
+/* individual peripherals in this mapping */
+#define CPUPRIV_BASE_VIRT (PERIPHERAL_BASE_VIRT + 0x08000000)
+#define CPUPRIV_BASE_PHYS (PERIPHERAL_BASE_PHYS + 0x08000000)
+#define CPUPRIV_SIZE (0x00020000)
+#define UART_BASE (PERIPHERAL_BASE_VIRT + 0x09000000)
+#define UART_SIZE (0x00001000)
+#define RTC_BASE (PERIPHERAL_BASE_VIRT + 0x09010000)
+#define RTC_SIZE (0x00001000)
+#define FW_CFG_BASE (PERIPHERAL_BASE_VIRT + 0x09020000)
+#define FW_CFG_SIZE (0x00001000)
+#define NUM_VIRTIO_TRANSPORTS 32
+#define VIRTIO_BASE (PERIPHERAL_BASE_VIRT + 0x0a000000)
+#define VIRTIO_SIZE (NUM_VIRTIO_TRANSPORTS * 0x200)
+
+/* interrupts */
+#define ARM_GENERIC_TIMER_VIRTUAL_INT 27
+#define ARM_GENERIC_TIMER_PHYSICAL_INT 30
+#define UART0_INT (32 + 1)
+#define VIRTIO0_INT (32 + 16)
+
+#define MAX_INT 128
+
diff --git a/src/bsp/lk/platform/qemu-virt/platform.c b/src/bsp/lk/platform/qemu-virt/platform.c
new file mode 100644
index 0000000..1820b82
--- /dev/null
+++ b/src/bsp/lk/platform/qemu-virt/platform.c
@@ -0,0 +1,181 @@
+/*
+ * Copyright (c) 2012-2015 Travis Geiselbrecht
+ *
+ * Permission is hereby granted, free of charge, to any person obtaining
+ * a copy of this software and associated documentation files
+ * (the "Software"), to deal in the Software without restriction,
+ * including without limitation the rights to use, copy, modify, merge,
+ * publish, distribute, sublicense, and/or sell copies of the Software,
+ * and to permit persons to whom the Software is furnished to do so,
+ * subject to the following conditions:
+ *
+ * The above copyright notice and this permission notice shall be
+ * included in all copies or substantial portions of the Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
+ * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
+ * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.
+ * IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY
+ * CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT,
+ * TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE
+ * SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
+ */
+#include <arch.h>
+#include <err.h>
+#include <debug.h>
+#include <trace.h>
+#include <dev/interrupt/arm_gic.h>
+#include <dev/timer/arm_generic.h>
+#include <dev/uart.h>
+#include <dev/virtio.h>
+#include <dev/virtio/net.h>
+#include <lk/init.h>
+#include <kernel/vm.h>
+#include <kernel/spinlock.h>
+#include <platform.h>
+#include <platform/gic.h>
+#include <platform/interrupts.h>
+#include <platform/qemu-virt.h>
+#include <libfdt.h>
+#include "platform_p.h"
+
+#if WITH_LIB_MINIP
+#include <lib/minip.h>
+#endif
+
+#define DEFAULT_MEMORY_SIZE (MEMSIZE) /* try to fetch from the emulator via the fdt */
+
+/* initial memory mappings. parsed by start.S */
+struct mmu_initial_mapping mmu_initial_mappings[] = {
+ /* all of memory */
+ {
+ .phys = MEMORY_BASE_PHYS,
+ .virt = KERNEL_BASE,
+ .size = MEMORY_APERTURE_SIZE,
+ .flags = 0,
+ .name = "memory"
+ },
+
+ /* 1GB of peripherals */
+ {
+ .phys = PERIPHERAL_BASE_PHYS,
+ .virt = PERIPHERAL_BASE_VIRT,
+ .size = PERIPHERAL_BASE_SIZE,
+ .flags = MMU_INITIAL_MAPPING_FLAG_DEVICE,
+ .name = "peripherals"
+ },
+
+ /* null entry to terminate the list */
+ { 0 }
+};
+
+static pmm_arena_t arena = {
+ .name = "ram",
+ .base = MEMORY_BASE_PHYS,
+ .size = DEFAULT_MEMORY_SIZE,
+ .flags = PMM_ARENA_FLAG_KMAP,
+};
+
+extern void psci_call(ulong arg0, ulong arg1, ulong arg2, ulong arg3);
+
+void platform_early_init(void)
+{
+ /* initialize the interrupt controller */
+ arm_gic_init();
+
+ arm_generic_timer_init(ARM_GENERIC_TIMER_PHYSICAL_INT, 0);
+
+ uart_init_early();
+
+ /* look for a flattened device tree just before the kernel */
+ const void *fdt = (void *)KERNEL_BASE;
+ int err = fdt_check_header(fdt);
+ if (err >= 0) {
+ /* walk the nodes, looking for 'memory' */
+ int depth = 0;
+ int offset = 0;
+ for (;;) {
+ offset = fdt_next_node(fdt, offset, &depth);
+ if (offset < 0)
+ break;
+
+ /* get the name */
+ const char *name = fdt_get_name(fdt, offset, NULL);
+ if (!name)
+ continue;
+
+ /* look for the 'memory' property */
+ if (strcmp(name, "memory") == 0) {
+ int lenp;
+ const void *prop_ptr = fdt_getprop(fdt, offset, "reg", &lenp);
+ if (prop_ptr && lenp == 0x10) {
+ /* we're looking at a memory descriptor */
+ //uint64_t base = fdt64_to_cpu(*(uint64_t *)prop_ptr);
+ uint64_t len = fdt64_to_cpu(*((const uint64_t *)prop_ptr + 1));
+
+ /* trim size on certain platforms */
+#if ARCH_ARM
+ if (len > 1024*1024*1024U) {
+ len = 1024*1024*1024; /* only use the first 1GB on ARM32 */
+ printf("trimming memory to 1GB\n");
+ }
+#endif
+
+ /* set the size in the pmm arena */
+ arena.size = len;
+ }
+ }
+ }
+ }
+
+ /* add the main memory arena */
+ pmm_add_arena(&arena);
+
+ /* reserve the first 64k of ram, which should be holding the fdt */
+ struct list_node list = LIST_INITIAL_VALUE(list);
+ pmm_alloc_range(MEMBASE, 0x10000 / PAGE_SIZE, &list);
+
+ /* boot the secondary cpus using the Power State Coordintion Interface */
+ ulong psci_call_num = 0x84000000 + 3; /* SMC32 CPU_ON */
+#if ARCH_ARM64
+ psci_call_num += 0x40000000; /* SMC64 */
+#endif
+ for (uint i = 1; i < SMP_MAX_CPUS; i++) {
+ psci_call(psci_call_num, i, MEMBASE + KERNEL_LOAD_OFFSET, 0);
+ }
+}
+
+void platform_init(void)
+{
+ uart_init();
+
+ /* detect any virtio devices */
+ uint virtio_irqs[NUM_VIRTIO_TRANSPORTS];
+ for (int i = 0; i < NUM_VIRTIO_TRANSPORTS; i++) {
+ virtio_irqs[i] = VIRTIO0_INT + i;
+ }
+
+ virtio_mmio_detect((void *)VIRTIO_BASE, NUM_VIRTIO_TRANSPORTS, virtio_irqs);
+
+#if WITH_LIB_MINIP
+ if (virtio_net_found() > 0) {
+ uint8_t mac_addr[6];
+
+ virtio_net_get_mac_addr(mac_addr);
+
+ TRACEF("found virtio networking interface\n");
+
+ /* start minip */
+ minip_set_macaddr(mac_addr);
+
+ __UNUSED uint32_t ip_addr = IPV4(192, 168, 0, 99);
+ __UNUSED uint32_t ip_mask = IPV4(255, 255, 255, 0);
+ __UNUSED uint32_t ip_gateway = IPV4_NONE;
+
+ //minip_init(virtio_net_send_minip_pkt, NULL, ip_addr, ip_mask, ip_gateway);
+ minip_init_dhcp(virtio_net_send_minip_pkt, NULL);
+
+ virtio_net_start();
+ }
+#endif
+}
diff --git a/src/bsp/lk/platform/qemu-virt/platform_p.h b/src/bsp/lk/platform/qemu-virt/platform_p.h
new file mode 100644
index 0000000..e83320e
--- /dev/null
+++ b/src/bsp/lk/platform/qemu-virt/platform_p.h
@@ -0,0 +1,29 @@
+/*
+ * Copyright (c) 2012 Travis Geiselbrecht
+ *
+ * Permission is hereby granted, free of charge, to any person obtaining
+ * a copy of this software and associated documentation files
+ * (the "Software"), to deal in the Software without restriction,
+ * including without limitation the rights to use, copy, modify, merge,
+ * publish, distribute, sublicense, and/or sell copies of the Software,
+ * and to permit persons to whom the Software is furnished to do so,
+ * subject to the following conditions:
+ *
+ * The above copyright notice and this permission notice shall be
+ * included in all copies or substantial portions of the Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
+ * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
+ * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.
+ * IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY
+ * CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT,
+ * TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE
+ * SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
+ */
+#ifndef __PLATFORM_P_H
+#define __PLATFORM_P_H
+
+void platform_init_timer(void);
+
+#endif
+
diff --git a/src/bsp/lk/platform/qemu-virt/rules.mk b/src/bsp/lk/platform/qemu-virt/rules.mk
new file mode 100644
index 0000000..a19fddd
--- /dev/null
+++ b/src/bsp/lk/platform/qemu-virt/rules.mk
@@ -0,0 +1,47 @@
+LOCAL_DIR := $(GET_LOCAL_DIR)
+
+MODULE := $(LOCAL_DIR)
+
+ifeq ($(ARCH),)
+ARCH := arm64
+endif
+ifeq ($(ARCH),arm64)
+ARM_CPU ?= cortex-a53
+endif
+ifeq ($(ARCH),arm)
+ARM_CPU ?= cortex-a15
+endif
+WITH_SMP ?= 1
+
+LK_HEAP_IMPLEMENTATION ?= dlmalloc
+
+MODULE_SRCS += \
+ $(LOCAL_DIR)/debug.c \
+ $(LOCAL_DIR)/platform.c \
+ $(LOCAL_DIR)/secondary_boot.S \
+ $(LOCAL_DIR)/uart.c
+
+MEMBASE := 0x40000000
+MEMSIZE ?= 0x08000000 # 512MB
+KERNEL_LOAD_OFFSET := 0x10000 # 64k
+
+MODULE_DEPS += \
+ lib/cbuf \
+ lib/fdt \
+ dev/interrupt/arm_gic \
+ dev/timer/arm_generic \
+ dev/virtio/block \
+ dev/virtio/gpu \
+ dev/virtio/net \
+
+GLOBAL_DEFINES += \
+ MEMBASE=$(MEMBASE) \
+ MEMSIZE=$(MEMSIZE) \
+ PLATFORM_SUPPORTS_PANIC_SHELL=1
+
+GLOBAL_DEFINES += MMU_WITH_TRAMPOLINE=1 \
+
+LINKER_SCRIPT += \
+ $(BUILDDIR)/system-onesegment.ld
+
+include make/module.mk
diff --git a/src/bsp/lk/platform/qemu-virt/secondary_boot.S b/src/bsp/lk/platform/qemu-virt/secondary_boot.S
new file mode 100644
index 0000000..51f16fd
--- /dev/null
+++ b/src/bsp/lk/platform/qemu-virt/secondary_boot.S
@@ -0,0 +1,38 @@
+/*
+ * Copyright (c) 2014 Travis Geiselbrecht
+ *
+ * Permission is hereby granted, free of charge, to any person obtaining
+ * a copy of this software and associated documentation files
+ * (the "Software"), to deal in the Software without restriction,
+ * including without limitation the rights to use, copy, modify, merge,
+ * publish, distribute, sublicense, and/or sell copies of the Software,
+ * and to permit persons to whom the Software is furnished to do so,
+ * subject to the following conditions:
+ *
+ * The above copyright notice and this permission notice shall be
+ * included in all copies or substantial portions of the Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
+ * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
+ * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.
+ * IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY
+ * CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT,
+ * TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE
+ * SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
+ */
+
+#include <asm.h>
+
+.section .text
+
+/* used to call into PSCI firmware (Power State Coordination Firmware) */
+FUNCTION(psci_call)
+ hvc #0
+#if ARCH_ARM
+ bx lr
+#else
+ ret
+#endif
+
+.ltorg
+
diff --git a/src/bsp/lk/platform/qemu-virt/uart.c b/src/bsp/lk/platform/qemu-virt/uart.c
new file mode 100644
index 0000000..b39e186
--- /dev/null
+++ b/src/bsp/lk/platform/qemu-virt/uart.c
@@ -0,0 +1,190 @@
+/*
+ * Copyright (c) 2014-2015 Travis Geiselbrecht
+ *
+ * Permission is hereby granted, free of charge, to any person obtaining
+ * a copy of this software and associated documentation files
+ * (the "Software"), to deal in the Software without restriction,
+ * including without limitation the rights to use, copy, modify, merge,
+ * publish, distribute, sublicense, and/or sell copies of the Software,
+ * and to permit persons to whom the Software is furnished to do so,
+ * subject to the following conditions:
+ *
+ * The above copyright notice and this permission notice shall be
+ * included in all copies or substantial portions of the Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
+ * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
+ * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.
+ * IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY
+ * CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT,
+ * TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE
+ * SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
+ */
+#include <reg.h>
+#include <stdio.h>
+#include <trace.h>
+#include <lib/cbuf.h>
+#include <kernel/thread.h>
+#include <platform/interrupts.h>
+#include <platform/debug.h>
+#include <platform/qemu-virt.h>
+
+/* PL011 implementation */
+#define UART_DR (0x00)
+#define UART_RSR (0x04)
+#define UART_TFR (0x18)
+#define UART_ILPR (0x20)
+#define UART_IBRD (0x24)
+#define UART_FBRD (0x28)
+#define UART_LCRH (0x2c)
+#define UART_CR (0x30)
+#define UART_IFLS (0x34)
+#define UART_IMSC (0x38)
+#define UART_TRIS (0x3c)
+#define UART_TMIS (0x40)
+#define UART_ICR (0x44)
+#define UART_DMACR (0x48)
+
+#define UARTREG(base, reg) (*REG32((base) + (reg)))
+
+#define RXBUF_SIZE 16
+#define NUM_UART 1
+
+static cbuf_t uart_rx_buf[NUM_UART];
+
+static inline uintptr_t uart_to_ptr(unsigned int n)
+{
+ switch (n) {
+ default:
+ case 0:
+ return UART_BASE;
+ }
+}
+
+static enum handler_return uart_irq(void *arg)
+{
+ bool resched = false;
+ uint port = (uintptr_t)arg;
+ uintptr_t base = uart_to_ptr(port);
+
+ /* read interrupt status and mask */
+ uint32_t isr = UARTREG(base, UART_TMIS);
+
+ if (isr & (1<<4)) { // rxmis
+ cbuf_t *rxbuf = &uart_rx_buf[port];
+
+ /* while fifo is not empty, read chars out of it */
+ while ((UARTREG(base, UART_TFR) & (1<<4)) == 0) {
+ /* if we're out of rx buffer, mask the irq instead of handling it */
+ if (cbuf_space_avail(rxbuf) == 0) {
+ UARTREG(base, UART_IMSC) &= ~(1<<4); // !rxim
+ break;
+ }
+
+ char c = UARTREG(base, UART_DR);
+ cbuf_write_char(rxbuf, c, false);
+
+ resched = true;
+ }
+ }
+
+ return resched ? INT_RESCHEDULE : INT_NO_RESCHEDULE;
+}
+
+void uart_init(void)
+{
+ for (size_t i = 0; i < NUM_UART; i++) {
+ uintptr_t base = uart_to_ptr(i);
+
+ // create circular buffer to hold received data
+ cbuf_initialize(&uart_rx_buf[i], RXBUF_SIZE);
+
+ // assumes interrupts are contiguous
+ register_int_handler(UART0_INT + i, &uart_irq, (void *)i);
+
+ // clear all irqs
+ UARTREG(base, UART_ICR) = 0x3ff;
+
+ // set fifo trigger level
+ UARTREG(base, UART_IFLS) = 0; // 1/8 rxfifo, 1/8 txfifo
+
+ // enable rx interrupt
+ UARTREG(base, UART_IMSC) = (1<<4); // rxim
+
+ // enable receive
+ UARTREG(base, UART_CR) |= (1<<9); // rxen
+
+ // enable interrupt
+ unmask_interrupt(UART0_INT + i);
+ }
+}
+
+void uart_init_early(void)
+{
+ for (size_t i = 0; i < NUM_UART; i++) {
+ UARTREG(uart_to_ptr(i), UART_CR) = (1<<8)|(1<<0); // tx_enable, uarten
+ }
+}
+
+int uart_putc(int port, char c)
+{
+ uintptr_t base = uart_to_ptr(port);
+
+ /* spin while fifo is full */
+ while (UARTREG(base, UART_TFR) & (1<<5))
+ ;
+ UARTREG(base, UART_DR) = c;
+
+ return 1;
+}
+
+int uart_getc(int port, bool wait)
+{
+ cbuf_t *rxbuf = &uart_rx_buf[port];
+
+ char c;
+ if (cbuf_read_char(rxbuf, &c, wait) == 1) {
+ UARTREG(uart_to_ptr(port), UART_IMSC) = (1<<4); // rxim
+ return c;
+ }
+
+ return -1;
+}
+
+/* panic-time getc/putc */
+int uart_pputc(int port, char c)
+{
+ uintptr_t base = uart_to_ptr(port);
+
+ /* spin while fifo is full */
+ while (UARTREG(base, UART_TFR) & (1<<5))
+ ;
+ UARTREG(base, UART_DR) = c;
+
+ return 1;
+}
+
+int uart_pgetc(int port, bool wait)
+{
+ uintptr_t base = uart_to_ptr(port);
+
+ if ((UARTREG(base, UART_TFR) & (1<<4)) == 0) {
+ return UARTREG(base, UART_DR);
+ } else {
+ return -1;
+ }
+}
+
+
+void uart_flush_tx(int port)
+{
+}
+
+void uart_flush_rx(int port)
+{
+}
+
+void uart_init_port(int port, uint baud)
+{
+}
+