[Feature]add MT2731_MP2_MR2_SVN388 baseline version
Change-Id: Ief04314834b31e27effab435d3ca8ba33b499059
diff --git a/src/bsp/lk/platform/qemu-virt/platform.c b/src/bsp/lk/platform/qemu-virt/platform.c
new file mode 100644
index 0000000..1820b82
--- /dev/null
+++ b/src/bsp/lk/platform/qemu-virt/platform.c
@@ -0,0 +1,181 @@
+/*
+ * Copyright (c) 2012-2015 Travis Geiselbrecht
+ *
+ * Permission is hereby granted, free of charge, to any person obtaining
+ * a copy of this software and associated documentation files
+ * (the "Software"), to deal in the Software without restriction,
+ * including without limitation the rights to use, copy, modify, merge,
+ * publish, distribute, sublicense, and/or sell copies of the Software,
+ * and to permit persons to whom the Software is furnished to do so,
+ * subject to the following conditions:
+ *
+ * The above copyright notice and this permission notice shall be
+ * included in all copies or substantial portions of the Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
+ * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
+ * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.
+ * IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY
+ * CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT,
+ * TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE
+ * SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
+ */
+#include <arch.h>
+#include <err.h>
+#include <debug.h>
+#include <trace.h>
+#include <dev/interrupt/arm_gic.h>
+#include <dev/timer/arm_generic.h>
+#include <dev/uart.h>
+#include <dev/virtio.h>
+#include <dev/virtio/net.h>
+#include <lk/init.h>
+#include <kernel/vm.h>
+#include <kernel/spinlock.h>
+#include <platform.h>
+#include <platform/gic.h>
+#include <platform/interrupts.h>
+#include <platform/qemu-virt.h>
+#include <libfdt.h>
+#include "platform_p.h"
+
+#if WITH_LIB_MINIP
+#include <lib/minip.h>
+#endif
+
+#define DEFAULT_MEMORY_SIZE (MEMSIZE) /* try to fetch from the emulator via the fdt */
+
+/* initial memory mappings. parsed by start.S */
+struct mmu_initial_mapping mmu_initial_mappings[] = {
+ /* all of memory */
+ {
+ .phys = MEMORY_BASE_PHYS,
+ .virt = KERNEL_BASE,
+ .size = MEMORY_APERTURE_SIZE,
+ .flags = 0,
+ .name = "memory"
+ },
+
+ /* 1GB of peripherals */
+ {
+ .phys = PERIPHERAL_BASE_PHYS,
+ .virt = PERIPHERAL_BASE_VIRT,
+ .size = PERIPHERAL_BASE_SIZE,
+ .flags = MMU_INITIAL_MAPPING_FLAG_DEVICE,
+ .name = "peripherals"
+ },
+
+ /* null entry to terminate the list */
+ { 0 }
+};
+
+static pmm_arena_t arena = {
+ .name = "ram",
+ .base = MEMORY_BASE_PHYS,
+ .size = DEFAULT_MEMORY_SIZE,
+ .flags = PMM_ARENA_FLAG_KMAP,
+};
+
+extern void psci_call(ulong arg0, ulong arg1, ulong arg2, ulong arg3);
+
+void platform_early_init(void)
+{
+ /* initialize the interrupt controller */
+ arm_gic_init();
+
+ arm_generic_timer_init(ARM_GENERIC_TIMER_PHYSICAL_INT, 0);
+
+ uart_init_early();
+
+ /* look for a flattened device tree just before the kernel */
+ const void *fdt = (void *)KERNEL_BASE;
+ int err = fdt_check_header(fdt);
+ if (err >= 0) {
+ /* walk the nodes, looking for 'memory' */
+ int depth = 0;
+ int offset = 0;
+ for (;;) {
+ offset = fdt_next_node(fdt, offset, &depth);
+ if (offset < 0)
+ break;
+
+ /* get the name */
+ const char *name = fdt_get_name(fdt, offset, NULL);
+ if (!name)
+ continue;
+
+ /* look for the 'memory' property */
+ if (strcmp(name, "memory") == 0) {
+ int lenp;
+ const void *prop_ptr = fdt_getprop(fdt, offset, "reg", &lenp);
+ if (prop_ptr && lenp == 0x10) {
+ /* we're looking at a memory descriptor */
+ //uint64_t base = fdt64_to_cpu(*(uint64_t *)prop_ptr);
+ uint64_t len = fdt64_to_cpu(*((const uint64_t *)prop_ptr + 1));
+
+ /* trim size on certain platforms */
+#if ARCH_ARM
+ if (len > 1024*1024*1024U) {
+ len = 1024*1024*1024; /* only use the first 1GB on ARM32 */
+ printf("trimming memory to 1GB\n");
+ }
+#endif
+
+ /* set the size in the pmm arena */
+ arena.size = len;
+ }
+ }
+ }
+ }
+
+ /* add the main memory arena */
+ pmm_add_arena(&arena);
+
+ /* reserve the first 64k of ram, which should be holding the fdt */
+ struct list_node list = LIST_INITIAL_VALUE(list);
+ pmm_alloc_range(MEMBASE, 0x10000 / PAGE_SIZE, &list);
+
+ /* boot the secondary cpus using the Power State Coordintion Interface */
+ ulong psci_call_num = 0x84000000 + 3; /* SMC32 CPU_ON */
+#if ARCH_ARM64
+ psci_call_num += 0x40000000; /* SMC64 */
+#endif
+ for (uint i = 1; i < SMP_MAX_CPUS; i++) {
+ psci_call(psci_call_num, i, MEMBASE + KERNEL_LOAD_OFFSET, 0);
+ }
+}
+
+void platform_init(void)
+{
+ uart_init();
+
+ /* detect any virtio devices */
+ uint virtio_irqs[NUM_VIRTIO_TRANSPORTS];
+ for (int i = 0; i < NUM_VIRTIO_TRANSPORTS; i++) {
+ virtio_irqs[i] = VIRTIO0_INT + i;
+ }
+
+ virtio_mmio_detect((void *)VIRTIO_BASE, NUM_VIRTIO_TRANSPORTS, virtio_irqs);
+
+#if WITH_LIB_MINIP
+ if (virtio_net_found() > 0) {
+ uint8_t mac_addr[6];
+
+ virtio_net_get_mac_addr(mac_addr);
+
+ TRACEF("found virtio networking interface\n");
+
+ /* start minip */
+ minip_set_macaddr(mac_addr);
+
+ __UNUSED uint32_t ip_addr = IPV4(192, 168, 0, 99);
+ __UNUSED uint32_t ip_mask = IPV4(255, 255, 255, 0);
+ __UNUSED uint32_t ip_gateway = IPV4_NONE;
+
+ //minip_init(virtio_net_send_minip_pkt, NULL, ip_addr, ip_mask, ip_gateway);
+ minip_init_dhcp(virtio_net_send_minip_pkt, NULL);
+
+ virtio_net_start();
+ }
+#endif
+}