[Feature]add MT2731_MP2_MR2_SVN388 baseline version
Change-Id: Ief04314834b31e27effab435d3ca8ba33b499059
diff --git a/src/bsp/lk/target/stm32746g-eval2/include/target/debugconfig.h b/src/bsp/lk/target/stm32746g-eval2/include/target/debugconfig.h
new file mode 100644
index 0000000..88ffe5f
--- /dev/null
+++ b/src/bsp/lk/target/stm32746g-eval2/include/target/debugconfig.h
@@ -0,0 +1,28 @@
+/*
+ * Copyright (c) 2012 Travis Geiselbrecht
+ *
+ * Permission is hereby granted, free of charge, to any person obtaining
+ * a copy of this software and associated documentation files
+ * (the "Software"), to deal in the Software without restriction,
+ * including without limitation the rights to use, copy, modify, merge,
+ * publish, distribute, sublicense, and/or sell copies of the Software,
+ * and to permit persons to whom the Software is furnished to do so,
+ * subject to the following conditions:
+ *
+ * The above copyright notice and this permission notice shall be
+ * included in all copies or substantial portions of the Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
+ * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
+ * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.
+ * IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY
+ * CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT,
+ * TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE
+ * SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
+ */
+#ifndef __TARGET_DEBUGCONFIG_H
+#define __TARGET_DEBUGCONFIG_H
+
+#define DEBUG_UART 1
+
+#endif
diff --git a/src/bsp/lk/target/stm32746g-eval2/include/target/gpioconfig.h b/src/bsp/lk/target/stm32746g-eval2/include/target/gpioconfig.h
new file mode 100644
index 0000000..96b34a6
--- /dev/null
+++ b/src/bsp/lk/target/stm32746g-eval2/include/target/gpioconfig.h
@@ -0,0 +1,31 @@
+/*
+ * Copyright (c) 2012 Travis Geiselbrecht
+ *
+ * Permission is hereby granted, free of charge, to any person obtaining
+ * a copy of this software and associated documentation files
+ * (the "Software"), to deal in the Software without restriction,
+ * including without limitation the rights to use, copy, modify, merge,
+ * publish, distribute, sublicense, and/or sell copies of the Software,
+ * and to permit persons to whom the Software is furnished to do so,
+ * subject to the following conditions:
+ *
+ * The above copyright notice and this permission notice shall be
+ * included in all copies or substantial portions of the Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
+ * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
+ * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.
+ * IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY
+ * CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT,
+ * TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE
+ * SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
+ */
+#ifndef __TARGET_GPIOCONFIG_H
+#define __TARGET_GPIOCONFIG_H
+
+#include <platform/gpio.h>
+
+#define GPIO_USART1_TX GPIO(GPIO_PORT_A, 9)
+#define GPIO_USART1_RX GPIO(GPIO_PORT_A, 10)
+
+#endif
diff --git a/src/bsp/lk/target/stm32746g-eval2/init.c b/src/bsp/lk/target/stm32746g-eval2/init.c
new file mode 100644
index 0000000..8c34e85
--- /dev/null
+++ b/src/bsp/lk/target/stm32746g-eval2/init.c
@@ -0,0 +1,334 @@
+/*
+ * Copyright (c) 2015 Travis Geiselbrecht
+ *
+ * Permission is hereby granted, free of charge, to any person obtaining
+ * a copy of this software and associated documentation files
+ * (the "Software"), to deal in the Software without restriction,
+ * including without limitation the rights to use, copy, modify, merge,
+ * publish, distribute, sublicense, and/or sell copies of the Software,
+ * and to permit persons to whom the Software is furnished to do so,
+ * subject to the following conditions:
+ *
+ * The above copyright notice and this permission notice shall be
+ * included in all copies or substantial portions of the Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
+ * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
+ * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.
+ * IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY
+ * CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT,
+ * TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE
+ * SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
+ */
+#include <err.h>
+#include <stdlib.h>
+#include <debug.h>
+#include <trace.h>
+#include <target.h>
+#include <compiler.h>
+#include <lib/gfx.h>
+#include <dev/gpio.h>
+#include <platform/stm32.h>
+#include <platform/sdram.h>
+#include <platform/gpio.h>
+#include <platform/eth.h>
+#include <platform/qspi.h>
+#include <platform/n25q512a.h>
+#include <target/debugconfig.h>
+#include <target/gpioconfig.h>
+#include <reg.h>
+
+#if WITH_LIB_MINIP
+#include <lib/minip.h>
+#endif
+
+extern uint8_t BSP_LCD_Init(void);
+extern uint8_t BSP_SRAM_Init(void);
+
+const sdram_config_t target_sdram_config = {
+ .bus_width = SDRAM_BUS_WIDTH_32,
+ .cas_latency = SDRAM_CAS_LATENCY_3,
+ .col_bits_num = SDRAM_COLUMN_BITS_8
+};
+
+void target_early_init(void)
+{
+#if DEBUG_UART == 1
+ /* configure usart 1 pins */
+ gpio_config(GPIO_USART1_TX, GPIO_STM32_AF | GPIO_STM32_AFn(GPIO_AF7_USART1) | GPIO_PULLUP);
+ gpio_config(GPIO_USART1_RX, GPIO_STM32_AF | GPIO_STM32_AFn(GPIO_AF7_USART1) | GPIO_PULLUP);
+#else
+#error need to configure gpio pins for debug uart
+#endif
+
+ /* now that the uart gpios are configured, enable the debug uart */
+ stm32_debug_early_init();
+
+ /* initialize external sram */
+ BSP_SRAM_Init();
+
+ /* initialize the lcd panel */
+ BSP_LCD_Init();
+}
+
+void target_init(void)
+{
+ TRACE_ENTRY;
+ stm32_debug_init();
+
+ qspi_flash_init(N25Q512A_FLASH_SIZE);
+
+#if WITH_LIB_MINIP
+ uint8_t mac_addr[6];
+ gen_random_mac_address(mac_addr);
+ eth_init(mac_addr, PHY_DP83848);
+
+ /* start minip */
+ minip_set_macaddr(mac_addr);
+
+ uint32_t ip_addr = IPV4(192, 168, 0, 99);
+ uint32_t ip_mask = IPV4(255, 255, 255, 0);
+ uint32_t ip_gateway = IPV4_NONE;
+
+ minip_init(stm32_eth_send_minip_pkt, NULL, ip_addr, ip_mask, ip_gateway);
+#endif
+
+ TRACE_EXIT;
+}
+
+#if 0
+void target_set_debug_led(unsigned int led, bool on)
+{
+ switch (led) {
+ case 0:
+ gpio_set(GPIO_LED0, on);
+ break;
+ case 1:
+ gpio_set(GPIO_LED1, on);
+ break;
+ case 2:
+ gpio_set(GPIO_LED2, on);
+ break;
+ case 3:
+ gpio_set(GPIO_LED3, on);
+ break;
+ }
+}
+#endif
+
+/**
+ * @brief Initializes the ETH MSP.
+ * @param heth: ETH handle
+ * @retval None
+ */
+/* called back from the HAL_ETH_Init routine */
+void HAL_ETH_MspInit(ETH_HandleTypeDef *heth)
+{
+ GPIO_InitTypeDef GPIO_InitStructure;
+
+ /* Enable GPIOs clocks */
+ __HAL_RCC_GPIOA_CLK_ENABLE();
+ __HAL_RCC_GPIOB_CLK_ENABLE();
+ __HAL_RCC_GPIOC_CLK_ENABLE();
+ __HAL_RCC_GPIOE_CLK_ENABLE();
+ __HAL_RCC_GPIOF_CLK_ENABLE();
+ __HAL_RCC_GPIOG_CLK_ENABLE();
+ __HAL_RCC_GPIOH_CLK_ENABLE();
+ __HAL_RCC_GPIOI_CLK_ENABLE();
+
+ /* Ethernet pins configuration ************************************************/
+ /*
+ ETH_MDIO -------------------------> PA2
+ ETH_MDC --------------------------> PC1
+ ETH_PPS_OUT ----------------------> PB5
+ ETH_MII_RXD2 ---------------------> PH6
+ ETH_MII_RXD3 ---------------------> PH7
+ ETH_MII_TX_CLK -------------------> PC3
+ ETH_MII_TXD2 ---------------------> PC2
+ ETH_MII_TXD3 ---------------------> PE2
+ ETH_MII_RX_CLK -------------------> PA1
+ ETH_MII_RX_DV --------------------> PA7
+ ETH_MII_RXD0 ---------------------> PC4
+ ETH_MII_RXD1 ---------------------> PC5
+ ETH_MII_TX_EN --------------------> PG11
+ ETH_MII_TXD0 ---------------------> PG13
+ ETH_MII_TXD1 ---------------------> PG14
+ ETH_MII_RX_ER --------------------> PI10 (not configured)
+ ETH_MII_CRS ----------------------> PA0 (not configured)
+ ETH_MII_COL ----------------------> PH3 (not configured)
+ */
+
+ /* Configure PA1, PA2 and PA7 */
+ GPIO_InitStructure.Speed = GPIO_SPEED_HIGH;
+ GPIO_InitStructure.Mode = GPIO_MODE_AF_PP;
+ GPIO_InitStructure.Pull = GPIO_NOPULL;
+ GPIO_InitStructure.Alternate = GPIO_AF11_ETH;
+ GPIO_InitStructure.Pin = GPIO_PIN_1 | GPIO_PIN_2 | GPIO_PIN_7;
+ HAL_GPIO_Init(GPIOA, &GPIO_InitStructure);
+
+ /* Note : ETH_MDIO is connected to PA2 which is shared with other signals like SAI2_SCKB.
+ By default on STM32756G-EVAL board, PA2 is connected to SAI2_SCKB, so to connect PA2 to ETH_MDIO :
+ - unsolder bridge SB24 (SAI2_CKB)
+ - solder bridge SB5 (ETH_MDIO) */
+
+ /* Configure PB5 */
+ GPIO_InitStructure.Pin = GPIO_PIN_5;
+ HAL_GPIO_Init(GPIOB, &GPIO_InitStructure);
+
+ /* Configure PE2 */
+ GPIO_InitStructure.Pin = GPIO_PIN_2;
+ HAL_GPIO_Init(GPIOE, &GPIO_InitStructure);
+
+ /* Configure PC1, PC2, PC3, PC4 and PC5 */
+ GPIO_InitStructure.Pin = GPIO_PIN_1 | GPIO_PIN_2 | GPIO_PIN_3 | GPIO_PIN_4 | GPIO_PIN_5;
+ HAL_GPIO_Init(GPIOC, &GPIO_InitStructure);
+
+ /* Note : ETH_MDC is connected to PC1 which is shared with other signals like SAI1_SDA.
+ By default on STM32756G-EVAL board, PC1 is connected to SAI1_SDA, so to connect PC1 to ETH_MDC :
+ - unsolder bridge SB22 (SAI1_SDA)
+ - solder bridge SB33 (ETH_MDC) */
+
+ /* Configure PG11, PG14 and PG13 */
+ GPIO_InitStructure.Pin = GPIO_PIN_11 | GPIO_PIN_13 | GPIO_PIN_14;
+ HAL_GPIO_Init(GPIOG, &GPIO_InitStructure);
+
+ /* Configure PH6, PH7 */
+ GPIO_InitStructure.Pin = GPIO_PIN_6 | GPIO_PIN_7;
+ HAL_GPIO_Init(GPIOH, &GPIO_InitStructure);
+
+ /* Configure PA0
+ GPIO_InitStructure.Pin = GPIO_PIN_0;
+ HAL_GPIO_Init(GPIOA, &GPIO_InitStructure);
+
+ Note: Ethernet Full duplex mode works properly in the default setting
+ (which MII_CRS is not connected to PA0 of STM32F756NGH6) because PA0 is shared
+ with MC_ENA.
+ If Half duplex mode is needed, uncomment PA0 configuration code source (above
+ the note) and close the SB36 solder bridge of the STM32756G-EVAL board .
+ */
+
+ /* Configure PH3
+ GPIO_InitStructure.Pin = GPIO_PIN_3;
+ HAL_GPIO_Init(GPIOH, &GPIO_InitStructure);
+
+ Note: Ethernet Full duplex mode works properly in the default setting
+ (which MII_COL is not connected to PH3 of STM32F756NGH6) because PH3 is shared
+ with SDRAM chip select SDNE0.
+ If Half duplex mode is needed, uncomment PH3 configuration code source (above
+ the note) and close SB47 solder bridge of the STM32756G-EVAL board.
+ */
+
+ /* Configure PI10
+ GPIO_InitStructure.Pin = GPIO_PIN_10;
+ HAL_GPIO_Init(GPIOI, &GPIO_InitStructure);
+
+ Note: Ethernet works properly in the default setting (which RX_ER is not
+ connected to PI10 of STM32F756NGH6) because PI10 is shared with data signal
+ of SDRAM.
+ If RX_ER signal is needed, uncomment PI10 configuration code source (above
+ the note) then remove R248 and solder SB9 of the STM32756G-EVAL board.
+ */
+}
+
+/**
+ * @brief Initializes SDRAM GPIO.
+ * @retval None
+ */
+/* called back from BSP_SDRAM_Init */
+void stm_sdram_GPIO_init(void)
+{
+ GPIO_InitTypeDef gpio_init_structure;
+
+ /* Enable GPIOs clock */
+ __HAL_RCC_GPIOD_CLK_ENABLE();
+ __HAL_RCC_GPIOE_CLK_ENABLE();
+ __HAL_RCC_GPIOF_CLK_ENABLE();
+ __HAL_RCC_GPIOG_CLK_ENABLE();
+ __HAL_RCC_GPIOH_CLK_ENABLE();
+ __HAL_RCC_GPIOI_CLK_ENABLE();
+
+ /* Common GPIO configuration */
+ gpio_init_structure.Mode = GPIO_MODE_AF_PP;
+ gpio_init_structure.Pull = GPIO_PULLUP;
+ gpio_init_structure.Speed = GPIO_SPEED_FAST;
+ gpio_init_structure.Alternate = GPIO_AF12_FMC;
+
+ /* GPIOD configuration */
+ gpio_init_structure.Pin = GPIO_PIN_0 | GPIO_PIN_1 | GPIO_PIN_8| GPIO_PIN_9 | GPIO_PIN_10 |\
+ GPIO_PIN_14 | GPIO_PIN_15;
+ HAL_GPIO_Init(GPIOD, &gpio_init_structure);
+
+ /* GPIOE configuration */
+ gpio_init_structure.Pin = GPIO_PIN_0 | GPIO_PIN_1 | GPIO_PIN_7| GPIO_PIN_8 | GPIO_PIN_9 |\
+ GPIO_PIN_10 | GPIO_PIN_11 | GPIO_PIN_12 | GPIO_PIN_13 | GPIO_PIN_14 |\
+ GPIO_PIN_15;
+ HAL_GPIO_Init(GPIOE, &gpio_init_structure);
+
+ /* GPIOF configuration */
+ gpio_init_structure.Pin = GPIO_PIN_0 | GPIO_PIN_1 | GPIO_PIN_2| GPIO_PIN_3 | GPIO_PIN_4 |\
+ GPIO_PIN_5 | GPIO_PIN_11 | GPIO_PIN_12 | GPIO_PIN_13 | GPIO_PIN_14 |\
+ GPIO_PIN_15;
+ HAL_GPIO_Init(GPIOF, &gpio_init_structure);
+
+ /* GPIOG configuration */
+ gpio_init_structure.Pin = GPIO_PIN_0 | GPIO_PIN_1 | GPIO_PIN_4| GPIO_PIN_5 | GPIO_PIN_8 |\
+ GPIO_PIN_15;
+ HAL_GPIO_Init(GPIOG, &gpio_init_structure);
+
+ /* GPIOH configuration */
+ gpio_init_structure.Pin = GPIO_PIN_2 | GPIO_PIN_3 | GPIO_PIN_5 | GPIO_PIN_8 | GPIO_PIN_9 |\
+ GPIO_PIN_10 | GPIO_PIN_11 | GPIO_PIN_12 | GPIO_PIN_13 | GPIO_PIN_14 |\
+ GPIO_PIN_15;
+ HAL_GPIO_Init(GPIOH, &gpio_init_structure);
+
+ /* GPIOI configuration */
+ gpio_init_structure.Pin = GPIO_PIN_0 | GPIO_PIN_1 | GPIO_PIN_2 | GPIO_PIN_3 | GPIO_PIN_4 |\
+ GPIO_PIN_5 | GPIO_PIN_6 | GPIO_PIN_7 | GPIO_PIN_9 | GPIO_PIN_10;
+ HAL_GPIO_Init(GPIOI, &gpio_init_structure);
+}
+
+void HAL_QSPI_MspInit(QSPI_HandleTypeDef *hqspi)
+{
+ GPIO_InitTypeDef GPIO_InitStruct;
+
+ /*##-1- Enable peripherals and GPIO Clocks #################################*/
+ /* Enable GPIO clocks */
+ __HAL_RCC_GPIOB_CLK_ENABLE();
+ __HAL_RCC_GPIOF_CLK_ENABLE();
+
+ /*##-2- Configure peripheral GPIO ##########################################*/
+ /* QSPI CS GPIO pin configuration */
+ GPIO_InitStruct.Pin = GPIO_PIN_6;
+ GPIO_InitStruct.Mode = GPIO_MODE_AF_PP;
+ GPIO_InitStruct.Pull = GPIO_PULLUP;
+ GPIO_InitStruct.Speed = GPIO_SPEED_HIGH;
+ GPIO_InitStruct.Alternate = GPIO_AF10_QUADSPI;
+ HAL_GPIO_Init(GPIOB, &GPIO_InitStruct);
+
+ /* QSPI CLK GPIO pin configuration */
+ GPIO_InitStruct.Pin = GPIO_PIN_2;
+ GPIO_InitStruct.Pull = GPIO_NOPULL;
+ GPIO_InitStruct.Alternate = GPIO_AF9_QUADSPI;
+ HAL_GPIO_Init(GPIOB, &GPIO_InitStruct);
+
+ /* QSPI D0 GPIO pin configuration */
+ GPIO_InitStruct.Pin = GPIO_PIN_8;
+ GPIO_InitStruct.Alternate = GPIO_AF10_QUADSPI;
+ HAL_GPIO_Init(GPIOF, &GPIO_InitStruct);
+
+ /* QSPI D1 GPIO pin configuration */
+ GPIO_InitStruct.Pin = GPIO_PIN_9;
+ GPIO_InitStruct.Alternate = GPIO_AF10_QUADSPI;
+ HAL_GPIO_Init(GPIOF, &GPIO_InitStruct);
+
+ /* QSPI D2 GPIO pin configuration */
+ GPIO_InitStruct.Pin = GPIO_PIN_7;
+ GPIO_InitStruct.Alternate = GPIO_AF9_QUADSPI;
+ HAL_GPIO_Init(GPIOF, &GPIO_InitStruct);
+
+ /* QSPI D3 GPIO pin configuration */
+ GPIO_InitStruct.Pin = GPIO_PIN_6;
+ GPIO_InitStruct.Alternate = GPIO_AF9_QUADSPI;
+ HAL_GPIO_Init(GPIOF, &GPIO_InitStruct);
+}
+
diff --git a/src/bsp/lk/target/stm32746g-eval2/lcd.c b/src/bsp/lk/target/stm32746g-eval2/lcd.c
new file mode 100644
index 0000000..41e08af
--- /dev/null
+++ b/src/bsp/lk/target/stm32746g-eval2/lcd.c
@@ -0,0 +1,412 @@
+/*
+ * Copyright (c) 2015 Travis Geiselbrecht
+ *
+ * Permission is hereby granted, free of charge, to any person obtaining
+ * a copy of this software and associated documentation files
+ * (the "Software"), to deal in the Software without restriction,
+ * including without limitation the rights to use, copy, modify, merge,
+ * publish, distribute, sublicense, and/or sell copies of the Software,
+ * and to permit persons to whom the Software is furnished to do so,
+ * subject to the following conditions:
+ *
+ * The above copyright notice and this permission notice shall be
+ * included in all copies or substantial portions of the Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
+ * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
+ * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.
+ * IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY
+ * CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT,
+ * TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE
+ * SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
+ */
+/*
+ * COPYRIGHT(c) 2015 STMicroelectronics
+ *
+ * Redistribution and use in source and binary forms, with or without modification,
+ * are permitted provided that the following conditions are met:
+ * 1. Redistributions of source code must retain the above copyright notice,
+ * this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright notice,
+ * this list of conditions and the following disclaimer in the documentation
+ * and/or other materials provided with the distribution.
+ * 3. Neither the name of STMicroelectronics nor the names of its contributors
+ * may be used to endorse or promote products derived from this software
+ * without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
+ * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
+ * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
+ * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
+ * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
+ * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
+ * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
+ * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
+ * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ *
+ ******************************************************************************
+ */
+
+#include <err.h>
+#include <debug.h>
+#include <trace.h>
+#include <target.h>
+#include <compiler.h>
+#include <string.h>
+#include <lib/gfx.h>
+#include <dev/gpio.h>
+#include <dev/display.h>
+#include <arch/ops.h>
+#include <platform/stm32.h>
+
+/*
+ * lcd initialization sequence, taken from
+ * STM32Cube_FW_F7_V1.1.0/Drivers/BSP/STM32756G_EVAL/stm32756g_eval_lcd.[ch]
+ */
+
+/**
+ * @brief AMPIRE640480 Size
+ */
+#define AMPIRE640480_WIDTH ((uint16_t)640) /* LCD PIXEL WIDTH */
+#define AMPIRE640480_HEIGHT ((uint16_t)480) /* LCD PIXEL HEIGHT */
+
+/**
+ * @brief AMPIRE640480 Timing
+ */
+#define AMPIRE640480_HSYNC ((uint16_t)30) /* Horizontal synchronization */
+#define AMPIRE640480_HBP ((uint16_t)114) /* Horizontal back porch */
+#define AMPIRE640480_HFP ((uint16_t)16) /* Horizontal front porch */
+#define AMPIRE640480_VSYNC ((uint16_t)3) /* Vertical synchronization */
+#define AMPIRE640480_VBP ((uint16_t)32) /* Vertical back porch */
+#define AMPIRE640480_VFP ((uint16_t)10) /* Vertical front porch */
+
+/**
+ * @brief AMPIRE640480 frequency divider
+ */
+#define AMPIRE640480_FREQUENCY_DIVIDER 3 /* LCD Frequency divider */
+
+/** @defgroup STM32756G_EVAL_LCD_Exported_Constants
+ * @{
+ */
+#define MAX_LAYER_NUMBER ((uint32_t)2)
+
+#define LCD_LayerCfgTypeDef LTDC_LayerCfgTypeDef
+
+#define LTDC_ACTIVE_LAYER ((uint32_t)1) /* Layer 1 */
+/**
+ * @brief LCD status structure definition
+ */
+#define LCD_OK ((uint8_t)0x00)
+#define LCD_ERROR ((uint8_t)0x01)
+#define LCD_TIMEOUT ((uint8_t)0x02)
+
+/**
+ * @brief LCD FB_StartAddress
+ */
+#define LCD_FB_START_ADDRESS ((uint32_t)SDRAM_BASE)
+//#define LCD_FB_START_ADDRESS ((uint32_t)EXT_SRAM_BASE)
+
+//#define LCD_PIXEL_FORMAT LTDC_PIXEL_FORMAT_ARGB888
+#define LCD_PIXEL_FORMAT LTDC_PIXEL_FORMAT_RGB565
+
+static LTDC_HandleTypeDef hLtdcEval;
+
+/* Default LCD configuration with LCD Layer 1 */
+static uint32_t ActiveLayer = 0;
+
+/**
+ * @brief Gets the LCD X size.
+ * @retval Used LCD X size
+ */
+uint32_t BSP_LCD_GetXSize(void)
+{
+ return hLtdcEval.LayerCfg[ActiveLayer].ImageWidth;
+}
+
+/**
+ * @brief Gets the LCD Y size.
+ * @retval Used LCD Y size
+ */
+uint32_t BSP_LCD_GetYSize(void)
+{
+ return hLtdcEval.LayerCfg[ActiveLayer].ImageHeight;
+}
+
+/**
+ * @brief Set the LCD X size.
+ * @param imageWidthPixels : image width in pixels unit
+ * @retval None
+ */
+void BSP_LCD_SetXSize(uint32_t imageWidthPixels)
+{
+ hLtdcEval.LayerCfg[ActiveLayer].ImageWidth = imageWidthPixels;
+}
+
+/**
+ * @brief Set the LCD Y size.
+ * @param imageHeightPixels : image height in lines unit
+ * @retval None
+ */
+void BSP_LCD_SetYSize(uint32_t imageHeightPixels)
+{
+ hLtdcEval.LayerCfg[ActiveLayer].ImageHeight = imageHeightPixels;
+}
+
+static size_t BSP_LCD_PixelSize(void)
+{
+ return (hLtdcEval.LayerCfg[ActiveLayer].PixelFormat == LTDC_PIXEL_FORMAT_ARGB8888) ? 4 : 2;
+}
+
+/**
+ * @brief Initializes the LCD layers.
+ * @param LayerIndex: Layer foreground or background
+ * @param FB_Address: Layer frame buffer
+ * @retval None
+ */
+void BSP_LCD_LayerDefaultInit(uint16_t LayerIndex, uint32_t FB_Address)
+{
+ LCD_LayerCfgTypeDef layer_cfg;
+
+ /* Layer Init */
+ layer_cfg.WindowX0 = 0;
+ layer_cfg.WindowX1 = BSP_LCD_GetXSize();
+ layer_cfg.WindowY0 = 0;
+ layer_cfg.WindowY1 = BSP_LCD_GetYSize();
+ layer_cfg.PixelFormat = LCD_PIXEL_FORMAT;
+ layer_cfg.FBStartAdress = FB_Address;
+ layer_cfg.Alpha = 255;
+ layer_cfg.Alpha0 = 0;
+ layer_cfg.Backcolor.Blue = 0;
+ layer_cfg.Backcolor.Green = 0;
+ layer_cfg.Backcolor.Red = 0;
+ layer_cfg.BlendingFactor1 = LTDC_BLENDING_FACTOR1_PAxCA;
+ layer_cfg.BlendingFactor2 = LTDC_BLENDING_FACTOR2_PAxCA;
+ layer_cfg.ImageWidth = BSP_LCD_GetXSize();
+ layer_cfg.ImageHeight = BSP_LCD_GetYSize();
+
+ HAL_LTDC_ConfigLayer(&hLtdcEval, &layer_cfg, LayerIndex);
+}
+
+
+/**
+ * @brief Selects the LCD Layer.
+ * @param LayerIndex: Layer foreground or background
+ * @retval None
+ */
+void BSP_LCD_SelectLayer(uint32_t LayerIndex)
+{
+ ActiveLayer = LayerIndex;
+}
+
+/**
+ * @brief Sets an LCD Layer visible
+ * @param LayerIndex: Visible Layer
+ * @param State: New state of the specified layer
+ * This parameter can be one of the following values:
+ * @arg ENABLE
+ * @arg DISABLE
+ * @retval None
+ */
+void BSP_LCD_SetLayerVisible(uint32_t LayerIndex, FunctionalState State)
+{
+ if (State == ENABLE) {
+ __HAL_LTDC_LAYER_ENABLE(&hLtdcEval, LayerIndex);
+ } else {
+ __HAL_LTDC_LAYER_DISABLE(&hLtdcEval, LayerIndex);
+ }
+ __HAL_LTDC_RELOAD_CONFIG(&hLtdcEval);
+}
+
+/**
+ * @brief Configures the transparency.
+ * @param LayerIndex: Layer foreground or background.
+ * @param Transparency: Transparency
+ * This parameter must be a number between Min_Data = 0x00 and Max_Data = 0xFF
+ * @retval None
+ */
+void BSP_LCD_SetTransparency(uint32_t LayerIndex, uint8_t Transparency)
+{
+ HAL_LTDC_SetAlpha(&hLtdcEval, Transparency, LayerIndex);
+}
+
+/**
+ * @brief Sets an LCD layer frame buffer address.
+ * @param LayerIndex: Layer foreground or background
+ * @param Address: New LCD frame buffer value
+ * @retval None
+ */
+void BSP_LCD_SetLayerAddress(uint32_t LayerIndex, uint32_t Address)
+{
+ HAL_LTDC_SetAddress(&hLtdcEval, Address, LayerIndex);
+}
+
+/**
+ * @brief Enables the display.
+ * @retval None
+ */
+void BSP_LCD_DisplayOn(void)
+{
+ /* Display On */
+ __HAL_LTDC_ENABLE(&hLtdcEval);
+}
+
+/**
+ * @brief Disables the display.
+ * @retval None
+ */
+void BSP_LCD_DisplayOff(void)
+{
+ /* Display Off */
+ __HAL_LTDC_DISABLE(&hLtdcEval);
+}
+
+/**
+ * @brief Initializes the LTDC MSP.
+ * @param hltdc: LTDC handle
+ * @retval None
+ */
+static void BSP_LCD_MspInit(LTDC_HandleTypeDef *hltdc, void *Params)
+{
+ GPIO_InitTypeDef gpio_init_structure;
+
+ /* Enable the LTDC and DMA2D clocks */
+ __HAL_RCC_LTDC_CLK_ENABLE();
+ __HAL_RCC_DMA2D_CLK_ENABLE();
+
+ /* Enable GPIOs clock */
+ __HAL_RCC_GPIOI_CLK_ENABLE();
+ __HAL_RCC_GPIOJ_CLK_ENABLE();
+ __HAL_RCC_GPIOK_CLK_ENABLE();
+
+ /*** LTDC Pins configuration ***/
+ /* GPIOI configuration */
+ gpio_init_structure.Pin = GPIO_PIN_12 | GPIO_PIN_13 | GPIO_PIN_14 | GPIO_PIN_15;
+ gpio_init_structure.Mode = GPIO_MODE_AF_PP;
+ gpio_init_structure.Pull = GPIO_NOPULL;
+ gpio_init_structure.Speed = GPIO_SPEED_FAST;
+ gpio_init_structure.Alternate = GPIO_AF14_LTDC;
+ HAL_GPIO_Init(GPIOI, &gpio_init_structure);
+
+ /* GPIOJ configuration */
+ gpio_init_structure.Pin = GPIO_PIN_0 | GPIO_PIN_1 | GPIO_PIN_2 | GPIO_PIN_3 | \
+ GPIO_PIN_4 | GPIO_PIN_5 | GPIO_PIN_6 | GPIO_PIN_7 | \
+ GPIO_PIN_8 | GPIO_PIN_9 | GPIO_PIN_10 | GPIO_PIN_11 | \
+ GPIO_PIN_12 | GPIO_PIN_13 | GPIO_PIN_14 | GPIO_PIN_15;
+ gpio_init_structure.Mode = GPIO_MODE_AF_PP;
+ gpio_init_structure.Pull = GPIO_NOPULL;
+ gpio_init_structure.Speed = GPIO_SPEED_FAST;
+ gpio_init_structure.Alternate = GPIO_AF14_LTDC;
+ HAL_GPIO_Init(GPIOJ, &gpio_init_structure);
+
+ /* GPIOK configuration */
+ gpio_init_structure.Pin = GPIO_PIN_0 | GPIO_PIN_1 | GPIO_PIN_2 | GPIO_PIN_3 | \
+ GPIO_PIN_4 | GPIO_PIN_5 | GPIO_PIN_6 | GPIO_PIN_7;
+ gpio_init_structure.Mode = GPIO_MODE_AF_PP;
+ gpio_init_structure.Pull = GPIO_NOPULL;
+ gpio_init_structure.Speed = GPIO_SPEED_FAST;
+ gpio_init_structure.Alternate = GPIO_AF14_LTDC;
+ HAL_GPIO_Init(GPIOK, &gpio_init_structure);
+}
+
+/**
+ * @brief Clock Config.
+ * @param hltdc: LTDC handle
+ * @note This API is called by BSP_LCD_Init()
+ * Being __weak it can be overwritten by the application
+ * @retval None
+ */
+static void BSP_LCD_ClockConfig(LTDC_HandleTypeDef *hltdc, void *Params)
+{
+ static RCC_PeriphCLKInitTypeDef periph_clk_init_struct;
+
+ /* AMPIRE640480 LCD clock configuration */
+ /* PLLSAI_VCO Input = HSE_VALUE/PLL_M = 1 Mhz */
+ /* PLLSAI_VCO Output = PLLSAI_VCO Input * PLLSAIN = 151 Mhz */
+ /* PLLLCDCLK = PLLSAI_VCO Output/PLLSAIR = 151/3 = 50.3 Mhz */
+ /* LTDC clock frequency = PLLLCDCLK / LTDC_PLLSAI_DIVR_2 = 50.3/2 = 25.1 Mhz */
+ periph_clk_init_struct.PeriphClockSelection = RCC_PERIPHCLK_LTDC;
+ periph_clk_init_struct.PLLSAI.PLLSAIN = 151;
+ periph_clk_init_struct.PLLSAI.PLLSAIR = AMPIRE640480_FREQUENCY_DIVIDER;
+ periph_clk_init_struct.PLLSAIDivR = RCC_PLLSAIDIVR_2;
+ HAL_RCCEx_PeriphCLKConfig(&periph_clk_init_struct);
+}
+
+/**
+ * @brief Initializes the LCD.
+ * @retval LCD state
+ */
+uint8_t BSP_LCD_Init(void)
+{
+ /* Select the used LCD */
+ /* The LCD AMPIRE 640x480 is selected */
+ /* Timing configuration */
+ hLtdcEval.Init.HorizontalSync = (AMPIRE640480_HSYNC - 1);
+ hLtdcEval.Init.VerticalSync = (AMPIRE640480_VSYNC - 1);
+ hLtdcEval.Init.AccumulatedHBP = (AMPIRE640480_HSYNC + AMPIRE640480_HBP - 1);
+ hLtdcEval.Init.AccumulatedVBP = (AMPIRE640480_VSYNC + AMPIRE640480_VBP - 1);
+ hLtdcEval.Init.AccumulatedActiveH = (AMPIRE640480_HEIGHT + AMPIRE640480_VSYNC + AMPIRE640480_VBP - 1);
+ hLtdcEval.Init.AccumulatedActiveW = (AMPIRE640480_WIDTH + AMPIRE640480_HSYNC + AMPIRE640480_HBP - 1);
+ hLtdcEval.Init.TotalHeigh = (AMPIRE640480_HEIGHT + AMPIRE640480_VSYNC + AMPIRE640480_VBP + AMPIRE640480_VFP - 1);
+ hLtdcEval.Init.TotalWidth = (AMPIRE640480_WIDTH + AMPIRE640480_HSYNC + AMPIRE640480_HBP + AMPIRE640480_HFP - 1);
+
+ /* LCD clock configuration */
+ BSP_LCD_ClockConfig(&hLtdcEval, NULL);
+
+ /* Initialize the LCD pixel width and pixel height */
+ hLtdcEval.LayerCfg->ImageWidth = AMPIRE640480_WIDTH;
+ hLtdcEval.LayerCfg->ImageHeight = AMPIRE640480_HEIGHT;
+
+ /* Background value */
+ hLtdcEval.Init.Backcolor.Blue = 0;
+ hLtdcEval.Init.Backcolor.Green = 0;
+ hLtdcEval.Init.Backcolor.Red = 0;
+
+ /* Polarity */
+ hLtdcEval.Init.HSPolarity = LTDC_HSPOLARITY_AL;
+ hLtdcEval.Init.VSPolarity = LTDC_VSPOLARITY_AL;
+ hLtdcEval.Init.DEPolarity = LTDC_DEPOLARITY_AL;
+ hLtdcEval.Init.PCPolarity = LTDC_PCPOLARITY_IPC;
+ hLtdcEval.Instance = LTDC;
+
+ if (HAL_LTDC_GetState(&hLtdcEval) == HAL_LTDC_STATE_RESET) {
+ /* Initialize the LCD Msp: this __weak function can be rewritten by the application */
+ BSP_LCD_MspInit(&hLtdcEval, NULL);
+ }
+ HAL_LTDC_Init(&hLtdcEval);
+
+ /* set a default layer to the base of sdram */
+ BSP_LCD_LayerDefaultInit(0, LCD_FB_START_ADDRESS);
+ BSP_LCD_SelectLayer(0);
+
+ /* clear it out */
+ memset((void *)hLtdcEval.LayerCfg[ActiveLayer].FBStartAdress, 0, BSP_LCD_GetXSize() * BSP_LCD_GetYSize() * BSP_LCD_PixelSize());
+
+ /* turn the display on */
+ BSP_LCD_DisplayOn();
+
+ return LCD_OK;
+}
+
+/* LK display api here */
+status_t display_get_info(struct display_info *info)
+{
+ info->framebuffer = (void *)hLtdcEval.LayerCfg[ActiveLayer].FBStartAdress;
+
+ if (hLtdcEval.LayerCfg[ActiveLayer].PixelFormat == LTDC_PIXEL_FORMAT_ARGB8888) {
+ info->format = GFX_FORMAT_ARGB_8888;
+ } else if (hLtdcEval.LayerCfg[ActiveLayer].PixelFormat == LTDC_PIXEL_FORMAT_RGB565) {
+ info->format = GFX_FORMAT_RGB_565;
+ } else {
+ panic("unhandled pixel format\n");
+ return ERR_NOT_FOUND;
+ }
+
+ info->width = BSP_LCD_GetXSize();
+ info->height = BSP_LCD_GetYSize();
+ info->stride = BSP_LCD_GetXSize();
+ info->flush = NULL;
+
+ return NO_ERROR;
+}
+
diff --git a/src/bsp/lk/target/stm32746g-eval2/rules.mk b/src/bsp/lk/target/stm32746g-eval2/rules.mk
new file mode 100644
index 0000000..2e7360e
--- /dev/null
+++ b/src/bsp/lk/target/stm32746g-eval2/rules.mk
@@ -0,0 +1,42 @@
+LOCAL_DIR := $(GET_LOCAL_DIR)
+
+MODULE := $(LOCAL_DIR)
+
+STM32_CHIP := stm32f746
+
+PLATFORM := stm32f7xx
+
+SDRAM_SIZE := 0x02000000
+SDRAM_BASE := 0xc0000000
+EXT_SRAM_BASE := 0x68000000
+EXT_SRAM_SIZE := 0x00200000
+
+GLOBAL_DEFINES += \
+ ENABLE_UART1=1 \
+ ENABLE_SDRAM=1 \
+ SDRAM_BASE=$(SDRAM_BASE) \
+ SDRAM_SIZE=$(SDRAM_SIZE) \
+ EXT_SRAM_BASE=$(EXT_SRAM_BASE) \
+ EXT_SRAM_SIZE=$(EXT_SRAM_SIZE) \
+ ENABLE_EXT_SRAM=1 \
+\
+ PKTBUF_POOL_SIZE=16
+
+# XXX todo, drive pll config from here
+#HSE_VALUE=8000000 \
+ PLL_M_VALUE=8 \
+ PLL_N_VALUE=336 \
+ PLL_P_VALUE=2
+
+MODULE_SRCS += \
+ $(LOCAL_DIR)/init.c \
+ $(LOCAL_DIR)/lcd.c \
+ $(LOCAL_DIR)/sram.c
+
+MODULE_DEPS += \
+ lib/gfx \
+
+# lib/gfxconsole
+
+include make/module.mk
+
diff --git a/src/bsp/lk/target/stm32746g-eval2/sram.c b/src/bsp/lk/target/stm32746g-eval2/sram.c
new file mode 100644
index 0000000..fb52cfd
--- /dev/null
+++ b/src/bsp/lk/target/stm32746g-eval2/sram.c
@@ -0,0 +1,213 @@
+/*
+ * Copyright (c) 2015 Travis Geiselbrecht
+ *
+ * Permission is hereby granted, free of charge, to any person obtaining
+ * a copy of this software and associated documentation files
+ * (the "Software"), to deal in the Software without restriction,
+ * including without limitation the rights to use, copy, modify, merge,
+ * publish, distribute, sublicense, and/or sell copies of the Software,
+ * and to permit persons to whom the Software is furnished to do so,
+ * subject to the following conditions:
+ *
+ * The above copyright notice and this permission notice shall be
+ * included in all copies or substantial portions of the Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
+ * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
+ * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.
+ * IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY
+ * CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT,
+ * TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE
+ * SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
+ */
+/*
+ * COPYRIGHT(c) 2015 STMicroelectronics
+ *
+ * Redistribution and use in source and binary forms, with or without modification,
+ * are permitted provided that the following conditions are met:
+ * 1. Redistributions of source code must retain the above copyright notice,
+ * this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright notice,
+ * this list of conditions and the following disclaimer in the documentation
+ * and/or other materials provided with the distribution.
+ * 3. Neither the name of STMicroelectronics nor the names of its contributors
+ * may be used to endorse or promote products derived from this software
+ * without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
+ * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
+ * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
+ * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
+ * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
+ * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
+ * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
+ * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
+ * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ *
+ ******************************************************************************
+ */
+
+#include <err.h>
+#include <debug.h>
+#include <trace.h>
+#include <target.h>
+#include <compiler.h>
+#include <dev/gpio.h>
+#include <platform/stm32.h>
+
+#define SRAM_OK ((uint8_t)0x00)
+#define SRAM_ERROR ((uint8_t)0x01)
+
+/* #define SRAM_MEMORY_WIDTH FMC_NORSRAM_MEM_BUS_WIDTH_8*/
+#define SRAM_MEMORY_WIDTH FMC_NORSRAM_MEM_BUS_WIDTH_16
+
+#define SRAM_BURSTACCESS FMC_BURST_ACCESS_MODE_DISABLE
+//#define SRAM_BURSTACCESS FMC_BURST_ACCESS_MODE_ENABLE
+
+#define SRAM_WRITEBURST FMC_WRITE_BURST_DISABLE
+//#define SRAM_WRITEBURST FMC_WRITE_BURST_ENABLE
+
+#define CONTINUOUSCLOCK_FEATURE FMC_CONTINUOUS_CLOCK_SYNC_ONLY
+//#define CONTINUOUSCLOCK_FEATURE FMC_CONTINUOUS_CLOCK_SYNC_ASYNC
+
+/* DMA definitions for SRAM DMA transfer */
+#define __SRAM_DMAx_CLK_ENABLE __HAL_RCC_DMA2_CLK_ENABLE
+#define __SRAM_DMAx_CLK_DISABLE __HAL_RCC_DMA2_CLK_DISABLE
+#define SRAM_DMAx_CHANNEL DMA_CHANNEL_0
+#define SRAM_DMAx_STREAM DMA2_Stream4
+#define SRAM_DMAx_IRQn DMA2_Stream4_IRQn
+#define SRAM_DMAx_IRQHandler DMA2_Stream4_IRQHandler
+
+static SRAM_HandleTypeDef sramHandle;
+static FMC_NORSRAM_TimingTypeDef Timing;
+
+/**
+ * @brief Initializes SRAM MSP.
+ * @param hsram: SRAM handle
+ * @retval None
+ */
+static void BSP_SRAM_MspInit(SRAM_HandleTypeDef *hsram, void *Params)
+{
+ static DMA_HandleTypeDef dma_handle;
+ GPIO_InitTypeDef gpio_init_structure;
+
+ /* Enable FMC clock */
+ __HAL_RCC_FMC_CLK_ENABLE();
+
+ /* Enable chosen DMAx clock */
+ __SRAM_DMAx_CLK_ENABLE();
+
+ /* Enable GPIOs clock */
+ __HAL_RCC_GPIOD_CLK_ENABLE();
+ __HAL_RCC_GPIOE_CLK_ENABLE();
+ __HAL_RCC_GPIOF_CLK_ENABLE();
+ __HAL_RCC_GPIOG_CLK_ENABLE();
+
+ /* Common GPIO configuration */
+ gpio_init_structure.Mode = GPIO_MODE_AF_PP;
+ gpio_init_structure.Pull = GPIO_PULLUP;
+ gpio_init_structure.Speed = GPIO_SPEED_HIGH;
+ gpio_init_structure.Alternate = GPIO_AF12_FMC;
+
+ /* GPIOD configuration */
+ gpio_init_structure.Pin = GPIO_PIN_0 | GPIO_PIN_1 | GPIO_PIN_3 | GPIO_PIN_4 | GPIO_PIN_5 | GPIO_PIN_8 |\
+ GPIO_PIN_9 | GPIO_PIN_10 | GPIO_PIN_11 | GPIO_PIN_12 | GPIO_PIN_13 |\
+ GPIO_PIN_14 | GPIO_PIN_15;
+ HAL_GPIO_Init(GPIOD, &gpio_init_structure);
+
+ /* GPIOE configuration */
+ gpio_init_structure.Pin = GPIO_PIN_0 | GPIO_PIN_1 | GPIO_PIN_3| GPIO_PIN_4 | GPIO_PIN_7 |\
+ GPIO_PIN_8 | GPIO_PIN_9 | GPIO_PIN_10 | GPIO_PIN_11 | GPIO_PIN_12 |\
+ GPIO_PIN_13 | GPIO_PIN_14 | GPIO_PIN_15;
+ HAL_GPIO_Init(GPIOE, &gpio_init_structure);
+
+ /* GPIOF configuration */
+ gpio_init_structure.Pin = GPIO_PIN_0 | GPIO_PIN_1 | GPIO_PIN_2| GPIO_PIN_3 | GPIO_PIN_4 |\
+ GPIO_PIN_5 | GPIO_PIN_12 | GPIO_PIN_13 | GPIO_PIN_14 | GPIO_PIN_15;
+ HAL_GPIO_Init(GPIOF, &gpio_init_structure);
+
+ /* GPIOG configuration */
+ gpio_init_structure.Pin = GPIO_PIN_0 | GPIO_PIN_1 | GPIO_PIN_2| GPIO_PIN_3 | GPIO_PIN_4 |\
+ GPIO_PIN_5 | GPIO_PIN_10;
+ HAL_GPIO_Init(GPIOG, &gpio_init_structure);
+
+ /* Configure common DMA parameters */
+ dma_handle.Init.Channel = SRAM_DMAx_CHANNEL;
+ dma_handle.Init.Direction = DMA_MEMORY_TO_MEMORY;
+ dma_handle.Init.PeriphInc = DMA_PINC_ENABLE;
+ dma_handle.Init.MemInc = DMA_MINC_ENABLE;
+ dma_handle.Init.PeriphDataAlignment = DMA_PDATAALIGN_HALFWORD;
+ dma_handle.Init.MemDataAlignment = DMA_MDATAALIGN_HALFWORD;
+ dma_handle.Init.Mode = DMA_NORMAL;
+ dma_handle.Init.Priority = DMA_PRIORITY_HIGH;
+ dma_handle.Init.FIFOMode = DMA_FIFOMODE_DISABLE;
+ dma_handle.Init.FIFOThreshold = DMA_FIFO_THRESHOLD_FULL;
+ dma_handle.Init.MemBurst = DMA_MBURST_SINGLE;
+ dma_handle.Init.PeriphBurst = DMA_PBURST_SINGLE;
+
+ dma_handle.Instance = SRAM_DMAx_STREAM;
+
+ /* Associate the DMA handle */
+ __HAL_LINKDMA(hsram, hdma, dma_handle);
+
+ /* Deinitialize the Stream for new transfer */
+ HAL_DMA_DeInit(&dma_handle);
+
+ /* Configure the DMA Stream */
+ HAL_DMA_Init(&dma_handle);
+
+ /* NVIC configuration for DMA transfer complete interrupt */
+ HAL_NVIC_SetPriority(SRAM_DMAx_IRQn, 5, 0);
+ HAL_NVIC_EnableIRQ(SRAM_DMAx_IRQn);
+}
+
+/**
+ * @brief Initializes the SRAM device.
+ * @retval SRAM status
+ */
+uint8_t BSP_SRAM_Init(void)
+{
+ static uint8_t sram_status = SRAM_ERROR;
+ /* SRAM device configuration */
+ sramHandle.Instance = FMC_NORSRAM_DEVICE;
+ sramHandle.Extended = FMC_NORSRAM_EXTENDED_DEVICE;
+
+ /* SRAM device configuration */
+ /* Timing configuration derived from system clock (up to 216Mhz)
+ for 108Mhz as SRAM clock frequency */
+ Timing.AddressSetupTime = 2;
+ Timing.AddressHoldTime = 1;
+ Timing.DataSetupTime = 2;
+ Timing.BusTurnAroundDuration = 1;
+ Timing.CLKDivision = 2;
+ Timing.DataLatency = 2;
+ Timing.AccessMode = FMC_ACCESS_MODE_A;
+
+ sramHandle.Init.NSBank = FMC_NORSRAM_BANK3;
+ sramHandle.Init.DataAddressMux = FMC_DATA_ADDRESS_MUX_DISABLE;
+ sramHandle.Init.MemoryType = FMC_MEMORY_TYPE_SRAM;
+ sramHandle.Init.MemoryDataWidth = SRAM_MEMORY_WIDTH;
+ sramHandle.Init.BurstAccessMode = SRAM_BURSTACCESS;
+ sramHandle.Init.WaitSignalPolarity = FMC_WAIT_SIGNAL_POLARITY_LOW;
+ sramHandle.Init.WaitSignalActive = FMC_WAIT_TIMING_BEFORE_WS;
+ sramHandle.Init.WriteOperation = FMC_WRITE_OPERATION_ENABLE;
+ sramHandle.Init.WaitSignal = FMC_WAIT_SIGNAL_DISABLE;
+ sramHandle.Init.ExtendedMode = FMC_EXTENDED_MODE_DISABLE;
+ sramHandle.Init.AsynchronousWait = FMC_ASYNCHRONOUS_WAIT_DISABLE;
+ sramHandle.Init.WriteBurst = SRAM_WRITEBURST;
+ sramHandle.Init.ContinuousClock = CONTINUOUSCLOCK_FEATURE;
+
+ /* SRAM controller initialization */
+ BSP_SRAM_MspInit(&sramHandle, NULL); /* __weak function can be rewritten by the application */
+ if (HAL_SRAM_Init(&sramHandle, &Timing, &Timing) != HAL_OK) {
+ sram_status = SRAM_ERROR;
+ } else {
+ sram_status = SRAM_OK;
+ }
+ return sram_status;
+}
+
+
+
+