[Feature]add MT2731_MP2_MR2_SVN388 baseline version
Change-Id: Ief04314834b31e27effab435d3ca8ba33b499059
diff --git a/src/bsp/trustzone/teeloader/mt2635/include/device_apc.h b/src/bsp/trustzone/teeloader/mt2635/include/device_apc.h
new file mode 100644
index 0000000..d9563f4
--- /dev/null
+++ b/src/bsp/trustzone/teeloader/mt2635/include/device_apc.h
@@ -0,0 +1,217 @@
+/* Copyright Statement:
+ *
+ * This software/firmware and related documentation ("MediaTek Software") are
+ * protected under relevant copyright laws. The information contained herein is
+ * confidential and proprietary to MediaTek Inc. and/or its licensors. Without
+ * the prior written permission of MediaTek inc. and/or its licensors, any
+ * reproduction, modification, use or disclosure of MediaTek Software, and
+ * information contained herein, in whole or in part, shall be strictly
+ * prohibited.
+ *
+ * MediaTek Inc. (C) 2016. All rights reserved.
+ *
+ * BY OPENING THIS FILE, RECEIVER HEREBY UNEQUIVOCALLY ACKNOWLEDGES AND AGREES
+ * THAT THE SOFTWARE/FIRMWARE AND ITS DOCUMENTATIONS ("MEDIATEK SOFTWARE")
+ * RECEIVED FROM MEDIATEK AND/OR ITS REPRESENTATIVES ARE PROVIDED TO RECEIVER
+ * ON AN "AS-IS" BASIS ONLY. MEDIATEK EXPRESSLY DISCLAIMS ANY AND ALL
+ * WARRANTIES, EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE IMPLIED
+ * WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE OR
+ * NONINFRINGEMENT. NEITHER DOES MEDIATEK PROVIDE ANY WARRANTY WHATSOEVER WITH
+ * RESPECT TO THE SOFTWARE OF ANY THIRD PARTY WHICH MAY BE USED BY,
+ * INCORPORATED IN, OR SUPPLIED WITH THE MEDIATEK SOFTWARE, AND RECEIVER AGREES
+ * TO LOOK ONLY TO SUCH THIRD PARTY FOR ANY WARRANTY CLAIM RELATING THERETO.
+ * RECEIVER EXPRESSLY ACKNOWLEDGES THAT IT IS RECEIVER'S SOLE RESPONSIBILITY TO
+ * OBTAIN FROM ANY THIRD PARTY ALL PROPER LICENSES CONTAINED IN MEDIATEK
+ * SOFTWARE. MEDIATEK SHALL ALSO NOT BE RESPONSIBLE FOR ANY MEDIATEK SOFTWARE
+ * RELEASES MADE TO RECEIVER'S SPECIFICATION OR TO CONFORM TO A PARTICULAR
+ * STANDARD OR OPEN FORUM. RECEIVER'S SOLE AND EXCLUSIVE REMEDY AND MEDIATEK'S
+ * ENTIRE AND CUMULATIVE LIABILITY WITH RESPECT TO THE MEDIATEK SOFTWARE
+ * RELEASED HEREUNDER WILL BE, AT MEDIATEK'S OPTION, TO REVISE OR REPLACE THE
+ * MEDIATEK SOFTWARE AT ISSUE, OR REFUND ANY SOFTWARE LICENSE FEES OR SERVICE
+ * CHARGE PAID BY RECEIVER TO MEDIATEK FOR SUCH MEDIATEK SOFTWARE AT ISSUE.
+ *
+ * The following software/firmware and/or related documentation ("MediaTek
+ * Software") have been modified by MediaTek Inc. All revisions are subject to
+ * any receiver's applicable license agreements with MediaTek Inc.
+ */
+
+#ifndef __DEVICE_APC_H__
+#define __DEVICE_APC_H__
+
+#include "typedefs.h"
+
+#define DEVAPC0_AO_BASE 0x10007000 // for AP
+#define DEVAPC0_PD_BASE 0x10207000 // for AP
+
+/*******************************************************************************
+ * REGISTER ADDRESS DEFINATION
+ ******************************************************************************/
+#define DEVAPC0_D0_APC_0 ((volatile unsigned int*)(DEVAPC0_AO_BASE+0x0000))
+#define DEVAPC0_D0_APC_1 ((volatile unsigned int*)(DEVAPC0_AO_BASE+0x0004))
+#define DEVAPC0_D0_APC_2 ((volatile unsigned int*)(DEVAPC0_AO_BASE+0x0008))
+#define DEVAPC0_D0_APC_3 ((volatile unsigned int*)(DEVAPC0_AO_BASE+0x000C))
+#define DEVAPC0_D0_APC_4 ((volatile unsigned int*)(DEVAPC0_AO_BASE+0x0010))
+#define DEVAPC0_D0_APC_5 ((volatile unsigned int*)(DEVAPC0_AO_BASE+0x0014))
+#define DEVAPC0_D0_APC_6 ((volatile unsigned int*)(DEVAPC0_AO_BASE+0x0018))
+#define DEVAPC0_D0_APC_7 ((volatile unsigned int*)(DEVAPC0_AO_BASE+0x001C))
+#define DEVAPC0_D0_APC_8 ((volatile unsigned int*)(DEVAPC0_AO_BASE+0x0020))
+
+#define DEVAPC0_D1_APC_0 ((volatile unsigned int*)(DEVAPC0_AO_BASE+0x0100))
+#define DEVAPC0_D1_APC_1 ((volatile unsigned int*)(DEVAPC0_AO_BASE+0x0104))
+#define DEVAPC0_D1_APC_2 ((volatile unsigned int*)(DEVAPC0_AO_BASE+0x0108))
+#define DEVAPC0_D1_APC_3 ((volatile unsigned int*)(DEVAPC0_AO_BASE+0x010C))
+#define DEVAPC0_D1_APC_4 ((volatile unsigned int*)(DEVAPC0_AO_BASE+0x0110))
+#define DEVAPC0_D1_APC_5 ((volatile unsigned int*)(DEVAPC0_AO_BASE+0x0114))
+#define DEVAPC0_D1_APC_6 ((volatile unsigned int*)(DEVAPC0_AO_BASE+0x0118))
+#define DEVAPC0_D1_APC_7 ((volatile unsigned int*)(DEVAPC0_AO_BASE+0x011C))
+#define DEVAPC0_D1_APC_8 ((volatile unsigned int*)(DEVAPC0_AO_BASE+0x0120))
+
+#define DEVAPC0_D2_APC_0 ((volatile unsigned int*)(DEVAPC0_AO_BASE+0x0200))
+#define DEVAPC0_D2_APC_1 ((volatile unsigned int*)(DEVAPC0_AO_BASE+0x0204))
+#define DEVAPC0_D2_APC_2 ((volatile unsigned int*)(DEVAPC0_AO_BASE+0x0208))
+#define DEVAPC0_D2_APC_3 ((volatile unsigned int*)(DEVAPC0_AO_BASE+0x020C))
+#define DEVAPC0_D2_APC_4 ((volatile unsigned int*)(DEVAPC0_AO_BASE+0x0210))
+#define DEVAPC0_D2_APC_5 ((volatile unsigned int*)(DEVAPC0_AO_BASE+0x0214))
+#define DEVAPC0_D2_APC_6 ((volatile unsigned int*)(DEVAPC0_AO_BASE+0x0218))
+#define DEVAPC0_D2_APC_7 ((volatile unsigned int*)(DEVAPC0_AO_BASE+0x021C))
+#define DEVAPC0_D2_APC_8 ((volatile unsigned int*)(DEVAPC0_AO_BASE+0x0220))
+
+#define DEVAPC0_D3_APC_0 ((volatile unsigned int*)(DEVAPC0_AO_BASE+0x0300))
+#define DEVAPC0_D3_APC_1 ((volatile unsigned int*)(DEVAPC0_AO_BASE+0x0304))
+#define DEVAPC0_D3_APC_2 ((volatile unsigned int*)(DEVAPC0_AO_BASE+0x0308))
+#define DEVAPC0_D3_APC_3 ((volatile unsigned int*)(DEVAPC0_AO_BASE+0x030C))
+#define DEVAPC0_D3_APC_4 ((volatile unsigned int*)(DEVAPC0_AO_BASE+0x0310))
+#define DEVAPC0_D3_APC_5 ((volatile unsigned int*)(DEVAPC0_AO_BASE+0x0314))
+#define DEVAPC0_D3_APC_6 ((volatile unsigned int*)(DEVAPC0_AO_BASE+0x0318))
+#define DEVAPC0_D3_APC_7 ((volatile unsigned int*)(DEVAPC0_AO_BASE+0x031C))
+#define DEVAPC0_D3_APC_8 ((volatile unsigned int*)(DEVAPC0_AO_BASE+0x0320))
+
+#if defined(MACH_TYPE_MT6735)
+
+#define DEVAPC0_MAS_DOM_0 ((volatile unsigned int*)(DEVAPC0_AO_BASE+0x0A00))
+#define DEVAPC0_MAS_DOM_1 ((volatile unsigned int*)(DEVAPC0_AO_BASE+0x0A04))
+#define DEVAPC0_MAS_DOM_2 ((volatile unsigned int*)(DEVAPC0_AO_BASE+0x0A08))
+#define DEVAPC0_MAS_SEC ((volatile unsigned int*)(DEVAPC0_AO_BASE+0x0B00))
+
+#else
+
+#error "Wrong MACH type"
+
+#endif
+
+#define DEVAPC0_APC_CON ((volatile unsigned int*)(DEVAPC0_AO_BASE+0x0F00))
+#define DEVAPC0_APC_LOCK_0 ((volatile unsigned int*)(DEVAPC0_AO_BASE+0x0F04))
+#define DEVAPC0_APC_LOCK_1 ((volatile unsigned int*)(DEVAPC0_AO_BASE+0x0F08))
+#define DEVAPC0_APC_LOCK_2 ((volatile unsigned int*)(DEVAPC0_AO_BASE+0x0F0C))
+#define DEVAPC0_APC_LOCK_3 ((volatile unsigned int*)(DEVAPC0_AO_BASE+0x0F10))
+#define DEVAPC0_APC_LOCK_4 ((volatile unsigned int*)(DEVAPC0_AO_BASE+0x0F14))
+
+#define DEVAPC0_PD_APC_CON ((volatile unsigned int*)(DEVAPC0_PD_BASE+0x0F00))
+#define DEVAPC0_D0_VIO_MASK_0 ((volatile unsigned int*)(DEVAPC0_PD_BASE+0x0000))
+#define DEVAPC0_D0_VIO_MASK_1 ((volatile unsigned int*)(DEVAPC0_PD_BASE+0x0004))
+#define DEVAPC0_D0_VIO_MASK_2 ((volatile unsigned int*)(DEVAPC0_PD_BASE+0x0008))
+#define DEVAPC0_D0_VIO_MASK_3 ((volatile unsigned int*)(DEVAPC0_PD_BASE+0x000C))
+#define DEVAPC0_D0_VIO_MASK_4 ((volatile unsigned int*)(DEVAPC0_PD_BASE+0x0010))
+#define DEVAPC0_D0_VIO_STA_0 ((volatile unsigned int*)(DEVAPC0_PD_BASE+0x0400))
+#define DEVAPC0_D0_VIO_STA_1 ((volatile unsigned int*)(DEVAPC0_PD_BASE+0x0404))
+#define DEVAPC0_D0_VIO_STA_2 ((volatile unsigned int*)(DEVAPC0_PD_BASE+0x0408))
+#define DEVAPC0_D0_VIO_STA_3 ((volatile unsigned int*)(DEVAPC0_PD_BASE+0x040C))
+#define DEVAPC0_D0_VIO_STA_4 ((volatile unsigned int*)(DEVAPC0_PD_BASE+0x0410))
+#define DEVAPC0_VIO_DBG0 ((volatile unsigned int*)(DEVAPC0_PD_BASE+0x0900))
+#define DEVAPC0_VIO_DBG1 ((volatile unsigned int*)(DEVAPC0_PD_BASE+0x0904))
+
+#define DEVAPC0_DEC_ERR_CON ((volatile unsigned int*)(DEVAPC0_PD_BASE+0x0F80))
+#define DEVAPC0_DEC_ERR_ADDR ((volatile unsigned int*)(DEVAPC0_PD_BASE+0x0F84))
+#define DEVAPC0_DEC_ERR_ID ((volatile unsigned int*)(DEVAPC0_PD_BASE+0x0F88))
+
+
+#define DEVAPC_APC_CON_CTRL (0x1 << 0)
+#define DEVAPC_APC_CON_EN 0x1
+#define MASTER_MSDC0 4
+#define MASTER_SPI0 7
+
+typedef enum {
+ NON_SECURE_TRAN = 0,
+ SECURE_TRAN,
+} E_TRANSACTION;
+
+
+///* DOMAIN_SETUP */
+
+
+#define DOMAIN_0 0
+#define DOMAIN_1 1
+#define DOMAIN_2 2
+#define DOMAIN_3 3
+
+#if defined(MACH_TYPE_MT6735)
+
+#define DOMAIN_4 4
+#define DOMAIN_5 5
+#define DOMAIN_6 6
+
+#define CONN2AP (0xf << 16)//index12 DEVAPC0_MAS_DOM_1
+#define MD1_DOMAIN (0xf << 24)//index14 DEVAPC0_MAS_DOM_1
+#define MD3_DOMAIN (0xf << 8)//index18 DEVAPC0_MAS_DOM_2
+#define GPU (0xf << 20)//index21 DEVAPC0_MAS_DOM_2
+
+#else
+
+#error "Wrong MACH type"
+
+#endif
+
+static inline unsigned int uffs(unsigned int x)
+{
+ unsigned int r = 1;
+
+ if (!x)
+ return 0;
+ if (!(x & 0xffff)) {
+ x >>= 16;
+ r += 16;
+ }
+ if (!(x & 0xff)) {
+ x >>= 8;
+ r += 8;
+ }
+ if (!(x & 0xf)) {
+ x >>= 4;
+ r += 4;
+ }
+ if (!(x & 3)) {
+ x >>= 2;
+ r += 2;
+ }
+ if (!(x & 1)) {
+ x >>= 1;
+ r += 1;
+ }
+ return r;
+}
+
+#define reg_read16(reg) __raw_readw(reg)
+#define reg_read32(reg) __raw_readl(reg)
+#define reg_write16(reg,val) __raw_writew(val,reg)
+#define reg_write32(reg,val) __raw_writel(val,reg)
+
+#define reg_set_bits(reg,bs) ((*(volatile u32*)(reg)) |= (u32)(bs))
+#define reg_clr_bits(reg,bs) ((*(volatile u32*)(reg)) &= ~((u32)(bs)))
+
+#define reg_set_field(reg,field,val) \
+ do { \
+ volatile unsigned int tv = reg_read32(reg); \
+ tv &= ~(field); \
+ tv |= ((val) << (uffs((unsigned int)field) - 1)); \
+ reg_write32(reg,tv); \
+ } while(0)
+
+#define reg_get_field(reg,field,val) \
+ do { \
+ volatile unsigned int tv = reg_read32(reg); \
+ val = ((tv & (field)) >> (uffs((unsigned int)field) - 1)); \
+ } while(0)
+
+extern void device_APC_dom_setup(void);
+
+#endif
diff --git a/src/bsp/trustzone/teeloader/mt2635/include/platform.h b/src/bsp/trustzone/teeloader/mt2635/include/platform.h
new file mode 100644
index 0000000..96b232b
--- /dev/null
+++ b/src/bsp/trustzone/teeloader/mt2635/include/platform.h
@@ -0,0 +1,59 @@
+/* Copyright Statement:
+ *
+ * This software/firmware and related documentation ("MediaTek Software") are
+ * protected under relevant copyright laws. The information contained herein is
+ * confidential and proprietary to MediaTek Inc. and/or its licensors. Without
+ * the prior written permission of MediaTek inc. and/or its licensors, any
+ * reproduction, modification, use or disclosure of MediaTek Software, and
+ * information contained herein, in whole or in part, shall be strictly
+ * prohibited.
+ *
+ * MediaTek Inc. (C) 2016. All rights reserved.
+ *
+ * BY OPENING THIS FILE, RECEIVER HEREBY UNEQUIVOCALLY ACKNOWLEDGES AND AGREES
+ * THAT THE SOFTWARE/FIRMWARE AND ITS DOCUMENTATIONS ("MEDIATEK SOFTWARE")
+ * RECEIVED FROM MEDIATEK AND/OR ITS REPRESENTATIVES ARE PROVIDED TO RECEIVER
+ * ON AN "AS-IS" BASIS ONLY. MEDIATEK EXPRESSLY DISCLAIMS ANY AND ALL
+ * WARRANTIES, EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE IMPLIED
+ * WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE OR
+ * NONINFRINGEMENT. NEITHER DOES MEDIATEK PROVIDE ANY WARRANTY WHATSOEVER WITH
+ * RESPECT TO THE SOFTWARE OF ANY THIRD PARTY WHICH MAY BE USED BY,
+ * INCORPORATED IN, OR SUPPLIED WITH THE MEDIATEK SOFTWARE, AND RECEIVER AGREES
+ * TO LOOK ONLY TO SUCH THIRD PARTY FOR ANY WARRANTY CLAIM RELATING THERETO.
+ * RECEIVER EXPRESSLY ACKNOWLEDGES THAT IT IS RECEIVER'S SOLE RESPONSIBILITY TO
+ * OBTAIN FROM ANY THIRD PARTY ALL PROPER LICENSES CONTAINED IN MEDIATEK
+ * SOFTWARE. MEDIATEK SHALL ALSO NOT BE RESPONSIBLE FOR ANY MEDIATEK SOFTWARE
+ * RELEASES MADE TO RECEIVER'S SPECIFICATION OR TO CONFORM TO A PARTICULAR
+ * STANDARD OR OPEN FORUM. RECEIVER'S SOLE AND EXCLUSIVE REMEDY AND MEDIATEK'S
+ * ENTIRE AND CUMULATIVE LIABILITY WITH RESPECT TO THE MEDIATEK SOFTWARE
+ * RELEASED HEREUNDER WILL BE, AT MEDIATEK'S OPTION, TO REVISE OR REPLACE THE
+ * MEDIATEK SOFTWARE AT ISSUE, OR REFUND ANY SOFTWARE LICENSE FEES OR SERVICE
+ * CHARGE PAID BY RECEIVER TO MEDIATEK FOR SUCH MEDIATEK SOFTWARE AT ISSUE.
+ *
+ * The following software/firmware and/or related documentation ("MediaTek
+ * Software") have been modified by MediaTek Inc. All revisions are subject to
+ * any receiver's applicable license agreements with MediaTek Inc.
+ */
+
+#ifndef PLATFORM_H
+#define PLATFORM_H
+
+#define CFG_DRAM_ADDR (0x40000000UL)
+#define CFG_PLATFORM_DRAM_SIZE (0x10000000UL)
+
+#if CFG_TEE_SUPPORT
+#ifdef CFG_TEE_TRUSTED_APP_HEAP_SIZE
+#define CFG_TEE_CORE_SIZE (0x500000 + CFG_TEE_TRUSTED_APP_HEAP_SIZE)
+#else
+#define CFG_TEE_CORE_SIZE (0x500000)
+#endif
+#if CFG_TRUSTONIC_TEE_SUPPORT
+#define CFG_MIN_TEE_DRAM_SIZE (0x600000)
+#define CFG_MAX_TEE_DRAM_SIZE (160 * 1024 * 1024) /* TEE max DRAM size is 160MB */
+#else
+#define CFG_MIN_TEE_DRAM_SIZE (0)
+#define CFG_MAX_TEE_DRAM_SIZE (0) /* TEE max DRAM size is 0 if TEE is not enabled */
+#endif
+#endif
+
+#endif /* PLATFORM_H */
diff --git a/src/bsp/trustzone/teeloader/mt2635/include/print.h b/src/bsp/trustzone/teeloader/mt2635/include/print.h
new file mode 100644
index 0000000..6f7f93a
--- /dev/null
+++ b/src/bsp/trustzone/teeloader/mt2635/include/print.h
@@ -0,0 +1,43 @@
+/* Copyright Statement:
+ *
+ * This software/firmware and related documentation ("MediaTek Software") are
+ * protected under relevant copyright laws. The information contained herein is
+ * confidential and proprietary to MediaTek Inc. and/or its licensors. Without
+ * the prior written permission of MediaTek inc. and/or its licensors, any
+ * reproduction, modification, use or disclosure of MediaTek Software, and
+ * information contained herein, in whole or in part, shall be strictly
+ * prohibited.
+ *
+ * MediaTek Inc. (C) 2016. All rights reserved.
+ *
+ * BY OPENING THIS FILE, RECEIVER HEREBY UNEQUIVOCALLY ACKNOWLEDGES AND AGREES
+ * THAT THE SOFTWARE/FIRMWARE AND ITS DOCUMENTATIONS ("MEDIATEK SOFTWARE")
+ * RECEIVED FROM MEDIATEK AND/OR ITS REPRESENTATIVES ARE PROVIDED TO RECEIVER
+ * ON AN "AS-IS" BASIS ONLY. MEDIATEK EXPRESSLY DISCLAIMS ANY AND ALL
+ * WARRANTIES, EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE IMPLIED
+ * WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE OR
+ * NONINFRINGEMENT. NEITHER DOES MEDIATEK PROVIDE ANY WARRANTY WHATSOEVER WITH
+ * RESPECT TO THE SOFTWARE OF ANY THIRD PARTY WHICH MAY BE USED BY,
+ * INCORPORATED IN, OR SUPPLIED WITH THE MEDIATEK SOFTWARE, AND RECEIVER AGREES
+ * TO LOOK ONLY TO SUCH THIRD PARTY FOR ANY WARRANTY CLAIM RELATING THERETO.
+ * RECEIVER EXPRESSLY ACKNOWLEDGES THAT IT IS RECEIVER'S SOLE RESPONSIBILITY TO
+ * OBTAIN FROM ANY THIRD PARTY ALL PROPER LICENSES CONTAINED IN MEDIATEK
+ * SOFTWARE. MEDIATEK SHALL ALSO NOT BE RESPONSIBLE FOR ANY MEDIATEK SOFTWARE
+ * RELEASES MADE TO RECEIVER'S SPECIFICATION OR TO CONFORM TO A PARTICULAR
+ * STANDARD OR OPEN FORUM. RECEIVER'S SOLE AND EXCLUSIVE REMEDY AND MEDIATEK'S
+ * ENTIRE AND CUMULATIVE LIABILITY WITH RESPECT TO THE MEDIATEK SOFTWARE
+ * RELEASED HEREUNDER WILL BE, AT MEDIATEK'S OPTION, TO REVISE OR REPLACE THE
+ * MEDIATEK SOFTWARE AT ISSUE, OR REFUND ANY SOFTWARE LICENSE FEES OR SERVICE
+ * CHARGE PAID BY RECEIVER TO MEDIATEK FOR SUCH MEDIATEK SOFTWARE AT ISSUE.
+ *
+ * The following software/firmware and/or related documentation ("MediaTek
+ * Software") have been modified by MediaTek Inc. All revisions are subject to
+ * any receiver's applicable license agreements with MediaTek Inc.
+ */
+
+#ifndef __PRINT_H__
+#define __PRINT_H__
+
+extern void print(char *fmt, ...);
+
+#endif /* __PRINT_H__ */
diff --git a/src/bsp/trustzone/teeloader/mt2635/include/string.h b/src/bsp/trustzone/teeloader/mt2635/include/string.h
new file mode 100644
index 0000000..d211265
--- /dev/null
+++ b/src/bsp/trustzone/teeloader/mt2635/include/string.h
@@ -0,0 +1,57 @@
+/* Copyright Statement:
+ *
+ * This software/firmware and related documentation ("MediaTek Software") are
+ * protected under relevant copyright laws. The information contained herein is
+ * confidential and proprietary to MediaTek Inc. and/or its licensors. Without
+ * the prior written permission of MediaTek inc. and/or its licensors, any
+ * reproduction, modification, use or disclosure of MediaTek Software, and
+ * information contained herein, in whole or in part, shall be strictly
+ * prohibited.
+ *
+ * MediaTek Inc. (C) 2016. All rights reserved.
+ *
+ * BY OPENING THIS FILE, RECEIVER HEREBY UNEQUIVOCALLY ACKNOWLEDGES AND AGREES
+ * THAT THE SOFTWARE/FIRMWARE AND ITS DOCUMENTATIONS ("MEDIATEK SOFTWARE")
+ * RECEIVED FROM MEDIATEK AND/OR ITS REPRESENTATIVES ARE PROVIDED TO RECEIVER
+ * ON AN "AS-IS" BASIS ONLY. MEDIATEK EXPRESSLY DISCLAIMS ANY AND ALL
+ * WARRANTIES, EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE IMPLIED
+ * WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE OR
+ * NONINFRINGEMENT. NEITHER DOES MEDIATEK PROVIDE ANY WARRANTY WHATSOEVER WITH
+ * RESPECT TO THE SOFTWARE OF ANY THIRD PARTY WHICH MAY BE USED BY,
+ * INCORPORATED IN, OR SUPPLIED WITH THE MEDIATEK SOFTWARE, AND RECEIVER AGREES
+ * TO LOOK ONLY TO SUCH THIRD PARTY FOR ANY WARRANTY CLAIM RELATING THERETO.
+ * RECEIVER EXPRESSLY ACKNOWLEDGES THAT IT IS RECEIVER'S SOLE RESPONSIBILITY TO
+ * OBTAIN FROM ANY THIRD PARTY ALL PROPER LICENSES CONTAINED IN MEDIATEK
+ * SOFTWARE. MEDIATEK SHALL ALSO NOT BE RESPONSIBLE FOR ANY MEDIATEK SOFTWARE
+ * RELEASES MADE TO RECEIVER'S SPECIFICATION OR TO CONFORM TO A PARTICULAR
+ * STANDARD OR OPEN FORUM. RECEIVER'S SOLE AND EXCLUSIVE REMEDY AND MEDIATEK'S
+ * ENTIRE AND CUMULATIVE LIABILITY WITH RESPECT TO THE MEDIATEK SOFTWARE
+ * RELEASED HEREUNDER WILL BE, AT MEDIATEK'S OPTION, TO REVISE OR REPLACE THE
+ * MEDIATEK SOFTWARE AT ISSUE, OR REFUND ANY SOFTWARE LICENSE FEES OR SERVICE
+ * CHARGE PAID BY RECEIVER TO MEDIATEK FOR SUCH MEDIATEK SOFTWARE AT ISSUE.
+ *
+ * The following software/firmware and/or related documentation ("MediaTek
+ * Software") have been modified by MediaTek Inc. All revisions are subject to
+ * any receiver's applicable license agreements with MediaTek Inc.
+ */
+
+#ifndef STRING_H
+#define STRING_H
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+extern int strlen(const char *s);
+extern int strcmp(const char *cs, const char *ct);
+extern int strncmp(const char *cs, const char *ct, int count);
+extern void *memset(void *s, int c, int count);
+extern void *memcpy(void *dest, const void *src, int count);
+extern int memcmp(const void *cs, const void *ct, int count);
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif /* STRING_H */
+
diff --git a/src/bsp/trustzone/teeloader/mt2635/include/typedefs.h b/src/bsp/trustzone/teeloader/mt2635/include/typedefs.h
new file mode 100644
index 0000000..a78ef5c
--- /dev/null
+++ b/src/bsp/trustzone/teeloader/mt2635/include/typedefs.h
@@ -0,0 +1,178 @@
+/* Copyright Statement:
+ *
+ * This software/firmware and related documentation ("MediaTek Software") are
+ * protected under relevant copyright laws. The information contained herein is
+ * confidential and proprietary to MediaTek Inc. and/or its licensors. Without
+ * the prior written permission of MediaTek inc. and/or its licensors, any
+ * reproduction, modification, use or disclosure of MediaTek Software, and
+ * information contained herein, in whole or in part, shall be strictly
+ * prohibited.
+ *
+ * MediaTek Inc. (C) 2016. All rights reserved.
+ *
+ * BY OPENING THIS FILE, RECEIVER HEREBY UNEQUIVOCALLY ACKNOWLEDGES AND AGREES
+ * THAT THE SOFTWARE/FIRMWARE AND ITS DOCUMENTATIONS ("MEDIATEK SOFTWARE")
+ * RECEIVED FROM MEDIATEK AND/OR ITS REPRESENTATIVES ARE PROVIDED TO RECEIVER
+ * ON AN "AS-IS" BASIS ONLY. MEDIATEK EXPRESSLY DISCLAIMS ANY AND ALL
+ * WARRANTIES, EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE IMPLIED
+ * WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE OR
+ * NONINFRINGEMENT. NEITHER DOES MEDIATEK PROVIDE ANY WARRANTY WHATSOEVER WITH
+ * RESPECT TO THE SOFTWARE OF ANY THIRD PARTY WHICH MAY BE USED BY,
+ * INCORPORATED IN, OR SUPPLIED WITH THE MEDIATEK SOFTWARE, AND RECEIVER AGREES
+ * TO LOOK ONLY TO SUCH THIRD PARTY FOR ANY WARRANTY CLAIM RELATING THERETO.
+ * RECEIVER EXPRESSLY ACKNOWLEDGES THAT IT IS RECEIVER'S SOLE RESPONSIBILITY TO
+ * OBTAIN FROM ANY THIRD PARTY ALL PROPER LICENSES CONTAINED IN MEDIATEK
+ * SOFTWARE. MEDIATEK SHALL ALSO NOT BE RESPONSIBLE FOR ANY MEDIATEK SOFTWARE
+ * RELEASES MADE TO RECEIVER'S SPECIFICATION OR TO CONFORM TO A PARTICULAR
+ * STANDARD OR OPEN FORUM. RECEIVER'S SOLE AND EXCLUSIVE REMEDY AND MEDIATEK'S
+ * ENTIRE AND CUMULATIVE LIABILITY WITH RESPECT TO THE MEDIATEK SOFTWARE
+ * RELEASED HEREUNDER WILL BE, AT MEDIATEK'S OPTION, TO REVISE OR REPLACE THE
+ * MEDIATEK SOFTWARE AT ISSUE, OR REFUND ANY SOFTWARE LICENSE FEES OR SERVICE
+ * CHARGE PAID BY RECEIVER TO MEDIATEK FOR SUCH MEDIATEK SOFTWARE AT ISSUE.
+ *
+ * The following software/firmware and/or related documentation ("MediaTek
+ * Software") have been modified by MediaTek Inc. All revisions are subject to
+ * any receiver's applicable license agreements with MediaTek Inc.
+ */
+
+#ifndef __TYPEDEFS_H__
+#define __TYPEDEFS_H__
+
+typedef unsigned long ulong;
+typedef unsigned char uchar;
+typedef unsigned int uint;
+typedef signed char int8;
+typedef signed short int16;
+typedef signed long int32;
+typedef signed int intx;
+typedef unsigned char uint8;
+typedef unsigned short uint16;
+typedef unsigned long uint32;
+typedef unsigned int uintx;
+
+typedef volatile unsigned char *P_U8;
+typedef volatile signed char *P_S8;
+typedef volatile unsigned short *P_U16;
+typedef volatile signed short *P_S16;
+typedef volatile unsigned int *P_U32;
+typedef volatile signed int *P_S32;
+typedef unsigned long long *P_U64;
+typedef signed long long *P_S64;
+
+typedef unsigned char u8;
+typedef signed char s8;
+typedef unsigned short u16;
+typedef signed short s16;
+typedef unsigned int u32;
+typedef signed int s32;
+typedef unsigned long long u64;
+typedef signed long long s64;
+
+//------------------------------------------------------------------
+typedef unsigned char UINT8;
+typedef unsigned short UINT16;
+typedef unsigned int UINT32;
+typedef unsigned short USHORT;
+typedef signed char INT8;
+typedef signed short INT16;
+typedef signed int INT32;
+typedef signed int DWORD;
+typedef void VOID;
+typedef unsigned char BYTE;
+typedef float FLOAT;
+
+typedef char *LPCSTR;
+typedef short *LPWSTR;
+
+//------------------------------------------------------------------
+typedef char __s8;
+typedef unsigned char __u8;
+typedef short __s16;
+typedef unsigned short __u16;
+typedef int __s32;
+typedef unsigned int __u32;
+typedef long long __s64;
+typedef unsigned long long __u64;
+typedef signed char s8;
+typedef unsigned char u8;
+typedef signed short s16;
+typedef unsigned short u16;
+typedef signed int s32;
+typedef unsigned int u32;
+typedef signed long long s64;
+typedef unsigned long long u64;
+
+//------------------------------------------------------------------
+#ifndef FALSE
+#define FALSE 0
+#endif
+#ifndef TRUE
+#define TRUE 1
+#endif
+
+#ifndef NULL
+#define NULL 0
+#endif
+
+/*==== EXPORTED MACRO ===================================================*/
+#define READ_REGISTER_UINT32(reg) \
+ (*(volatile UINT32 * const)(reg))
+
+#define WRITE_REGISTER_UINT32(reg, val) \
+ (*(volatile UINT32 * const)(reg)) = (val)
+
+#define READ_REGISTER_UINT16(reg) \
+ (*(volatile UINT16 * const)(reg))
+
+#define WRITE_REGISTER_UINT16(reg, val) \
+ (*(volatile UINT16 * const)(reg)) = (val)
+
+#define READ_REGISTER_UINT8(reg) \
+ (*(volatile UINT8 * const)(reg))
+
+#define WRITE_REGISTER_UINT8(reg, val) \
+ (*(volatile UINT8 * const)(reg)) = (val)
+
+#define INREG8(x) READ_REGISTER_UINT8((UINT8*)(x))
+#define OUTREG8(x, y) WRITE_REGISTER_UINT8((UINT8*)(x), (UINT8)(y))
+#define SETREG8(x, y) OUTREG8(x, INREG8(x)|(y))
+#define CLRREG8(x, y) OUTREG8(x, INREG8(x)&~(y))
+#define MASKREG8(x, y, z) OUTREG8(x, (INREG8(x)&~(y))|(z))
+
+#define INREG16(x) READ_REGISTER_UINT16((UINT16*)(x))
+#define OUTREG16(x, y) WRITE_REGISTER_UINT16((UINT16*)(x),(UINT16)(y))
+#define SETREG16(x, y) OUTREG16(x, INREG16(x)|(y))
+#define CLRREG16(x, y) OUTREG16(x, INREG16(x)&~(y))
+#define MASKREG16(x, y, z) OUTREG16(x, (INREG16(x)&~(y))|(z))
+
+#define INREG32(x) READ_REGISTER_UINT32((UINT32*)(x))
+#define OUTREG32(x, y) WRITE_REGISTER_UINT32((UINT32*)(x), (UINT32)(y))
+#define SETREG32(x, y) OUTREG32(x, INREG32(x)|(y))
+#define CLRREG32(x, y) OUTREG32(x, INREG32(x)&~(y))
+#define MASKREG32(x, y, z) OUTREG32(x, (INREG32(x)&~(y))|(z))
+
+#define DRV_Reg8(addr) INREG8(addr)
+#define DRV_WriteReg8(addr, data) OUTREG8(addr, data)
+#define DRV_SetReg8(addr, data) SETREG8(addr, data)
+#define DRV_ClrReg8(addr, data) CLRREG8(addr, data)
+
+#define DRV_Reg16(addr) INREG16(addr)
+#define DRV_WriteReg16(addr, data) OUTREG16(addr, data)
+#define DRV_SetReg16(addr, data) SETREG16(addr, data)
+#define DRV_ClrReg16(addr, data) CLRREG16(addr, data)
+
+#define DRV_Reg32(addr) INREG32(addr)
+#define DRV_WriteReg32(addr, data) OUTREG32(addr, data)
+#define DRV_SetReg32(addr, data) SETREG32(addr, data)
+#define DRV_ClrReg32(addr, data) CLRREG32(addr, data)
+
+#define __raw_readb(REG) DRV_Reg8(REG)
+#define __raw_readw(REG) DRV_Reg16(REG)
+#define __raw_readl(REG) DRV_Reg32(REG)
+#define __raw_writeb(VAL, REG) DRV_WriteReg8(REG,VAL)
+#define __raw_writew(VAL, REG) DRV_WriteReg16(REG,VAL)
+#define __raw_writel(VAL, REG) DRV_WriteReg32(REG,VAL)
+
+#define printf print
+
+#endif /* __TYPEDEFS_H__ */
diff --git a/src/bsp/trustzone/teeloader/mt2635/include/tz_emi_mpu.h b/src/bsp/trustzone/teeloader/mt2635/include/tz_emi_mpu.h
new file mode 100644
index 0000000..557b8ee
--- /dev/null
+++ b/src/bsp/trustzone/teeloader/mt2635/include/tz_emi_mpu.h
@@ -0,0 +1,65 @@
+/* Copyright Statement:
+ *
+ * This software/firmware and related documentation ("MediaTek Software") are
+ * protected under relevant copyright laws. The information contained herein is
+ * confidential and proprietary to MediaTek Inc. and/or its licensors. Without
+ * the prior written permission of MediaTek inc. and/or its licensors, any
+ * reproduction, modification, use or disclosure of MediaTek Software, and
+ * information contained herein, in whole or in part, shall be strictly
+ * prohibited.
+ *
+ * MediaTek Inc. (C) 2016. All rights reserved.
+ *
+ * BY OPENING THIS FILE, RECEIVER HEREBY UNEQUIVOCALLY ACKNOWLEDGES AND AGREES
+ * THAT THE SOFTWARE/FIRMWARE AND ITS DOCUMENTATIONS ("MEDIATEK SOFTWARE")
+ * RECEIVED FROM MEDIATEK AND/OR ITS REPRESENTATIVES ARE PROVIDED TO RECEIVER
+ * ON AN "AS-IS" BASIS ONLY. MEDIATEK EXPRESSLY DISCLAIMS ANY AND ALL
+ * WARRANTIES, EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE IMPLIED
+ * WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE OR
+ * NONINFRINGEMENT. NEITHER DOES MEDIATEK PROVIDE ANY WARRANTY WHATSOEVER WITH
+ * RESPECT TO THE SOFTWARE OF ANY THIRD PARTY WHICH MAY BE USED BY,
+ * INCORPORATED IN, OR SUPPLIED WITH THE MEDIATEK SOFTWARE, AND RECEIVER AGREES
+ * TO LOOK ONLY TO SUCH THIRD PARTY FOR ANY WARRANTY CLAIM RELATING THERETO.
+ * RECEIVER EXPRESSLY ACKNOWLEDGES THAT IT IS RECEIVER'S SOLE RESPONSIBILITY TO
+ * OBTAIN FROM ANY THIRD PARTY ALL PROPER LICENSES CONTAINED IN MEDIATEK
+ * SOFTWARE. MEDIATEK SHALL ALSO NOT BE RESPONSIBLE FOR ANY MEDIATEK SOFTWARE
+ * RELEASES MADE TO RECEIVER'S SPECIFICATION OR TO CONFORM TO A PARTICULAR
+ * STANDARD OR OPEN FORUM. RECEIVER'S SOLE AND EXCLUSIVE REMEDY AND MEDIATEK'S
+ * ENTIRE AND CUMULATIVE LIABILITY WITH RESPECT TO THE MEDIATEK SOFTWARE
+ * RELEASED HEREUNDER WILL BE, AT MEDIATEK'S OPTION, TO REVISE OR REPLACE THE
+ * MEDIATEK SOFTWARE AT ISSUE, OR REFUND ANY SOFTWARE LICENSE FEES OR SERVICE
+ * CHARGE PAID BY RECEIVER TO MEDIATEK FOR SUCH MEDIATEK SOFTWARE AT ISSUE.
+ *
+ * The following software/firmware and/or related documentation ("MediaTek
+ * Software") have been modified by MediaTek Inc. All revisions are subject to
+ * any receiver's applicable license agreements with MediaTek Inc.
+ */
+
+#ifndef TZ_EMI_MPU_H
+#define TZ_EMI_MPU_H
+
+/* EMI memory protection align 64K */
+#define EMI_MPU_ALIGNMENT 0x10000
+#define EMI_PHY_OFFSET 0x40000000
+#define SEC_PHY_SIZE 0x06000000
+
+#define NO_PROTECTION 0
+#define SEC_RW 1
+#define SEC_RW_NSEC_R 2
+#define SEC_RW_NSEC_W 3
+#define SEC_R_NSEC_R 4
+#define FORBIDDEN 5
+
+#define SECURE_OS_MPU_REGION_ID 0
+#define ATF_MPU_REGION_ID 1
+
+#define LOCK 1
+#define UNLOCK 0
+
+#if defined(MACH_TYPE_MT6735) || defined(MACH_TYPE_MT6753) || defined(MACH_TYPE_MT6737T)
+#define SET_ACCESS_PERMISSON(lock, d7, d6, d5, d4, d3, d2, d1, d0) ((((d3) << 9) | ((d2) << 6) | ((d1) << 3) | (d0)) | ((((d7) << 9) | ((d6) << 6) | ((d5) << 3) | (d4)) << 16) | (lock << 15))
+#else
+#define SET_ACCESS_PERMISSON(lock, d3, d2, d1, d0) ((((d3) << 9) | ((d2) << 6) | ((d1) << 3) | (d0)) | (lock << 15))
+#endif
+
+#endif /* TZ_EMI_MPU_H */
diff --git a/src/bsp/trustzone/teeloader/mt2635/include/tz_emi_reg.h b/src/bsp/trustzone/teeloader/mt2635/include/tz_emi_reg.h
new file mode 100644
index 0000000..a1f0cfb
--- /dev/null
+++ b/src/bsp/trustzone/teeloader/mt2635/include/tz_emi_reg.h
@@ -0,0 +1,276 @@
+/* Copyright Statement:
+ *
+ * This software/firmware and related documentation ("MediaTek Software") are
+ * protected under relevant copyright laws. The information contained herein is
+ * confidential and proprietary to MediaTek Inc. and/or its licensors. Without
+ * the prior written permission of MediaTek inc. and/or its licensors, any
+ * reproduction, modification, use or disclosure of MediaTek Software, and
+ * information contained herein, in whole or in part, shall be strictly
+ * prohibited.
+ *
+ * MediaTek Inc. (C) 2016. All rights reserved.
+ *
+ * BY OPENING THIS FILE, RECEIVER HEREBY UNEQUIVOCALLY ACKNOWLEDGES AND AGREES
+ * THAT THE SOFTWARE/FIRMWARE AND ITS DOCUMENTATIONS ("MEDIATEK SOFTWARE")
+ * RECEIVED FROM MEDIATEK AND/OR ITS REPRESENTATIVES ARE PROVIDED TO RECEIVER
+ * ON AN "AS-IS" BASIS ONLY. MEDIATEK EXPRESSLY DISCLAIMS ANY AND ALL
+ * WARRANTIES, EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE IMPLIED
+ * WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE OR
+ * NONINFRINGEMENT. NEITHER DOES MEDIATEK PROVIDE ANY WARRANTY WHATSOEVER WITH
+ * RESPECT TO THE SOFTWARE OF ANY THIRD PARTY WHICH MAY BE USED BY,
+ * INCORPORATED IN, OR SUPPLIED WITH THE MEDIATEK SOFTWARE, AND RECEIVER AGREES
+ * TO LOOK ONLY TO SUCH THIRD PARTY FOR ANY WARRANTY CLAIM RELATING THERETO.
+ * RECEIVER EXPRESSLY ACKNOWLEDGES THAT IT IS RECEIVER'S SOLE RESPONSIBILITY TO
+ * OBTAIN FROM ANY THIRD PARTY ALL PROPER LICENSES CONTAINED IN MEDIATEK
+ * SOFTWARE. MEDIATEK SHALL ALSO NOT BE RESPONSIBLE FOR ANY MEDIATEK SOFTWARE
+ * RELEASES MADE TO RECEIVER'S SPECIFICATION OR TO CONFORM TO A PARTICULAR
+ * STANDARD OR OPEN FORUM. RECEIVER'S SOLE AND EXCLUSIVE REMEDY AND MEDIATEK'S
+ * ENTIRE AND CUMULATIVE LIABILITY WITH RESPECT TO THE MEDIATEK SOFTWARE
+ * RELEASED HEREUNDER WILL BE, AT MEDIATEK'S OPTION, TO REVISE OR REPLACE THE
+ * MEDIATEK SOFTWARE AT ISSUE, OR REFUND ANY SOFTWARE LICENSE FEES OR SERVICE
+ * CHARGE PAID BY RECEIVER TO MEDIATEK FOR SUCH MEDIATEK SOFTWARE AT ISSUE.
+ *
+ * The following software/firmware and/or related documentation ("MediaTek
+ * Software") have been modified by MediaTek Inc. All revisions are subject to
+ * any receiver's applicable license agreements with MediaTek Inc.
+ */
+
+#ifndef TZ_EMI_REG_H
+#define TZ_EMI_REG_H
+
+#define IO_PHYS 0x10000000
+#define EMI_BASE (IO_PHYS + 0x00203000)
+
+/*EMI PSRAM (NOR) and DRAM control registers*/
+#define EMI_CONA ((P_U32)(EMI_BASE+0x0000)) /* EMI control register for bank 0 */
+#define EMI_CONB ((P_U32)(EMI_BASE+0x0008)) /* EMI control register for bank 1 */
+#define EMI_CONC ((P_U32)(EMI_BASE+0x0010)) /* EMI control register for bank 2 */
+#define EMI_COND ((P_U32)(EMI_BASE+0x0018)) /* EMI control register for bank 3 */
+#define EMI_CONE ((P_U32)(EMI_BASE+0x0020)) /* EMI control register for bank 0 */
+#define EMI_CONF ((P_U32)(EMI_BASE+0x0028)) /* EMI control register for bank 1 */
+#define EMI_CONG ((P_U32)(EMI_BASE+0x0030)) /* EMI control register for bank 0 */
+#define EMI_CONH ((P_U32)(EMI_BASE+0x0038)) /* EMI control register for bank 1 */
+#define EMI_CONI ((P_U32)(EMI_BASE+0x0040)) /* EMI control register 0 for Mobile-RAM */
+#define EMI_CONJ ((P_U32)(EMI_BASE+0x0048)) /* EMI control register 1 for Mobile-RAM */
+#define EMI_CONK ((P_U32)(EMI_BASE+0x0050)) /* EMI control register 2 for Mobile-RAM */
+#define EMI_CONL ((P_U32)(EMI_BASE+0x0058)) /* EMI control register 3 for Mobile-RAM */
+#define EMI_CONM ((P_U32)(EMI_BASE+0x0060))
+#define EMI_CONN ((P_U32)(EMI_BASE+0x0068))
+#define CAL_EN (1 << 8)
+#define EMI_GENA ((P_U32)(EMI_BASE+0x0070))
+#define EMI_REMAP EMI_GENA
+#define EMI_DRCT ((P_U32)(EMI_BASE+0x0078))
+#define EMI_DDRV ((P_U32)(EMI_BASE+0x0080))
+#define EMI_GEND ((P_U32)(EMI_BASE+0x0088))
+#define EMI_PPCT ((P_U32)(EMI_BASE+0x0090)) /* EMI Performance and Power Control Register */
+
+#define EMI_DLLV ((P_U32)(EMI_BASE+0x00A0))
+
+#define EMI_DFTC ((P_U32)(EMI_BASE+0x00F0))
+#define EMI_DFTD ((P_U32)(EMI_BASE+0x00F8))
+
+/* EMI bandwith filter and MPU control registers */
+#define EMI_ARBA ((P_U32)(EMI_BASE+0x0100))
+#define EMI_ARBB ((P_U32)(EMI_BASE+0x0108))
+#define EMI_ARBC ((P_U32)(EMI_BASE+0x0110))
+#define EMI_ARBD ((P_U32)(EMI_BASE+0x0118))
+#define EMI_ARBE ((P_U32)(EMI_BASE+0x0120))
+#define EMI_ARBF ((P_U32)(EMI_BASE+0x0128))
+#define EMI_ARBG ((P_U32)(EMI_BASE+0x0130))
+
+#define EMI_SLCT ((P_U32)(EMI_BASE+0x0150))
+#define EMI_ABCT ((P_U32)(EMI_BASE+0x0158))
+
+/* EMI Memory Protect Unit */
+#define EMI_MPUA ((P_U32)(EMI_BASE+0x0160))
+#define EMI_MPUB ((P_U32)(EMI_BASE+0x0168))
+#define EMI_MPUC ((P_U32)(EMI_BASE+0x0170))
+#define EMI_MPUD ((P_U32)(EMI_BASE+0x0178))
+#define EMI_MPUE ((P_U32)(EMI_BASE+0x0180))
+#define EMI_MPUF ((P_U32)(EMI_BASE+0x0188))
+#define EMI_MPUG ((P_U32)(EMI_BASE+0x0190))
+#define EMI_MPUH ((P_U32)(EMI_BASE+0x0198))
+
+#define EMI_MPUI ((P_U32)(EMI_BASE+0x01A0))
+#define EMI_MPUI_2ND ((P_U32)(EMI_BASE+0x01A4))
+#define EMI_MPUJ ((P_U32)(EMI_BASE+0x01A8))
+#define EMI_MPUJ_2ND ((P_U32)(EMI_BASE+0x01AC))
+#define EMI_MPUK ((P_U32)(EMI_BASE+0x01B0))
+#define EMI_MPUK_2ND ((P_U32)(EMI_BASE+0x01B4))
+#define EMI_MPUL ((P_U32)(EMI_BASE+0x01B8))
+#define EMI_MPUL_2ND ((P_U32)(EMI_BASE+0x01BC))
+#define EMI_MPUM ((P_U32)(EMI_BASE+0x01C0))
+#define EMI_MPUN ((P_U32)(EMI_BASE+0x01C8))
+#define EMI_MPUO ((P_U32)(EMI_BASE+0x01D0))
+#define EMI_MPUP ((P_U32)(EMI_BASE+0x01D8))
+#define EMI_MPUQ ((P_U32)(EMI_BASE+0x01E0))
+#define EMI_MPUR ((P_U32)(EMI_BASE+0x01E8))
+#define EMI_MPUS ((P_U32)(EMI_BASE+0x01F0))
+#define EMI_MPUT ((P_U32)(EMI_BASE+0x01F8))
+
+#define EMI_MPUA2 ((P_U32)(EMI_BASE+0x0260))
+#define EMI_MPUB2 ((P_U32)(EMI_BASE+0x0268))
+#define EMI_MPUC2 ((P_U32)(EMI_BASE+0x0270))
+#define EMI_MPUD2 ((P_U32)(EMI_BASE+0x0278))
+#define EMI_MPUE2 ((P_U32)(EMI_BASE+0x0280))
+#define EMI_MPUF2 ((P_U32)(EMI_BASE+0x0288))
+#define EMI_MPUG2 ((P_U32)(EMI_BASE+0x0290))
+#define EMI_MPUH2 ((P_U32)(EMI_BASE+0x0298))
+#define EMI_MPUI2 ((P_U32)(EMI_BASE+0x02A0))
+#define EMI_MPUI2_2ND ((P_U32)(EMI_BASE+0x02A4))
+#define EMI_MPUJ2 ((P_U32)(EMI_BASE+0x02A8))
+#define EMI_MPUJ2_2ND ((P_U32)(EMI_BASE+0x02AC))
+#define EMI_MPUK2 ((P_U32)(EMI_BASE+0x02B0))
+#define EMI_MPUK2_2ND ((P_U32)(EMI_BASE+0x02B4))
+#define EMI_MPUL2 ((P_U32)(EMI_BASE+0x02B8))
+#define EMI_MPUL2_2ND ((P_U32)(EMI_BASE+0x02BC))
+#define EMI_MPUM2 ((P_U32)(EMI_BASE+0x02C0))
+#define EMI_MPUN2 ((P_U32)(EMI_BASE+0x02C8))
+#define EMI_MPUO2 ((P_U32)(EMI_BASE+0x02D0))
+#define EMI_MPUP2 ((P_U32)(EMI_BASE+0x02D8))
+#define EMI_MPUQ2 ((P_U32)(EMI_BASE+0x02E0))
+#define EMI_MPUR2 ((P_U32)(EMI_BASE+0x02E8))
+#define EMI_MPUU2 ((P_U32)(EMI_BASE+0x0300))
+#define EMI_MPUY2 ((P_U32)(EMI_BASE+0x0320))
+
+/* EMI IO delay, driving and MISC control registers */
+#define EMI_IDLA ((P_U32)(EMI_BASE+0x0200))
+#define EMI_IDLB ((P_U32)(EMI_BASE+0x0208))
+#define EMI_IDLC ((P_U32)(EMI_BASE+0x0210))
+#define EMI_IDLD ((P_U32)(EMI_BASE+0x0218))
+#define EMI_IDLE ((P_U32)(EMI_BASE+0x0220))
+#define EMI_IDLF ((P_U32)(EMI_BASE+0x0228))
+#define EMI_IDLG ((P_U32)(EMI_BASE+0x0230))
+#define EMI_IDLH ((P_U32)(EMI_BASE+0x0238))
+#define EMI_IDLI ((P_U32)(EMI_BASE+0x0240)) // IO input delay (DQS0 ~ DQS4)
+#define EMI_IDLJ ((P_U32)(EMI_BASE+0x0248))
+#define EMI_IDLK ((P_U32)(EMI_BASE+0x0250))
+
+#define EMI_ODLA ((P_U32)(EMI_BASE+0x0258))
+#define EMI_ODLB ((P_U32)(EMI_BASE+0x0260))
+#define EMI_ODLC ((P_U32)(EMI_BASE+0x0268))
+#define EMI_ODLD ((P_U32)(EMI_BASE+0x0270))
+#define EMI_ODLE ((P_U32)(EMI_BASE+0x0278))
+#define EMI_ODLF ((P_U32)(EMI_BASE+0x0280))
+#define EMI_ODLG ((P_U32)(EMI_BASE+0x0288))
+
+#define EMI_DUTA ((P_U32)(EMI_BASE+0x0290))
+#define EMI_DUTB ((P_U32)(EMI_BASE+0x0298))
+#define EMI_DUTC ((P_U32)(EMI_BASE+0x02A0))
+
+#define EMI_DRVA ((P_U32)(EMI_BASE+0x02A8))
+#define EMI_DRVB ((P_U32)(EMI_BASE+0x02B0))
+
+#define EMI_IOCL ((P_U32)(EMI_BASE+0x02B8))
+#define EMI_IOCM ((P_U32)(EMI_BASE+0x02C0)) //IvanTseng, for 4T mode
+#define EMI_IODC ((P_U32)(EMI_BASE+0x02C8))
+
+#define EMI_ODTA ((P_U32)(EMI_BASE+0x02D0))
+#define EMI_ODTB ((P_U32)(EMI_BASE+0x02D8))
+
+/* EMI auto-tracking control registers */
+#define EMI_DQSA ((P_U32)(EMI_BASE+0x0300))
+#define EMI_DQSB ((P_U32)(EMI_BASE+0x0308))
+#define EMI_DQSC ((P_U32)(EMI_BASE+0x0310))
+#define EMI_DQSD ((P_U32)(EMI_BASE+0x0318))
+
+
+#define EMI_DQSE ((P_U32)(EMI_BASE+0x0320))
+#define EMI_DQSV ((P_U32)(EMI_BASE+0x0328))
+
+#define EMI_CALA ((P_U32)(EMI_BASE+0x0330))
+#define EMI_CALB ((P_U32)(EMI_BASE+0x0338))
+#define EMI_CALC ((P_U32)(EMI_BASE+0x0340))
+#define EMI_CALD ((P_U32)(EMI_BASE+0x0348))
+
+
+#define EMI_CALE ((P_U32)(EMI_BASE+0x0350)) //DDR data auto tracking control
+#define EMI_CALF ((P_U32)(EMI_BASE+0x0358))
+#define EMI_CALG ((P_U32)(EMI_BASE+0x0360)) //DDR data auto tracking control
+#define EMI_CALH ((P_U32)(EMI_BASE+0x0368))
+
+#define EMI_CALI ((P_U32)(EMI_BASE+0x0370))
+#define EMI_CALJ ((P_U32)(EMI_BASE+0x0378))
+#define EMI_CALK ((P_U32)(EMI_BASE+0x0380))
+#define EMI_CALL ((P_U32)(EMI_BASE+0x0388))
+
+
+#define EMI_CALM ((P_U32)(EMI_BASE+0x0390))
+#define EMI_CALN ((P_U32)(EMI_BASE+0x0398))
+
+#define EMI_CALO ((P_U32)(EMI_BASE+0x03A0))
+#define EMI_CALP ((P_U32)(EMI_BASE+0x03A8))
+
+#define EMI_DUCA ((P_U32)(EMI_BASE+0x03B0))
+#define EMI_DUCB ((P_U32)(EMI_BASE+0x03B8))
+#define EMI_DUCC ((P_U32)(EMI_BASE+0x03C0))
+#define EMI_DUCD ((P_U32)(EMI_BASE+0x03C8))
+#define EMI_DUCE ((P_U32)(EMI_BASE+0x03D0))
+
+/* EMI bus monitor control registers */
+#define EMI_BMEN ((P_U32)(EMI_BASE+0x0400))
+#define EMI_BCNT ((P_U32)(EMI_BASE+0x0408))
+#define EMI_TACT ((P_U32)(EMI_BASE+0x0410))
+#define EMI_TSCT ((P_U32)(EMI_BASE+0x0418))
+#define EMI_WACT ((P_U32)(EMI_BASE+0x0420))
+#define EMI_WSCT ((P_U32)(EMI_BASE+0x0428))
+#define EMI_BACT ((P_U32)(EMI_BASE+0x0430))
+#define EMI_BSCT ((P_U32)(EMI_BASE+0x0438))
+#define EMI_MSEL ((P_U32)(EMI_BASE+0x0440))
+#define EMI_TSCT2 ((P_U32)(EMI_BASE+0x0448))
+#define EMI_TSCT3 ((P_U32)(EMI_BASE+0x0450))
+#define EMI_WSCT2 ((P_U32)(EMI_BASE+0x0458))
+#define EMI_WSCT3 ((P_U32)(EMI_BASE+0x0460))
+#define EMI_MSEL2 ((P_U32)(EMI_BASE+0x0468))
+#define EMI_MSEL3 ((P_U32)(EMI_BASE+0x0470))
+#define EMI_MSEL4 ((P_U32)(EMI_BASE+0x0478))
+#define EMI_MSEL5 ((P_U32)(EMI_BASE+0x0480))
+#define EMI_MSEL6 ((P_U32)(EMI_BASE+0x0488))
+#define EMI_MSEL7 ((P_U32)(EMI_BASE+0x0490))
+#define EMI_MSEL8 ((P_U32)(EMI_BASE+0x0498))
+#define EMI_MSEL9 ((P_U32)(EMI_BASE+0x04A0))
+#define EMI_MSEL10 ((P_U32)(EMI_BASE+0x04A8))
+#define EMI_BMID0 ((P_U32)(EMI_BASE+0x04B0))
+#define EMI_BMID1 ((P_U32)(EMI_BASE+0x04B8))
+#define EMI_BMID2 ((P_U32)(EMI_BASE+0x04C0))
+#define EMI_BMID3 ((P_U32)(EMI_BASE+0x04C8))
+#define EMI_BMID4 ((P_U32)(EMI_BASE+0x04D0))
+#define EMI_BMID5 ((P_U32)(EMI_BASE+0x04D8))
+
+#define EMI_TTYPE1 ((P_U32)(EMI_BASE+0x0500))
+#define EMI_TTYPE2 ((P_U32)(EMI_BASE+0x0508))
+#define EMI_TTYPE3 ((P_U32)(EMI_BASE+0x0510))
+#define EMI_TTYPE4 ((P_U32)(EMI_BASE+0x0518))
+#define EMI_TTYPE5 ((P_U32)(EMI_BASE+0x0520))
+#define EMI_TTYPE6 ((P_U32)(EMI_BASE+0x0528))
+#define EMI_TTYPE7 ((P_U32)(EMI_BASE+0x0530))
+#define EMI_TTYPE8 ((P_U32)(EMI_BASE+0x0538))
+#define EMI_TTYPE9 ((P_U32)(EMI_BASE+0x0540))
+#define EMI_TTYPE10 ((P_U32)(EMI_BASE+0x0548))
+#define EMI_TTYPE11 ((P_U32)(EMI_BASE+0x0550))
+#define EMI_TTYPE12 ((P_U32)(EMI_BASE+0x0558))
+#define EMI_TTYPE13 ((P_U32)(EMI_BASE+0x0560))
+#define EMI_TTYPE14 ((P_U32)(EMI_BASE+0x0568))
+#define EMI_TTYPE15 ((P_U32)(EMI_BASE+0x0570))
+#define EMI_TTYPE16 ((P_U32)(EMI_BASE+0x0578))
+#define EMI_TTYPE17 ((P_U32)(EMI_BASE+0x0580))
+#define EMI_TTYPE18 ((P_U32)(EMI_BASE+0x0588))
+#define EMI_TTYPE19 ((P_U32)(EMI_BASE+0x0590))
+#define EMI_TTYPE20 ((P_U32)(EMI_BASE+0x0598))
+#define EMI_TTYPE21 ((P_U32)(EMI_BASE+0x05A0))
+
+/* EMI MBIST control registers*/
+#define EMI_MBISTA ((P_U32)(EMI_BASE+0x0600))
+#define EMI_MBISTB ((P_U32)(EMI_BASE+0x0608))
+#define EMI_MBISTC ((P_U32)(EMI_BASE+0x0610))
+#define EMI_MBISTD ((P_U32)(EMI_BASE+0x0618))
+#define EMI_MBISTE ((P_U32)(EMI_BASE+0x0620)) /* EMI MBIST status register */
+
+
+/* EMI Flow control register A */
+#define EMI_RFCA ((P_U32)(EMI_BASE+0x0630))
+#define EMI_RFCB ((P_U32)(EMI_BASE+0x0638))
+#define EMI_RFCC ((P_U32)(EMI_BASE+0x0640))
+#define EMI_RFCD ((P_U32)(EMI_BASE+0x0648))
+
+#endif /* TZ_EMI_REG_H */
diff --git a/src/bsp/trustzone/teeloader/mt2635/include/tz_init.h b/src/bsp/trustzone/teeloader/mt2635/include/tz_init.h
new file mode 100755
index 0000000..2e6cc13
--- /dev/null
+++ b/src/bsp/trustzone/teeloader/mt2635/include/tz_init.h
@@ -0,0 +1,84 @@
+/* Copyright Statement:
+ *
+ * This software/firmware and related documentation ("MediaTek Software") are
+ * protected under relevant copyright laws. The information contained herein is
+ * confidential and proprietary to MediaTek Inc. and/or its licensors. Without
+ * the prior written permission of MediaTek inc. and/or its licensors, any
+ * reproduction, modification, use or disclosure of MediaTek Software, and
+ * information contained herein, in whole or in part, shall be strictly
+ * prohibited.
+ *
+ * MediaTek Inc. (C) 2016. All rights reserved.
+ *
+ * BY OPENING THIS FILE, RECEIVER HEREBY UNEQUIVOCALLY ACKNOWLEDGES AND AGREES
+ * THAT THE SOFTWARE/FIRMWARE AND ITS DOCUMENTATIONS ("MEDIATEK SOFTWARE")
+ * RECEIVED FROM MEDIATEK AND/OR ITS REPRESENTATIVES ARE PROVIDED TO RECEIVER
+ * ON AN "AS-IS" BASIS ONLY. MEDIATEK EXPRESSLY DISCLAIMS ANY AND ALL
+ * WARRANTIES, EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE IMPLIED
+ * WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE OR
+ * NONINFRINGEMENT. NEITHER DOES MEDIATEK PROVIDE ANY WARRANTY WHATSOEVER WITH
+ * RESPECT TO THE SOFTWARE OF ANY THIRD PARTY WHICH MAY BE USED BY,
+ * INCORPORATED IN, OR SUPPLIED WITH THE MEDIATEK SOFTWARE, AND RECEIVER AGREES
+ * TO LOOK ONLY TO SUCH THIRD PARTY FOR ANY WARRANTY CLAIM RELATING THERETO.
+ * RECEIVER EXPRESSLY ACKNOWLEDGES THAT IT IS RECEIVER'S SOLE RESPONSIBILITY TO
+ * OBTAIN FROM ANY THIRD PARTY ALL PROPER LICENSES CONTAINED IN MEDIATEK
+ * SOFTWARE. MEDIATEK SHALL ALSO NOT BE RESPONSIBLE FOR ANY MEDIATEK SOFTWARE
+ * RELEASES MADE TO RECEIVER'S SPECIFICATION OR TO CONFORM TO A PARTICULAR
+ * STANDARD OR OPEN FORUM. RECEIVER'S SOLE AND EXCLUSIVE REMEDY AND MEDIATEK'S
+ * ENTIRE AND CUMULATIVE LIABILITY WITH RESPECT TO THE MEDIATEK SOFTWARE
+ * RELEASED HEREUNDER WILL BE, AT MEDIATEK'S OPTION, TO REVISE OR REPLACE THE
+ * MEDIATEK SOFTWARE AT ISSUE, OR REFUND ANY SOFTWARE LICENSE FEES OR SERVICE
+ * CHARGE PAID BY RECEIVER TO MEDIATEK FOR SUCH MEDIATEK SOFTWARE AT ISSUE.
+ *
+ * The following software/firmware and/or related documentation ("MediaTek
+ * Software") have been modified by MediaTek Inc. All revisions are subject to
+ * any receiver's applicable license agreements with MediaTek Inc.
+ */
+
+#ifndef TZ_INIT_H
+#define TZ_INIT_H
+
+
+#define ATF_BOOTCFG_MAGIC (0x4D415446) // String MATF in little-endian
+#define DEVINFO_SIZE 4
+
+#define TEE_BOOT_ARG_ADDR (ATF_BOOT_ARG_ADDR + 0x100)
+
+#define TEE_PARAMETER_BASE (ATF_BOOT_ARG_ADDR)
+#define TEE_PARAMETER_ADDR (TEE_BOOT_ARG_ADDR + 0x100)
+
+#if CFG_ATF_LOG_SUPPORT
+#define ATF_LOG_BUFFER_SIZE (0x40000)//256KB
+#define ATF_AEE_BUFFER_SIZE (0x4000)//16KB
+#else
+#define ATF_LOG_BUFFER_SIZE (0x0)//don't support ATF log
+#define ATF_AEE_BUFFER_SIZE (0x0)//don't support ATF log
+#endif
+
+typedef struct {
+ unsigned int atf_magic;
+ unsigned int tee_support;
+ unsigned int tee_entry;
+ unsigned int tee_boot_arg_addr;
+ unsigned int hwuid[4]; // HW Unique id for t-base used
+ unsigned int HRID[2]; // HW random id for t-base used
+ unsigned int atf_log_port;
+ unsigned int atf_log_baudrate;
+ unsigned int atf_log_buf_start;
+ unsigned int atf_log_buf_size;
+ unsigned int atf_irq_num;
+ unsigned int devinfo[DEVINFO_SIZE];
+ unsigned int atf_aee_debug_buf_start;
+ unsigned int atf_aee_debug_buf_size;
+#if CFG_TEE_SUPPORT
+ unsigned int tee_rpmb_size;
+#endif
+} atf_arg_t, *atf_arg_t_ptr;
+
+extern void tee_set_entry(unsigned int addr);
+extern void tee_set_hwuid(unsigned char *id, unsigned int size);
+void trustzone_pre_init(void);
+void trustzone_post_init(void);
+void trustzone_jump(unsigned int addr, unsigned int arg1, unsigned int arg2);
+
+#endif /* TZ_INIT_H */
diff --git a/src/bsp/trustzone/teeloader/mt2635/include/tz_mem.h b/src/bsp/trustzone/teeloader/mt2635/include/tz_mem.h
new file mode 100755
index 0000000..df71b23
--- /dev/null
+++ b/src/bsp/trustzone/teeloader/mt2635/include/tz_mem.h
@@ -0,0 +1,102 @@
+/* Copyright Statement:
+ *
+ * This software/firmware and related documentation ("MediaTek Software") are
+ * protected under relevant copyright laws. The information contained herein is
+ * confidential and proprietary to MediaTek Inc. and/or its licensors. Without
+ * the prior written permission of MediaTek inc. and/or its licensors, any
+ * reproduction, modification, use or disclosure of MediaTek Software, and
+ * information contained herein, in whole or in part, shall be strictly
+ * prohibited.
+ *
+ * MediaTek Inc. (C) 2016. All rights reserved.
+ *
+ * BY OPENING THIS FILE, RECEIVER HEREBY UNEQUIVOCALLY ACKNOWLEDGES AND AGREES
+ * THAT THE SOFTWARE/FIRMWARE AND ITS DOCUMENTATIONS ("MEDIATEK SOFTWARE")
+ * RECEIVED FROM MEDIATEK AND/OR ITS REPRESENTATIVES ARE PROVIDED TO RECEIVER
+ * ON AN "AS-IS" BASIS ONLY. MEDIATEK EXPRESSLY DISCLAIMS ANY AND ALL
+ * WARRANTIES, EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE IMPLIED
+ * WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE OR
+ * NONINFRINGEMENT. NEITHER DOES MEDIATEK PROVIDE ANY WARRANTY WHATSOEVER WITH
+ * RESPECT TO THE SOFTWARE OF ANY THIRD PARTY WHICH MAY BE USED BY,
+ * INCORPORATED IN, OR SUPPLIED WITH THE MEDIATEK SOFTWARE, AND RECEIVER AGREES
+ * TO LOOK ONLY TO SUCH THIRD PARTY FOR ANY WARRANTY CLAIM RELATING THERETO.
+ * RECEIVER EXPRESSLY ACKNOWLEDGES THAT IT IS RECEIVER'S SOLE RESPONSIBILITY TO
+ * OBTAIN FROM ANY THIRD PARTY ALL PROPER LICENSES CONTAINED IN MEDIATEK
+ * SOFTWARE. MEDIATEK SHALL ALSO NOT BE RESPONSIBLE FOR ANY MEDIATEK SOFTWARE
+ * RELEASES MADE TO RECEIVER'S SPECIFICATION OR TO CONFORM TO A PARTICULAR
+ * STANDARD OR OPEN FORUM. RECEIVER'S SOLE AND EXCLUSIVE REMEDY AND MEDIATEK'S
+ * ENTIRE AND CUMULATIVE LIABILITY WITH RESPECT TO THE MEDIATEK SOFTWARE
+ * RELEASED HEREUNDER WILL BE, AT MEDIATEK'S OPTION, TO REVISE OR REPLACE THE
+ * MEDIATEK SOFTWARE AT ISSUE, OR REFUND ANY SOFTWARE LICENSE FEES OR SERVICE
+ * CHARGE PAID BY RECEIVER TO MEDIATEK FOR SUCH MEDIATEK SOFTWARE AT ISSUE.
+ *
+ * The following software/firmware and/or related documentation ("MediaTek
+ * Software") have been modified by MediaTek Inc. All revisions are subject to
+ * any receiver's applicable license agreements with MediaTek Inc.
+ */
+
+#ifndef TZ_MEM_H
+#define TZ_MEM_H
+
+#include "tz_init.h"
+
+#define SRAM_BASE_ADDRESS 0x00100000
+#define SRAM_START_ADDR 0x00102140
+#define VECTOR_START (SRAM_START_ADDR + 0xBAC0)
+
+typedef struct tz_memory_t {
+ short next, previous;
+} tz_memory_t;
+
+#define FREE ((short)(0x0001))
+#define IS_FREE(x) ((x)->next & FREE)
+#define CLEAR_FREE(x) ((x)->next &= ~FREE)
+#define SET_FREE(x) ((x)->next |= FREE)
+#define FROM_ADDR(x) ((short)(ptrdiff_t)(x))
+#define TO_ADDR(x) ((tz_memory_t *)(SRAM_BASE_ADDRESS + ((x) & ~FREE)))
+
+/* SEC MEM magic */
+#define SEC_MEM_MAGIC (0x3C562817U)
+/* SEC MEM version */
+#define SEC_MEM_VERSION (0x00010000U)
+/* Tplay Table Size */
+#define SEC_MEM_TPLAY_TABLE_SIZE (0x1000)//4KB by default
+#define SEC_MEM_TPLAY_MEMORY_SIZE (0x200000)//2MB by default
+
+#define BL31 (0x43001000UL)
+#define BL31_SIZE (0x30000) //192KB by default
+#define BL33 (0x41E00000UL)
+
+#define ATF_BOOT_ARG_ADDR (0x00101000)
+
+#define TEE_SECURE_ISRAM_ADDR (0x0)
+#define TEE_SECURE_ISRAM_SIZE (0x0)
+
+#define TEE_BOOT_ARG_ADDR (ATF_BOOT_ARG_ADDR + 0x100)
+
+#define TEE_PARAMETER_BASE (ATF_BOOT_ARG_ADDR)
+#define TEE_PARAMETER_ADDR (TEE_BOOT_ARG_ADDR + 0x100)
+
+#if CFG_ATF_LOG_SUPPORT
+#define ATF_LOG_BUFFER_SIZE (0x40000)//256KB
+#define ATF_AEE_BUFFER_SIZE (0x4000)//16KB
+#else
+#define ATF_LOG_BUFFER_SIZE (0x0)//don't support ATF log
+#define ATF_AEE_BUFFER_SIZE (0x0)//don't support ATF log
+#endif
+
+typedef struct {
+ unsigned int magic; // Magic number
+ unsigned int version; // version
+ unsigned int svp_mem_start; // MM sec mem pool start addr.
+ unsigned int svp_mem_end; // MM sec mem pool end addr.
+ unsigned int tplay_table_start; //tplay handle-to-physical table start
+ unsigned int tplay_table_size; //tplay handle-to-physical table size
+ unsigned int tplay_mem_start; //tplay physcial memory start address for crypto operation
+ unsigned int tplay_mem_size; //tplay phsycial memory size for crypto operation
+ unsigned int secmem_obfuscation;//MM sec mem obfuscation or not
+ unsigned int msg_auth_key[8]; /* size of message auth key is 32bytes(256 bits) */
+ unsigned int rpmb_size; /* size of rpmb partition */
+ unsigned int emmc_rel_wr_sec_c; //emmc ext_csd[222]
+} sec_mem_arg_t;
+#endif /* TZ_MEM_H */
diff --git a/src/bsp/trustzone/teeloader/mt2635/include/tz_tbase.h b/src/bsp/trustzone/teeloader/mt2635/include/tz_tbase.h
new file mode 100644
index 0000000..67f8078
--- /dev/null
+++ b/src/bsp/trustzone/teeloader/mt2635/include/tz_tbase.h
@@ -0,0 +1,78 @@
+/* Copyright Statement:
+ *
+ * This software/firmware and related documentation ("MediaTek Software") are
+ * protected under relevant copyright laws. The information contained herein is
+ * confidential and proprietary to MediaTek Inc. and/or its licensors. Without
+ * the prior written permission of MediaTek inc. and/or its licensors, any
+ * reproduction, modification, use or disclosure of MediaTek Software, and
+ * information contained herein, in whole or in part, shall be strictly
+ * prohibited.
+ *
+ * MediaTek Inc. (C) 2016. All rights reserved.
+ *
+ * BY OPENING THIS FILE, RECEIVER HEREBY UNEQUIVOCALLY ACKNOWLEDGES AND AGREES
+ * THAT THE SOFTWARE/FIRMWARE AND ITS DOCUMENTATIONS ("MEDIATEK SOFTWARE")
+ * RECEIVED FROM MEDIATEK AND/OR ITS REPRESENTATIVES ARE PROVIDED TO RECEIVER
+ * ON AN "AS-IS" BASIS ONLY. MEDIATEK EXPRESSLY DISCLAIMS ANY AND ALL
+ * WARRANTIES, EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE IMPLIED
+ * WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE OR
+ * NONINFRINGEMENT. NEITHER DOES MEDIATEK PROVIDE ANY WARRANTY WHATSOEVER WITH
+ * RESPECT TO THE SOFTWARE OF ANY THIRD PARTY WHICH MAY BE USED BY,
+ * INCORPORATED IN, OR SUPPLIED WITH THE MEDIATEK SOFTWARE, AND RECEIVER AGREES
+ * TO LOOK ONLY TO SUCH THIRD PARTY FOR ANY WARRANTY CLAIM RELATING THERETO.
+ * RECEIVER EXPRESSLY ACKNOWLEDGES THAT IT IS RECEIVER'S SOLE RESPONSIBILITY TO
+ * OBTAIN FROM ANY THIRD PARTY ALL PROPER LICENSES CONTAINED IN MEDIATEK
+ * SOFTWARE. MEDIATEK SHALL ALSO NOT BE RESPONSIBLE FOR ANY MEDIATEK SOFTWARE
+ * RELEASES MADE TO RECEIVER'S SPECIFICATION OR TO CONFORM TO A PARTICULAR
+ * STANDARD OR OPEN FORUM. RECEIVER'S SOLE AND EXCLUSIVE REMEDY AND MEDIATEK'S
+ * ENTIRE AND CUMULATIVE LIABILITY WITH RESPECT TO THE MEDIATEK SOFTWARE
+ * RELEASED HEREUNDER WILL BE, AT MEDIATEK'S OPTION, TO REVISE OR REPLACE THE
+ * MEDIATEK SOFTWARE AT ISSUE, OR REFUND ANY SOFTWARE LICENSE FEES OR SERVICE
+ * CHARGE PAID BY RECEIVER TO MEDIATEK FOR SUCH MEDIATEK SOFTWARE AT ISSUE.
+ *
+ * The following software/firmware and/or related documentation ("MediaTek
+ * Software") have been modified by MediaTek Inc. All revisions are subject to
+ * any receiver's applicable license agreements with MediaTek Inc.
+ */
+
+#ifndef TZ_TBASE_H
+#define TZ_TBASE_H
+
+#include "typedefs.h"
+
+/* Tbase Magic For Interface */
+#define TBASE_BOOTCFG_MAGIC (0x434d4254) // String TBMC in little-endian
+
+/* TEE version */
+#define TEE_ARGUMENT_VERSION (0x00010000U)
+
+typedef struct {
+ u32 magic; // magic value from information
+ u32 length; // size of struct in bytes.
+ u64 version; // Version of structure
+ u64 dRamBase; // NonSecure DRAM start address
+ u64 dRamSize; // NonSecure DRAM size
+ u64 secDRamBase; // Secure DRAM start address
+ u64 secDRamSize; // Secure DRAM size
+ u64 secIRamBase; // Secure IRAM base
+ u64 secIRamSize; // Secure IRam size
+ u64 conf_mair_el3;// MAIR_EL3 for memory attributes sharing
+ u32 RFU1;
+ u32 MSMPteCount; // Number of MMU entries for MSM
+ u64 MSMBase; // MMU entries for MSM
+ u64 gic_distributor_base;
+ u64 gic_cpuinterface_base;
+ u32 gic_version;
+ u32 total_number_spi;
+ u32 ssiq_number;
+ u32 RFU2;
+ u64 flags;
+}tee_arg_t, *tee_arg_t_ptr;
+
+/**************************************************************************
+ * EXPORTED FUNCTIONS
+ **************************************************************************/
+void tbase_secmem_param_prepare(u32 param_addr, u32 tee_entry, u32 tbase_sec_dram_size, u32 tee_smem_size);
+void tbase_boot_param_prepare(u32 param_addr, u32 tee_entry, u64 tbase_sec_dram_size, u64 dram_base, u64 dram_size);
+
+#endif /* TZ_TBASE_H */
diff --git a/src/bsp/trustzone/teeloader/mt2635/include/uart.h b/src/bsp/trustzone/teeloader/mt2635/include/uart.h
new file mode 100644
index 0000000..1647749
--- /dev/null
+++ b/src/bsp/trustzone/teeloader/mt2635/include/uart.h
@@ -0,0 +1,60 @@
+/* Copyright Statement:
+ *
+ * This software/firmware and related documentation ("MediaTek Software") are
+ * protected under relevant copyright laws. The information contained herein is
+ * confidential and proprietary to MediaTek Inc. and/or its licensors. Without
+ * the prior written permission of MediaTek inc. and/or its licensors, any
+ * reproduction, modification, use or disclosure of MediaTek Software, and
+ * information contained herein, in whole or in part, shall be strictly
+ * prohibited.
+ *
+ * MediaTek Inc. (C) 2016. All rights reserved.
+ *
+ * BY OPENING THIS FILE, RECEIVER HEREBY UNEQUIVOCALLY ACKNOWLEDGES AND AGREES
+ * THAT THE SOFTWARE/FIRMWARE AND ITS DOCUMENTATIONS ("MEDIATEK SOFTWARE")
+ * RECEIVED FROM MEDIATEK AND/OR ITS REPRESENTATIVES ARE PROVIDED TO RECEIVER
+ * ON AN "AS-IS" BASIS ONLY. MEDIATEK EXPRESSLY DISCLAIMS ANY AND ALL
+ * WARRANTIES, EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE IMPLIED
+ * WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE OR
+ * NONINFRINGEMENT. NEITHER DOES MEDIATEK PROVIDE ANY WARRANTY WHATSOEVER WITH
+ * RESPECT TO THE SOFTWARE OF ANY THIRD PARTY WHICH MAY BE USED BY,
+ * INCORPORATED IN, OR SUPPLIED WITH THE MEDIATEK SOFTWARE, AND RECEIVER AGREES
+ * TO LOOK ONLY TO SUCH THIRD PARTY FOR ANY WARRANTY CLAIM RELATING THERETO.
+ * RECEIVER EXPRESSLY ACKNOWLEDGES THAT IT IS RECEIVER'S SOLE RESPONSIBILITY TO
+ * OBTAIN FROM ANY THIRD PARTY ALL PROPER LICENSES CONTAINED IN MEDIATEK
+ * SOFTWARE. MEDIATEK SHALL ALSO NOT BE RESPONSIBLE FOR ANY MEDIATEK SOFTWARE
+ * RELEASES MADE TO RECEIVER'S SPECIFICATION OR TO CONFORM TO A PARTICULAR
+ * STANDARD OR OPEN FORUM. RECEIVER'S SOLE AND EXCLUSIVE REMEDY AND MEDIATEK'S
+ * ENTIRE AND CUMULATIVE LIABILITY WITH RESPECT TO THE MEDIATEK SOFTWARE
+ * RELEASED HEREUNDER WILL BE, AT MEDIATEK'S OPTION, TO REVISE OR REPLACE THE
+ * MEDIATEK SOFTWARE AT ISSUE, OR REFUND ANY SOFTWARE LICENSE FEES OR SERVICE
+ * CHARGE PAID BY RECEIVER TO MEDIATEK FOR SUCH MEDIATEK SOFTWARE AT ISSUE.
+ *
+ * The following software/firmware and/or related documentation ("MediaTek
+ * Software") have been modified by MediaTek Inc. All revisions are subject to
+ * any receiver's applicable license agreements with MediaTek Inc.
+ */
+
+#ifndef __UART_H__
+#define __UART_H__
+
+typedef unsigned int uint32_t;
+typedef unsigned long uintptr_t;
+
+#define REG32(addr) ((volatile uint32_t *)(uintptr_t)(addr))
+
+#define writel(v, a) (*REG32(a) = (v))
+#define readl(a) (*REG32(a))
+
+#define UART_BASE(uart) (uart)
+#define UART_LSR(uart) (UART_BASE(uart)+0x14)
+#define UART_LSR_THRE (1 << 5)
+#define UART_THR(uart) (UART_BASE(uart)+0x0) /* Write only */
+
+#define IO_PHYS 0x10000000
+#define UART1_BASE (IO_PHYS + 0x01002000)
+
+int uart_putc(char c);
+
+#endif /* __UART_H__ */
+