[Feature]add MT2731_MP2_MR2_SVN388 baseline version
Change-Id: Ief04314834b31e27effab435d3ca8ba33b499059
diff --git a/src/bsp/trustzone/teeloader/mt2735/include/device_apc.h b/src/bsp/trustzone/teeloader/mt2735/include/device_apc.h
new file mode 100644
index 0000000..263d492
--- /dev/null
+++ b/src/bsp/trustzone/teeloader/mt2735/include/device_apc.h
@@ -0,0 +1,409 @@
+/* Copyright Statement:
+ *
+ * This software/firmware and related documentation ("MediaTek Software") are
+ * protected under relevant copyright laws. The information contained herein is
+ * confidential and proprietary to MediaTek Inc. and/or its licensors. Without
+ * the prior written permission of MediaTek inc. and/or its licensors, any
+ * reproduction, modification, use or disclosure of MediaTek Software, and
+ * information contained herein, in whole or in part, shall be strictly
+ * prohibited.
+ *
+ * MediaTek Inc. (C) 2017. All rights reserved.
+ *
+ * BY OPENING THIS FILE, RECEIVER HEREBY UNEQUIVOCALLY ACKNOWLEDGES AND AGREES
+ * THAT THE SOFTWARE/FIRMWARE AND ITS DOCUMENTATIONS ("MEDIATEK SOFTWARE")
+ * RECEIVED FROM MEDIATEK AND/OR ITS REPRESENTATIVES ARE PROVIDED TO RECEIVER
+ * ON AN "AS-IS" BASIS ONLY. MEDIATEK EXPRESSLY DISCLAIMS ANY AND ALL
+ * WARRANTIES, EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE IMPLIED
+ * WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE OR
+ * NONINFRINGEMENT. NEITHER DOES MEDIATEK PROVIDE ANY WARRANTY WHATSOEVER WITH
+ * RESPECT TO THE SOFTWARE OF ANY THIRD PARTY WHICH MAY BE USED BY,
+ * INCORPORATED IN, OR SUPPLIED WITH THE MEDIATEK SOFTWARE, AND RECEIVER AGREES
+ * TO LOOK ONLY TO SUCH THIRD PARTY FOR ANY WARRANTY CLAIM RELATING THERETO.
+ * RECEIVER EXPRESSLY ACKNOWLEDGES THAT IT IS RECEIVER'S SOLE RESPONSIBILITY TO
+ * OBTAIN FROM ANY THIRD PARTY ALL PROPER LICENSES CONTAINED IN MEDIATEK
+ * SOFTWARE. MEDIATEK SHALL ALSO NOT BE RESPONSIBLE FOR ANY MEDIATEK SOFTWARE
+ * RELEASES MADE TO RECEIVER'S SPECIFICATION OR TO CONFORM TO A PARTICULAR
+ * STANDARD OR OPEN FORUM. RECEIVER'S SOLE AND EXCLUSIVE REMEDY AND MEDIATEK'S
+ * ENTIRE AND CUMULATIVE LIABILITY WITH RESPECT TO THE MEDIATEK SOFTWARE
+ * RELEASED HEREUNDER WILL BE, AT MEDIATEK'S OPTION, TO REVISE OR REPLACE THE
+ * MEDIATEK SOFTWARE AT ISSUE, OR REFUND ANY SOFTWARE LICENSE FEES OR SERVICE
+ * CHARGE PAID BY RECEIVER TO MEDIATEK FOR SUCH MEDIATEK SOFTWARE AT ISSUE.
+ *
+ * The following software/firmware and/or related documentation ("MediaTek
+ * Software") have been modified by MediaTek Inc. All revisions are subject to
+ * any receiver's applicable license agreements with MediaTek Inc.
+ */
+
+#ifndef DEVICE_APC_H
+#define DEVICE_APC_H
+
+#include "typedefs.h"
+
+/* #define DEVAPC_UT */
+
+/******************************************************************************
+ * SIP CMD DEFINITION
+ ******************************************************************************/
+#define SIP_APC_MODULE_SET 0x1
+#define SIP_APC_MM2ND_SET 0x2
+#define SIP_APC_MASTER_SET 0x3
+
+/******************************************************************************
+ * FUNCTION DEFINITION
+ ******************************************************************************/
+void tz_apc_common_init(void);
+void tz_apc_common_postinit(void);
+void devapc_init(void);
+int handle_sramrom_vio(uint64_t *vio_sta, uint64_t *vio_addr);
+unsigned int devapc_perm_get(int, int, int);
+uint64_t sip_tee_apc_request(uint32_t cmd, uint32_t x1, uint32_t x2, uint32_t x3);
+
+/******************************************************************************
+ * STRUCTURE DEFINITION
+ ******************************************************************************/
+enum E_TRANSACTION {
+ NON_SECURE_TRANSACTION = 0,
+ SECURE_TRANSACTION,
+ E_TRANSACTION_RESERVRD = 0x7FFFFFFF /* force enum to use 32 bits */
+};
+
+enum APC_ATTR {
+ E_NO_PROTECTION = 0,
+ E_SEC_RW_ONLY,
+ E_SEC_RW_NS_R,
+ E_FORBIDDEN,
+ E_APC_ATTR_RESERVRD = 0x7FFFFFFF /* force enum to use 32 bits */
+};
+
+enum E_MASK_DOM {
+ E_DOMAIN_0 = 0,
+ E_DOMAIN_1,
+ E_DOMAIN_2,
+ E_DOMAIN_3,
+ E_DOMAIN_4,
+ E_DOMAIN_5,
+ E_DOMAIN_6,
+ E_DOMAIN_7,
+ E_DOMAIN_8,
+ E_DOMAIN_9,
+ E_DOMAIN_10,
+ E_DOMAIN_11,
+ E_DOMAIN_12,
+ E_DOMAIN_13,
+ E_DOMAIN_14,
+ E_DOMAIN_15,
+ E_MASK_DOM_RESERVRD = 0x7FFFFFFF /* force enum to use 32 bits */
+};
+
+enum DAPC_MASTER_TYPE {
+ E_DAPC_MASTER = 0,
+ E_DAPC_INFRACFG_AO_MASTER,
+ E_DAPC_MASTER_TYPE_RESERVRD = 0x7FFFFFFF /* force enum to use 32 bits */
+};
+
+enum DAPC_SLAVE_TYPE {
+ E_DAPC_INFRA_SLAVE = 0,
+ E_DAPC_SRAMROM_SLAVE,
+ E_DAPC_MD_SLAVE,
+ E_DAPC_OTHERS_SLAVE,
+ E_DAPC_SLAVE_TYPE_RESERVRD = 0x7FFFFFFF /* force enum to use 32 bits */
+};
+
+enum DAPC_PD_SLAVE_TYPE {
+ E_DAPC_PD_INFRA_MM_MD_SLAVE = 0,
+ E_DAPC_PD_SLAVE_TYPE_RESERVRD = 0x7FFFFFFF /* force enum to use 32 bits */
+};
+
+struct INFRA_PERI_DEVICE_INFO {
+ unsigned char d0_permission;
+ unsigned char d1_permission;
+ unsigned char d9_permission;
+ unsigned char d11_permission;
+};
+
+#define DAPC_INFRA_ATTR(DEV_NAME, PERM_ATTR1, PERM_ATTR2, PERM_ATTR3, PERM_ATTR4) \
+{(unsigned char)PERM_ATTR1, (unsigned char)PERM_ATTR2, (unsigned char)PERM_ATTR3, (unsigned char)PERM_ATTR4}
+
+struct MD_DEVICE_INFO {
+ unsigned char d0_permission;
+};
+
+#define DAPC_MD_ATTR(DEV_NAME, PERM_ATTR1) {(unsigned char)PERM_ATTR1}
+
+enum DEVAPC_ERR_STATUS {
+ DEVAPC_OK = 0x0,
+
+ DEVAPC_ERR_GENERIC = 0x1000,
+ DEVAPC_ERR_INVALID_CMD = 0x1001,
+ DEVAPC_ERR_SLAVE_TYPE_NOT_SUPPORTED = 0x1002,
+ DEVAPC_ERR_SLAVE_IDX_NOT_SUPPORTED = 0x1003,
+ DEVAPC_ERR_DOMAIN_NOT_SUPPORTED = 0x1004,
+ DEVAPC_ERR_PERMISSION_NOT_SUPPORTED = 0x1005,
+ DEVAPC_ERR_OUT_OF_BOUNDARY = 0x1006,
+};
+
+/******************************************************************************
+ * UTILITY DEFINITION
+ ******************************************************************************/
+
+#define devapc_writel(VAL, REG) __raw_writel(VAL, REG)
+#define devapc_readl(REG) __raw_readl(REG)
+
+static void tz_set_field(volatile u32 *reg, u32 field, u32 val)
+{
+ u32 tv = (u32)*reg;
+ tv &= ~(field);
+ tv |= val;
+ *reg = tv;
+}
+
+#define reg_set_field(r, f, v) tz_set_field((volatile u32 *)r, f, v)
+
+/******************************************************************************
+ *
+ * REGISTER ADDRESS DEFINITION
+ *
+ ******************************************************************************/
+#define DEVAPC_AO_INFRA_BASE 0x1001C000
+#define DEVAPC_PD_INFRA_BASE 0x10207000
+
+#define SRAMROM_BASE 0x10214000
+#define INFRACFG_AO_BASE 0x10001000
+#define SECURITY_AO_BASE 0x1001A000
+
+/* #define BLOCKED_REG_BASE 0x10400000 */
+
+/*******************************************************************************************/
+/* Device APC AO */
+#define DEVAPC_SYS0_D0_APC_0 ((volatile unsigned int *)(DEVAPC_AO_INFRA_BASE+0x0000))
+#define DEVAPC_SYS1_D0_APC_0 ((volatile unsigned int *)(DEVAPC_AO_INFRA_BASE+0x1000))
+#define DEVAPC_SYS2_D0_APC_0 ((volatile unsigned int *)(DEVAPC_AO_INFRA_BASE+0x2000))
+
+#define DEVAPC_INFRA_MAS_DOM_0 ((volatile unsigned int *)(DEVAPC_AO_INFRA_BASE+0x0900))
+#define DEVAPC_INFRA_MAS_DOM_1 ((volatile unsigned int *)(DEVAPC_AO_INFRA_BASE+0x0904))
+#define DEVAPC_INFRA_MAS_DOM_2 ((volatile unsigned int *)(DEVAPC_AO_INFRA_BASE+0x0908))
+#define DEVAPC_INFRA_MAS_DOM_3 ((volatile unsigned int *)(DEVAPC_AO_INFRA_BASE+0x090C))
+#define DEVAPC_INFRA_MAS_DOM_4 ((volatile unsigned int *)(DEVAPC_AO_INFRA_BASE+0x0910))
+
+#define DEVAPC_INFRA_MAS_SEC_0 ((volatile unsigned int *)(DEVAPC_AO_INFRA_BASE+0x0A00))
+
+#define DEVAPC_INFRA_APC_CON ((volatile unsigned int *)(DEVAPC_AO_INFRA_BASE+0x0F00))
+
+#define DEVAPC_SRAMROM_DOM_REMAP_0_0 ((volatile unsigned int *)(DEVAPC_AO_INFRA_BASE+0x0800))
+#define DEVAPC_SRAMROM_DOM_REMAP_0_1 ((volatile unsigned int *)(DEVAPC_AO_INFRA_BASE+0x0804))
+#define DEVAPC_SRAMROM_DOM_REMAP_1_0 ((volatile unsigned int *)(DEVAPC_AO_INFRA_BASE+0x0810))
+
+/* MD is combined into DEVAPC_AO SYS2 */
+
+/*******************************************************************************************/
+/* Device APC PD */
+#define DEVAPC_PD_INFRA_VIO_MASK(index) \
+ ((uintptr_t)(DEVAPC_PD_INFRA_BASE + 0x4 * index))
+
+#define DEVAPC_PD_INFRA_VIO_STA(index) \
+ ((uintptr_t)(DEVAPC_PD_INFRA_BASE + 0x400 + 0x4 * index))
+
+#define DEVAPC_PD_INFRA_VIO_DBG0 ((volatile unsigned int *)(DEVAPC_PD_INFRA_BASE+0x0900))
+#define DEVAPC_PD_INFRA_VIO_DBG1 ((volatile unsigned int *)(DEVAPC_PD_INFRA_BASE+0x0904))
+#define DEVAPC_PD_INFRA_VIO_DBG2 ((volatile unsigned int *)(DEVAPC_PD_INFRA_BASE+0x0908))
+
+#define DEVAPC_PD_INFRA_APC_CON ((volatile unsigned int *)(DEVAPC_PD_INFRA_BASE+0x0F00))
+
+#define DEVAPC_PD_INFRA_VIO_SHIFT_STA ((volatile unsigned int *)(DEVAPC_PD_INFRA_BASE+0x0F10))
+#define DEVAPC_PD_INFRA_VIO_SHIFT_SEL ((volatile unsigned int *)(DEVAPC_PD_INFRA_BASE+0x0F14))
+#define DEVAPC_PD_INFRA_VIO_SHIFT_CON ((volatile unsigned int *)(DEVAPC_PD_INFRA_BASE+0x0F20))
+
+/*******************************************************************************************/
+
+#define INFRA_AO_SEC_CON ((volatile unsigned int *)(INFRACFG_AO_BASE+0x0F80))
+
+/* INFRACFG AO */
+#define INFRA_AO_SEC_CG_CON0 ((volatile unsigned int *)(INFRACFG_AO_BASE+0x0F84))
+#define INFRA_AO_SEC_CG_CON1 ((volatile unsigned int *)(INFRACFG_AO_BASE+0x0F88))
+#define INFRA_AO_SEC_CG_CON2 ((volatile unsigned int *)(INFRACFG_AO_BASE+0x0F9C))
+#define INFRA_AO_SEC_CG_CON3 ((volatile unsigned int *)(INFRACFG_AO_BASE+0x0FA4))
+
+#define INFRACFG_AO_DEVAPC_CON ((volatile unsigned int *)(INFRACFG_AO_BASE+0x0710))
+#define INFRACFG_AO_DEVAPC_MAS_DOM ((volatile unsigned int *)(INFRACFG_AO_BASE+0x0714))
+#define INFRACFG_AO_DEVAPC_MAS_SEC ((volatile unsigned int *)(INFRACFG_AO_BASE+0x0718))
+
+/* PMS(MD devapc) */
+/* #define AP2MD1_PMS_CTRL_EN ((unsigned int *)0x100018AC) */
+/* #define AP2MD1_PMS_CTRL_EN_LOCK ((unsigned int *)0x100018A8) */
+
+/*******************************************************************************************/
+
+#define SRAMROM_SEC_VIO_STA ((volatile unsigned int *)(SRAMROM_BASE+0x010))
+#define SRAMROM_SEC_VIO_ADDR ((volatile unsigned int *)(SRAMROM_BASE+0x014))
+#define SRAMROM_SEC_VIO_CLR ((volatile unsigned int *)(SRAMROM_BASE+0x018))
+
+#define SRAMROM_ROM_SEC_VIO_STA ((volatile unsigned int *)(SRAMROM_BASE+0x110))
+#define SRAMROM_ROM_SEC_VIO_ADDR ((volatile unsigned int *)(SRAMROM_BASE+0x114))
+#define SRAMROM_ROM_SEC_VIO_CLR ((volatile unsigned int *)(SRAMROM_BASE+0x118))
+
+
+#define SRAMROM_SEC_CTRL ((volatile unsigned int *)(SECURITY_AO_BASE+0x010))
+#define SRAMROM_SEC_CTRL2 ((volatile unsigned int *)(SECURITY_AO_BASE+0x018))
+#define SRAMROM_SEC_CTRL5 ((volatile unsigned int *)(SECURITY_AO_BASE+0x024))
+#define SRAMROM_SEC_CTRL6 ((volatile unsigned int *)(SECURITY_AO_BASE+0x028))
+#define SRAMROM_SEC_ADDR ((volatile unsigned int *)(SECURITY_AO_BASE+0x050))
+#define SRAMROM_SEC_ADDR1 ((volatile unsigned int *)(SECURITY_AO_BASE+0x054))
+#define SRAMROM_SEC_ADDR2 ((volatile unsigned int *)(SECURITY_AO_BASE+0x058))
+
+#define SRAMROM_SEC_ADDR_SEC0_SEC_EN (28)
+#define SRAMROM_SEC_ADDR_SEC1_SEC_EN (29)
+#define SRAMROM_SEC_ADDR_SEC2_SEC_EN (30)
+#define SRAMROM_SEC_ADDR_SEC3_SEC_EN (31)
+
+/* SEC means region (0~3) */
+#define SRAMROM_SEC_CTRL_SEC0_DOM0_SHIFT (0)
+#define SRAMROM_SEC_CTRL_SEC0_DOM1_SHIFT (3)
+#define SRAMROM_SEC_CTRL_SEC0_DOM2_SHIFT (6)
+#define SRAMROM_SEC_CTRL_SEC0_DOM3_SHIFT (9)
+#define SRAMROM_SEC_CTRL_SEC1_DOM0_SHIFT (16)
+#define SRAMROM_SEC_CTRL_SEC1_DOM1_SHIFT (19)
+#define SRAMROM_SEC_CTRL_SEC1_DOM2_SHIFT (22)
+#define SRAMROM_SEC_CTRL_SEC1_DOM3_SHIFT (25)
+
+#define SRAMROM_SEC_CTRL2_SEC0_DOM4_SHIFT (0)
+#define SRAMROM_SEC_CTRL2_SEC0_DOM5_SHIFT (3)
+#define SRAMROM_SEC_CTRL2_SEC0_DOM6_SHIFT (6)
+#define SRAMROM_SEC_CTRL2_SEC0_DOM7_SHIFT (9)
+#define SRAMROM_SEC_CTRL2_SEC1_DOM4_SHIFT (16)
+#define SRAMROM_SEC_CTRL2_SEC1_DOM5_SHIFT (19)
+#define SRAMROM_SEC_CTRL2_SEC1_DOM6_SHIFT (22)
+#define SRAMROM_SEC_CTRL2_SEC1_DOM7_SHIFT (25)
+
+#define SRAMROM_SEC_CTRL5_SEC2_DOM0_SHIFT (0)
+#define SRAMROM_SEC_CTRL5_SEC2_DOM1_SHIFT (3)
+#define SRAMROM_SEC_CTRL5_SEC2_DOM2_SHIFT (6)
+#define SRAMROM_SEC_CTRL5_SEC2_DOM3_SHIFT (9)
+#define SRAMROM_SEC_CTRL5_SEC3_DOM0_SHIFT (16)
+#define SRAMROM_SEC_CTRL5_SEC3_DOM1_SHIFT (19)
+#define SRAMROM_SEC_CTRL5_SEC3_DOM2_SHIFT (22)
+#define SRAMROM_SEC_CTRL5_SEC3_DOM3_SHIFT (25)
+
+#define SRAMROM_SEC_CTRL6_SEC2_DOM4_SHIFT (0)
+#define SRAMROM_SEC_CTRL6_SEC2_DOM5_SHIFT (3)
+#define SRAMROM_SEC_CTRL6_SEC2_DOM6_SHIFT (6)
+#define SRAMROM_SEC_CTRL6_SEC2_DOM7_SHIFT (9)
+#define SRAMROM_SEC_CTRL6_SEC3_DOM4_SHIFT (16)
+#define SRAMROM_SEC_CTRL6_SEC3_DOM5_SHIFT (19)
+#define SRAMROM_SEC_CTRL6_SEC3_DOM6_SHIFT (22)
+#define SRAMROM_SEC_CTRL6_SEC3_DOM7_SHIFT (25)
+
+
+#define SRAMROM_SEC_CTRL_SEC0_DOM0_MASK (0x7 << SRAMROM_SEC_CTRL_SEC0_DOM0_SHIFT)
+#define SRAMROM_SEC_CTRL_SEC0_DOM1_MASK (0x7 << SRAMROM_SEC_CTRL_SEC0_DOM1_SHIFT)
+#define SRAMROM_SEC_CTRL_SEC0_DOM2_MASK (0x7 << SRAMROM_SEC_CTRL_SEC0_DOM2_SHIFT)
+#define SRAMROM_SEC_CTRL_SEC0_DOM3_MASK (0x7 << SRAMROM_SEC_CTRL_SEC0_DOM3_SHIFT)
+#define SRAMROM_SEC_CTRL_SEC1_DOM0_MASK (0x7 << SRAMROM_SEC_CTRL_SEC1_DOM0_SHIFT)
+#define SRAMROM_SEC_CTRL_SEC1_DOM1_MASK (0x7 << SRAMROM_SEC_CTRL_SEC1_DOM1_SHIFT)
+#define SRAMROM_SEC_CTRL_SEC1_DOM2_MASK (0x7 << SRAMROM_SEC_CTRL_SEC1_DOM2_SHIFT)
+#define SRAMROM_SEC_CTRL_SEC1_DOM3_MASK (0x7 << SRAMROM_SEC_CTRL_SEC1_DOM3_SHIFT)
+
+#define SRAMROM_SEC_CTRL2_SEC0_DOM4_MASK (0x7 << SRAMROM_SEC_CTRL2_SEC0_DOM4_SHIFT)
+#define SRAMROM_SEC_CTRL2_SEC0_DOM5_MASK (0x7 << SRAMROM_SEC_CTRL2_SEC0_DOM5_SHIFT)
+#define SRAMROM_SEC_CTRL2_SEC0_DOM6_MASK (0x7 << SRAMROM_SEC_CTRL2_SEC0_DOM6_SHIFT)
+#define SRAMROM_SEC_CTRL2_SEC0_DOM7_MASK (0x7 << SRAMROM_SEC_CTRL2_SEC0_DOM7_SHIFT)
+#define SRAMROM_SEC_CTRL2_SEC1_DOM4_MASK (0x7 << SRAMROM_SEC_CTRL2_SEC1_DOM4_SHIFT)
+#define SRAMROM_SEC_CTRL2_SEC1_DOM5_MASK (0x7 << SRAMROM_SEC_CTRL2_SEC1_DOM5_SHIFT)
+#define SRAMROM_SEC_CTRL2_SEC1_DOM6_MASK (0x7 << SRAMROM_SEC_CTRL2_SEC1_DOM6_SHIFT)
+#define SRAMROM_SEC_CTRL2_SEC1_DOM7_MASK (0x7 << SRAMROM_SEC_CTRL2_SEC1_DOM7_SHIFT)
+
+#define SRAMROM_SEC_CTRL5_SEC2_DOM0_MASK (0x7 << SRAMROM_SEC_CTRL5_SEC2_DOM0_SHIFT)
+#define SRAMROM_SEC_CTRL5_SEC2_DOM1_MASK (0x7 << SRAMROM_SEC_CTRL5_SEC2_DOM1_SHIFT)
+#define SRAMROM_SEC_CTRL5_SEC2_DOM2_MASK (0x7 << SRAMROM_SEC_CTRL5_SEC2_DOM2_SHIFT)
+#define SRAMROM_SEC_CTRL5_SEC2_DOM3_MASK (0x7 << SRAMROM_SEC_CTRL5_SEC2_DOM3_SHIFT)
+#define SRAMROM_SEC_CTRL5_SEC3_DOM0_MASK (0x7 << SRAMROM_SEC_CTRL5_SEC3_DOM0_SHIFT)
+#define SRAMROM_SEC_CTRL5_SEC3_DOM1_MASK (0x7 << SRAMROM_SEC_CTRL5_SEC3_DOM1_SHIFT)
+#define SRAMROM_SEC_CTRL5_SEC3_DOM2_MASK (0x7 << SRAMROM_SEC_CTRL5_SEC3_DOM2_SHIFT)
+#define SRAMROM_SEC_CTRL5_SEC3_DOM3_MASK (0x7 << SRAMROM_SEC_CTRL5_SEC3_DOM3_SHIFT)
+
+#define SRAMROM_SEC_CTRL6_SEC2_DOM4_MASK (0x7 << SRAMROM_SEC_CTRL6_SEC2_DOM4_SHIFT)
+#define SRAMROM_SEC_CTRL6_SEC2_DOM5_MASK (0x7 << SRAMROM_SEC_CTRL6_SEC2_DOM5_SHIFT)
+#define SRAMROM_SEC_CTRL6_SEC2_DOM6_MASK (0x7 << SRAMROM_SEC_CTRL6_SEC2_DOM6_SHIFT)
+#define SRAMROM_SEC_CTRL6_SEC2_DOM7_MASK (0x7 << SRAMROM_SEC_CTRL6_SEC2_DOM7_SHIFT)
+#define SRAMROM_SEC_CTRL6_SEC3_DOM4_MASK (0x7 << SRAMROM_SEC_CTRL6_SEC3_DOM4_SHIFT)
+#define SRAMROM_SEC_CTRL6_SEC3_DOM5_MASK (0x7 << SRAMROM_SEC_CTRL6_SEC3_DOM5_SHIFT)
+#define SRAMROM_SEC_CTRL6_SEC3_DOM6_MASK (0x7 << SRAMROM_SEC_CTRL6_SEC3_DOM6_SHIFT)
+#define SRAMROM_SEC_CTRL6_SEC3_DOM7_MASK (0x7 << SRAMROM_SEC_CTRL6_SEC3_DOM7_SHIFT)
+
+#define PERMIT_S_RW_NS_RW (0x0)
+#define PERMIT_S_RW_NS_BLOCK (0x1)
+#define PERMIT_S_RW_NS_RO (0x2)
+#define PERMIT_S_RW_NS_WO (0x3)
+#define PERMIT_S_RO_NS_RO (0x4)
+#define PERMIT_S_BLOCK_NS_BLOCK (0x7)
+
+
+/* Set the region 0 size of the on-chip SRAM and the region 1 size will be (192KB - size_of_region_0) */
+#define TZ_SRAMROM_SET_REGION_0_SIZE_KB(size) (devapc_writel(((size & 0xff) << 10), SRAMROM_SEC_ADDR))
+
+/******************************************************************************
+ * Variable DEFINITION
+ ******************************************************************************/
+/* If you config register INFRA_AO_SEC_CON(address 0x10000F80) bit[4] = 1,
+ * the domain comes from device_apc. By default this register is 0,
+ * the domain comes form MD1
+ */
+#define FORCE_MD1_SIGNAL_FROM_DAPC ((0x1) << 4)
+
+/* PROTECT BIT FOR INFRACFG AO */
+#define SEJ_CG_PROTECT_BIT ((0x1) << 5)
+#define TRNG_CG_PROTECT_BIT ((0x1) << 9)
+#define DEVAPC_CG_PROTECT_BIT ((0x1) << 20)
+
+#define SRAM_SEC_VIO_BIT (0x1)
+#define ROM_SEC_VIO_BIT (0x1)
+
+/*******************************************************************************************/
+/* Master domain/secure bit definition */
+#define MASTER_SPM_DOM_INDEX (18)
+#define MASTER_SPM_SEC_INDEX (19)
+#define MASTER_INFRA_MAX_INDEX (19)
+
+/* Below master should be set in INFRACFG_AO */
+#define MASTER_INFRACFG_AO_MAX_INDEX 5
+#define MASTER_APMCU_INDEX 0
+#define MASTER_MD_INDEX 1
+#define MASTER_HSM_INDEX 2
+#define MASTER_USB_INDEX 3
+#define MASTER_SSUSB_INDEX 4
+#define MASTER_MSDC0_INDEX 5
+
+/*******************************************************************************************/
+/* Master domain remap */
+#define MASTER_DOM_RMP_INIT (0xFFFFFFFF)
+#define SRAMROM_RMP_AP (0x7 << 0) // Infra domain 0
+
+#define MD_RMP_AP (0x3 << 0) // Infra domain 0
+
+/*******************************************************************************************/
+#define MOD_NO_IN_1_DEVAPC 16
+#define MAS_DOM_NO_IN_1_DEVAPC 4
+
+/* infra/sramrom/MD support maximum domain num */
+#define DEVAPC_INFRA_DOM_MAX 16
+#define DEVAPC_SRAMROM_DOM_MAX 8
+#define DEVAPC_MD_DOM_MAX 4
+
+/* infra/sramrom/MD APC number per domain */
+#define DEVAPC_INFRA_APC_NUM 10
+#define DEVAPC_SRAMROM_APC_NUM 1
+#define DEVAPC_MD_APC_NUM 3
+
+/* infra/sramrom/MD support maximum ctrl index */
+#define SLAVE_INFRA_MAX_INDEX 146
+#define SLAVE_SRAMROM_MAX_INDEX 0
+#define SLAVE_MD_MAX_INDEX 35
+
+#define VIO_MASK_STA_NUM 13
+#define SRAMROM_VIO_INDEX 355
+#define DEVAPC_CTRL_SRAMROM_INDEX 0
+/* devapc can only handle vio index 0 ~ sramrom */
+#define VIOLATION_MAX_INDEX SRAMROM_VIO_INDEX
+#define VIOLATION_TRIGGERED 1
+
+#endif /* DEVICE_APC_H */
diff --git a/src/bsp/trustzone/teeloader/mt2735/include/hacc_export.h b/src/bsp/trustzone/teeloader/mt2735/include/hacc_export.h
new file mode 100644
index 0000000..fc3e2d6
--- /dev/null
+++ b/src/bsp/trustzone/teeloader/mt2735/include/hacc_export.h
@@ -0,0 +1,52 @@
+/* Copyright Statement:
+*
+* This software/firmware and related documentation ("MediaTek Software") are
+* protected under relevant copyright laws. The information contained herein
+* is confidential and proprietary to MediaTek Inc. and/or its licensors.
+* Without the prior written permission of MediaTek inc. and/or its licensors,
+* any reproduction, modification, use or disclosure of MediaTek Software,
+* and information contained herein, in whole or in part, shall be strictly prohibited.
+*
+* MediaTek Inc. (C) 2017. All rights reserved.
+*
+* BY OPENING THIS FILE, RECEIVER HEREBY UNEQUIVOCALLY ACKNOWLEDGES AND AGREES
+* THAT THE SOFTWARE/FIRMWARE AND ITS DOCUMENTATIONS ("MEDIATEK SOFTWARE")
+* RECEIVED FROM MEDIATEK AND/OR ITS REPRESENTATIVES ARE PROVIDED TO RECEIVER ON
+* AN "AS-IS" BASIS ONLY. MEDIATEK EXPRESSLY DISCLAIMS ANY AND ALL WARRANTIES,
+* EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE IMPLIED WARRANTIES OF
+* MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE OR NONINFRINGEMENT.
+* NEITHER DOES MEDIATEK PROVIDE ANY WARRANTY WHATSOEVER WITH RESPECT TO THE
+* SOFTWARE OF ANY THIRD PARTY WHICH MAY BE USED BY, INCORPORATED IN, OR
+* SUPPLIED WITH THE MEDIATEK SOFTWARE, AND RECEIVER AGREES TO LOOK ONLY TO SUCH
+* THIRD PARTY FOR ANY WARRANTY CLAIM RELATING THERETO. RECEIVER EXPRESSLY ACKNOWLEDGES
+* THAT IT IS RECEIVER'S SOLE RESPONSIBILITY TO OBTAIN FROM ANY THIRD PARTY ALL PROPER LICENSES
+* CONTAINED IN MEDIATEK SOFTWARE. MEDIATEK SHALL ALSO NOT BE RESPONSIBLE FOR ANY MEDIATEK
+* SOFTWARE RELEASES MADE TO RECEIVER'S SPECIFICATION OR TO CONFORM TO A PARTICULAR
+* STANDARD OR OPEN FORUM. RECEIVER'S SOLE AND EXCLUSIVE REMEDY AND MEDIATEK'S ENTIRE AND
+* CUMULATIVE LIABILITY WITH RESPECT TO THE MEDIATEK SOFTWARE RELEASED HEREUNDER WILL BE,
+* AT MEDIATEK'S OPTION, TO REVISE OR REPLACE THE MEDIATEK SOFTWARE AT ISSUE,
+* OR REFUND ANY SOFTWARE LICENSE FEES OR SERVICE CHARGE PAID BY RECEIVER TO
+* MEDIATEK FOR SUCH MEDIATEK SOFTWARE AT ISSUE.
+*
+* The following software/firmware and/or related documentation ("MediaTek Software")
+* have been modified by MediaTek Inc. All revisions are subject to any receiver\'s
+* applicable license agreements with MediaTek Inc.
+*/
+
+#ifndef HACC_EXPORT_H
+#define HACC_EXPORT_H
+
+/******************************************************************************
+ * EXPORT FUNCTION
+ ******************************************************************************/
+extern int seclib_get_msg_auth_key(unsigned char *key, unsigned int key_size);
+
+/* @function: seclib_get_data_key
+ * @in: input buffer
+ * @size: divisible by 16
+ * @out: output buffer, could re-use input buffer
+ * @user: crypto parameter, should be 1 or 2
+ */
+extern int seclib_get_data_key(unsigned char *in, unsigned int size,
+ unsigned char *out, unsigned short user);
+#endif /* HACC_EXPORT_H */
diff --git a/src/bsp/trustzone/teeloader/mt2735/include/platform.h b/src/bsp/trustzone/teeloader/mt2735/include/platform.h
new file mode 100644
index 0000000..4f9c524
--- /dev/null
+++ b/src/bsp/trustzone/teeloader/mt2735/include/platform.h
@@ -0,0 +1,60 @@
+/* Copyright Statement:
+ *
+ * This software/firmware and related documentation ("MediaTek Software") are
+ * protected under relevant copyright laws. The information contained herein is
+ * confidential and proprietary to MediaTek Inc. and/or its licensors. Without
+ * the prior written permission of MediaTek inc. and/or its licensors, any
+ * reproduction, modification, use or disclosure of MediaTek Software, and
+ * information contained herein, in whole or in part, shall be strictly
+ * prohibited.
+ *
+ * MediaTek Inc. (C) 2017. All rights reserved.
+ *
+ * BY OPENING THIS FILE, RECEIVER HEREBY UNEQUIVOCALLY ACKNOWLEDGES AND AGREES
+ * THAT THE SOFTWARE/FIRMWARE AND ITS DOCUMENTATIONS ("MEDIATEK SOFTWARE")
+ * RECEIVED FROM MEDIATEK AND/OR ITS REPRESENTATIVES ARE PROVIDED TO RECEIVER
+ * ON AN "AS-IS" BASIS ONLY. MEDIATEK EXPRESSLY DISCLAIMS ANY AND ALL
+ * WARRANTIES, EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE IMPLIED
+ * WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE OR
+ * NONINFRINGEMENT. NEITHER DOES MEDIATEK PROVIDE ANY WARRANTY WHATSOEVER WITH
+ * RESPECT TO THE SOFTWARE OF ANY THIRD PARTY WHICH MAY BE USED BY,
+ * INCORPORATED IN, OR SUPPLIED WITH THE MEDIATEK SOFTWARE, AND RECEIVER AGREES
+ * TO LOOK ONLY TO SUCH THIRD PARTY FOR ANY WARRANTY CLAIM RELATING THERETO.
+ * RECEIVER EXPRESSLY ACKNOWLEDGES THAT IT IS RECEIVER'S SOLE RESPONSIBILITY TO
+ * OBTAIN FROM ANY THIRD PARTY ALL PROPER LICENSES CONTAINED IN MEDIATEK
+ * SOFTWARE. MEDIATEK SHALL ALSO NOT BE RESPONSIBLE FOR ANY MEDIATEK SOFTWARE
+ * RELEASES MADE TO RECEIVER'S SPECIFICATION OR TO CONFORM TO A PARTICULAR
+ * STANDARD OR OPEN FORUM. RECEIVER'S SOLE AND EXCLUSIVE REMEDY AND MEDIATEK'S
+ * ENTIRE AND CUMULATIVE LIABILITY WITH RESPECT TO THE MEDIATEK SOFTWARE
+ * RELEASED HEREUNDER WILL BE, AT MEDIATEK'S OPTION, TO REVISE OR REPLACE THE
+ * MEDIATEK SOFTWARE AT ISSUE, OR REFUND ANY SOFTWARE LICENSE FEES OR SERVICE
+ * CHARGE PAID BY RECEIVER TO MEDIATEK FOR SUCH MEDIATEK SOFTWARE AT ISSUE.
+ *
+ * The following software/firmware and/or related documentation ("MediaTek
+ * Software") have been modified by MediaTek Inc. All revisions are subject to
+ * any receiver's applicable license agreements with MediaTek Inc.
+ */
+
+#ifndef PLATFORM_H
+#define PLATFORM_H
+
+#define CFG_DRAM_ADDR (0x40000000UL)
+#define CFG_PLATFORM_DRAM_SIZE (0x40000000UL)
+
+#if CFG_TEE_SUPPORT
+#ifdef CFG_TEE_TRUSTED_APP_HEAP_SIZE
+#define CFG_TEE_CORE_SIZE (0x500000UL + CFG_TEE_TRUSTED_APP_HEAP_SIZE)
+#else
+#define CFG_TEE_CORE_SIZE (0x500000UL)
+#endif
+
+#if CFG_TRUSTONIC_TEE_SUPPORT
+#define CFG_MIN_TEE_DRAM_SIZE (0x600000UL)
+#define CFG_MAX_TEE_DRAM_SIZE (0xE00000UL) /* TEE max DRAM size is 14MB */
+#else
+#define CFG_MIN_TEE_DRAM_SIZE (0UL)
+#define CFG_MAX_TEE_DRAM_SIZE (0UL) /* TEE max DRAM size is 0 if TEE is not enabled */
+#endif
+#endif
+
+#endif /* PLATFORM_H */
diff --git a/src/bsp/trustzone/teeloader/mt2735/include/print.h b/src/bsp/trustzone/teeloader/mt2735/include/print.h
new file mode 100644
index 0000000..176ca38
--- /dev/null
+++ b/src/bsp/trustzone/teeloader/mt2735/include/print.h
@@ -0,0 +1,43 @@
+/* Copyright Statement:
+ *
+ * This software/firmware and related documentation ("MediaTek Software") are
+ * protected under relevant copyright laws. The information contained herein is
+ * confidential and proprietary to MediaTek Inc. and/or its licensors. Without
+ * the prior written permission of MediaTek inc. and/or its licensors, any
+ * reproduction, modification, use or disclosure of MediaTek Software, and
+ * information contained herein, in whole or in part, shall be strictly
+ * prohibited.
+ *
+ * MediaTek Inc. (C) 2017. All rights reserved.
+ *
+ * BY OPENING THIS FILE, RECEIVER HEREBY UNEQUIVOCALLY ACKNOWLEDGES AND AGREES
+ * THAT THE SOFTWARE/FIRMWARE AND ITS DOCUMENTATIONS ("MEDIATEK SOFTWARE")
+ * RECEIVED FROM MEDIATEK AND/OR ITS REPRESENTATIVES ARE PROVIDED TO RECEIVER
+ * ON AN "AS-IS" BASIS ONLY. MEDIATEK EXPRESSLY DISCLAIMS ANY AND ALL
+ * WARRANTIES, EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE IMPLIED
+ * WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE OR
+ * NONINFRINGEMENT. NEITHER DOES MEDIATEK PROVIDE ANY WARRANTY WHATSOEVER WITH
+ * RESPECT TO THE SOFTWARE OF ANY THIRD PARTY WHICH MAY BE USED BY,
+ * INCORPORATED IN, OR SUPPLIED WITH THE MEDIATEK SOFTWARE, AND RECEIVER AGREES
+ * TO LOOK ONLY TO SUCH THIRD PARTY FOR ANY WARRANTY CLAIM RELATING THERETO.
+ * RECEIVER EXPRESSLY ACKNOWLEDGES THAT IT IS RECEIVER'S SOLE RESPONSIBILITY TO
+ * OBTAIN FROM ANY THIRD PARTY ALL PROPER LICENSES CONTAINED IN MEDIATEK
+ * SOFTWARE. MEDIATEK SHALL ALSO NOT BE RESPONSIBLE FOR ANY MEDIATEK SOFTWARE
+ * RELEASES MADE TO RECEIVER'S SPECIFICATION OR TO CONFORM TO A PARTICULAR
+ * STANDARD OR OPEN FORUM. RECEIVER'S SOLE AND EXCLUSIVE REMEDY AND MEDIATEK'S
+ * ENTIRE AND CUMULATIVE LIABILITY WITH RESPECT TO THE MEDIATEK SOFTWARE
+ * RELEASED HEREUNDER WILL BE, AT MEDIATEK'S OPTION, TO REVISE OR REPLACE THE
+ * MEDIATEK SOFTWARE AT ISSUE, OR REFUND ANY SOFTWARE LICENSE FEES OR SERVICE
+ * CHARGE PAID BY RECEIVER TO MEDIATEK FOR SUCH MEDIATEK SOFTWARE AT ISSUE.
+ *
+ * The following software/firmware and/or related documentation ("MediaTek
+ * Software") have been modified by MediaTek Inc. All revisions are subject to
+ * any receiver's applicable license agreements with MediaTek Inc.
+ */
+
+#ifndef PRINT_H
+#define PRINT_H
+
+extern void print(char *fmt, ...);
+
+#endif /* PRINT_H */
diff --git a/src/bsp/trustzone/teeloader/mt2735/include/seclib.h b/src/bsp/trustzone/teeloader/mt2735/include/seclib.h
new file mode 100644
index 0000000..fab3935
--- /dev/null
+++ b/src/bsp/trustzone/teeloader/mt2735/include/seclib.h
@@ -0,0 +1,52 @@
+/* Copyright Statement:
+*
+* This software/firmware and related documentation ("MediaTek Software") are
+* protected under relevant copyright laws. The information contained herein
+* is confidential and proprietary to MediaTek Inc. and/or its licensors.
+* Without the prior written permission of MediaTek inc. and/or its licensors,
+* any reproduction, modification, use or disclosure of MediaTek Software,
+* and information contained herein, in whole or in part, shall be strictly prohibited.
+*
+* MediaTek Inc. (C) 2017. All rights reserved.
+*
+* BY OPENING THIS FILE, RECEIVER HEREBY UNEQUIVOCALLY ACKNOWLEDGES AND AGREES
+* THAT THE SOFTWARE/FIRMWARE AND ITS DOCUMENTATIONS ("MEDIATEK SOFTWARE")
+* RECEIVED FROM MEDIATEK AND/OR ITS REPRESENTATIVES ARE PROVIDED TO RECEIVER ON
+* AN "AS-IS" BASIS ONLY. MEDIATEK EXPRESSLY DISCLAIMS ANY AND ALL WARRANTIES,
+* EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE IMPLIED WARRANTIES OF
+* MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE OR NONINFRINGEMENT.
+* NEITHER DOES MEDIATEK PROVIDE ANY WARRANTY WHATSOEVER WITH RESPECT TO THE
+* SOFTWARE OF ANY THIRD PARTY WHICH MAY BE USED BY, INCORPORATED IN, OR
+* SUPPLIED WITH THE MEDIATEK SOFTWARE, AND RECEIVER AGREES TO LOOK ONLY TO SUCH
+* THIRD PARTY FOR ANY WARRANTY CLAIM RELATING THERETO. RECEIVER EXPRESSLY ACKNOWLEDGES
+* THAT IT IS RECEIVER'S SOLE RESPONSIBILITY TO OBTAIN FROM ANY THIRD PARTY ALL PROPER LICENSES
+* CONTAINED IN MEDIATEK SOFTWARE. MEDIATEK SHALL ALSO NOT BE RESPONSIBLE FOR ANY MEDIATEK
+* SOFTWARE RELEASES MADE TO RECEIVER'S SPECIFICATION OR TO CONFORM TO A PARTICULAR
+* STANDARD OR OPEN FORUM. RECEIVER'S SOLE AND EXCLUSIVE REMEDY AND MEDIATEK'S ENTIRE AND
+* CUMULATIVE LIABILITY WITH RESPECT TO THE MEDIATEK SOFTWARE RELEASED HEREUNDER WILL BE,
+* AT MEDIATEK'S OPTION, TO REVISE OR REPLACE THE MEDIATEK SOFTWARE AT ISSUE,
+* OR REFUND ANY SOFTWARE LICENSE FEES OR SERVICE CHARGE PAID BY RECEIVER TO
+* MEDIATEK FOR SUCH MEDIATEK SOFTWARE AT ISSUE.
+*
+* The following software/firmware and/or related documentation ("MediaTek Software")
+* have been modified by MediaTek Inc. All revisions are subject to any receiver\'s
+* applicable license agreements with MediaTek Inc.
+*/
+
+#ifndef SEC_LIB_H
+#define SEC_LIB_H
+
+#include "typedefs.h"
+
+/******************************************************************************
+ * CONSTANT DEFINITIONS
+ ******************************************************************************/
+#define INCORRECT_INDEX (0xFFFFFFFFUL) /* incorrect register index */
+
+/******************************************************************************
+ * EXPORT FUNCTION
+ ******************************************************************************/
+int seclib_get_hrid_key(u32 *key, u32 key_size);
+int seclib_get_hwid_key(u8 *key, u32 key_size);
+#endif /* SEC_LIB_H*/
+
diff --git a/src/bsp/trustzone/teeloader/mt2735/include/string.h b/src/bsp/trustzone/teeloader/mt2735/include/string.h
new file mode 100644
index 0000000..bf18bea
--- /dev/null
+++ b/src/bsp/trustzone/teeloader/mt2735/include/string.h
@@ -0,0 +1,57 @@
+/* Copyright Statement:
+ *
+ * This software/firmware and related documentation ("MediaTek Software") are
+ * protected under relevant copyright laws. The information contained herein is
+ * confidential and proprietary to MediaTek Inc. and/or its licensors. Without
+ * the prior written permission of MediaTek inc. and/or its licensors, any
+ * reproduction, modification, use or disclosure of MediaTek Software, and
+ * information contained herein, in whole or in part, shall be strictly
+ * prohibited.
+ *
+ * MediaTek Inc. (C) 2017. All rights reserved.
+ *
+ * BY OPENING THIS FILE, RECEIVER HEREBY UNEQUIVOCALLY ACKNOWLEDGES AND AGREES
+ * THAT THE SOFTWARE/FIRMWARE AND ITS DOCUMENTATIONS ("MEDIATEK SOFTWARE")
+ * RECEIVED FROM MEDIATEK AND/OR ITS REPRESENTATIVES ARE PROVIDED TO RECEIVER
+ * ON AN "AS-IS" BASIS ONLY. MEDIATEK EXPRESSLY DISCLAIMS ANY AND ALL
+ * WARRANTIES, EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE IMPLIED
+ * WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE OR
+ * NONINFRINGEMENT. NEITHER DOES MEDIATEK PROVIDE ANY WARRANTY WHATSOEVER WITH
+ * RESPECT TO THE SOFTWARE OF ANY THIRD PARTY WHICH MAY BE USED BY,
+ * INCORPORATED IN, OR SUPPLIED WITH THE MEDIATEK SOFTWARE, AND RECEIVER AGREES
+ * TO LOOK ONLY TO SUCH THIRD PARTY FOR ANY WARRANTY CLAIM RELATING THERETO.
+ * RECEIVER EXPRESSLY ACKNOWLEDGES THAT IT IS RECEIVER'S SOLE RESPONSIBILITY TO
+ * OBTAIN FROM ANY THIRD PARTY ALL PROPER LICENSES CONTAINED IN MEDIATEK
+ * SOFTWARE. MEDIATEK SHALL ALSO NOT BE RESPONSIBLE FOR ANY MEDIATEK SOFTWARE
+ * RELEASES MADE TO RECEIVER'S SPECIFICATION OR TO CONFORM TO A PARTICULAR
+ * STANDARD OR OPEN FORUM. RECEIVER'S SOLE AND EXCLUSIVE REMEDY AND MEDIATEK'S
+ * ENTIRE AND CUMULATIVE LIABILITY WITH RESPECT TO THE MEDIATEK SOFTWARE
+ * RELEASED HEREUNDER WILL BE, AT MEDIATEK'S OPTION, TO REVISE OR REPLACE THE
+ * MEDIATEK SOFTWARE AT ISSUE, OR REFUND ANY SOFTWARE LICENSE FEES OR SERVICE
+ * CHARGE PAID BY RECEIVER TO MEDIATEK FOR SUCH MEDIATEK SOFTWARE AT ISSUE.
+ *
+ * The following software/firmware and/or related documentation ("MediaTek
+ * Software") have been modified by MediaTek Inc. All revisions are subject to
+ * any receiver's applicable license agreements with MediaTek Inc.
+ */
+
+#ifndef STRING_H
+#define STRING_H
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+extern int strlen(const char *s);
+extern int strcmp(const char *cs, const char *ct);
+extern int strncmp(const char *cs, const char *ct, int count);
+extern void *memset(void *s, int c, int count);
+extern void *memcpy(void *dest, const void *src, int count);
+extern int memcmp(const void *cs, const void *ct, int count);
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif /* STRING_H */
+
diff --git a/src/bsp/trustzone/teeloader/mt2735/include/typedefs.h b/src/bsp/trustzone/teeloader/mt2735/include/typedefs.h
new file mode 100644
index 0000000..5305aef
--- /dev/null
+++ b/src/bsp/trustzone/teeloader/mt2735/include/typedefs.h
@@ -0,0 +1,184 @@
+/* Copyright Statement:
+ *
+ * This software/firmware and related documentation ("MediaTek Software") are
+ * protected under relevant copyright laws. The information contained herein is
+ * confidential and proprietary to MediaTek Inc. and/or its licensors. Without
+ * the prior written permission of MediaTek inc. and/or its licensors, any
+ * reproduction, modification, use or disclosure of MediaTek Software, and
+ * information contained herein, in whole or in part, shall be strictly
+ * prohibited.
+ *
+ * MediaTek Inc. (C) 2017. All rights reserved.
+ *
+ * BY OPENING THIS FILE, RECEIVER HEREBY UNEQUIVOCALLY ACKNOWLEDGES AND AGREES
+ * THAT THE SOFTWARE/FIRMWARE AND ITS DOCUMENTATIONS ("MEDIATEK SOFTWARE")
+ * RECEIVED FROM MEDIATEK AND/OR ITS REPRESENTATIVES ARE PROVIDED TO RECEIVER
+ * ON AN "AS-IS" BASIS ONLY. MEDIATEK EXPRESSLY DISCLAIMS ANY AND ALL
+ * WARRANTIES, EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE IMPLIED
+ * WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE OR
+ * NONINFRINGEMENT. NEITHER DOES MEDIATEK PROVIDE ANY WARRANTY WHATSOEVER WITH
+ * RESPECT TO THE SOFTWARE OF ANY THIRD PARTY WHICH MAY BE USED BY,
+ * INCORPORATED IN, OR SUPPLIED WITH THE MEDIATEK SOFTWARE, AND RECEIVER AGREES
+ * TO LOOK ONLY TO SUCH THIRD PARTY FOR ANY WARRANTY CLAIM RELATING THERETO.
+ * RECEIVER EXPRESSLY ACKNOWLEDGES THAT IT IS RECEIVER'S SOLE RESPONSIBILITY TO
+ * OBTAIN FROM ANY THIRD PARTY ALL PROPER LICENSES CONTAINED IN MEDIATEK
+ * SOFTWARE. MEDIATEK SHALL ALSO NOT BE RESPONSIBLE FOR ANY MEDIATEK SOFTWARE
+ * RELEASES MADE TO RECEIVER'S SPECIFICATION OR TO CONFORM TO A PARTICULAR
+ * STANDARD OR OPEN FORUM. RECEIVER'S SOLE AND EXCLUSIVE REMEDY AND MEDIATEK'S
+ * ENTIRE AND CUMULATIVE LIABILITY WITH RESPECT TO THE MEDIATEK SOFTWARE
+ * RELEASED HEREUNDER WILL BE, AT MEDIATEK'S OPTION, TO REVISE OR REPLACE THE
+ * MEDIATEK SOFTWARE AT ISSUE, OR REFUND ANY SOFTWARE LICENSE FEES OR SERVICE
+ * CHARGE PAID BY RECEIVER TO MEDIATEK FOR SUCH MEDIATEK SOFTWARE AT ISSUE.
+ *
+ * The following software/firmware and/or related documentation ("MediaTek
+ * Software") have been modified by MediaTek Inc. All revisions are subject to
+ * any receiver's applicable license agreements with MediaTek Inc.
+ */
+
+#ifndef TYPEDEFS_H
+#define TYPEDEFS_H
+
+typedef unsigned long ulong;
+typedef unsigned char uchar;
+typedef unsigned int uint;
+typedef signed char int8;
+typedef signed short int16;
+typedef signed long int32;
+typedef signed int intx;
+typedef unsigned char uint8;
+typedef unsigned short uint16;
+typedef unsigned long uint32;
+typedef unsigned int uintx;
+
+typedef volatile unsigned char *P_U8;
+typedef volatile signed char *P_S8;
+typedef volatile unsigned short *P_U16;
+typedef volatile signed short *P_S16;
+typedef volatile unsigned int *P_U32;
+typedef volatile signed int *P_S32;
+typedef unsigned long long *P_U64;
+typedef signed long long *P_S64;
+
+typedef unsigned char u8;
+typedef signed char s8;
+typedef unsigned short u16;
+typedef signed short s16;
+typedef unsigned int u32;
+typedef signed int s32;
+typedef unsigned long long u64;
+typedef signed long long s64;
+
+//------------------------------------------------------------------
+typedef unsigned char UINT8;
+typedef unsigned short UINT16;
+typedef unsigned int UINT32;
+typedef unsigned short USHORT;
+typedef signed char INT8;
+typedef signed short INT16;
+typedef signed int INT32;
+typedef signed int DWORD;
+typedef void VOID;
+typedef unsigned char BYTE;
+typedef float FLOAT;
+
+typedef char *LPCSTR;
+typedef short *LPWSTR;
+
+//------------------------------------------------------------------
+typedef char __s8;
+typedef unsigned char __u8;
+typedef short __s16;
+typedef unsigned short __u16;
+typedef int __s32;
+typedef unsigned int __u32;
+typedef long long __s64;
+typedef unsigned long long __u64;
+typedef signed char s8;
+typedef unsigned char u8;
+typedef signed short s16;
+typedef unsigned short u16;
+typedef signed int s32;
+typedef unsigned int u32;
+typedef signed long long s64;
+typedef unsigned long long u64;
+
+typedef unsigned long uintptr_t;
+typedef u64 uint64_t;
+typedef u32 uint32_t;
+typedef u32 size_t;
+typedef u8 uint8_t;
+
+//------------------------------------------------------------------
+#ifndef FALSE
+#define FALSE (0U)
+#endif
+#ifndef TRUE
+#define TRUE (1U)
+#endif
+
+#ifndef NULL
+#define NULL (0U)
+#endif
+
+/*==== EXPORTED MACRO ===================================================*/
+#define READ_REGISTER_UINT32(reg) \
+ (*(volatile UINT32 * const)(reg))
+
+#define WRITE_REGISTER_UINT32(reg, val) \
+ (*(volatile UINT32 * const)(reg)) = (val)
+
+#define READ_REGISTER_UINT16(reg) \
+ (*(volatile UINT16 * const)(reg))
+
+#define WRITE_REGISTER_UINT16(reg, val) \
+ (*(volatile UINT16 * const)(reg)) = (val)
+
+#define READ_REGISTER_UINT8(reg) \
+ (*(volatile UINT8 * const)(reg))
+
+#define WRITE_REGISTER_UINT8(reg, val) \
+ (*(volatile UINT8 * const)(reg)) = (val)
+
+#define INREG8(x) READ_REGISTER_UINT8((UINT8*)(x))
+#define OUTREG8(x, y) WRITE_REGISTER_UINT8((UINT8*)(x), (UINT8)(y))
+#define SETREG8(x, y) OUTREG8(x, INREG8(x)|(y))
+#define CLRREG8(x, y) OUTREG8(x, INREG8(x)&~(y))
+#define MASKREG8(x, y, z) OUTREG8(x, (INREG8(x)&~(y))|(z))
+
+#define INREG16(x) READ_REGISTER_UINT16((UINT16*)(x))
+#define OUTREG16(x, y) WRITE_REGISTER_UINT16((UINT16*)(x),(UINT16)(y))
+#define SETREG16(x, y) OUTREG16(x, INREG16(x)|(y))
+#define CLRREG16(x, y) OUTREG16(x, INREG16(x)&~(y))
+#define MASKREG16(x, y, z) OUTREG16(x, (INREG16(x)&~(y))|(z))
+
+#define INREG32(x) READ_REGISTER_UINT32((UINT32*)(x))
+#define OUTREG32(x, y) WRITE_REGISTER_UINT32((UINT32*)(x), (UINT32)(y))
+#define SETREG32(x, y) OUTREG32(x, INREG32(x)|(y))
+#define CLRREG32(x, y) OUTREG32(x, INREG32(x)&~(y))
+#define MASKREG32(x, y, z) OUTREG32(x, (INREG32(x)&~(y))|(z))
+
+#define DRV_Reg8(addr) INREG8(addr)
+#define DRV_WriteReg8(addr, data) OUTREG8(addr, data)
+#define DRV_SetReg8(addr, data) SETREG8(addr, data)
+#define DRV_ClrReg8(addr, data) CLRREG8(addr, data)
+
+#define DRV_Reg16(addr) INREG16(addr)
+#define DRV_WriteReg16(addr, data) OUTREG16(addr, data)
+#define DRV_SetReg16(addr, data) SETREG16(addr, data)
+#define DRV_ClrReg16(addr, data) CLRREG16(addr, data)
+
+#define DRV_Reg32(addr) INREG32(addr)
+#define DRV_WriteReg32(addr, data) OUTREG32(addr, data)
+#define DRV_SetReg32(addr, data) SETREG32(addr, data)
+#define DRV_ClrReg32(addr, data) CLRREG32(addr, data)
+
+#define __raw_readb(REG) DRV_Reg8(REG)
+#define __raw_readw(REG) DRV_Reg16(REG)
+#define __raw_readl(REG) DRV_Reg32(REG)
+#define __raw_writeb(VAL, REG) DRV_WriteReg8(REG,VAL)
+#define __raw_writew(VAL, REG) DRV_WriteReg16(REG,VAL)
+#define __raw_writel(VAL, REG) DRV_WriteReg32(REG,VAL)
+
+#define printf print
+
+#endif /* __TYPEDEFS_H__ */
diff --git a/src/bsp/trustzone/teeloader/mt2735/include/tz_emi_mpu.h b/src/bsp/trustzone/teeloader/mt2735/include/tz_emi_mpu.h
new file mode 100644
index 0000000..bf3deaa
--- /dev/null
+++ b/src/bsp/trustzone/teeloader/mt2735/include/tz_emi_mpu.h
@@ -0,0 +1,65 @@
+/* Copyright Statement:
+ *
+ * This software/firmware and related documentation ("MediaTek Software") are
+ * protected under relevant copyright laws. The information contained herein is
+ * confidential and proprietary to MediaTek Inc. and/or its licensors. Without
+ * the prior written permission of MediaTek inc. and/or its licensors, any
+ * reproduction, modification, use or disclosure of MediaTek Software, and
+ * information contained herein, in whole or in part, shall be strictly
+ * prohibited.
+ *
+ * MediaTek Inc. (C) 2017 All rights reserved.
+ *
+ * BY OPENING THIS FILE, RECEIVER HEREBY UNEQUIVOCALLY ACKNOWLEDGES AND AGREES
+ * THAT THE SOFTWARE/FIRMWARE AND ITS DOCUMENTATIONS ("MEDIATEK SOFTWARE")
+ * RECEIVED FROM MEDIATEK AND/OR ITS REPRESENTATIVES ARE PROVIDED TO RECEIVER
+ * ON AN "AS-IS" BASIS ONLY. MEDIATEK EXPRESSLY DISCLAIMS ANY AND ALL
+ * WARRANTIES, EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE IMPLIED
+ * WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE OR
+ * NONINFRINGEMENT. NEITHER DOES MEDIATEK PROVIDE ANY WARRANTY WHATSOEVER WITH
+ * RESPECT TO THE SOFTWARE OF ANY THIRD PARTY WHICH MAY BE USED BY,
+ * INCORPORATED IN, OR SUPPLIED WITH THE MEDIATEK SOFTWARE, AND RECEIVER AGREES
+ * TO LOOK ONLY TO SUCH THIRD PARTY FOR ANY WARRANTY CLAIM RELATING THERETO.
+ * RECEIVER EXPRESSLY ACKNOWLEDGES THAT IT IS RECEIVER'S SOLE RESPONSIBILITY TO
+ * OBTAIN FROM ANY THIRD PARTY ALL PROPER LICENSES CONTAINED IN MEDIATEK
+ * SOFTWARE. MEDIATEK SHALL ALSO NOT BE RESPONSIBLE FOR ANY MEDIATEK SOFTWARE
+ * RELEASES MADE TO RECEIVER'S SPECIFICATION OR TO CONFORM TO A PARTICULAR
+ * STANDARD OR OPEN FORUM. RECEIVER'S SOLE AND EXCLUSIVE REMEDY AND MEDIATEK'S
+ * ENTIRE AND CUMULATIVE LIABILITY WITH RESPECT TO THE MEDIATEK SOFTWARE
+ * RELEASED HEREUNDER WILL BE, AT MEDIATEK'S OPTION, TO REVISE OR REPLACE THE
+ * MEDIATEK SOFTWARE AT ISSUE, OR REFUND ANY SOFTWARE LICENSE FEES OR SERVICE
+ * CHARGE PAID BY RECEIVER TO MEDIATEK FOR SUCH MEDIATEK SOFTWARE AT ISSUE.
+ *
+ * The following software/firmware and/or related documentation ("MediaTek
+ * Software") have been modified by MediaTek Inc. All revisions are subject to
+ * any receiver's applicable license agreements with MediaTek Inc.
+ */
+
+#ifndef TZ_EMI_MPU_H
+#define TZ_EMI_MPU_H
+
+#define EMI_PHY_OFFSET (0x40000000UL)
+#define EMI_MPU_ALIGNMENT (0x10000UL)
+#define PERIAXI_BUS_CTL3 (0x10003208UL)
+#define PERISYS_4G_SUPPORT (0x1 << 11)
+
+
+typedef enum
+{
+ TZ_MPU_SEC_RW_NSEC_RW = 0, /* read and write for both secure and non-secure access */
+ TZ_MPU_SEC_RW_NSEC_DENY = 1, /* read and write for secure access */
+ TZ_MPU_SEC_RW_NSEC_RO = 2, /* read and write for secure access and read only for non-secure access */
+ TZ_MPU_SEC_RW_NSEC_WO = 3, /* read and write for secure access and write only for non-secure access */
+ TZ_MPU_SEC_RO_NSEC_RO = 4, /* read only for both secure access and non-secure access */
+ TZ_MPU_SEC_DENY_NSEC_DENY = 5, /* Any access is prohibited */
+ TZ_MPU_SEC_RO_NSEC_RW = 6 /* read and write for non-secure access and read only for secure access */
+} tz_mpu_permission;
+
+#define SECURE_OS_MPU_REGION_ID (0)
+#define ATF_MPU_REGION_ID (1)
+
+/*SET_ACCESS_PERMISSON is used to merge domain permission into one setting*/
+#define SET_ACCESS_PERMISSON(d3, d2, d1, d0) (((d3) << 9) | ((d2) << 6) | ((d1) << 3) | (d0))
+
+
+#endif /* TZ_EMI_MPU_H */
diff --git a/src/bsp/trustzone/teeloader/mt2735/include/tz_emi_reg.h b/src/bsp/trustzone/teeloader/mt2735/include/tz_emi_reg.h
new file mode 100644
index 0000000..dc844f7
--- /dev/null
+++ b/src/bsp/trustzone/teeloader/mt2735/include/tz_emi_reg.h
@@ -0,0 +1,97 @@
+/* Copyright Statement:
+ *
+ * This software/firmware and related documentation ("MediaTek Software") are
+ * protected under relevant copyright laws. The information contained herein is
+ * confidential and proprietary to MediaTek Inc. and/or its licensors. Without
+ * the prior written permission of MediaTek inc. and/or its licensors, any
+ * reproduction, modification, use or disclosure of MediaTek Software, and
+ * information contained herein, in whole or in part, shall be strictly
+ * prohibited.
+ *
+ * MediaTek Inc. (C) 2017. All rights reserved.
+ *
+ * BY OPENING THIS FILE, RECEIVER HEREBY UNEQUIVOCALLY ACKNOWLEDGES AND AGREES
+ * THAT THE SOFTWARE/FIRMWARE AND ITS DOCUMENTATIONS ("MEDIATEK SOFTWARE")
+ * RECEIVED FROM MEDIATEK AND/OR ITS REPRESENTATIVES ARE PROVIDED TO RECEIVER
+ * ON AN "AS-IS" BASIS ONLY. MEDIATEK EXPRESSLY DISCLAIMS ANY AND ALL
+ * WARRANTIES, EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE IMPLIED
+ * WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE OR
+ * NONINFRINGEMENT. NEITHER DOES MEDIATEK PROVIDE ANY WARRANTY WHATSOEVER WITH
+ * RESPECT TO THE SOFTWARE OF ANY THIRD PARTY WHICH MAY BE USED BY,
+ * INCORPORATED IN, OR SUPPLIED WITH THE MEDIATEK SOFTWARE, AND RECEIVER AGREES
+ * TO LOOK ONLY TO SUCH THIRD PARTY FOR ANY WARRANTY CLAIM RELATING THERETO.
+ * RECEIVER EXPRESSLY ACKNOWLEDGES THAT IT IS RECEIVER'S SOLE RESPONSIBILITY TO
+ * OBTAIN FROM ANY THIRD PARTY ALL PROPER LICENSES CONTAINED IN MEDIATEK
+ * SOFTWARE. MEDIATEK SHALL ALSO NOT BE RESPONSIBLE FOR ANY MEDIATEK SOFTWARE
+ * RELEASES MADE TO RECEIVER'S SPECIFICATION OR TO CONFORM TO A PARTICULAR
+ * STANDARD OR OPEN FORUM. RECEIVER'S SOLE AND EXCLUSIVE REMEDY AND MEDIATEK'S
+ * ENTIRE AND CUMULATIVE LIABILITY WITH RESPECT TO THE MEDIATEK SOFTWARE
+ * RELEASED HEREUNDER WILL BE, AT MEDIATEK'S OPTION, TO REVISE OR REPLACE THE
+ * MEDIATEK SOFTWARE AT ISSUE, OR REFUND ANY SOFTWARE LICENSE FEES OR SERVICE
+ * CHARGE PAID BY RECEIVER TO MEDIATEK FOR SUCH MEDIATEK SOFTWARE AT ISSUE.
+ *
+ * The following software/firmware and/or related documentation ("MediaTek
+ * Software") have been modified by MediaTek Inc. All revisions are subject to
+ * any receiver's applicable license agreements with MediaTek Inc.
+ */
+
+#ifndef TZ_EMI_REG_H
+#define TZ_EMI_REG_H
+
+#define EMI_MPU_BASE (0x1020E000U)
+
+#define EMI_MPU_SA0 ((P_U32)(EMI_MPU_BASE+0x100)) /* EMI MPU start addr 0 */
+#define EMI_MPU_SA1 ((P_U32)(EMI_MPU_BASE+0x104)) /* EMI MPU start addr 1 */
+#define EMI_MPU_SA2 ((P_U32)(EMI_MPU_BASE+0x108)) /* EMI MPU start addr 2 */
+#define EMI_MPU_SA3 ((P_U32)(EMI_MPU_BASE+0x10C)) /* EMI MPU start addr 3 */
+#define EMI_MPU_SA4 ((P_U32)(EMI_MPU_BASE+0x110)) /* EMI MPU start addr 4 */
+#define EMI_MPU_SA5 ((P_U32)(EMI_MPU_BASE+0x114)) /* EMI MPU start addr 5 */
+#define EMI_MPU_SA6 ((P_U32)(EMI_MPU_BASE+0x118)) /* EMI MPU start addr 6 */
+#define EMI_MPU_SA7 ((P_U32)(EMI_MPU_BASE+0x11C)) /* EMI MPU start addr 7 */
+
+#define EMI_MPU_EA0 ((P_U32)(EMI_MPU_BASE+0x200)) /* EMI MPU end addr 0 */
+#define EMI_MPU_EA1 ((P_U32)(EMI_MPU_BASE+0x204)) /* EMI MPU end addr 1 */
+#define EMI_MPU_EA2 ((P_U32)(EMI_MPU_BASE+0x208)) /* EMI MPU end addr 2 */
+#define EMI_MPU_EA3 ((P_U32)(EMI_MPU_BASE+0x20C)) /* EMI MPU end addr 3 */
+#define EMI_MPU_EA4 ((P_U32)(EMI_MPU_BASE+0x210)) /* EMI MPU end addr 4 */
+#define EMI_MPU_EA5 ((P_U32)(EMI_MPU_BASE+0x214)) /* EMI MPU end addr 5 */
+#define EMI_MPU_EA6 ((P_U32)(EMI_MPU_BASE+0x218)) /* EMI MPU end addr 6 */
+#define EMI_MPU_EA7 ((P_U32)(EMI_MPU_BASE+0x21C)) /* EMI MPU end addr 7 */
+
+#define EMI_MPU_APC0 ((P_U32)(EMI_MPU_BASE+0x300)) /* EMI MPU APC 0 */
+#define EMI_MPU_APC1 ((P_U32)(EMI_MPU_BASE+0x304)) /* EMI MPU APC 1 */
+#define EMI_MPU_APC2 ((P_U32)(EMI_MPU_BASE+0x308)) /* EMI MPU APC 2 */
+#define EMI_MPU_APC3 ((P_U32)(EMI_MPU_BASE+0x30C)) /* EMI MPU APC 3 */
+#define EMI_MPU_APC4 ((P_U32)(EMI_MPU_BASE+0x310)) /* EMI MPU APC 4 */
+#define EMI_MPU_APC5 ((P_U32)(EMI_MPU_BASE+0x314)) /* EMI MPU APC 5 */
+#define EMI_MPU_APC6 ((P_U32)(EMI_MPU_BASE+0x318)) /* EMI MPU APC 6 */
+#define EMI_MPU_APC7 ((P_U32)(EMI_MPU_BASE+0x31C)) /* EMI MPU APC 7 */
+
+#define EMI_MPU_CTRL_D0 ((P_U32)(EMI_MPU_BASE+0x800)) /* EMI MPU DOMAIN CTRL 0 */
+#define EMI_MPU_CTRL_D1 ((P_U32)(EMI_MPU_BASE+0x804)) /* EMI MPU DOMAIN CTRL 0 */
+#define EMI_MPU_CTRL_D2 ((P_U32)(EMI_MPU_BASE+0x808)) /* EMI MPU DOMAIN CTRL 0 */
+#define EMI_MPU_CTRL_D3 ((P_U32)(EMI_MPU_BASE+0x80C)) /* EMI MPU DOMAIN CTRL 0 */
+#define EMI_MPU_CTRL_D4 ((P_U32)(EMI_MPU_BASE+0x810)) /* EMI MPU DOMAIN CTRL 0 */
+#define EMI_MPU_CTRL_D5 ((P_U32)(EMI_MPU_BASE+0x814)) /* EMI MPU DOMAIN CTRL 0 */
+#define EMI_MPU_CTRL_D6 ((P_U32)(EMI_MPU_BASE+0x818)) /* EMI MPU DOMAIN CTRL 0 */
+#define EMI_MPU_CTRL_D7 ((P_U32)(EMI_MPU_BASE+0x81C)) /* EMI MPU DOMAIN CTRL 0 */
+
+#define EMI_MPU_CTRL_D0 ((P_U32)(EMI_MPU_BASE+0x800)) /* EMI MPU DOMAIN CTRL 0 */
+#define EMI_MPU_CTRL_D1 ((P_U32)(EMI_MPU_BASE+0x804)) /* EMI MPU DOMAIN CTRL 1 */
+#define EMI_MPU_CTRL_D2 ((P_U32)(EMI_MPU_BASE+0x808)) /* EMI MPU DOMAIN CTRL 2 */
+#define EMI_MPU_CTRL_D3 ((P_U32)(EMI_MPU_BASE+0x80C)) /* EMI MPU DOMAIN CTRL 3 */
+#define EMI_MPU_CTRL_D4 ((P_U32)(EMI_MPU_BASE+0x810)) /* EMI MPU DOMAIN CTRL 4 */
+#define EMI_MPU_CTRL_D5 ((P_U32)(EMI_MPU_BASE+0x814)) /* EMI MPU DOMAIN CTRL 5 */
+#define EMI_MPU_CTRL_D6 ((P_U32)(EMI_MPU_BASE+0x818)) /* EMI MPU DOMAIN CTRL 6 */
+#define EMI_MPU_CTRL_D7 ((P_U32)(EMI_MPU_BASE+0x81C)) /* EMI MPU DOMAIN CTRL 7 */
+
+#define EMI_MPU_MASK_D0 ((P_U32)(EMI_MPU_BASE+0x900)) /* EMI MPU DOMAIN MASK 0 */
+#define EMI_MPU_MASK_D1 ((P_U32)(EMI_MPU_BASE+0x904)) /* EMI MPU DOMAIN MASK 0 */
+#define EMI_MPU_MASK_D2 ((P_U32)(EMI_MPU_BASE+0x908)) /* EMI MPU DOMAIN MASK 0 */
+#define EMI_MPU_MASK_D3 ((P_U32)(EMI_MPU_BASE+0x90C)) /* EMI MPU DOMAIN MASK 0 */
+#define EMI_MPU_MASK_D4 ((P_U32)(EMI_MPU_BASE+0x910)) /* EMI MPU DOMAIN MASK 0 */
+#define EMI_MPU_MASK_D5 ((P_U32)(EMI_MPU_BASE+0x914)) /* EMI MPU DOMAIN MASK 0 */
+#define EMI_MPU_MASK_D6 ((P_U32)(EMI_MPU_BASE+0x918)) /* EMI MPU DOMAIN MASK 0 */
+#define EMI_MPU_MASK_D7 ((P_U32)(EMI_MPU_BASE+0x91C)) /* EMI MPU DOMAIN MASK 0 */
+
+#endif /* TZ_EMI_REG_H */
diff --git a/src/bsp/trustzone/teeloader/mt2735/include/tz_init.h b/src/bsp/trustzone/teeloader/mt2735/include/tz_init.h
new file mode 100644
index 0000000..f370160
--- /dev/null
+++ b/src/bsp/trustzone/teeloader/mt2735/include/tz_init.h
@@ -0,0 +1,84 @@
+/* Copyright Statement:
+ *
+ * This software/firmware and related documentation ("MediaTek Software") are
+ * protected under relevant copyright laws. The information contained herein is
+ * confidential and proprietary to MediaTek Inc. and/or its licensors. Without
+ * the prior written permission of MediaTek inc. and/or its licensors, any
+ * reproduction, modification, use or disclosure of MediaTek Software, and
+ * information contained herein, in whole or in part, shall be strictly
+ * prohibited.
+ *
+ * MediaTek Inc. (C) 2017. All rights reserved.
+ *
+ * BY OPENING THIS FILE, RECEIVER HEREBY UNEQUIVOCALLY ACKNOWLEDGES AND AGREES
+ * THAT THE SOFTWARE/FIRMWARE AND ITS DOCUMENTATIONS ("MEDIATEK SOFTWARE")
+ * RECEIVED FROM MEDIATEK AND/OR ITS REPRESENTATIVES ARE PROVIDED TO RECEIVER
+ * ON AN "AS-IS" BASIS ONLY. MEDIATEK EXPRESSLY DISCLAIMS ANY AND ALL
+ * WARRANTIES, EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE IMPLIED
+ * WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE OR
+ * NONINFRINGEMENT. NEITHER DOES MEDIATEK PROVIDE ANY WARRANTY WHATSOEVER WITH
+ * RESPECT TO THE SOFTWARE OF ANY THIRD PARTY WHICH MAY BE USED BY,
+ * INCORPORATED IN, OR SUPPLIED WITH THE MEDIATEK SOFTWARE, AND RECEIVER AGREES
+ * TO LOOK ONLY TO SUCH THIRD PARTY FOR ANY WARRANTY CLAIM RELATING THERETO.
+ * RECEIVER EXPRESSLY ACKNOWLEDGES THAT IT IS RECEIVER'S SOLE RESPONSIBILITY TO
+ * OBTAIN FROM ANY THIRD PARTY ALL PROPER LICENSES CONTAINED IN MEDIATEK
+ * SOFTWARE. MEDIATEK SHALL ALSO NOT BE RESPONSIBLE FOR ANY MEDIATEK SOFTWARE
+ * RELEASES MADE TO RECEIVER'S SPECIFICATION OR TO CONFORM TO A PARTICULAR
+ * STANDARD OR OPEN FORUM. RECEIVER'S SOLE AND EXCLUSIVE REMEDY AND MEDIATEK'S
+ * ENTIRE AND CUMULATIVE LIABILITY WITH RESPECT TO THE MEDIATEK SOFTWARE
+ * RELEASED HEREUNDER WILL BE, AT MEDIATEK'S OPTION, TO REVISE OR REPLACE THE
+ * MEDIATEK SOFTWARE AT ISSUE, OR REFUND ANY SOFTWARE LICENSE FEES OR SERVICE
+ * CHARGE PAID BY RECEIVER TO MEDIATEK FOR SUCH MEDIATEK SOFTWARE AT ISSUE.
+ *
+ * The following software/firmware and/or related documentation ("MediaTek
+ * Software") have been modified by MediaTek Inc. All revisions are subject to
+ * any receiver's applicable license agreements with MediaTek Inc.
+ */
+
+#ifndef TZ_INIT_H
+#define TZ_INIT_H
+//Don't used the typedef of teeloader, as this file will be included in Trustonic tee.
+//Which MUST use specific gcc version compiler, and the compiler have some conflict define
+//with the typedef here.
+//#include "typedefs.h"
+
+#define ATF_BOOTCFG_MAGIC (0x4D415446U) // String MATF in little-endian
+
+#define DEVINFO_SIZE (4U)
+#define HRID_SIZE 2
+/* bootarg for ATF */
+typedef struct {
+ unsigned long long bootarg_loc;
+ unsigned long long bootarg_size;
+ unsigned long long bl33_start_addr;
+ unsigned long long tee_info_addr;
+ unsigned long long boot_reason; // pass boot reason from bl2 to bl33
+} mtk_bl_param_t;
+
+typedef struct {
+ unsigned int atf_magic;
+ unsigned int tee_support;
+ unsigned int tee_entry;
+ unsigned long long tee_boot_arg_addr;
+ unsigned int hwuid[4]; // HW Unique id for t-base used
+ unsigned int HRID[HRID_SIZE]; // HW random id for t-base used
+ unsigned int atf_log_port;
+ unsigned int atf_log_baudrate;
+ unsigned long long atf_log_buf_start;
+ unsigned int atf_log_buf_size;
+ unsigned int atf_irq_num;
+ unsigned int devinfo[DEVINFO_SIZE];
+ unsigned long long atf_aee_debug_buf_start;
+ unsigned int atf_aee_debug_buf_size;
+#if CFG_TEE_SUPPORT
+ unsigned int tee_rpmb_size;
+#endif
+}atf_arg_t, *atf_arg_t_ptr;
+
+extern void tee_set_entry(unsigned int addr);
+extern void tee_set_hwuid(void);
+void trustzone_pre_init(void);
+void trustzone_post_init(void);
+void trustzone_jump(unsigned int addr, unsigned int arg1, unsigned int arg2);
+
+#endif /* TZ_INIT_H */
diff --git a/src/bsp/trustzone/teeloader/mt2735/include/tz_mem.h b/src/bsp/trustzone/teeloader/mt2735/include/tz_mem.h
new file mode 100644
index 0000000..223408f
--- /dev/null
+++ b/src/bsp/trustzone/teeloader/mt2735/include/tz_mem.h
@@ -0,0 +1,102 @@
+/* Copyright Statement:
+ *
+ * This software/firmware and related documentation ("MediaTek Software") are
+ * protected under relevant copyright laws. The information contained herein is
+ * confidential and proprietary to MediaTek Inc. and/or its licensors. Without
+ * the prior written permission of MediaTek inc. and/or its licensors, any
+ * reproduction, modification, use or disclosure of MediaTek Software, and
+ * information contained herein, in whole or in part, shall be strictly
+ * prohibited.
+ *
+ * MediaTek Inc. (C) 2017. All rights reserved.
+ *
+ * BY OPENING THIS FILE, RECEIVER HEREBY UNEQUIVOCALLY ACKNOWLEDGES AND AGREES
+ * THAT THE SOFTWARE/FIRMWARE AND ITS DOCUMENTATIONS ("MEDIATEK SOFTWARE")
+ * RECEIVED FROM MEDIATEK AND/OR ITS REPRESENTATIVES ARE PROVIDED TO RECEIVER
+ * ON AN "AS-IS" BASIS ONLY. MEDIATEK EXPRESSLY DISCLAIMS ANY AND ALL
+ * WARRANTIES, EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE IMPLIED
+ * WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE OR
+ * NONINFRINGEMENT. NEITHER DOES MEDIATEK PROVIDE ANY WARRANTY WHATSOEVER WITH
+ * RESPECT TO THE SOFTWARE OF ANY THIRD PARTY WHICH MAY BE USED BY,
+ * INCORPORATED IN, OR SUPPLIED WITH THE MEDIATEK SOFTWARE, AND RECEIVER AGREES
+ * TO LOOK ONLY TO SUCH THIRD PARTY FOR ANY WARRANTY CLAIM RELATING THERETO.
+ * RECEIVER EXPRESSLY ACKNOWLEDGES THAT IT IS RECEIVER'S SOLE RESPONSIBILITY TO
+ * OBTAIN FROM ANY THIRD PARTY ALL PROPER LICENSES CONTAINED IN MEDIATEK
+ * SOFTWARE. MEDIATEK SHALL ALSO NOT BE RESPONSIBLE FOR ANY MEDIATEK SOFTWARE
+ * RELEASES MADE TO RECEIVER'S SPECIFICATION OR TO CONFORM TO A PARTICULAR
+ * STANDARD OR OPEN FORUM. RECEIVER'S SOLE AND EXCLUSIVE REMEDY AND MEDIATEK'S
+ * ENTIRE AND CUMULATIVE LIABILITY WITH RESPECT TO THE MEDIATEK SOFTWARE
+ * RELEASED HEREUNDER WILL BE, AT MEDIATEK'S OPTION, TO REVISE OR REPLACE THE
+ * MEDIATEK SOFTWARE AT ISSUE, OR REFUND ANY SOFTWARE LICENSE FEES OR SERVICE
+ * CHARGE PAID BY RECEIVER TO MEDIATEK FOR SUCH MEDIATEK SOFTWARE AT ISSUE.
+ *
+ * The following software/firmware and/or related documentation ("MediaTek
+ * Software") have been modified by MediaTek Inc. All revisions are subject to
+ * any receiver's applicable license agreements with MediaTek Inc.
+ */
+
+#ifndef TZ_MEM_H
+#define TZ_MEM_H
+
+#include "tz_init.h"
+
+#define SRAM_BASE_ADDRESS (0x00100000UL)
+#define SRAM_START_ADDR (0x00102140UL)
+#define VECTOR_START (SRAM_START_ADDR + 0xBAC0UL)
+
+typedef struct tz_memory_t {
+ short next, previous;
+} tz_memory_t;
+
+#define FREE ((short)(0x0001U))
+#define IS_FREE(x) ((x)->next & FREE)
+#define CLEAR_FREE(x) ((x)->next &= ~FREE)
+#define SET_FREE(x) ((x)->next |= FREE)
+#define FROM_ADDR(x) ((short)(ptrdiff_t)(x))
+#define TO_ADDR(x) ((tz_memory_t *)(SRAM_BASE_ADDRESS + ((x) & ~FREE)))
+
+/* SEC MEM magic */
+#define SEC_MEM_MAGIC (0x3C562817U)
+/* SEC MEM version */
+#define SEC_MEM_VERSION (0x00010000U)
+/* Tplay Table Size */
+#define SEC_MEM_TPLAY_TABLE_SIZE (0x1000UL) //4KB by default
+#define SEC_MEM_TPLAY_MEMORY_SIZE (0x80000UL) //0.5MB by default
+
+#define BL31 (0x42C01000UL)
+#define BL31_SIZE (0x40000UL)
+#define BL33 (0x42110000UL)
+
+
+#define ATF_BOOT_ARG_ADDR (0x40000000UL)
+#define ATF_INIT_ARG_ADDR (0x40000100UL)
+
+#define TEE_BOOT_ARG_ADDR (0x42000100UL)
+#define TEE_PARAMETER_ADDR (TEE_BOOT_ARG_ADDR + 0x100UL)
+
+#define TEE_SECURE_ISRAM_ADDR (0x0UL)
+#define TEE_SECURE_ISRAM_SIZE (0x0UL)
+
+#if CFG_ATF_LOG_SUPPORT
+#define ATF_LOG_BUFFER_SIZE (0x40000UL) //256KB
+#define ATF_AEE_BUFFER_SIZE (0x4000UL) //16KB
+#else
+#define ATF_LOG_BUFFER_SIZE (0x0UL) //don't support ATF log
+#define ATF_AEE_BUFFER_SIZE (0x0UL) //don't support ATF log
+#endif
+
+typedef struct {
+ unsigned int magic; // Magic number
+ unsigned int version; // version
+ unsigned int svp_mem_start; // MM sec mem pool start addr.
+ unsigned int svp_mem_end; // MM sec mem pool end addr.
+ unsigned int tplay_table_start; // tplay handle-to-physical table start
+ unsigned int tplay_table_size; // tplay handle-to-physical table size
+ unsigned int tplay_mem_start; // tplay physcial memory start address for crypto operation
+ unsigned int tplay_mem_size; // tplay phsycial memory size for crypto operation
+ unsigned int secmem_obfuscation; // MM sec mem obfuscation or not
+ unsigned int rpmb_size; /* size of rpmb partition */
+ unsigned int msg_auth_key[8]; /* size of message auth key is 32bytes(256 bits) */
+ unsigned int emmc_rel_wr_sec_c; // emmc ext_csd[222]
+} sec_mem_arg_t;
+#endif /* TZ_MEM_H */
diff --git a/src/bsp/trustzone/teeloader/mt2735/include/tz_tbase.h b/src/bsp/trustzone/teeloader/mt2735/include/tz_tbase.h
new file mode 100644
index 0000000..5ef1cf8
--- /dev/null
+++ b/src/bsp/trustzone/teeloader/mt2735/include/tz_tbase.h
@@ -0,0 +1,78 @@
+/* Copyright Statement:
+ *
+ * This software/firmware and related documentation ("MediaTek Software") are
+ * protected under relevant copyright laws. The information contained herein is
+ * confidential and proprietary to MediaTek Inc. and/or its licensors. Without
+ * the prior written permission of MediaTek inc. and/or its licensors, any
+ * reproduction, modification, use or disclosure of MediaTek Software, and
+ * information contained herein, in whole or in part, shall be strictly
+ * prohibited.
+ *
+ * MediaTek Inc. (C) 2017. All rights reserved.
+ *
+ * BY OPENING THIS FILE, RECEIVER HEREBY UNEQUIVOCALLY ACKNOWLEDGES AND AGREES
+ * THAT THE SOFTWARE/FIRMWARE AND ITS DOCUMENTATIONS ("MEDIATEK SOFTWARE")
+ * RECEIVED FROM MEDIATEK AND/OR ITS REPRESENTATIVES ARE PROVIDED TO RECEIVER
+ * ON AN "AS-IS" BASIS ONLY. MEDIATEK EXPRESSLY DISCLAIMS ANY AND ALL
+ * WARRANTIES, EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE IMPLIED
+ * WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE OR
+ * NONINFRINGEMENT. NEITHER DOES MEDIATEK PROVIDE ANY WARRANTY WHATSOEVER WITH
+ * RESPECT TO THE SOFTWARE OF ANY THIRD PARTY WHICH MAY BE USED BY,
+ * INCORPORATED IN, OR SUPPLIED WITH THE MEDIATEK SOFTWARE, AND RECEIVER AGREES
+ * TO LOOK ONLY TO SUCH THIRD PARTY FOR ANY WARRANTY CLAIM RELATING THERETO.
+ * RECEIVER EXPRESSLY ACKNOWLEDGES THAT IT IS RECEIVER'S SOLE RESPONSIBILITY TO
+ * OBTAIN FROM ANY THIRD PARTY ALL PROPER LICENSES CONTAINED IN MEDIATEK
+ * SOFTWARE. MEDIATEK SHALL ALSO NOT BE RESPONSIBLE FOR ANY MEDIATEK SOFTWARE
+ * RELEASES MADE TO RECEIVER'S SPECIFICATION OR TO CONFORM TO A PARTICULAR
+ * STANDARD OR OPEN FORUM. RECEIVER'S SOLE AND EXCLUSIVE REMEDY AND MEDIATEK'S
+ * ENTIRE AND CUMULATIVE LIABILITY WITH RESPECT TO THE MEDIATEK SOFTWARE
+ * RELEASED HEREUNDER WILL BE, AT MEDIATEK'S OPTION, TO REVISE OR REPLACE THE
+ * MEDIATEK SOFTWARE AT ISSUE, OR REFUND ANY SOFTWARE LICENSE FEES OR SERVICE
+ * CHARGE PAID BY RECEIVER TO MEDIATEK FOR SUCH MEDIATEK SOFTWARE AT ISSUE.
+ *
+ * The following software/firmware and/or related documentation ("MediaTek
+ * Software") have been modified by MediaTek Inc. All revisions are subject to
+ * any receiver's applicable license agreements with MediaTek Inc.
+ */
+
+#ifndef TZ_TBASE_H
+#define TZ_TBASE_H
+
+#include "typedefs.h"
+
+/* Tbase Magic For Interface */
+#define TBASE_BOOTCFG_MAGIC (0x434d4254U) // String TBMC in little-endian
+
+/* TEE version */
+#define TEE_ARGUMENT_VERSION (0x00010000U)
+
+typedef struct {
+ u32 magic; // magic value from information
+ u32 length; // size of struct in bytes.
+ u64 version; // Version of structure
+ u64 dRamBase; // NonSecure DRAM start address
+ u64 dRamSize; // NonSecure DRAM size
+ u64 secDRamBase; // Secure DRAM start address
+ u64 secDRamSize; // Secure DRAM size
+ u64 secIRamBase; // Secure IRAM base
+ u64 secIRamSize; // Secure IRam size
+ u64 conf_mair_el3;// MAIR_EL3 for memory attributes sharing
+ u32 RFU1;
+ u32 MSMPteCount; // Number of MMU entries for MSM
+ u64 MSMBase; // MMU entries for MSM
+ u64 gic_distributor_base;
+ u64 gic_cpuinterface_base;
+ u32 gic_version;
+ u32 RFU2;
+ u64 flags;
+ u32 total_number_spi;
+ u32 ssiq_number;
+}tee_arg_t, *tee_arg_t_ptr;
+
+/**************************************************************************
+ * EXPORTED FUNCTIONS
+ **************************************************************************/
+void tbase_secmem_param_prepare(u32 param_addr, u32 tee_entry, u32 tbase_sec_dram_size, u32 tee_smem_size);
+void tbase_boot_param_prepare(u32 param_addr, u32 tee_entry, u64 tbase_sec_dram_size, u64 dram_base, u64 dram_size);
+
+#endif /* TZ_TBASE_H */
diff --git a/src/bsp/trustzone/teeloader/mt2735/include/uart.h b/src/bsp/trustzone/teeloader/mt2735/include/uart.h
new file mode 100644
index 0000000..9a6ba92
--- /dev/null
+++ b/src/bsp/trustzone/teeloader/mt2735/include/uart.h
@@ -0,0 +1,59 @@
+/* Copyright Statement:
+ *
+ * This software/firmware and related documentation ("MediaTek Software") are
+ * protected under relevant copyright laws. The information contained herein is
+ * confidential and proprietary to MediaTek Inc. and/or its licensors. Without
+ * the prior written permission of MediaTek inc. and/or its licensors, any
+ * reproduction, modification, use or disclosure of MediaTek Software, and
+ * information contained herein, in whole or in part, shall be strictly
+ * prohibited.
+ *
+ * MediaTek Inc. (C) 2017. All rights reserved.
+ *
+ * BY OPENING THIS FILE, RECEIVER HEREBY UNEQUIVOCALLY ACKNOWLEDGES AND AGREES
+ * THAT THE SOFTWARE/FIRMWARE AND ITS DOCUMENTATIONS ("MEDIATEK SOFTWARE")
+ * RECEIVED FROM MEDIATEK AND/OR ITS REPRESENTATIVES ARE PROVIDED TO RECEIVER
+ * ON AN "AS-IS" BASIS ONLY. MEDIATEK EXPRESSLY DISCLAIMS ANY AND ALL
+ * WARRANTIES, EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE IMPLIED
+ * WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE OR
+ * NONINFRINGEMENT. NEITHER DOES MEDIATEK PROVIDE ANY WARRANTY WHATSOEVER WITH
+ * RESPECT TO THE SOFTWARE OF ANY THIRD PARTY WHICH MAY BE USED BY,
+ * INCORPORATED IN, OR SUPPLIED WITH THE MEDIATEK SOFTWARE, AND RECEIVER AGREES
+ * TO LOOK ONLY TO SUCH THIRD PARTY FOR ANY WARRANTY CLAIM RELATING THERETO.
+ * RECEIVER EXPRESSLY ACKNOWLEDGES THAT IT IS RECEIVER'S SOLE RESPONSIBILITY TO
+ * OBTAIN FROM ANY THIRD PARTY ALL PROPER LICENSES CONTAINED IN MEDIATEK
+ * SOFTWARE. MEDIATEK SHALL ALSO NOT BE RESPONSIBLE FOR ANY MEDIATEK SOFTWARE
+ * RELEASES MADE TO RECEIVER'S SPECIFICATION OR TO CONFORM TO A PARTICULAR
+ * STANDARD OR OPEN FORUM. RECEIVER'S SOLE AND EXCLUSIVE REMEDY AND MEDIATEK'S
+ * ENTIRE AND CUMULATIVE LIABILITY WITH RESPECT TO THE MEDIATEK SOFTWARE
+ * RELEASED HEREUNDER WILL BE, AT MEDIATEK'S OPTION, TO REVISE OR REPLACE THE
+ * MEDIATEK SOFTWARE AT ISSUE, OR REFUND ANY SOFTWARE LICENSE FEES OR SERVICE
+ * CHARGE PAID BY RECEIVER TO MEDIATEK FOR SUCH MEDIATEK SOFTWARE AT ISSUE.
+ *
+ * The following software/firmware and/or related documentation ("MediaTek
+ * Software") have been modified by MediaTek Inc. All revisions are subject to
+ * any receiver's applicable license agreements with MediaTek Inc.
+ */
+
+#ifndef UART_H
+#define UART_H
+
+#include "typedefs.h"
+
+#define REG32(addr) ((volatile uint32_t *)(uintptr_t)(addr))
+
+#define writel(v, a) (*REG32(a) = (v))
+#define readl(a) (*REG32(a))
+
+#define UART_BASE(uart) (uart)
+#define UART_LSR(uart) (UART_BASE(uart) + 0x14U)
+#define UART_LSR_THRE (1U << 5U)
+#define UART_THR(uart) (UART_BASE(uart) + 0x0U) /* Write only */
+
+#define IO_PHYS (0x10000000UL)
+#define UART1_BASE (IO_PHYS + 0x01002000UL)
+
+int uart_putc(char c);
+
+#endif /* UART_H */
+