| #ifndef __CUSTOM_EMI__ |
| #define __CUSTOM_EMI__ |
| #include "dramc_pi_api.h" |
| #include "emi.h" |
| #ifdef DRAM_ADAPTIVE |
| #include "dramc_custom.h" |
| #endif |
| |
| #if defined(LOW_POWER_DDR4) |
| #define MT29GZ5A5BPGGA_53IT_87J |
| #else |
| #define MT29RZ4B2DZZHHWD // Micron LP2 256MB MCP, byte mode |
| #endif |
| |
| |
| #ifndef DRAM_ADAPTIVE |
| #ifdef MT29RZ4B2DZZHHWD |
| EMI_SETTINGS default_emi_setting = |
| { |
| .sub_version = 0x1, /* sub_version */ |
| .type = 0x0103, /* TYPE */ |
| .id_length = 5, /* EMMC ID/FW ID checking length */ |
| .fw_id_length = 0, /* FW length */ |
| .ID = {0x2C,0xAC,0x90,0x15,0x56,0x0,0x0,0x0,0x0,0x0,0x0,0x0,0x0,0x0,0x0,0x0}, /* NAND_EMMC_ID */ |
| .fw_id = {0x0,0x0,0x0,0x0,0x0,0x0,0x0,0x0}, /* FW_ID */ |
| .EMI_CONA_VAL = 0x00100016, /* EMI_CONA_VAL */ // single channel, dual rank |
| .EMI_CONH_VAL = 0x11110003, /* EMI_CONH_VAL */ |
| .DRAMC_ACTIME_UNION = { |
| 0x00000000, /* U 00 */ |
| 0x00000000, /* U 01 */ |
| 0x00000000, /* U 02 */ |
| 0x00000000, /* U 03 */ |
| 0x00000000, /* U 04 */ |
| 0x00000000, /* U 05 */ |
| 0x00000000, /* U 06 */ |
| 0x00000000, /* U 07 */ |
| }, |
| |
| .DRAM_RANK_SIZE = { |
| 0x10000000,0x00000000, 0, 0}, /* DRAM RANK SIZE */ |
| |
| .EMI_CONF_VAL = |
| 0x00000000, //sagy: for bringup,0x000421000, /* EMI_CONF_VAL */ |
| |
| .CHN0_EMI_CONA_VAL = 0x00110012, /* CHN0_EMI_CONA_VAL */ |
| .CHN1_EMI_CONA_VAL = 0x00110012, /* CHN1_EMI_CONA_VAL */ |
| .dram_cbt_mode_extern = CBT_R0_R1_BYTE, /* dram_cbt_mode_extern */ |
| .reserved = {0,0,0,0,0,0}, /* reserved 6 */ |
| .iLPDDR3_MODE_REG_5 = 0x00000006, /* LPDDR4_MODE_REG5 */ |
| .PIN_MUX_TYPE = 0x0, /* PIN_MUX_TYPE for tablet */ |
| }; |
| #endif |
| |
| #ifdef MT29GZ5A5BPGGA_53IT_87J |
| EMI_SETTINGS default_emi_setting = |
| { |
| .sub_version = 0x1, /* sub_version */ |
| .type = 0x0206, /* TYPE */ |
| .id_length = 5, /* EMMC ID/FW ID checking length */ |
| .fw_id_length = 0, /* FW length */ |
| .ID = {0x2C,0xDC,0x80,0xA6,0x62,0x0,0x0,0x0,0x0,0x0,0x0,0x0,0x0,0x0,0x0,0x0}, /* NAND_EMMC_ID */ |
| .fw_id = {0x0,0x0,0x0,0x0,0x0,0x0,0x0,0x0}, /* FW_ID */ |
| |
| .EMI_CONA_VAL = |
| 0x20102014, /* EMI_CONA_VAL */ |
| |
| .EMI_CONH_VAL = 0x00020003, /* EMI_CONH_VAL */ |
| .DRAMC_ACTIME_UNION = { |
| 0x00000000, /* U 00 */ |
| 0x00000000, /* U 01 */ |
| 0x00000000, /* U 02 */ |
| 0x00000000, /* U 03 */ |
| 0x00000000, /* U 04 */ |
| 0x00000000, /* U 05 */ |
| 0x00000000, /* U 06 */ |
| 0x00000000, /* U 07 */ |
| }, |
| |
| .DRAM_RANK_SIZE = { |
| 0x20000000,0,0,0}, /* DRAM RANK SIZE */ |
| |
| .EMI_CONF_VAL = 0x04210000, /* EMI_CONF_VAL */ |
| .CHN0_EMI_CONA_VAL = 0x04002010, /* CHN0_EMI_CONA_VAL */ |
| .CHN1_EMI_CONA_VAL = 0x04002010, /* CHN1_EMI_CONA_VAL */ |
| .dram_cbt_mode_extern = CBT_R0_R1_NORMAL, /* dram_cbt_mode_extern */ |
| .reserved = {0,0,0,0,0,0}, /* reserved 6 */ |
| .iLPDDR3_MODE_REG_5 = 0x000000FF, /* LPDDR4X_MODE_REG5 */ |
| .PIN_MUX_TYPE = 0, /* PIN_MUX_TYPE for tablet */ |
| }; |
| #endif |
| |
| #ifdef MT29GZ6A6BPIET_53AIT_112 |
| EMI_SETTINGS default_emi_setting = |
| { |
| .sub_version = 0x1, /* sub_version */ |
| .type = 0x0206, /* TYPE */ |
| .id_length = 5, /* EMMC ID/FW ID checking length */ |
| .fw_id_length = 0, /* FW length */ |
| .ID = {0x2C,0xA3,0xD0,0x26,0x66,0x0,0x0,0x0,0x0,0x0,0x0,0x0,0x0,0x0,0x0,0x0}, /* NAND_EMMC_ID */ |
| .fw_id = {0x0,0x0,0x0,0x0,0x0,0x0,0x0,0x0}, /* FW_ID */ |
| .EMI_CONA_VAL = |
| 0xA053A054, /* EMI_CONA_VAL */ |
| |
| .EMI_CONH_VAL = 0x00000003, /* EMI_CONH_VAL */ |
| .DRAMC_ACTIME_UNION = { |
| 0x00000000, /* U 00 */ |
| 0x00000000, /* U 01 */ |
| 0x00000000, /* U 02 */ |
| 0x00000000, /* U 03 */ |
| 0x00000000, /* U 04 */ |
| 0x00000000, /* U 05 */ |
| 0x00000000, /* U 06 */ |
| 0x00000000, /* U 07 */ |
| }, |
| |
| .DRAM_RANK_SIZE = { |
| 0x20000000,0x20000000,0,0}, /* DRAM RANK SIZE */ |
| |
| .EMI_CONF_VAL = 0x00042000,//0x00042100 /* EMI_CONF_VAL */ |
| .CHN0_EMI_CONA_VAL = 0x0400A051, /* CHN0_EMI_CONA_VAL */ |
| .CHN1_EMI_CONA_VAL = 0x04002011, /* CHN1_EMI_CONA_VAL */ |
| .dram_cbt_mode_extern = CBT_R0_R1_NORMAL, /* dram_cbt_mode_extern */ |
| .reserved = {0,0,0,0,0,0}, /* reserved 6 */ |
| .iLPDDR3_MODE_REG_5 = 0x000000FF, /* LPDDR4X_MODE_REG5 */ |
| .PIN_MUX_TYPE = 0, /* PIN_MUX_TYPE for tablet */ |
| }; |
| #endif |
| |
| EMI_SETTINGS emi_settings[] = |
| { |
| { |
| .sub_version = 0x1, /* sub_version */ |
| .type = 0x0103, /* TYPE */ |
| .id_length = 5, /* EMMC ID/FW ID checking length */ |
| .fw_id_length = 0, /* FW length */ |
| .ID = {0x2C,0xAC,0x90,0x15,0x56,0x0,0x0,0x0,0x0,0x0,0x0,0x0,0x0,0x0,0x0,0x0}, /* NAND_EMMC_ID */ |
| .fw_id = {0x0,0x0,0x0,0x0,0x0,0x0,0x0,0x0}, /* FW_ID */ |
| .EMI_CONA_VAL = 0x00100016, /* EMI_CONA_VAL */ // single channel, dual rank |
| .EMI_CONH_VAL = 0x11110003, /* EMI_CONH_VAL */ |
| .DRAMC_ACTIME_UNION = { |
| 0x00000000, /* U 00 */ |
| 0x00000000, /* U 01 */ |
| 0x00000000, /* U 02 */ |
| 0x00000000, /* U 03 */ |
| 0x00000000, /* U 04 */ |
| 0x00000000, /* U 05 */ |
| 0x00000000, /* U 06 */ |
| 0x00000000, /* U 07 */ |
| }, |
| |
| .DRAM_RANK_SIZE = { |
| 0x10000000,0x00000000, 0, 0}, /* DRAM RANK SIZE */ |
| |
| .EMI_CONF_VAL = |
| 0x00000000, //sagy: for bringup,0x000421000, /* EMI_CONF_VAL */ |
| |
| .CHN0_EMI_CONA_VAL = 0x00110012, /* CHN0_EMI_CONA_VAL */ |
| .CHN1_EMI_CONA_VAL = 0x00110012, /* CHN1_EMI_CONA_VAL */ |
| .dram_cbt_mode_extern = CBT_R0_R1_BYTE, /* dram_cbt_mode_extern */ |
| .reserved = {0,0,0,0,0,0}, /* reserved 6 */ |
| .iLPDDR3_MODE_REG_5 = 0x00000006, /* LPDDR4_MODE_REG5 */ |
| .PIN_MUX_TYPE = 0x0, /* PIN_MUX_TYPE for tablet */ |
| }, |
| { |
| .sub_version = 0x1, /* sub_version */ |
| .type = 0x0003, /* TYPE */ |
| .id_length = 5, /* EMMC ID/FW ID checking length */ |
| .fw_id_length = 0, /* FW length */ |
| .ID = {0x2C,0xAC,0x90,0x15,0x56,0x0,0x0,0x0,0x0,0x0,0x0,0x0,0x0,0x0,0x0,0x0}, /* NAND_EMMC_ID */ |
| .fw_id = {0x0,0x0,0x0,0x0,0x0,0x0,0x0,0x0}, /* FW_ID */ |
| .EMI_CONA_VAL = 0x00100016, /* EMI_CONA_VAL */ // single channel, dual rank |
| .EMI_CONH_VAL = 0x11110003, /* EMI_CONH_VAL */ |
| .DRAMC_ACTIME_UNION = { |
| 0x00000000, /* U 00 */ |
| 0x00000000, /* U 01 */ |
| 0x00000000, /* U 02 */ |
| 0x00000000, /* U 03 */ |
| 0x00000000, /* U 04 */ |
| 0x00000000, /* U 05 */ |
| 0x00000000, /* U 06 */ |
| 0x00000000, /* U 07 */ |
| }, |
| |
| .DRAM_RANK_SIZE = { |
| 0x10000000,0x00000000, 0, 0}, /* DRAM RANK SIZE */ |
| |
| .EMI_CONF_VAL = |
| 0x00000000, //sagy: for bringup,0x000421000, /* EMI_CONF_VAL */ |
| |
| .CHN0_EMI_CONA_VAL = 0x00110012, /* CHN0_EMI_CONA_VAL */ |
| .CHN1_EMI_CONA_VAL = 0x00110012, /* CHN1_EMI_CONA_VAL */ |
| .dram_cbt_mode_extern = CBT_R0_R1_BYTE, /* dram_cbt_mode_extern */ |
| .reserved = {0,0,0,0,0,0}, /* reserved 6 */ |
| .iLPDDR3_MODE_REG_5 = 0x00000003, /* LPDDR4_MODE_REG5 */ |
| .PIN_MUX_TYPE = 0x0, /* PIN_MUX_TYPE for tablet */ |
| }, |
| { |
| .sub_version = 0x1, /* sub_version */ |
| .type = 0x0006, /* TYPE */ |
| .id_length = 5, /* EMMC ID/FW ID checking length */ |
| .fw_id_length = 0, /* FW length */ |
| .ID = {0x2C,0xAC,0x80,0x26,0x62,0x0,0x0,0x0,0x0,0x0,0x0,0x0,0x0,0x0,0x0,0x0}, /* NAND_EMMC_ID */ |
| .fw_id = {0x0,0x0,0x0,0x0,0x0,0x0,0x0,0x0}, /* FW_ID */ |
| |
| .EMI_CONA_VAL = |
| 0x20102014, /* EMI_CONA_VAL */ |
| |
| .EMI_CONH_VAL = 0x00020003, /* EMI_CONH_VAL */ |
| .DRAMC_ACTIME_UNION = { |
| 0x00000000, /* U 00 */ |
| 0x00000000, /* U 01 */ |
| 0x00000000, /* U 02 */ |
| 0x00000000, /* U 03 */ |
| 0x00000000, /* U 04 */ |
| 0x00000000, /* U 05 */ |
| 0x00000000, /* U 06 */ |
| 0x00000000, /* U 07 */ |
| }, |
| |
| .DRAM_RANK_SIZE = { |
| 0x40000000,0x00000000, 0, 0}, /* DRAM RANK SIZE */ |
| |
| .EMI_CONF_VAL = 0x04210000, /* EMI_CONF_VAL */ |
| .CHN0_EMI_CONA_VAL = 0x04002010, /* CHN0_EMI_CONA_VAL */ |
| .CHN1_EMI_CONA_VAL = 0x04002010, /* CHN1_EMI_CONA_VAL */ |
| .dram_cbt_mode_extern = CBT_R0_R1_NORMAL, /* dram_cbt_mode_extern */ |
| .reserved = {0,0,0,0,0,0}, /* reserved 6 */ |
| .iLPDDR3_MODE_REG_5 = 0x000000ff, /* LPDDR4X_MODE_REG5 */ |
| .PIN_MUX_TYPE = 0, /* PIN_MUX_TYPE for tablet */ |
| }, |
| { |
| .sub_version = 0x1, /* sub_version */ |
| .type = 0x0106, /* TYPE */ |
| .id_length = 5, /* EMMC ID/FW ID checking length */ |
| .fw_id_length = 0, /* FW length */ |
| .ID = {0x2C,0xAC,0x80,0x26,0x62,0x0,0x0,0x0,0x0,0x0,0x0,0x0,0x0,0x0,0x0,0x0}, /* NAND_EMMC_ID */ |
| .fw_id = {0x0,0x0,0x0,0x0,0x0,0x0,0x0,0x0}, /* FW_ID */ |
| |
| .EMI_CONA_VAL = |
| 0x20102014, /* EMI_CONA_VAL */ |
| |
| .EMI_CONH_VAL = 0x00020003, /* EMI_CONH_VAL */ |
| .DRAMC_ACTIME_UNION = { |
| 0x00000000, /* U 00 */ |
| 0x00000000, /* U 01 */ |
| 0x00000000, /* U 02 */ |
| 0x00000000, /* U 03 */ |
| 0x00000000, /* U 04 */ |
| 0x00000000, /* U 05 */ |
| 0x00000000, /* U 06 */ |
| 0x00000000, /* U 07 */ |
| }, |
| |
| .DRAM_RANK_SIZE = { |
| 0x40000000,0x00000000, 0, 0}, /* DRAM RANK SIZE */ |
| |
| .EMI_CONF_VAL = 0x04210000, /* EMI_CONF_VAL */ |
| .CHN0_EMI_CONA_VAL = 0x04002010, /* CHN0_EMI_CONA_VAL */ |
| .CHN1_EMI_CONA_VAL = 0x04002010, /* CHN1_EMI_CONA_VAL */ |
| .dram_cbt_mode_extern = CBT_R0_R1_NORMAL, /* dram_cbt_mode_extern */ |
| .reserved = {0,0,0,0,0,0}, /* reserved 6 */ |
| .iLPDDR3_MODE_REG_5 = 0x000000FF, /* LPDDR4X_MODE_REG5 */ |
| .PIN_MUX_TYPE = 0, /* PIN_MUX_TYPE for tablet */ |
| }, |
| }; |
| |
| #ifndef COMBO_MCP |
| int num_of_emi_records = 1; |
| #else |
| int num_of_emi_records = sizeof(emi_settings)/sizeof(emi_settings[0]); |
| #endif |
| #endif |
| |
| //#endif |
| #endif /* __CUSTOM_EMI__ */ |
| |