| /* |
| * Copyright (C) 2018 MediaTek Inc. |
| |
| * This program is free software; you can redistribute it and/or modify |
| * it under the terms of the GNU General Public License version 2 as |
| * published by the Free Software Foundation. |
| |
| * This program is distributed in the hope that it will be useful, |
| * but WITHOUT ANY WARRANTY; without even the implied warranty of |
| * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. |
| * See http://www.gnu.org/licenses/gpl-2.0.html for more details. |
| */ |
| |
| #ifndef _DT_BINDINGS_MT635X_AUXADC_H |
| #define _DT_BINDINGS_MT635X_AUXADC_H |
| |
| /* PMIC MT635x AUXADC channels */ |
| /*TODO*/ |
| #define AUXADC_BATADC 0x00 |
| //#define AUXADC_ISENSE 0x01 |
| #define AUXADC_VCDT 0x02 |
| //#define AUXADC_BATTEMP 0x03 |
| #define AUXADC_BATID 0x04 |
| #define AUXADC_CHIP_TEMP 0x05 |
| #define AUXADC_VCORE_TEMP 0x06 |
| #define AUXADC_VPROC_TEMP 0x07 |
| #define AUXADC_VGPU_TEMP 0x08 |
| #define AUXADC_ACCDET 0x09 |
| #define AUXADC_VDCXO 0x0a |
| #define AUXADC_TSX_TEMP 0x0b |
| #define AUXADC_HPOFS_CAL 0x0c |
| #define AUXADC_DCXO_TEMP 0x0d |
| #define AUXADC_VBIF 0x0e |
| #define AUXADC_VTREF 0x0f |
| #define AUXADC_EXT1 0x10 |
| #define AUXADC_EXT2 0x11 |
| #define AUXADC_EXT3 0x12 |
| #define AUXADC_EXT4 0x13 |
| #define AUXADC_MDDRDI 0x14 |
| /* |
| #define AUXADC_GPS_ANT 0x15 |
| #define AUXADC_MAIN_ANT 0x16 |
| #define AUXADC_DRX_ANT 0x17 |
| */ |
| /*modify by chencheng 0913 */ |
| #define AUXADC_ADC2 0x15 |
| #define AUXADC_ADC1 0x16 |
| #define AUXADC_ADC0 0x17 |
| |
| |
| #endif /* _DT_BINDINGS_MT635X_AUXADC_H */ |