[Bugfix][T103-112][IQR]Repair the IRQ loop reporting abnormality, which causes the port to start slowly
Change-Id: I0f56e1fff9a4d3ca61a39b191715af1ed7875324
diff --git a/src/bsp/lk/platform/mt2731/drivers/gce/mtk_gce.c b/src/bsp/lk/platform/mt2731/drivers/gce/mtk_gce.c
index ee16afb..5d026d8 100644
--- a/src/bsp/lk/platform/mt2731/drivers/gce/mtk_gce.c
+++ b/src/bsp/lk/platform/mt2731/drivers/gce/mtk_gce.c
@@ -1,3 +1,4 @@
+#include <arch/ops.h>
#include <debug.h>
#include <err.h>
#include <reg.h>
@@ -67,6 +68,9 @@
gce_ins_va = (vaddr_t)paddr_to_kvaddr((paddr_t)GCE_INS_SRAM_ADDR);
memcpy((void *)gce_ins_va, (void *)gce_instruction, sizeof(gce_instruction));
+ //dongyu@2023.4.10 Repair the IRQ loop reporting abnormality, which causes the port to start slowly start
+ arch_clean_invalidate_cache_range((vaddr_t)gce_ins_va, sizeof(gce_instruction));
+ //dongyu@2023.4.10 Repair the IRQ loop reporting abnormality, which causes the port to start slowly end
dprintf(CRITICAL,"[GCE_INS] va: 0x%lx gce: 0x%lx size_ins 0x%lx pc: 0x%x\n",
gce_ins_va,
diff --git a/src/bsp/lk/platform/mt2731/drivers/pll/pll.c b/src/bsp/lk/platform/mt2731/drivers/pll/pll.c
index 878e8f4..4f248a6 100644
--- a/src/bsp/lk/platform/mt2731/drivers/pll/pll.c
+++ b/src/bsp/lk/platform/mt2731/drivers/pll/pll.c
@@ -359,7 +359,6 @@
//DRV_WriteReg32_Mask(PERI_BUS_DCM_CTRL, 0x4, 0);
//PERIAXI_SI0_CTL: PERIAXI_CG_DISABLE
- DRV_WriteReg32_Mask(GCE_CTL_INT0, 0x10000, 0x0);
DRV_WriteReg32_Mask(AUDIO_TOP_CON0, 0x1f0c0304, 0x0);
DRV_WriteReg32_Mask(AUDIO_TOP_CON1, 0x3f0, 0x0);
@@ -382,6 +381,10 @@
DRV_WriteReg32(MODULE_SW_CG_1_SET, BIT(27)| BIT(28));
DRV_WriteReg32(CLK_CFG_3_SET, BIT(15)| BIT(23));
#endif
+
+ //dongyu@2023.4.10 Repair the IRQ loop reporting abnormality, which causes the port to start slowly start
+ DRV_WriteReg32_Mask(GCE_CTL_INT0, 0x10000, 0x0);
+ //dongyu@2023.4.10 Repair the IRQ loop reporting abnormality, which causes the port to start slowly end
}
/* after pmic_init */