| rjw | 1f88458 | 2022-01-06 17:20:42 +0800 | [diff] [blame] | 1 | /* | 
 | 2 |  * Carsten Langgaard, carstenl@mips.com | 
 | 3 |  * Copyright (C) 1999,2000 MIPS Technologies, Inc.  All rights reserved. | 
 | 4 |  * | 
 | 5 |  *  This program is free software; you can distribute it and/or modify it | 
 | 6 |  *  under the terms of the GNU General Public License (Version 2) as | 
 | 7 |  *  published by the Free Software Foundation. | 
 | 8 |  * | 
 | 9 |  *  This program is distributed in the hope it will be useful, but WITHOUT | 
 | 10 |  *  ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or | 
 | 11 |  *  FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License | 
 | 12 |  *  for more details. | 
 | 13 |  * | 
 | 14 |  *  You should have received a copy of the GNU General Public License along | 
 | 15 |  *  with this program; if not, write to the Free Software Foundation, Inc., | 
 | 16 |  *  59 Temple Place - Suite 330, Boston MA 02111-1307, USA. | 
 | 17 |  * | 
 | 18 |  * Routines for generic manipulation of the interrupts found on the | 
 | 19 |  * Lasat boards. | 
 | 20 |  */ | 
 | 21 | #include <linux/init.h> | 
 | 22 | #include <linux/interrupt.h> | 
 | 23 | #include <linux/irq.h> | 
 | 24 |  | 
 | 25 | #include <asm/irq_cpu.h> | 
 | 26 | #include <asm/lasat/lasat.h> | 
 | 27 | #include <asm/lasat/lasatint.h> | 
 | 28 |  | 
 | 29 | #include <irq.h> | 
 | 30 |  | 
 | 31 | static volatile int *lasat_int_status; | 
 | 32 | static volatile int *lasat_int_mask; | 
 | 33 | static volatile int lasat_int_mask_shift; | 
 | 34 |  | 
 | 35 | void disable_lasat_irq(struct irq_data *d) | 
 | 36 | { | 
 | 37 | 	unsigned int irq_nr = d->irq - LASAT_IRQ_BASE; | 
 | 38 |  | 
 | 39 | 	*lasat_int_mask &= ~(1 << irq_nr) << lasat_int_mask_shift; | 
 | 40 | } | 
 | 41 |  | 
 | 42 | void enable_lasat_irq(struct irq_data *d) | 
 | 43 | { | 
 | 44 | 	unsigned int irq_nr = d->irq - LASAT_IRQ_BASE; | 
 | 45 |  | 
 | 46 | 	*lasat_int_mask |= (1 << irq_nr) << lasat_int_mask_shift; | 
 | 47 | } | 
 | 48 |  | 
 | 49 | static struct irq_chip lasat_irq_type = { | 
 | 50 | 	.name = "Lasat", | 
 | 51 | 	.irq_mask = disable_lasat_irq, | 
 | 52 | 	.irq_unmask = enable_lasat_irq, | 
 | 53 | }; | 
 | 54 |  | 
 | 55 | static inline int ls1bit32(unsigned int x) | 
 | 56 | { | 
 | 57 | 	int b = 31, s; | 
 | 58 |  | 
 | 59 | 	s = 16; if (x << 16 == 0) s = 0; b -= s; x <<= s; | 
 | 60 | 	s =  8; if (x <<  8 == 0) s = 0; b -= s; x <<= s; | 
 | 61 | 	s =  4; if (x <<  4 == 0) s = 0; b -= s; x <<= s; | 
 | 62 | 	s =  2; if (x <<  2 == 0) s = 0; b -= s; x <<= s; | 
 | 63 | 	s =  1; if (x <<  1 == 0) s = 0; b -= s; | 
 | 64 |  | 
 | 65 | 	return b; | 
 | 66 | } | 
 | 67 |  | 
 | 68 | static unsigned long (*get_int_status)(void); | 
 | 69 |  | 
 | 70 | static unsigned long get_int_status_100(void) | 
 | 71 | { | 
 | 72 | 	return *lasat_int_status & *lasat_int_mask; | 
 | 73 | } | 
 | 74 |  | 
 | 75 | static unsigned long get_int_status_200(void) | 
 | 76 | { | 
 | 77 | 	unsigned long int_status; | 
 | 78 |  | 
 | 79 | 	int_status = *lasat_int_status; | 
 | 80 | 	int_status &= (int_status >> LASATINT_MASK_SHIFT_200) & 0xffff; | 
 | 81 | 	return int_status; | 
 | 82 | } | 
 | 83 |  | 
 | 84 | asmlinkage void plat_irq_dispatch(void) | 
 | 85 | { | 
 | 86 | 	unsigned long int_status; | 
 | 87 | 	unsigned int cause = read_c0_cause(); | 
 | 88 | 	int irq; | 
 | 89 |  | 
 | 90 | 	if (cause & CAUSEF_IP7) {	/* R4000 count / compare IRQ */ | 
 | 91 | 		do_IRQ(7); | 
 | 92 | 		return; | 
 | 93 | 	} | 
 | 94 |  | 
 | 95 | 	int_status = get_int_status(); | 
 | 96 |  | 
 | 97 | 	/* if int_status == 0, then the interrupt has already been cleared */ | 
 | 98 | 	if (int_status) { | 
 | 99 | 		irq = LASAT_IRQ_BASE + ls1bit32(int_status); | 
 | 100 |  | 
 | 101 | 		do_IRQ(irq); | 
 | 102 | 	} | 
 | 103 | } | 
 | 104 |  | 
 | 105 | static struct irqaction cascade = { | 
 | 106 | 	.handler	= no_action, | 
 | 107 | 	.name		= "cascade", | 
 | 108 | 	.flags		= IRQF_NO_THREAD, | 
 | 109 | }; | 
 | 110 |  | 
 | 111 | void __init arch_init_irq(void) | 
 | 112 | { | 
 | 113 | 	int i; | 
 | 114 |  | 
 | 115 | 	if (IS_LASAT_200()) { | 
 | 116 | 		lasat_int_status = (void *)LASAT_INT_STATUS_REG_200; | 
 | 117 | 		lasat_int_mask = (void *)LASAT_INT_MASK_REG_200; | 
 | 118 | 		lasat_int_mask_shift = LASATINT_MASK_SHIFT_200; | 
 | 119 | 		get_int_status = get_int_status_200; | 
 | 120 | 		*lasat_int_mask &= 0xffff; | 
 | 121 | 	} else { | 
 | 122 | 		lasat_int_status = (void *)LASAT_INT_STATUS_REG_100; | 
 | 123 | 		lasat_int_mask = (void *)LASAT_INT_MASK_REG_100; | 
 | 124 | 		lasat_int_mask_shift = LASATINT_MASK_SHIFT_100; | 
 | 125 | 		get_int_status = get_int_status_100; | 
 | 126 | 		*lasat_int_mask = 0; | 
 | 127 | 	} | 
 | 128 |  | 
 | 129 | 	mips_cpu_irq_init(); | 
 | 130 |  | 
 | 131 | 	for (i = LASAT_IRQ_BASE; i <= LASAT_IRQ_END; i++) | 
 | 132 | 		irq_set_chip_and_handler(i, &lasat_irq_type, handle_level_irq); | 
 | 133 |  | 
 | 134 | 	setup_irq(LASAT_CASCADE_IRQ, &cascade); | 
 | 135 | } |