rjw | 1f88458 | 2022-01-06 17:20:42 +0800 | [diff] [blame^] | 1 | #ifndef __CUSTOM_EMI__ |
| 2 | #define __CUSTOM_EMI__ |
| 3 | #include "dramc_pi_api.h" |
| 4 | #include "emi.h" |
| 5 | #ifdef DRAM_ADAPTIVE |
| 6 | #include "dramc_custom.h" |
| 7 | #endif |
| 8 | |
| 9 | #if defined(LOW_POWER_DDR4) |
| 10 | #define MT29GZ5A5BPGGA_53IT_87J |
| 11 | #else |
| 12 | #define MT29RZ4B2DZZHHWD // Micron LP2 256MB MCP, byte mode |
| 13 | #endif |
| 14 | |
| 15 | |
| 16 | #ifndef DRAM_ADAPTIVE |
| 17 | #ifdef MT29RZ4B2DZZHHWD |
| 18 | EMI_SETTINGS default_emi_setting = |
| 19 | { |
| 20 | .sub_version = 0x1, /* sub_version */ |
| 21 | .type = 0x0103, /* TYPE */ |
| 22 | .id_length = 5, /* EMMC ID/FW ID checking length */ |
| 23 | .fw_id_length = 0, /* FW length */ |
| 24 | .ID = {0x2C,0xAC,0x90,0x15,0x56,0x0,0x0,0x0,0x0,0x0,0x0,0x0,0x0,0x0,0x0,0x0}, /* NAND_EMMC_ID */ |
| 25 | .fw_id = {0x0,0x0,0x0,0x0,0x0,0x0,0x0,0x0}, /* FW_ID */ |
| 26 | .EMI_CONA_VAL = 0x00100016, /* EMI_CONA_VAL */ // single channel, dual rank |
| 27 | .EMI_CONH_VAL = 0x11110003, /* EMI_CONH_VAL */ |
| 28 | .DRAMC_ACTIME_UNION = { |
| 29 | 0x00000000, /* U 00 */ |
| 30 | 0x00000000, /* U 01 */ |
| 31 | 0x00000000, /* U 02 */ |
| 32 | 0x00000000, /* U 03 */ |
| 33 | 0x00000000, /* U 04 */ |
| 34 | 0x00000000, /* U 05 */ |
| 35 | 0x00000000, /* U 06 */ |
| 36 | 0x00000000, /* U 07 */ |
| 37 | }, |
| 38 | |
| 39 | .DRAM_RANK_SIZE = { |
| 40 | 0x10000000,0x00000000, 0, 0}, /* DRAM RANK SIZE */ |
| 41 | |
| 42 | .EMI_CONF_VAL = |
| 43 | 0x00000000, //sagy: for bringup,0x000421000, /* EMI_CONF_VAL */ |
| 44 | |
| 45 | .CHN0_EMI_CONA_VAL = 0x00110012, /* CHN0_EMI_CONA_VAL */ |
| 46 | .CHN1_EMI_CONA_VAL = 0x00110012, /* CHN1_EMI_CONA_VAL */ |
| 47 | .dram_cbt_mode_extern = CBT_R0_R1_BYTE, /* dram_cbt_mode_extern */ |
| 48 | .reserved = {0,0,0,0,0,0}, /* reserved 6 */ |
| 49 | .iLPDDR3_MODE_REG_5 = 0x00000006, /* LPDDR4_MODE_REG5 */ |
| 50 | .PIN_MUX_TYPE = 0x0, /* PIN_MUX_TYPE for tablet */ |
| 51 | }; |
| 52 | #endif |
| 53 | |
| 54 | #ifdef MT29GZ5A5BPGGA_53IT_87J |
| 55 | EMI_SETTINGS default_emi_setting = |
| 56 | { |
| 57 | .sub_version = 0x1, /* sub_version */ |
| 58 | .type = 0x0206, /* TYPE */ |
| 59 | .id_length = 5, /* EMMC ID/FW ID checking length */ |
| 60 | .fw_id_length = 0, /* FW length */ |
| 61 | .ID = {0x2C,0xDC,0x80,0xA6,0x62,0x0,0x0,0x0,0x0,0x0,0x0,0x0,0x0,0x0,0x0,0x0}, /* NAND_EMMC_ID */ |
| 62 | .fw_id = {0x0,0x0,0x0,0x0,0x0,0x0,0x0,0x0}, /* FW_ID */ |
| 63 | |
| 64 | .EMI_CONA_VAL = |
| 65 | 0x20102014, /* EMI_CONA_VAL */ |
| 66 | |
| 67 | .EMI_CONH_VAL = 0x00020003, /* EMI_CONH_VAL */ |
| 68 | .DRAMC_ACTIME_UNION = { |
| 69 | 0x00000000, /* U 00 */ |
| 70 | 0x00000000, /* U 01 */ |
| 71 | 0x00000000, /* U 02 */ |
| 72 | 0x00000000, /* U 03 */ |
| 73 | 0x00000000, /* U 04 */ |
| 74 | 0x00000000, /* U 05 */ |
| 75 | 0x00000000, /* U 06 */ |
| 76 | 0x00000000, /* U 07 */ |
| 77 | }, |
| 78 | |
| 79 | .DRAM_RANK_SIZE = { |
| 80 | 0x20000000,0,0,0}, /* DRAM RANK SIZE */ |
| 81 | |
| 82 | .EMI_CONF_VAL = 0x04210000, /* EMI_CONF_VAL */ |
| 83 | .CHN0_EMI_CONA_VAL = 0x04002010, /* CHN0_EMI_CONA_VAL */ |
| 84 | .CHN1_EMI_CONA_VAL = 0x04002010, /* CHN1_EMI_CONA_VAL */ |
| 85 | .dram_cbt_mode_extern = CBT_R0_R1_NORMAL, /* dram_cbt_mode_extern */ |
| 86 | .reserved = {0,0,0,0,0,0}, /* reserved 6 */ |
| 87 | .iLPDDR3_MODE_REG_5 = 0x000000FF, /* LPDDR4X_MODE_REG5 */ |
| 88 | .PIN_MUX_TYPE = 0, /* PIN_MUX_TYPE for tablet */ |
| 89 | }; |
| 90 | #endif |
| 91 | |
| 92 | #ifdef MT29GZ6A6BPIET_53AIT_112 |
| 93 | EMI_SETTINGS default_emi_setting = |
| 94 | { |
| 95 | .sub_version = 0x1, /* sub_version */ |
| 96 | .type = 0x0206, /* TYPE */ |
| 97 | .id_length = 5, /* EMMC ID/FW ID checking length */ |
| 98 | .fw_id_length = 0, /* FW length */ |
| 99 | .ID = {0x2C,0xA3,0xD0,0x26,0x66,0x0,0x0,0x0,0x0,0x0,0x0,0x0,0x0,0x0,0x0,0x0}, /* NAND_EMMC_ID */ |
| 100 | .fw_id = {0x0,0x0,0x0,0x0,0x0,0x0,0x0,0x0}, /* FW_ID */ |
| 101 | .EMI_CONA_VAL = |
| 102 | 0xA053A054, /* EMI_CONA_VAL */ |
| 103 | |
| 104 | .EMI_CONH_VAL = 0x00000003, /* EMI_CONH_VAL */ |
| 105 | .DRAMC_ACTIME_UNION = { |
| 106 | 0x00000000, /* U 00 */ |
| 107 | 0x00000000, /* U 01 */ |
| 108 | 0x00000000, /* U 02 */ |
| 109 | 0x00000000, /* U 03 */ |
| 110 | 0x00000000, /* U 04 */ |
| 111 | 0x00000000, /* U 05 */ |
| 112 | 0x00000000, /* U 06 */ |
| 113 | 0x00000000, /* U 07 */ |
| 114 | }, |
| 115 | |
| 116 | .DRAM_RANK_SIZE = { |
| 117 | 0x20000000,0x20000000,0,0}, /* DRAM RANK SIZE */ |
| 118 | |
| 119 | .EMI_CONF_VAL = 0x00042000,//0x00042100 /* EMI_CONF_VAL */ |
| 120 | .CHN0_EMI_CONA_VAL = 0x0400A051, /* CHN0_EMI_CONA_VAL */ |
| 121 | .CHN1_EMI_CONA_VAL = 0x04002011, /* CHN1_EMI_CONA_VAL */ |
| 122 | .dram_cbt_mode_extern = CBT_R0_R1_NORMAL, /* dram_cbt_mode_extern */ |
| 123 | .reserved = {0,0,0,0,0,0}, /* reserved 6 */ |
| 124 | .iLPDDR3_MODE_REG_5 = 0x000000FF, /* LPDDR4X_MODE_REG5 */ |
| 125 | .PIN_MUX_TYPE = 0, /* PIN_MUX_TYPE for tablet */ |
| 126 | }; |
| 127 | #endif |
| 128 | |
| 129 | EMI_SETTINGS emi_settings[] = |
| 130 | { |
| 131 | { |
| 132 | .sub_version = 0x1, /* sub_version */ |
| 133 | .type = 0x0103, /* TYPE */ |
| 134 | .id_length = 5, /* EMMC ID/FW ID checking length */ |
| 135 | .fw_id_length = 0, /* FW length */ |
| 136 | .ID = {0x2C,0xAC,0x90,0x15,0x56,0x0,0x0,0x0,0x0,0x0,0x0,0x0,0x0,0x0,0x0,0x0}, /* NAND_EMMC_ID */ |
| 137 | .fw_id = {0x0,0x0,0x0,0x0,0x0,0x0,0x0,0x0}, /* FW_ID */ |
| 138 | .EMI_CONA_VAL = 0x00100016, /* EMI_CONA_VAL */ // single channel, dual rank |
| 139 | .EMI_CONH_VAL = 0x11110003, /* EMI_CONH_VAL */ |
| 140 | .DRAMC_ACTIME_UNION = { |
| 141 | 0x00000000, /* U 00 */ |
| 142 | 0x00000000, /* U 01 */ |
| 143 | 0x00000000, /* U 02 */ |
| 144 | 0x00000000, /* U 03 */ |
| 145 | 0x00000000, /* U 04 */ |
| 146 | 0x00000000, /* U 05 */ |
| 147 | 0x00000000, /* U 06 */ |
| 148 | 0x00000000, /* U 07 */ |
| 149 | }, |
| 150 | |
| 151 | .DRAM_RANK_SIZE = { |
| 152 | 0x10000000,0x00000000, 0, 0}, /* DRAM RANK SIZE */ |
| 153 | |
| 154 | .EMI_CONF_VAL = |
| 155 | 0x00000000, //sagy: for bringup,0x000421000, /* EMI_CONF_VAL */ |
| 156 | |
| 157 | .CHN0_EMI_CONA_VAL = 0x00110012, /* CHN0_EMI_CONA_VAL */ |
| 158 | .CHN1_EMI_CONA_VAL = 0x00110012, /* CHN1_EMI_CONA_VAL */ |
| 159 | .dram_cbt_mode_extern = CBT_R0_R1_BYTE, /* dram_cbt_mode_extern */ |
| 160 | .reserved = {0,0,0,0,0,0}, /* reserved 6 */ |
| 161 | .iLPDDR3_MODE_REG_5 = 0x00000006, /* LPDDR4_MODE_REG5 */ |
| 162 | .PIN_MUX_TYPE = 0x0, /* PIN_MUX_TYPE for tablet */ |
| 163 | }, |
| 164 | { |
| 165 | .sub_version = 0x1, /* sub_version */ |
| 166 | .type = 0x0003, /* TYPE */ |
| 167 | .id_length = 5, /* EMMC ID/FW ID checking length */ |
| 168 | .fw_id_length = 0, /* FW length */ |
| 169 | .ID = {0x2C,0xAC,0x90,0x15,0x56,0x0,0x0,0x0,0x0,0x0,0x0,0x0,0x0,0x0,0x0,0x0}, /* NAND_EMMC_ID */ |
| 170 | .fw_id = {0x0,0x0,0x0,0x0,0x0,0x0,0x0,0x0}, /* FW_ID */ |
| 171 | .EMI_CONA_VAL = 0x00100016, /* EMI_CONA_VAL */ // single channel, dual rank |
| 172 | .EMI_CONH_VAL = 0x11110003, /* EMI_CONH_VAL */ |
| 173 | .DRAMC_ACTIME_UNION = { |
| 174 | 0x00000000, /* U 00 */ |
| 175 | 0x00000000, /* U 01 */ |
| 176 | 0x00000000, /* U 02 */ |
| 177 | 0x00000000, /* U 03 */ |
| 178 | 0x00000000, /* U 04 */ |
| 179 | 0x00000000, /* U 05 */ |
| 180 | 0x00000000, /* U 06 */ |
| 181 | 0x00000000, /* U 07 */ |
| 182 | }, |
| 183 | |
| 184 | .DRAM_RANK_SIZE = { |
| 185 | 0x10000000,0x00000000, 0, 0}, /* DRAM RANK SIZE */ |
| 186 | |
| 187 | .EMI_CONF_VAL = |
| 188 | 0x00000000, //sagy: for bringup,0x000421000, /* EMI_CONF_VAL */ |
| 189 | |
| 190 | .CHN0_EMI_CONA_VAL = 0x00110012, /* CHN0_EMI_CONA_VAL */ |
| 191 | .CHN1_EMI_CONA_VAL = 0x00110012, /* CHN1_EMI_CONA_VAL */ |
| 192 | .dram_cbt_mode_extern = CBT_R0_R1_BYTE, /* dram_cbt_mode_extern */ |
| 193 | .reserved = {0,0,0,0,0,0}, /* reserved 6 */ |
| 194 | .iLPDDR3_MODE_REG_5 = 0x00000003, /* LPDDR4_MODE_REG5 */ |
| 195 | .PIN_MUX_TYPE = 0x0, /* PIN_MUX_TYPE for tablet */ |
| 196 | }, |
| 197 | { |
| 198 | .sub_version = 0x1, /* sub_version */ |
| 199 | .type = 0x0006, /* TYPE */ |
| 200 | .id_length = 5, /* EMMC ID/FW ID checking length */ |
| 201 | .fw_id_length = 0, /* FW length */ |
| 202 | .ID = {0x2C,0xAC,0x80,0x26,0x62,0x0,0x0,0x0,0x0,0x0,0x0,0x0,0x0,0x0,0x0,0x0}, /* NAND_EMMC_ID */ |
| 203 | .fw_id = {0x0,0x0,0x0,0x0,0x0,0x0,0x0,0x0}, /* FW_ID */ |
| 204 | |
| 205 | .EMI_CONA_VAL = |
| 206 | 0x20102014, /* EMI_CONA_VAL */ |
| 207 | |
| 208 | .EMI_CONH_VAL = 0x00020003, /* EMI_CONH_VAL */ |
| 209 | .DRAMC_ACTIME_UNION = { |
| 210 | 0x00000000, /* U 00 */ |
| 211 | 0x00000000, /* U 01 */ |
| 212 | 0x00000000, /* U 02 */ |
| 213 | 0x00000000, /* U 03 */ |
| 214 | 0x00000000, /* U 04 */ |
| 215 | 0x00000000, /* U 05 */ |
| 216 | 0x00000000, /* U 06 */ |
| 217 | 0x00000000, /* U 07 */ |
| 218 | }, |
| 219 | |
| 220 | .DRAM_RANK_SIZE = { |
| 221 | 0x40000000,0x00000000, 0, 0}, /* DRAM RANK SIZE */ |
| 222 | |
| 223 | .EMI_CONF_VAL = 0x04210000, /* EMI_CONF_VAL */ |
| 224 | .CHN0_EMI_CONA_VAL = 0x04002010, /* CHN0_EMI_CONA_VAL */ |
| 225 | .CHN1_EMI_CONA_VAL = 0x04002010, /* CHN1_EMI_CONA_VAL */ |
| 226 | .dram_cbt_mode_extern = CBT_R0_R1_NORMAL, /* dram_cbt_mode_extern */ |
| 227 | .reserved = {0,0,0,0,0,0}, /* reserved 6 */ |
| 228 | .iLPDDR3_MODE_REG_5 = 0x000000ff, /* LPDDR4X_MODE_REG5 */ |
| 229 | .PIN_MUX_TYPE = 0, /* PIN_MUX_TYPE for tablet */ |
| 230 | }, |
| 231 | { |
| 232 | .sub_version = 0x1, /* sub_version */ |
| 233 | .type = 0x0106, /* TYPE */ |
| 234 | .id_length = 5, /* EMMC ID/FW ID checking length */ |
| 235 | .fw_id_length = 0, /* FW length */ |
| 236 | .ID = {0x2C,0xAC,0x80,0x26,0x62,0x0,0x0,0x0,0x0,0x0,0x0,0x0,0x0,0x0,0x0,0x0}, /* NAND_EMMC_ID */ |
| 237 | .fw_id = {0x0,0x0,0x0,0x0,0x0,0x0,0x0,0x0}, /* FW_ID */ |
| 238 | |
| 239 | .EMI_CONA_VAL = |
| 240 | 0x20102014, /* EMI_CONA_VAL */ |
| 241 | |
| 242 | .EMI_CONH_VAL = 0x00020003, /* EMI_CONH_VAL */ |
| 243 | .DRAMC_ACTIME_UNION = { |
| 244 | 0x00000000, /* U 00 */ |
| 245 | 0x00000000, /* U 01 */ |
| 246 | 0x00000000, /* U 02 */ |
| 247 | 0x00000000, /* U 03 */ |
| 248 | 0x00000000, /* U 04 */ |
| 249 | 0x00000000, /* U 05 */ |
| 250 | 0x00000000, /* U 06 */ |
| 251 | 0x00000000, /* U 07 */ |
| 252 | }, |
| 253 | |
| 254 | .DRAM_RANK_SIZE = { |
| 255 | 0x40000000,0x00000000, 0, 0}, /* DRAM RANK SIZE */ |
| 256 | |
| 257 | .EMI_CONF_VAL = 0x04210000, /* EMI_CONF_VAL */ |
| 258 | .CHN0_EMI_CONA_VAL = 0x04002010, /* CHN0_EMI_CONA_VAL */ |
| 259 | .CHN1_EMI_CONA_VAL = 0x04002010, /* CHN1_EMI_CONA_VAL */ |
| 260 | .dram_cbt_mode_extern = CBT_R0_R1_NORMAL, /* dram_cbt_mode_extern */ |
| 261 | .reserved = {0,0,0,0,0,0}, /* reserved 6 */ |
| 262 | .iLPDDR3_MODE_REG_5 = 0x000000FF, /* LPDDR4X_MODE_REG5 */ |
| 263 | .PIN_MUX_TYPE = 0, /* PIN_MUX_TYPE for tablet */ |
| 264 | }, |
| 265 | }; |
| 266 | |
| 267 | #ifndef COMBO_MCP |
| 268 | int num_of_emi_records = 1; |
| 269 | #else |
| 270 | int num_of_emi_records = sizeof(emi_settings)/sizeof(emi_settings[0]); |
| 271 | #endif |
| 272 | #endif |
| 273 | |
| 274 | //#endif |
| 275 | #endif /* __CUSTOM_EMI__ */ |
| 276 | |