blob: 3dad646436fd7b2a9d39bd28664c9e0ff3c8ab19 [file] [log] [blame]
rjw1f884582022-01-06 17:20:42 +08001/*
2 * Copyright (c) 2015 Travis Geiselbrecht
3 *
4 * Permission is hereby granted, free of charge, to any person obtaining
5 * a copy of this software and associated documentation files
6 * (the "Software"), to deal in the Software without restriction,
7 * including without limitation the rights to use, copy, modify, merge,
8 * publish, distribute, sublicense, and/or sell copies of the Software,
9 * and to permit persons to whom the Software is furnished to do so,
10 * subject to the following conditions:
11 *
12 * The above copyright notice and this permission notice shall be
13 * included in all copies or substantial portions of the Software.
14 *
15 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
16 * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
17 * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.
18 * IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY
19 * CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT,
20 * TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE
21 * SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
22 */
23#include <trace.h>
24#include <debug.h>
25#include <stdint.h>
26#include <arch/microblaze.h>
27
28#define LOCAL_TRACE 0
29
30void arch_early_init(void)
31{
32 LTRACE;
33
34 /* enable i/d cache */
35 uint32_t val = mb_read_msr();
36 val |= (1 << (31 - 26)) | (1 << (31 - 24));
37 mb_write_msr(val);
38}
39
40void arch_init(void)
41{
42 LTRACE;
43}
44
45void arch_idle(void)
46{
47 asm volatile("sleep");
48}
49
50void arch_chain_load(void *entry, ulong arg0, ulong arg1, ulong arg2, ulong arg3)
51{
52 PANIC_UNIMPLEMENTED;
53}
54
55/* unimplemented cache operations */
56void arch_disable_cache(uint flags) { PANIC_UNIMPLEMENTED; }
57void arch_enable_cache(uint flags) { PANIC_UNIMPLEMENTED; }
58
59void arch_clean_cache_range(addr_t start, size_t len) { PANIC_UNIMPLEMENTED; }
60void arch_clean_invalidate_cache_range(addr_t start, size_t len) { PANIC_UNIMPLEMENTED; }
61void arch_invalidate_cache_range(addr_t start, size_t len) { PANIC_UNIMPLEMENTED; }
62void arch_sync_cache_range(addr_t start, size_t len) { PANIC_UNIMPLEMENTED; }