blob: 2f90e87d1015d9344ff6101980999a652fadfef5 [file] [log] [blame]
rjw1f884582022-01-06 17:20:42 +08001/*
2 * Copyright (c) 2009 Corey Tabaka
3 * Copyright (c) 2015 Intel Corporation
4 *
5 * Permission is hereby granted, free of charge, to any person obtaining
6 * a copy of this software and associated documentation files
7 * (the "Software"), to deal in the Software without restriction,
8 * including without limitation the rights to use, copy, modify, merge,
9 * publish, distribute, sublicense, and/or sell copies of the Software,
10 * and to permit persons to whom the Software is furnished to do so,
11 * subject to the following conditions:
12 *
13 * The above copyright notice and this permission notice shall be
14 * included in all copies or substantial portions of the Software.
15 *
16 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
17 * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
18 * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.
19 * IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY
20 * CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT,
21 * TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE
22 * SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
23 */
24
25#include <debug.h>
26#include <arch.h>
27#include <arch/ops.h>
28#include <arch/x86.h>
29#include <arch/x86/mmu.h>
30#include <arch/x86/descriptor.h>
31#include <arch/fpu.h>
32#include <arch/fpu.h>
33#include <platform.h>
34#include <sys/types.h>
35#include <string.h>
36
37tss_t system_tss;
38
39void arch_early_init(void)
40{
41 /* enable caches here for now */
42 clear_in_cr0(X86_CR0_NW | X86_CR0_CD);
43
44 memset(&system_tss, 0, sizeof(tss_t));
45
46 system_tss.esp0 = 0;
47 system_tss.ss0 = DATA_SELECTOR;
48 system_tss.ss1 = 0;
49 system_tss.ss2 = 0;
50 system_tss.eflags = 0x00003002;
51 system_tss.bitmap = offsetof(tss_t, tss_bitmap);
52 system_tss.trace = 1; // trap on hardware task switch
53 set_global_desc(TSS_SELECTOR, &system_tss, sizeof(tss_t), 1, 0, 0, SEG_TYPE_TSS, 0, 0);
54 x86_ltr(TSS_SELECTOR);
55}
56
57void arch_init(void)
58{
59#ifdef X86_WITH_FPU
60 fpu_init();
61#endif
62}
63
64void arch_chain_load(void *entry, ulong arg0, ulong arg1, ulong arg2, ulong arg3)
65{
66 PANIC_UNIMPLEMENTED;
67}