rjw | 1f88458 | 2022-01-06 17:20:42 +0800 | [diff] [blame^] | 1 | /* |
| 2 | * Copyright (c) 2012-2014 Travis Geiselbrecht |
| 3 | * |
| 4 | * Permission is hereby granted, free of charge, to any person obtaining |
| 5 | * a copy of this software and associated documentation files |
| 6 | * (the "Software"), to deal in the Software without restriction, |
| 7 | * including without limitation the rights to use, copy, modify, merge, |
| 8 | * publish, distribute, sublicense, and/or sell copies of the Software, |
| 9 | * and to permit persons to whom the Software is furnished to do so, |
| 10 | * subject to the following conditions: |
| 11 | * |
| 12 | * The above copyright notice and this permission notice shall be |
| 13 | * included in all copies or substantial portions of the Software. |
| 14 | * |
| 15 | * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, |
| 16 | * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF |
| 17 | * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. |
| 18 | * IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY |
| 19 | * CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, |
| 20 | * TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE |
| 21 | * SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE. |
| 22 | */ |
| 23 | #include <err.h> |
| 24 | #include <debug.h> |
| 25 | #include <assert.h> |
| 26 | #include <trace.h> |
| 27 | #include <arch/arm/mmu.h> |
| 28 | #include <dev/uart.h> |
| 29 | #include <dev/interrupt/arm_gic.h> |
| 30 | #include <dev/timer/arm_cortex_a9.h> |
| 31 | #include <kernel/vm.h> |
| 32 | #include <platform.h> |
| 33 | #include <platform/alterasoc.h> |
| 34 | #include "platform_p.h" |
| 35 | |
| 36 | /* initial memory mappings. parsed by start.S */ |
| 37 | struct mmu_initial_mapping mmu_initial_mappings[] = { |
| 38 | /* 1GB of sdram space */ |
| 39 | { .phys = 0x0, |
| 40 | .virt = KERNEL_BASE, |
| 41 | .size = 1024*1024*1024, |
| 42 | .flags = 0, |
| 43 | .name = "memory" }, |
| 44 | |
| 45 | /* HPS peripherals */ |
| 46 | { .phys = 0xfc000000, |
| 47 | .virt = 0xfc000000, |
| 48 | .size = 0x04000000, |
| 49 | .flags = MMU_INITIAL_MAPPING_FLAG_DEVICE, |
| 50 | .name = "hps_periphs" }, |
| 51 | |
| 52 | /* identity map to let the boot code run */ |
| 53 | { .phys = 0, |
| 54 | .virt = 0, |
| 55 | .size = 1024*1024*1024, |
| 56 | .flags = MMU_INITIAL_MAPPING_TEMPORARY }, |
| 57 | |
| 58 | /* null entry to terminate the list */ |
| 59 | { 0 } |
| 60 | }; |
| 61 | |
| 62 | static pmm_arena_t sdram_arena = { |
| 63 | .name = "sdram", |
| 64 | .base = 0, |
| 65 | .size = MEMSIZE, |
| 66 | .flags = PMM_ARENA_FLAG_KMAP |
| 67 | }; |
| 68 | |
| 69 | void platform_init_mmu_mappings(void) |
| 70 | { |
| 71 | } |
| 72 | |
| 73 | void platform_early_init(void) |
| 74 | { |
| 75 | uart_init_early(); |
| 76 | |
| 77 | printf("stat 0x%x\n", *REG32(0xffd05000)); |
| 78 | |
| 79 | /* initialize the interrupt controller */ |
| 80 | arm_gic_init(); |
| 81 | |
| 82 | /* initialize the timer block */ |
| 83 | arm_cortex_a9_timer_init(CPUPRIV_BASE, TIMER_CLOCK_FREQ); |
| 84 | |
| 85 | pmm_add_arena(&sdram_arena); |
| 86 | |
| 87 | /* start the secondary cpu */ |
| 88 | *REG32(0xffd05010) = 0; |
| 89 | } |
| 90 | |
| 91 | void platform_init(void) |
| 92 | { |
| 93 | uart_init(); |
| 94 | } |
| 95 | |