blob: 2c5b5693e8f328bbb1ed5321819c8d71ca1c4403 [file] [log] [blame]
rjw1f884582022-01-06 17:20:42 +08001/*
2 * Copyright (c) 2012 Corey Tabaka
3 *
4 * Permission is hereby granted, free of charge, to any person obtaining
5 * a copy of this software and associated documentation files
6 * (the "Software"), to deal in the Software without restriction,
7 * including without limitation the rights to use, copy, modify, merge,
8 * publish, distribute, sublicense, and/or sell copies of the Software,
9 * and to permit persons to whom the Software is furnished to do so,
10 * subject to the following conditions:
11 *
12 * The above copyright notice and this permission notice shall be
13 * included in all copies or substantial portions of the Software.
14 *
15 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
16 * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
17 * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.
18 * IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY
19 * CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT,
20 * TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE
21 * SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
22 */
23#include <err.h>
24#include <sys/types.h>
25#include <debug.h>
26#include <reg.h>
27#include <kernel/thread.h>
28#include <platform/interrupts.h>
29#include <platform/am335x.h>
30#include <arch/ops.h>
31#include <arch/arm.h>
32#include "platform_p.h"
33
34#include <soc_AM335x.h>
35#include <interrupt.h>
36
37struct int_handler_struct {
38 int_handler handler;
39 void *arg;
40};
41
42#define NUM_INTS 128
43
44static struct int_handler_struct int_handler_table[NUM_INTS];
45
46void platform_init_interrupts(void)
47{
48 /* Initialize the ARM interrupt control */
49 IntAINTCInit();
50 IntPrioritySet(SYS_INT_TINT2, 0, AINTC_HOSTINT_ROUTE_IRQ);
51}
52
53status_t mask_interrupt(unsigned int vector)
54{
55 if (vector >= NUM_INTS)
56 return ERR_INVALID_ARGS;
57
58// dprintf("%s: vector %d\n", __PRETTY_FUNCTION__, vector);
59
60 spin_lock_saved_state_t statep;
61 arch_interrupt_save(&statep, SPIN_LOCK_FLAG_IRQ);
62
63 IntSystemDisable(vector);
64
65 arch_interrupt_restore(statep, SPIN_LOCK_FLAG_IRQ);
66
67 return NO_ERROR;
68}
69
70status_t unmask_interrupt(unsigned int vector)
71{
72 if (vector >= NUM_INTS)
73 return ERR_INVALID_ARGS;
74
75// dprintf("%s: vector %d\n", __PRETTY_FUNCTION__, vector);
76
77 spin_lock_saved_state_t statep;
78 arch_interrupt_save(&statep, SPIN_LOCK_FLAG_IRQ);
79
80 IntSystemEnable(vector);
81
82 arch_interrupt_restore(statep, SPIN_LOCK_FLAG_IRQ);
83
84 return NO_ERROR;
85}
86
87enum handler_return platform_irq(struct arm_iframe *frame)
88{
89 // get the current vector
90 unsigned int vector = IntActiveIrqNumGet();
91
92 THREAD_STATS_INC(interrupts);
93
94// printf("platform_irq: spsr 0x%x, pc 0x%x, currthread %p, vector %d\n", frame->spsr, frame->pc, current_thread, vector);
95
96 // deliver the interrupt
97 enum handler_return ret;
98
99 ret = INT_NO_RESCHEDULE;
100 if (int_handler_table[vector].handler)
101 ret = int_handler_table[vector].handler(int_handler_table[vector].arg);
102
103 /* enable generation of new IRQ */
104 HWREG(SOC_AINTC_REGS + INTC_CONTROL) = INTC_CONTROL_NEWIRQAGR;
105 DSB; // wait for write to complete
106
107// dprintf("platform_irq: exit %d\n", ret);
108
109 return ret;
110}
111
112void platform_fiq(struct arm_iframe *frame)
113{
114 panic("FIQ: unimplemented\n");
115}
116
117void register_int_handler(unsigned int vector, int_handler handler, void *arg)
118{
119 if (vector >= NUM_INTS)
120 panic("register_int_handler: vector out of range %d\n", vector);
121
122 spin_lock_saved_state_t statep;
123 arch_interrupt_save(&statep, SPIN_LOCK_FLAG_IRQ);
124
125 int_handler_table[vector].handler = handler;
126 int_handler_table[vector].arg = arg;
127
128 arch_interrupt_restore(statep, SPIN_LOCK_FLAG_IRQ);
129}
130