blob: 453aaf9a5d278c6b599ae4d3eebe4e35a3bb4492 [file] [log] [blame]
rjw1f884582022-01-06 17:20:42 +08001/*
2 * Copyright (c) 2015 Travis Geiselbrecht
3 *
4 * Permission is hereby granted, free of charge, to any person obtaining
5 * a copy of this software and associated documentation files
6 * (the "Software"), to deal in the Software without restriction,
7 * including without limitation the rights to use, copy, modify, merge,
8 * publish, distribute, sublicense, and/or sell copies of the Software,
9 * and to permit persons to whom the Software is furnished to do so,
10 * subject to the following conditions:
11 *
12 * The above copyright notice and this permission notice shall be
13 * included in all copies or substantial portions of the Software.
14 *
15 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
16 * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
17 * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.
18 * IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY
19 * CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT,
20 * TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE
21 * SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
22 */
23#include <reg.h>
24#include <err.h>
25#include <debug.h>
26#include <trace.h>
27#include <dev/uart.h>
28#include <arch.h>
29#include <arch/arm.h>
30#include <arch/arm/mmu.h>
31#include <lk/init.h>
32#include <kernel/vm.h>
33#include <kernel/spinlock.h>
34#include <dev/timer/arm_generic.h>
35#include <platform.h>
36#include <platform/interrupts.h>
37#include <platform/bcm2835.h>
38
39extern void intc_init(void);
40extern void arm_reset(void);
41
42/* initial memory mappings. parsed by start.S */
43struct mmu_initial_mapping mmu_initial_mappings[] = {
44 /* 1GB of sdram space */
45 { .phys = SDRAM_BASE,
46 .virt = KERNEL_BASE,
47 .size = MEMSIZE,
48 .flags = 0,
49 .name = "memory" },
50
51 /* peripherals */
52 { .phys = BCM_PERIPH_BASE_PHYS,
53 .virt = BCM_PERIPH_BASE_VIRT,
54 .size = BCM_PERIPH_SIZE,
55 .flags = MMU_INITIAL_MAPPING_FLAG_DEVICE,
56 .name = "bcm peripherals" },
57
58 /* identity map to let the boot code run */
59 { .phys = SDRAM_BASE,
60 .virt = SDRAM_BASE,
61 .size = 16*1024*1024,
62 .flags = MMU_INITIAL_MAPPING_TEMPORARY },
63
64 /* null entry to terminate the list */
65 { 0 }
66};
67
68static pmm_arena_t arena = {
69 .name = "sdram",
70 .base = SDRAM_BASE,
71 .size = MEMSIZE,
72 .flags = PMM_ARENA_FLAG_KMAP,
73};
74
75void platform_init_mmu_mappings(void)
76{
77}
78
79void platform_early_init(void)
80{
81 uart_init_early();
82
83 intc_init();
84
85 arm_generic_timer_init(INTERRUPT_ARM_LOCAL_CNTPNSIRQ, 1000000);
86
87 /* add the main memory arena */
88 pmm_add_arena(&arena);
89
90#if WITH_SMP
91 /* start the other cpus */
92 uintptr_t sec_entry = (uintptr_t)&arm_reset;
93 sec_entry -= (KERNEL_BASE - MEMBASE);
94 for (uint i = 1; i <= 3; i++) {
95 *REG32(ARM_LOCAL_BASE + 0x8c + 0x10 * i) = sec_entry;
96 }
97#endif
98}
99
100void platform_init(void)
101{
102 uart_init();
103}
104
105#define DEBUG_UART 0
106
107void platform_dputc(char c)
108{
109 if (c == '\n')
110 uart_putc(DEBUG_UART, '\r');
111 uart_putc(DEBUG_UART, c);
112}
113
114int platform_dgetc(char *c, bool wait)
115{
116 int ret = uart_getc(DEBUG_UART, wait);
117 if (ret == -1)
118 return -1;
119 *c = ret;
120 return 0;
121}
122