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rjw1f884582022-01-06 17:20:42 +08001/*
2 * Copyright (c) 2015 Travis Geiselbrecht
3 *
4 * Permission is hereby granted, free of charge, to any person obtaining
5 * a copy of this software and associated documentation files
6 * (the "Software"), to deal in the Software without restriction,
7 * including without limitation the rights to use, copy, modify, merge,
8 * publish, distribute, sublicense, and/or sell copies of the Software,
9 * and to permit persons to whom the Software is furnished to do so,
10 * subject to the following conditions:
11 *
12 * The above copyright notice and this permission notice shall be
13 * included in all copies or substantial portions of the Software.
14 *
15 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
16 * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
17 * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.
18 * IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY
19 * CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT,
20 * TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE
21 * SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
22 */
23#include <reg.h>
24#include <err.h>
25#include <debug.h>
26#include <trace.h>
27
28#include <dev/uart.h>
29#include <arch.h>
30#include <lk/init.h>
31#include <kernel/vm.h>
32#include <kernel/spinlock.h>
33#include <dev/timer/arm_generic.h>
34#include <platform.h>
35#include <platform/interrupts.h>
36#include <platform/bcm28xx.h>
37
38#if BCM2836
39#include <arch/arm.h>
40#include <arch/arm/mmu.h>
41
42/* initial memory mappings. parsed by start.S */
43struct mmu_initial_mapping mmu_initial_mappings[] = {
44 /* 1GB of sdram space */
45 {
46 .phys = SDRAM_BASE,
47 .virt = KERNEL_BASE,
48 .size = MEMSIZE,
49 .flags = 0,
50 .name = "memory"
51 },
52
53 /* peripherals */
54 {
55 .phys = BCM_PERIPH_BASE_PHYS,
56 .virt = BCM_PERIPH_BASE_VIRT,
57 .size = BCM_PERIPH_SIZE,
58 .flags = MMU_INITIAL_MAPPING_FLAG_DEVICE,
59 .name = "bcm peripherals"
60 },
61
62 /* identity map to let the boot code run */
63 {
64 .phys = SDRAM_BASE,
65 .virt = SDRAM_BASE,
66 .size = 16*1024*1024,
67 .flags = MMU_INITIAL_MAPPING_TEMPORARY
68 },
69 /* null entry to terminate the list */
70 { 0 }
71};
72
73#define DEBUG_UART 0
74
75#elif BCM2837
76#include <libfdt.h>
77#include <arch/arm64.h>
78#include <arch/arm64/mmu.h>
79
80/* initial memory mappings. parsed by start.S */
81struct mmu_initial_mapping mmu_initial_mappings[] = {
82 /* 1GB of sdram space */
83 {
84 .phys = SDRAM_BASE,
85 .virt = KERNEL_BASE,
86 .size = MEMORY_APERTURE_SIZE,
87 .flags = 0,
88 .name = "memory"
89 },
90
91 /* peripherals */
92 {
93 .phys = BCM_PERIPH_BASE_PHYS,
94 .virt = BCM_PERIPH_BASE_VIRT,
95 .size = BCM_PERIPH_SIZE,
96 .flags = MMU_INITIAL_MAPPING_FLAG_DEVICE,
97 .name = "bcm peripherals"
98 },
99
100 /* null entry to terminate the list */
101 { 0 }
102};
103
104#define DEBUG_UART 1
105
106#else
107#error Unknown BCM28XX Variant
108#endif
109
110extern void intc_init(void);
111extern void arm_reset(void);
112
113
114static pmm_arena_t arena = {
115 .name = "sdram",
116 .base = SDRAM_BASE,
117 .size = MEMSIZE,
118 .flags = PMM_ARENA_FLAG_KMAP,
119};
120
121void platform_init_mmu_mappings(void)
122{
123}
124
125void platform_early_init(void)
126{
127 uart_init_early();
128
129 intc_init();
130
131 arm_generic_timer_init(INTERRUPT_ARM_LOCAL_CNTPNSIRQ, 1000000);
132
133#if BCM2837
134 /* look for a flattened device tree just before the kernel */
135 const void *fdt = (void *)KERNEL_BASE;
136 int err = fdt_check_header(fdt);
137 if (err >= 0) {
138 /* walk the nodes, looking for 'memory' */
139 int depth = 0;
140 int offset = 0;
141 for (;;) {
142 offset = fdt_next_node(fdt, offset, &depth);
143 if (offset < 0)
144 break;
145
146 /* get the name */
147 const char *name = fdt_get_name(fdt, offset, NULL);
148 if (!name)
149 continue;
150
151 /* look for the 'memory' property */
152 if (strcmp(name, "memory") == 0) {
153 printf("Found memory in fdt\n");
154 int lenp;
155 const void *prop_ptr = fdt_getprop(fdt, offset, "reg", &lenp);
156 if (prop_ptr && lenp == 0x10) {
157 /* we're looking at a memory descriptor */
158 //uint64_t base = fdt64_to_cpu(*(uint64_t *)prop_ptr);
159 uint64_t len = fdt64_to_cpu(*((const uint64_t *)prop_ptr + 1));
160
161 /* trim size on certain platforms */
162#if ARCH_ARM
163 if (len > 1024*1024*1024U) {
164 len = 1024*1024*1024; /* only use the first 1GB on ARM32 */
165 printf("trimming memory to 1GB\n");
166 }
167#endif
168
169 /* set the size in the pmm arena */
170 arena.size = len;
171 }
172 }
173 }
174 }
175
176#endif
177
178 /* add the main memory arena */
179 pmm_add_arena(&arena);
180
181#if BCM2837
182 /* reserve the first 64k of ram, which should be holding the fdt */
183 struct list_node list = LIST_INITIAL_VALUE(list);
184 pmm_alloc_range(MEMBASE, 0x80000 / PAGE_SIZE, &list);
185#endif
186
187#if WITH_SMP
188#if BCM2837
189 uintptr_t sec_entry = &arm_reset - KERNEL_ASPACE_BASE;
190 unsigned long long *spin_table = (void *)(KERNEL_ASPACE_BASE + 0xd8);
191
192 for (uint i = 1; i <= 3; i++) {
193 spin_table[i] = sec_entry;
194 __asm__ __volatile__ ("" : : : "memory");
195 arch_clean_cache_range(0xffff000000000000,256);
196 __asm__ __volatile__("sev");
197 }
198#else
199 /* start the other cpus */
200 uintptr_t sec_entry = (uintptr_t)&arm_reset;
201 sec_entry -= (KERNEL_BASE - MEMBASE);
202 for (uint i = 1; i <= 3; i++) {
203 *REG32(ARM_LOCAL_BASE + 0x8c + 0x10 * i) = sec_entry;
204 }
205#endif
206#endif
207}
208
209void platform_init(void)
210{
211 uart_init();
212}
213
214void platform_dputc(char c)
215{
216 if (c == '\n')
217 uart_putc(DEBUG_UART, '\r');
218 uart_putc(DEBUG_UART, c);
219}
220
221int platform_dgetc(char *c, bool wait)
222{
223 int ret = uart_getc(DEBUG_UART, wait);
224 if (ret == -1)
225 return -1;
226 *c = ret;
227 return 0;
228}
229