blob: b17d5ceb4d1a52cc41cd9b434ed4bdec7ffd2552 [file] [log] [blame]
rjw1f884582022-01-06 17:20:42 +08001LOCAL_DIR := $(GET_LOCAL_DIR)
2
3MODULE := $(LOCAL_DIR)
4
5# ROMBASE, MEMBASE, and MEMSIZE are required for the linker script
6
7ARCH := arm
8
9ifeq ($(LPC_CHIP),LPC1549)
10MEMSIZE ?= 36864
11MEMBASE := 0x02000000
12ROMBASE := 0x00000000
13ARM_CPU := cortex-m3
14endif
15
16MODULE_DEFINES += PART_$(LPC_CHIP)
17
18ifeq ($(MEMSIZE),)
19$(error need to define MEMSIZE)
20endif
21
22MODULE_SRCS += \
23 $(LOCAL_DIR)/init.c \
24 $(LOCAL_DIR)/debug.c \
25 $(LOCAL_DIR)/vectab.c \
26
27# $(LOCAL_DIR)/gpio.c \
28 $(LOCAL_DIR)/usbc.c \
29
30
31# $(LOCAL_DIR)/debug.c \
32 $(LOCAL_DIR)/interrupts.c \
33 $(LOCAL_DIR)/platform_early.c \
34 $(LOCAL_DIR)/platform.c \
35 $(LOCAL_DIR)/timer.c \
36 $(LOCAL_DIR)/init_clock.c \
37 $(LOCAL_DIR)/init_clock_48mhz.c \
38 $(LOCAL_DIR)/mux.c \
39 $(LOCAL_DIR)/emac_dev.c
40
41# use a two segment memory layout, where all of the read-only sections
42# of the binary reside in rom, and the read/write are in memory. The
43# ROMBASE, MEMBASE, and MEMSIZE make variables are required to be set
44# for the linker script to be generated properly.
45#
46LINKER_SCRIPT += \
47 $(BUILDDIR)/system-twosegment.ld
48
49MODULE_DEPS += \
50 arch/arm/arm-m/systick \
51 platform/lpc15xx/lpcopen \
52 lib/cbuf
53
54LPCSIGNEDBIN := $(OUTBIN).sign
55LPCCHECK := $(LOCAL_DIR)/lpccheck.py
56EXTRA_BUILDDEPS += $(LPCSIGNEDBIN)
57GENERATED += $(LPCSIGNEDBIN)
58
59$(LPCSIGNEDBIN): $(OUTBIN) $(LPCCHECK)
60 @$(MKDIR)
61 $(NOECHO)echo generating $@; \
62 cp $< $@.tmp; \
63 $(LPCCHECK) $@.tmp; \
64 mv $@.tmp $@
65
66include make/module.mk