| rjw | 1f88458 | 2022-01-06 17:20:42 +0800 | [diff] [blame^] | 1 | /* |
| 2 | * Copyright (c) 2016 MediaTek Inc. |
| 3 | * |
| 4 | * Permission is hereby granted, free of charge, to any person obtaining |
| 5 | * a copy of this software and associated documentation files |
| 6 | * (the "Software"), to deal in the Software without restriction, |
| 7 | * including without limitation the rights to use, copy, modify, merge, |
| 8 | * publish, distribute, sublicense, and/or sell copies of the Software, |
| 9 | * and to permit persons to whom the Software is furnished to do so, |
| 10 | * subject to the following conditions: |
| 11 | * |
| 12 | * The above copyright notice and this permission notice shall be |
| 13 | * included in all copies or substantial portions of the Software. |
| 14 | * |
| 15 | * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, |
| 16 | * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF |
| 17 | * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. |
| 18 | * IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY |
| 19 | * CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, |
| 20 | * TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE |
| 21 | * SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE. |
| 22 | */ |
| 23 | #if ARCH_ARM |
| 24 | #include <arch/arm.h> |
| 25 | #endif |
| 26 | #if ARCH_ARM64 |
| 27 | #include <arch/arm64.h> |
| 28 | #endif |
| 29 | #include <reg.h> |
| 30 | #include <debug.h> |
| 31 | #include <kernel/thread.h> |
| 32 | #include <platform/mt_irq.h> |
| 33 | #include <platform/interrupts.h> |
| 34 | #include <platform/mt_reg_base.h> |
| 35 | |
| 36 | #define write_r(a, v) writel(v, a) /* need to fix it */ |
| 37 | |
| 38 | /* set for mt_gic */ |
| 39 | void mt_irq_set_polarity(unsigned int irq, unsigned int polarity) |
| 40 | { |
| 41 | unsigned int offset; |
| 42 | unsigned int reg_index; |
| 43 | unsigned int value; |
| 44 | |
| 45 | /* peripheral device's IRQ line is using GIC's SPI, and line ID >= GIC_PRIVATE_SIGNALS */ |
| 46 | if (irq < GIC_PRIVATE_SIGNALS) { |
| 47 | dprintf(SPEW, "The Interrupt ID < 32, please check!\n"); |
| 48 | return; |
| 49 | } |
| 50 | |
| 51 | offset = (irq - GIC_PRIVATE_SIGNALS) & 0x1F; |
| 52 | reg_index = (irq - GIC_PRIVATE_SIGNALS) >> 5; |
| 53 | if (polarity == 0) { |
| 54 | value = readl(INT_POL_CTL0 + (reg_index * 4)); |
| 55 | value |= (1 << offset); /* always invert the incoming IRQ's polarity */ |
| 56 | write_r((INT_POL_CTL0 + (reg_index * 4)), value); |
| 57 | } else { |
| 58 | value = readl(INT_POL_CTL0 + (reg_index * 4)); |
| 59 | value &= ~(0x1 << offset); |
| 60 | write_r(INT_POL_CTL0 + (reg_index * 4), value); |
| 61 | |
| 62 | } |
| 63 | } |
| 64 | |
| 65 | /* set for arm gic */ |
| 66 | void mt_irq_set_sens(unsigned int irq, unsigned int sens) |
| 67 | { |
| 68 | unsigned int config; |
| 69 | |
| 70 | if (sens == EDGE_SENSITIVE) { |
| 71 | config = readl(GIC_DIST_BASE + GIC_DIST_CONFIG + (irq / 16) * 4); |
| 72 | config |= (0x2 << (irq % 16) * 2); |
| 73 | write_r(GIC_DIST_BASE + GIC_DIST_CONFIG + (irq / 16) * 4, config); |
| 74 | } else { |
| 75 | config = readl(GIC_DIST_BASE + GIC_DIST_CONFIG + (irq / 16) * 4); |
| 76 | config &= ~(0x2 << (irq % 16) * 2); |
| 77 | write_r( GIC_DIST_BASE + GIC_DIST_CONFIG + (irq / 16) * 4, config); |
| 78 | } |
| 79 | DSB; |
| 80 | } |