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rjw1f884582022-01-06 17:20:42 +08001/*
2 * Copyright (c) 2018 MediaTek Inc.
3 *
4 * Permission is hereby granted, free of charge, to any person obtaining
5 * a copy of this software and associated documentation files
6 * (the "Software"), to deal in the Software without restriction,
7 * including without limitation the rights to use, copy, modify, merge,
8 * publish, distribute, sublicense, and/or sell copies of the Software,
9 * and to permit persons to whom the Software is furnished to do so,
10 * subject to the following conditions:
11 *
12 * The above copyright notice and this permission notice shall be
13 * included in all copies or substantial portions of the Software.
14 *
15 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
16 * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
17 * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.
18 * IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY
19 * CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT,
20 * TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE
21 * SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
22*/
23#include <arch/arm64.h>
24#include <reg.h>
25#include <debug.h>
26#include <kernel/thread.h>
27#include <platform/gic.h>
28#include <platform/mt_irq.h>
29#include <platform/mt_gic_v3.h>
30#include <platform/interrupts.h>
31#include <platform/mt_reg_base.h>
32
33/* set for mt_gic */
34void mt_irq_set_polarity(unsigned int irq, unsigned int polarity)
35{
36 unsigned int offset;
37 unsigned int reg_index;
38 unsigned int value;
39
40 /* peripheral device's IRQ line is using GIC's SPI, and line ID >= GIC_PRIVATE_SIGNALS */
41 if (irq < GIC_PRIVATE_SIGNALS) {
42 dprintf(SPEW, "The Interrupt ID < 32, please check!\n");
43 return;
44 }
45
46 offset = (irq - GIC_PRIVATE_SIGNALS) & 0x1F;
47 reg_index = (irq - GIC_PRIVATE_SIGNALS) >> 5;
48 if (polarity == 0) {
49 value = readl(INT_POL_CTL0 + (reg_index * 4));
50 value |= (1 << offset); /* always invert the incoming IRQ's polarity */
51 writel(value, (INT_POL_CTL0 + (reg_index * 4)));
52 } else {
53 value = readl(INT_POL_CTL0 + (reg_index * 4));
54 value &= ~(0x1 << offset);
55 writel(value, INT_POL_CTL0 + (reg_index * 4));
56 }
57}
58
59/* set for arm gic */
60void mt_irq_set_sens(unsigned int irq, unsigned int sens)
61{
62 unsigned int config;
63
64 if (sens == EDGE_SENSITIVE) {
65 config = readl(GIC_DIST_BASE + GIC_DIST_CONFIG + (irq / 16) * 4);
66 config |= (0x2 << (irq % 16) * 2);
67 writel(config, GIC_DIST_BASE + GIC_DIST_CONFIG + (irq / 16) * 4);
68 } else {
69 config = readl(GIC_DIST_BASE + GIC_DIST_CONFIG + (irq / 16) * 4);
70 config &= ~(0x2 << (irq % 16) * 2);
71 writel(config, GIC_DIST_BASE + GIC_DIST_CONFIG + (irq / 16) * 4);
72 }
73 DSB;
74}