rjw | 1f88458 | 2022-01-06 17:20:42 +0800 | [diff] [blame^] | 1 | /* |
| 2 | * Copyright (c) 2013 Corey Tabaka |
| 3 | * |
| 4 | * Permission is hereby granted, free of charge, to any person obtaining |
| 5 | * a copy of this software and associated documentation files |
| 6 | * (the "Software"), to deal in the Software without restriction, |
| 7 | * including without limitation the rights to use, copy, modify, merge, |
| 8 | * publish, distribute, sublicense, and/or sell copies of the Software, |
| 9 | * and to permit persons to whom the Software is furnished to do so, |
| 10 | * subject to the following conditions: |
| 11 | * |
| 12 | * The above copyright notice and this permission notice shall be |
| 13 | * included in all copies or substantial portions of the Software. |
| 14 | * |
| 15 | * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, |
| 16 | * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF |
| 17 | * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. |
| 18 | * IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY |
| 19 | * CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, |
| 20 | * TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE |
| 21 | * SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE. |
| 22 | */ |
| 23 | |
| 24 | #include <reg.h> |
| 25 | #include <debug.h> |
| 26 | #include <trace.h> |
| 27 | #include <assert.h> |
| 28 | #include <err.h> |
| 29 | #include <malloc.h> |
| 30 | #include <arch/x86.h> |
| 31 | #include <sys/types.h> |
| 32 | #include <platform/interrupts.h> |
| 33 | #include <platform/ide.h> |
| 34 | #include <platform/pc.h> |
| 35 | #include <platform.h> |
| 36 | #include <dev/pci.h> |
| 37 | #include <dev/driver.h> |
| 38 | #include <dev/class/block.h> |
| 39 | #include <kernel/event.h> |
| 40 | |
| 41 | #define LOCAL_TRACE 1 |
| 42 | |
| 43 | // status register bits |
| 44 | #define IDE_CTRL_BSY 0x80 |
| 45 | #define IDE_DRV_RDY 0x40 |
| 46 | #define IDE_DRV_WRTFLT 0x20 |
| 47 | #define IDE_DRV_SKCOMP 0x10 |
| 48 | #define IDE_DRV_DRQ 0x08 |
| 49 | #define IDE_DRV_CORDAT 0x04 |
| 50 | #define IDE_DRV_IDX 0x02 |
| 51 | #define IDE_DRV_ERR 0x01 |
| 52 | |
| 53 | // ATA commands |
| 54 | #define ATA_NOP 0x00 |
| 55 | #define ATA_ATAPIRESET 0x08 |
| 56 | #define ATA_RECALIBRATE 0x10 |
| 57 | #define ATA_READMULT_RET 0x20 |
| 58 | #define ATA_READMULT 0x21 |
| 59 | #define ATA_READECC_RET 0x22 |
| 60 | #define ATA_READECC 0x23 |
| 61 | #define ATA_WRITEMULT_RET 0x30 |
| 62 | #define ATA_WRITEMULT 0x31 |
| 63 | #define ATA_WRITEECC_RET 0x32 |
| 64 | #define ATA_WRITEECC 0x33 |
| 65 | #define ATA_VERIFYMULT_RET 0x40 |
| 66 | #define ATA_VERIFYMULT 0x41 |
| 67 | #define ATA_FORMATTRACK 0x50 |
| 68 | #define ATA_SEEK 0x70 |
| 69 | #define ATA_DIAG 0x90 |
| 70 | #define ATA_INITPARAMS 0x91 |
| 71 | #define ATA_ATAPIPACKET 0xA0 |
| 72 | #define ATA_ATAPIIDENTIFY 0xA1 |
| 73 | #define ATA_ATAPISERVICE 0xA2 |
| 74 | #define ATA_READ_DMA 0xC8 |
| 75 | #define ATA_READ_DMA_EXT 0x25 |
| 76 | #define ATA_WRITE_DMA 0xCA |
| 77 | #define ATA_WRITE_DMA_EXT 0x35 |
| 78 | #define ATA_GETDEVINFO 0xEC |
| 79 | #define ATA_ATAPISETFEAT 0xEF |
| 80 | |
| 81 | // error codes |
| 82 | #define IDE_NOERROR 0 |
| 83 | #define IDE_ADDRESSMARK 1 |
| 84 | #define IDE_CYLINDER0 2 |
| 85 | #define IDE_INVALIDCOMMAND 3 |
| 86 | #define IDE_MEDIAREQ 4 |
| 87 | #define IDE_SECTNOTFOUND 5 |
| 88 | #define IDE_MEDIACHANGED 6 |
| 89 | #define IDE_BADDATA 7 |
| 90 | #define IDE_BADSECTOR 8 |
| 91 | #define IDE_TIMEOUT 9 |
| 92 | #define IDE_DMAERROR 10 |
| 93 | |
| 94 | enum { |
| 95 | IDE_REG_DATA = 0, |
| 96 | IDE_REG_ERROR = 1, |
| 97 | IDE_REG_PRECOMP = 1, |
| 98 | IDE_REG_SECTOR_COUNT = 2, |
| 99 | IDE_REG_SECTOR_NUM = 3, |
| 100 | IDE_REG_CYLINDER_LOW = 4, |
| 101 | IDE_REG_CYLINDER_HIGH = 5, |
| 102 | IDE_REG_DRIVE_HEAD = 6, |
| 103 | IDE_REG_STATUS = 7, |
| 104 | IDE_REG_COMMAND = 7, |
| 105 | IDE_REG_ALT_STATUS = 8, |
| 106 | IDE_REG_DEVICE_CONTROL = 8, |
| 107 | |
| 108 | IDE_REG_NUM, |
| 109 | }; |
| 110 | |
| 111 | enum { |
| 112 | TYPE_NONE, |
| 113 | TYPE_UNKNOWN, |
| 114 | TYPE_FLOPPY, |
| 115 | TYPE_IDECDROM, |
| 116 | TYPE_SCSICDROM, |
| 117 | TYPE_IDEDISK, |
| 118 | TYPE_SCSIDISK |
| 119 | }; |
| 120 | |
| 121 | static const char *ide_type_str[] = { |
| 122 | "None", |
| 123 | "Unknown", |
| 124 | "Floppy", |
| 125 | "IDE CDROM", |
| 126 | "SCSI CDROM", |
| 127 | "IDE Disk", |
| 128 | "SCSI Disk", |
| 129 | }; |
| 130 | |
| 131 | static const char *ide_error_str[] = { |
| 132 | "Unknown error", |
| 133 | "Address mark not found", |
| 134 | "Cylinder 0 not found", |
| 135 | "Command aborted - invalid command", |
| 136 | "Media change requested", |
| 137 | "ID or target sector not found", |
| 138 | "Media changed", |
| 139 | "Uncorrectable data error", |
| 140 | "Bad sector detected", |
| 141 | "Command timed out", |
| 142 | "DMA error" |
| 143 | }; |
| 144 | |
| 145 | struct ide_driver_state { |
| 146 | int irq; |
| 147 | const uint16_t *regs; |
| 148 | |
| 149 | event_t completion; |
| 150 | |
| 151 | int type[2]; |
| 152 | struct { |
| 153 | int sectors; |
| 154 | int sector_size; |
| 155 | } drive[2]; |
| 156 | }; |
| 157 | |
| 158 | static const uint16_t ide_device_regs[][IDE_REG_NUM] = { |
| 159 | { 0x01F0, 0x01F1, 0x01F2, 0x01F3, 0x01F4, 0x01F5, 0x01F6, 0x01F7, 0x03F6 }, |
| 160 | { 0x0170, 0x0171, 0x0172, 0x0173, 0x0174, 0x0175, 0x0176, 0x0177, 0x0376 }, |
| 161 | }; |
| 162 | |
| 163 | static const int ide_device_irqs[] = { |
| 164 | INT_IDE0, |
| 165 | INT_IDE1, |
| 166 | }; |
| 167 | |
| 168 | static status_t ide_init(struct device *dev); |
| 169 | |
| 170 | static enum handler_return ide_irq_handler(void *arg); |
| 171 | |
| 172 | static status_t ide_init(struct device *dev); |
| 173 | static ssize_t ide_get_block_size(struct device *dev); |
| 174 | static ssize_t ide_get_block_count(struct device *dev); |
| 175 | static ssize_t ide_write(struct device *dev, off_t offset, const void *buf, size_t count); |
| 176 | static ssize_t ide_read(struct device *dev, off_t offset, void *buf, size_t count); |
| 177 | |
| 178 | static struct block_ops the_ops = { |
| 179 | .std = { |
| 180 | .init = ide_init, |
| 181 | }, |
| 182 | .get_block_size = ide_get_block_size, |
| 183 | .get_block_count = ide_get_block_count, |
| 184 | .write = ide_write, |
| 185 | .read = ide_read, |
| 186 | }; |
| 187 | |
| 188 | DRIVER_EXPORT(ide, &the_ops.std); |
| 189 | |
| 190 | static uint8_t ide_read_reg8(struct device *dev, int index); |
| 191 | static uint16_t ide_read_reg16(struct device *dev, int index); |
| 192 | static uint32_t ide_read_reg32(struct device *dev, int index); |
| 193 | |
| 194 | static void ide_write_reg8(struct device *dev, int index, uint8_t value); |
| 195 | static void ide_write_reg16(struct device *dev, int index, uint16_t value); |
| 196 | static void ide_write_reg32(struct device *dev, int index, uint32_t value); |
| 197 | |
| 198 | static void ide_read_reg8_array(struct device *dev, int index, void *buf, size_t count); |
| 199 | static void ide_read_reg16_array(struct device *dev, int index, void *buf, size_t count); |
| 200 | static void ide_read_reg32_array(struct device *dev, int index, void *buf, size_t count); |
| 201 | |
| 202 | static void ide_write_reg8_array(struct device *dev, int index, const void *buf, size_t count); |
| 203 | static void ide_write_reg16_array(struct device *dev, int index, const void *buf, size_t count); |
| 204 | static void ide_write_reg32_array(struct device *dev, int index, const void *buf, size_t count); |
| 205 | |
| 206 | static void ide_device_select(struct device *dev, int index); |
| 207 | static void ide_device_reset(struct device *dev); |
| 208 | static void ide_delay_400ns(struct device *dev); |
| 209 | static int ide_poll_status(struct device *dev, uint8_t on_mask, uint8_t off_mask); |
| 210 | static int ide_eval_error(struct device *dev); |
| 211 | static void ide_detect_drives(struct device *dev); |
| 212 | static int ide_wait_for_completion(struct device *dev); |
| 213 | static int ide_detect_ata(struct device *dev, int index); |
| 214 | static void ide_lba_setup(struct device *dev, uint32_t addr, int index); |
| 215 | |
| 216 | static status_t ide_init(struct device *dev) |
| 217 | { |
| 218 | pci_location_t loc; |
| 219 | pci_config_t pci_config; |
| 220 | status_t res = NO_ERROR; |
| 221 | uint32_t i; |
| 222 | int err; |
| 223 | |
| 224 | if (!dev) |
| 225 | return ERR_INVALID_ARGS; |
| 226 | |
| 227 | if (!dev->config) |
| 228 | return ERR_NOT_CONFIGURED; |
| 229 | |
| 230 | __UNUSED const struct platform_ide_config *config = dev->config; |
| 231 | |
| 232 | err = pci_find_pci_class_code(&loc, 0x010180, 0); |
| 233 | if (err != _PCI_SUCCESSFUL) { |
| 234 | LTRACEF("Failed to find IDE device\n"); |
| 235 | res = ERR_NOT_FOUND; |
| 236 | } |
| 237 | |
| 238 | LTRACEF("Found IDE device at %02x:%02x\n", loc.bus, loc.dev_fn); |
| 239 | |
| 240 | for (i=0; i < sizeof(pci_config) / sizeof(uint32_t); i++) { |
| 241 | uint32_t reg = sizeof(uint32_t) * i; |
| 242 | |
| 243 | err = pci_read_config_word(&loc, reg, ((uint32_t *) &pci_config) + i); |
| 244 | if (err != _PCI_SUCCESSFUL) { |
| 245 | LTRACEF("Failed to read config reg %d: 0x%02x\n", reg, err); |
| 246 | res = ERR_NOT_CONFIGURED; |
| 247 | goto done; |
| 248 | } |
| 249 | } |
| 250 | |
| 251 | for (i=0; i < 6; i++) { |
| 252 | LTRACEF("BAR[%d]: 0x%08x\n", i, pci_config.base_addresses[i]); |
| 253 | } |
| 254 | |
| 255 | struct ide_driver_state *state = malloc(sizeof(struct ide_driver_state)); |
| 256 | if (!state) { |
| 257 | res = ERR_NO_MEMORY; |
| 258 | goto done; |
| 259 | } |
| 260 | dev->state = state; |
| 261 | |
| 262 | /* TODO: select io regs and irq based on device index */ |
| 263 | state->irq = ide_device_irqs[0]; |
| 264 | state->regs = ide_device_regs[0]; |
| 265 | state->type[0] = state->type[1] = TYPE_NONE; |
| 266 | |
| 267 | event_init(&state->completion, false, EVENT_FLAG_AUTOUNSIGNAL); |
| 268 | |
| 269 | register_int_handler(state->irq, ide_irq_handler, dev); |
| 270 | unmask_interrupt(state->irq); |
| 271 | |
| 272 | /* enable interrupts */ |
| 273 | ide_write_reg8(dev, IDE_REG_DEVICE_CONTROL, 0); |
| 274 | |
| 275 | /* detect drives */ |
| 276 | ide_detect_drives(dev); |
| 277 | |
| 278 | done: |
| 279 | return res; |
| 280 | } |
| 281 | |
| 282 | static enum handler_return ide_irq_handler(void *arg) |
| 283 | { |
| 284 | struct device *dev = arg; |
| 285 | struct ide_driver_state *state = dev->state; |
| 286 | uint8_t val; |
| 287 | |
| 288 | val = ide_read_reg8(dev, IDE_REG_STATUS); |
| 289 | |
| 290 | if ((val & IDE_DRV_ERR) == 0) { |
| 291 | event_signal(&state->completion, false); |
| 292 | |
| 293 | return INT_RESCHEDULE; |
| 294 | } else { |
| 295 | return INT_NO_RESCHEDULE; |
| 296 | } |
| 297 | } |
| 298 | |
| 299 | static ssize_t ide_get_block_size(struct device *dev) |
| 300 | { |
| 301 | DEBUG_ASSERT(dev); |
| 302 | DEBUG_ASSERT(dev->state); |
| 303 | |
| 304 | struct ide_driver_state *state = dev->state; |
| 305 | return state->drive[0].sector_size; |
| 306 | } |
| 307 | |
| 308 | static ssize_t ide_get_block_count(struct device *dev) |
| 309 | { |
| 310 | DEBUG_ASSERT(dev); |
| 311 | DEBUG_ASSERT(dev->state); |
| 312 | |
| 313 | struct ide_driver_state *state = dev->state; |
| 314 | return state->drive[0].sectors; |
| 315 | } |
| 316 | |
| 317 | static ssize_t ide_write(struct device *dev, off_t offset, const void *buf, size_t count) |
| 318 | { |
| 319 | DEBUG_ASSERT(dev); |
| 320 | DEBUG_ASSERT(dev->state); |
| 321 | |
| 322 | __UNUSED struct ide_driver_state *state = dev->state; |
| 323 | |
| 324 | size_t sectors, do_sectors, i; |
| 325 | const uint16_t *ubuf = buf; |
| 326 | int index = 0; // hard code drive for now |
| 327 | ssize_t ret = 0; |
| 328 | int err; |
| 329 | |
| 330 | ide_device_select(dev, index); |
| 331 | ide_delay_400ns(dev); |
| 332 | |
| 333 | err = ide_poll_status(dev, 0, IDE_CTRL_BSY | IDE_DRV_DRQ); |
| 334 | if (err) { |
| 335 | LTRACEF("Error while waiting for controller: %s\n", ide_error_str[err]); |
| 336 | ret = ERR_GENERIC; |
| 337 | goto done; |
| 338 | } |
| 339 | |
| 340 | sectors = count; |
| 341 | |
| 342 | while (sectors > 0) { |
| 343 | do_sectors = sectors; |
| 344 | |
| 345 | if (do_sectors > 256) |
| 346 | do_sectors = 256; |
| 347 | |
| 348 | err = ide_poll_status(dev, 0, IDE_CTRL_BSY); |
| 349 | if (err) { |
| 350 | LTRACEF("Error while waiting for controller: %s\n", ide_error_str[err]); |
| 351 | ret = ERR_GENERIC; |
| 352 | goto done; |
| 353 | } |
| 354 | |
| 355 | ide_lba_setup(dev, offset, index); |
| 356 | |
| 357 | if (do_sectors == 256) |
| 358 | ide_write_reg8(dev, IDE_REG_SECTOR_COUNT, 0); |
| 359 | else |
| 360 | ide_write_reg8(dev, IDE_REG_SECTOR_COUNT, do_sectors); |
| 361 | |
| 362 | err = ide_poll_status(dev, IDE_DRV_RDY, 0); |
| 363 | if (err) { |
| 364 | LTRACEF("Error while waiting for controller: %s\n", ide_error_str[err]); |
| 365 | ret = ERR_GENERIC; |
| 366 | goto done; |
| 367 | } |
| 368 | |
| 369 | ide_write_reg8(dev, IDE_REG_COMMAND, ATA_WRITEMULT_RET); |
| 370 | ide_delay_400ns(dev); |
| 371 | |
| 372 | for (i=0; i < do_sectors; i++) { |
| 373 | err = ide_poll_status(dev, IDE_DRV_DRQ, 0); |
| 374 | if (err) { |
| 375 | LTRACEF("Error while waiting for drive: %s\n", ide_error_str[err]); |
| 376 | ret = ERR_GENERIC; |
| 377 | goto done; |
| 378 | } |
| 379 | |
| 380 | ide_write_reg16_array(dev, IDE_REG_DATA, ubuf, 256); |
| 381 | |
| 382 | ubuf += 256; |
| 383 | } |
| 384 | |
| 385 | err = ide_wait_for_completion(dev); |
| 386 | if (err) { |
| 387 | LTRACEF("Error waiting for completion: %s\n", ide_error_str[err]); |
| 388 | ret = ERR_TIMED_OUT; |
| 389 | goto done; |
| 390 | } |
| 391 | |
| 392 | sectors -= do_sectors; |
| 393 | offset += do_sectors; |
| 394 | } |
| 395 | |
| 396 | ret = count; |
| 397 | |
| 398 | done: |
| 399 | return ret; |
| 400 | } |
| 401 | |
| 402 | static ssize_t ide_read(struct device *dev, off_t offset, void *buf, size_t count) |
| 403 | { |
| 404 | DEBUG_ASSERT(dev); |
| 405 | DEBUG_ASSERT(dev->state); |
| 406 | |
| 407 | __UNUSED struct ide_driver_state *state = dev->state; |
| 408 | |
| 409 | size_t sectors, do_sectors, i; |
| 410 | uint16_t *ubuf = buf; |
| 411 | int index = 0; // hard code drive for now |
| 412 | ssize_t ret = 0; |
| 413 | int err; |
| 414 | |
| 415 | ide_device_select(dev, index); |
| 416 | ide_delay_400ns(dev); |
| 417 | |
| 418 | err = ide_poll_status(dev, 0, IDE_CTRL_BSY | IDE_DRV_DRQ); |
| 419 | if (err) { |
| 420 | LTRACEF("Error while waiting for controller: %s\n", ide_error_str[err]); |
| 421 | ret = ERR_GENERIC; |
| 422 | goto done; |
| 423 | } |
| 424 | |
| 425 | sectors = count; |
| 426 | |
| 427 | while (sectors > 0) { |
| 428 | do_sectors = sectors; |
| 429 | |
| 430 | if (do_sectors > 256) |
| 431 | do_sectors = 256; |
| 432 | |
| 433 | err = ide_poll_status(dev, 0, IDE_CTRL_BSY); |
| 434 | if (err) { |
| 435 | LTRACEF("Error while waiting for controller: %s\n", ide_error_str[err]); |
| 436 | ret = ERR_GENERIC; |
| 437 | goto done; |
| 438 | } |
| 439 | |
| 440 | ide_lba_setup(dev, offset, index); |
| 441 | |
| 442 | if (do_sectors == 256) |
| 443 | ide_write_reg8(dev, IDE_REG_SECTOR_COUNT, 0); |
| 444 | else |
| 445 | ide_write_reg8(dev, IDE_REG_SECTOR_COUNT, do_sectors); |
| 446 | |
| 447 | err = ide_poll_status(dev, IDE_DRV_RDY, 0); |
| 448 | if (err) { |
| 449 | LTRACEF("Error while waiting for controller: %s\n", ide_error_str[err]); |
| 450 | ret = ERR_GENERIC; |
| 451 | goto done; |
| 452 | } |
| 453 | |
| 454 | ide_write_reg8(dev, IDE_REG_COMMAND, ATA_READMULT_RET); |
| 455 | ide_delay_400ns(dev); |
| 456 | |
| 457 | for (i=0; i < do_sectors; i++) { |
| 458 | err = ide_poll_status(dev, IDE_DRV_DRQ, 0); |
| 459 | if (err) { |
| 460 | LTRACEF("Error while waiting for drive: %s\n", ide_error_str[err]); |
| 461 | ret = ERR_GENERIC; |
| 462 | goto done; |
| 463 | } |
| 464 | |
| 465 | ide_read_reg16_array(dev, IDE_REG_DATA, ubuf, 256); |
| 466 | |
| 467 | ubuf += 256; |
| 468 | } |
| 469 | |
| 470 | err = ide_wait_for_completion(dev); |
| 471 | if (err) { |
| 472 | LTRACEF("Error waiting for completion: %s\n", ide_error_str[err]); |
| 473 | ret = ERR_TIMED_OUT; |
| 474 | goto done; |
| 475 | } |
| 476 | |
| 477 | sectors -= do_sectors; |
| 478 | offset += do_sectors; |
| 479 | } |
| 480 | |
| 481 | ret = count; |
| 482 | |
| 483 | done: |
| 484 | return ret; |
| 485 | } |
| 486 | |
| 487 | static uint8_t ide_read_reg8(struct device *dev, int index) |
| 488 | { |
| 489 | DEBUG_ASSERT(index >= 0 && index < IDE_REG_NUM); |
| 490 | |
| 491 | struct ide_driver_state *state = dev->state; |
| 492 | |
| 493 | return inp(state->regs[index]); |
| 494 | } |
| 495 | |
| 496 | static uint16_t ide_read_reg16(struct device *dev, int index) |
| 497 | { |
| 498 | DEBUG_ASSERT(index >= 0 && index < IDE_REG_NUM); |
| 499 | |
| 500 | struct ide_driver_state *state = dev->state; |
| 501 | |
| 502 | return inpw(state->regs[index]); |
| 503 | } |
| 504 | |
| 505 | static uint32_t ide_read_reg32(struct device *dev, int index) |
| 506 | { |
| 507 | DEBUG_ASSERT(index >= 0 && index < IDE_REG_NUM); |
| 508 | |
| 509 | struct ide_driver_state *state = dev->state; |
| 510 | |
| 511 | return inpd(state->regs[index]); |
| 512 | } |
| 513 | |
| 514 | static void ide_read_reg8_array(struct device *dev, int index, void *buf, size_t count) |
| 515 | { |
| 516 | DEBUG_ASSERT(index >= 0 && index < IDE_REG_NUM); |
| 517 | |
| 518 | struct ide_driver_state *state = dev->state; |
| 519 | |
| 520 | inprep(state->regs[index], (uint8_t *) buf, count); |
| 521 | } |
| 522 | |
| 523 | static void ide_read_reg16_array(struct device *dev, int index, void *buf, size_t count) |
| 524 | { |
| 525 | DEBUG_ASSERT(index >= 0 && index < IDE_REG_NUM); |
| 526 | |
| 527 | struct ide_driver_state *state = dev->state; |
| 528 | |
| 529 | inpwrep(state->regs[index], (uint16_t *) buf, count); |
| 530 | } |
| 531 | |
| 532 | static void ide_read_reg32_array(struct device *dev, int index, void *buf, size_t count) |
| 533 | { |
| 534 | DEBUG_ASSERT(index >= 0 && index < IDE_REG_NUM); |
| 535 | |
| 536 | struct ide_driver_state *state = dev->state; |
| 537 | |
| 538 | inpdrep(state->regs[index], (uint32_t *) buf, count); |
| 539 | } |
| 540 | |
| 541 | static void ide_write_reg8_array(struct device *dev, int index, const void *buf, size_t count) |
| 542 | { |
| 543 | DEBUG_ASSERT(index >= 0 && index < IDE_REG_NUM); |
| 544 | |
| 545 | struct ide_driver_state *state = dev->state; |
| 546 | |
| 547 | outprep(state->regs[index], (uint8_t *) buf, count); |
| 548 | } |
| 549 | |
| 550 | static void ide_write_reg16_array(struct device *dev, int index, const void *buf, size_t count) |
| 551 | { |
| 552 | DEBUG_ASSERT(index >= 0 && index < IDE_REG_NUM); |
| 553 | |
| 554 | struct ide_driver_state *state = dev->state; |
| 555 | |
| 556 | outpwrep(state->regs[index], (uint16_t *) buf, count); |
| 557 | } |
| 558 | |
| 559 | static void ide_write_reg32_array(struct device *dev, int index, const void *buf, size_t count) |
| 560 | { |
| 561 | DEBUG_ASSERT(index >= 0 && index < IDE_REG_NUM); |
| 562 | |
| 563 | struct ide_driver_state *state = dev->state; |
| 564 | |
| 565 | outpdrep(state->regs[index], (uint32_t *) buf, count); |
| 566 | } |
| 567 | |
| 568 | static void ide_write_reg8(struct device *dev, int index, uint8_t value) |
| 569 | { |
| 570 | DEBUG_ASSERT(index >= 0 && index < IDE_REG_NUM); |
| 571 | |
| 572 | struct ide_driver_state *state = dev->state; |
| 573 | |
| 574 | outp(state->regs[index], value); |
| 575 | } |
| 576 | |
| 577 | static void ide_write_reg16(struct device *dev, int index, uint16_t value) |
| 578 | { |
| 579 | DEBUG_ASSERT(index >= 0 && index < IDE_REG_NUM); |
| 580 | |
| 581 | struct ide_driver_state *state = dev->state; |
| 582 | |
| 583 | outpw(state->regs[index], value); |
| 584 | } |
| 585 | |
| 586 | static void ide_write_reg32(struct device *dev, int index, uint32_t value) |
| 587 | { |
| 588 | DEBUG_ASSERT(index >= 0 && index < IDE_REG_NUM); |
| 589 | |
| 590 | struct ide_driver_state *state = dev->state; |
| 591 | |
| 592 | outpd(state->regs[index], value); |
| 593 | } |
| 594 | |
| 595 | static void ide_device_select(struct device *dev, int index) |
| 596 | { |
| 597 | ide_write_reg8(dev, IDE_REG_DRIVE_HEAD, (index & 1) << 4); |
| 598 | } |
| 599 | |
| 600 | static void ide_delay_400ns(struct device *dev) |
| 601 | { |
| 602 | ide_read_reg8(dev, IDE_REG_ALT_STATUS); |
| 603 | ide_read_reg8(dev, IDE_REG_ALT_STATUS); |
| 604 | ide_read_reg8(dev, IDE_REG_ALT_STATUS); |
| 605 | ide_read_reg8(dev, IDE_REG_ALT_STATUS); |
| 606 | } |
| 607 | |
| 608 | static void ide_device_reset(struct device *dev) |
| 609 | { |
| 610 | struct ide_driver_state *state = dev->state; |
| 611 | |
| 612 | lk_time_t start; |
| 613 | uint8_t sect_cnt, sect_num; |
| 614 | int err; |
| 615 | |
| 616 | ide_device_select(dev, 0); |
| 617 | ide_delay_400ns(dev); |
| 618 | |
| 619 | // set bit 2 for at least 4.8us |
| 620 | ide_write_reg8(dev, IDE_REG_DEVICE_CONTROL, 1<<2); |
| 621 | |
| 622 | // delay 5us |
| 623 | spin(5); |
| 624 | |
| 625 | ide_write_reg8(dev, IDE_REG_DEVICE_CONTROL, 0x00); |
| 626 | |
| 627 | err = ide_poll_status(dev, 0, IDE_CTRL_BSY); |
| 628 | if (err) { |
| 629 | LTRACEF("Failed while waiting for controller to be ready: %s\n", ide_error_str[err]); |
| 630 | return; |
| 631 | } |
| 632 | |
| 633 | // make sure the slave is ready if present |
| 634 | if (state->type[1] != TYPE_NONE) { |
| 635 | ide_device_select(dev, 1); |
| 636 | ide_delay_400ns(dev); |
| 637 | |
| 638 | start = current_time(); |
| 639 | |
| 640 | do { |
| 641 | sect_cnt = ide_read_reg8(dev, IDE_REG_SECTOR_COUNT); |
| 642 | sect_num = ide_read_reg8(dev, IDE_REG_SECTOR_NUM); |
| 643 | |
| 644 | if (sect_cnt == 1 && sect_num == 1) { |
| 645 | err = ide_poll_status(dev, 0, IDE_CTRL_BSY); |
| 646 | if (err) { |
| 647 | LTRACEF("Failed while waiting for slave ready: %s\n", ide_error_str[err]); |
| 648 | return; |
| 649 | } |
| 650 | |
| 651 | break; |
| 652 | } |
| 653 | } while (TIME_LTE(current_time(), start + 20000)); |
| 654 | |
| 655 | err = ide_read_reg8(dev, IDE_REG_ALT_STATUS); |
| 656 | if (err & IDE_DRV_ERR) { |
| 657 | err = ide_eval_error(dev); |
| 658 | LTRACEF("Failed while resetting controller: %s\n", ide_error_str[err]); |
| 659 | return; |
| 660 | } |
| 661 | } |
| 662 | } |
| 663 | |
| 664 | static int ide_eval_error(struct device *dev) |
| 665 | { |
| 666 | int err = 0; |
| 667 | uint8_t data = 0; |
| 668 | |
| 669 | data = ide_read_reg8(dev, IDE_REG_ERROR); |
| 670 | |
| 671 | if (data & 0x01) { |
| 672 | err = IDE_ADDRESSMARK; |
| 673 | } else if (data & 0x02) { |
| 674 | err = IDE_CYLINDER0; |
| 675 | } else if (data & 0x04) { |
| 676 | err = IDE_INVALIDCOMMAND; |
| 677 | } else if (data & 0x08) { |
| 678 | err = IDE_MEDIAREQ; |
| 679 | } else if (data & 0x10) { |
| 680 | err = IDE_SECTNOTFOUND; |
| 681 | } else if (data & 0x20) { |
| 682 | err = IDE_MEDIACHANGED; |
| 683 | } else if (data & 0x40) { |
| 684 | err = IDE_BADDATA; |
| 685 | } else if (data & 0x80) { |
| 686 | err = IDE_BADSECTOR; |
| 687 | } else { |
| 688 | err = IDE_NOERROR; |
| 689 | } |
| 690 | |
| 691 | return err; |
| 692 | } |
| 693 | |
| 694 | static int ide_poll_status(struct device *dev, uint8_t on_mask, uint8_t off_mask) |
| 695 | { |
| 696 | int err; |
| 697 | uint8_t value; |
| 698 | lk_time_t start = current_time(); |
| 699 | |
| 700 | do { |
| 701 | value = ide_read_reg8(dev, IDE_REG_ALT_STATUS); |
| 702 | |
| 703 | if (value & IDE_DRV_ERR) { |
| 704 | err = ide_eval_error(dev); |
| 705 | LTRACEF("Error while polling status: %s\n", ide_error_str[err]); |
| 706 | return err; |
| 707 | } |
| 708 | |
| 709 | if ((value & on_mask) == on_mask && (value & off_mask) == 0) |
| 710 | return IDE_NOERROR; |
| 711 | } while (TIME_LTE(current_time(), start + 20000)); |
| 712 | |
| 713 | return IDE_TIMEOUT; |
| 714 | } |
| 715 | |
| 716 | static void ide_detect_drives(struct device *dev) |
| 717 | { |
| 718 | struct ide_driver_state *state = dev->state; |
| 719 | uint8_t sc = 0, sn = 0, st = 0, cl = 0, ch = 0; |
| 720 | |
| 721 | ide_device_select(dev, 0); |
| 722 | ide_delay_400ns(dev); |
| 723 | ide_delay_400ns(dev); |
| 724 | |
| 725 | ide_write_reg8(dev, IDE_REG_SECTOR_COUNT, 0x55); |
| 726 | ide_write_reg8(dev, IDE_REG_SECTOR_NUM, 0xaa); |
| 727 | ide_write_reg8(dev, IDE_REG_SECTOR_COUNT, 0xaa); |
| 728 | ide_write_reg8(dev, IDE_REG_SECTOR_NUM, 0x55); |
| 729 | ide_write_reg8(dev, IDE_REG_SECTOR_COUNT, 0x55); |
| 730 | ide_write_reg8(dev, IDE_REG_SECTOR_NUM, 0xaa); |
| 731 | |
| 732 | sc = ide_read_reg8(dev, IDE_REG_SECTOR_COUNT); |
| 733 | sn = ide_read_reg8(dev, IDE_REG_SECTOR_NUM); |
| 734 | |
| 735 | if (sc == 0x55 && sn == 0xaa) { |
| 736 | state->type[0] = TYPE_UNKNOWN; |
| 737 | } |
| 738 | |
| 739 | // check for device 1 |
| 740 | ide_device_select(dev, 1); |
| 741 | ide_delay_400ns(dev); |
| 742 | |
| 743 | ide_write_reg8(dev, IDE_REG_SECTOR_COUNT, 0x55); |
| 744 | ide_write_reg8(dev, IDE_REG_SECTOR_NUM, 0xaa); |
| 745 | ide_write_reg8(dev, IDE_REG_SECTOR_COUNT, 0xaa); |
| 746 | ide_write_reg8(dev, IDE_REG_SECTOR_NUM, 0x55); |
| 747 | ide_write_reg8(dev, IDE_REG_SECTOR_COUNT, 0x55); |
| 748 | ide_write_reg8(dev, IDE_REG_SECTOR_NUM, 0xaa); |
| 749 | |
| 750 | sc = ide_read_reg8(dev, IDE_REG_SECTOR_COUNT); |
| 751 | sn = ide_read_reg8(dev, IDE_REG_SECTOR_NUM); |
| 752 | |
| 753 | if (sc == 0x55 && sn == 0xaa) { |
| 754 | state->type[1] = TYPE_UNKNOWN; |
| 755 | } |
| 756 | |
| 757 | // now the drives present should be known |
| 758 | // soft reset now |
| 759 | ide_device_select(dev, 0); |
| 760 | ide_delay_400ns(dev); |
| 761 | ide_device_reset(dev); |
| 762 | |
| 763 | ide_device_select(dev, 0); |
| 764 | ide_delay_400ns(dev); |
| 765 | |
| 766 | sc = ide_read_reg8(dev, IDE_REG_SECTOR_COUNT); |
| 767 | sn = ide_read_reg8(dev, IDE_REG_SECTOR_NUM); |
| 768 | if (sc == 0x01 && sn == 0x01) { |
| 769 | state->type[0] = TYPE_UNKNOWN; |
| 770 | |
| 771 | st = ide_read_reg8(dev, IDE_REG_STATUS); |
| 772 | cl = ide_read_reg8(dev, IDE_REG_CYLINDER_LOW); |
| 773 | ch = ide_read_reg8(dev, IDE_REG_CYLINDER_HIGH); |
| 774 | |
| 775 | // PATAPI or SATAPI respectively |
| 776 | if ((cl == 0x14 && ch == 0xeb) || (cl == 0x69 && ch == 0x96)) { |
| 777 | state->type[0] = TYPE_IDECDROM; |
| 778 | } else if (st != 0 && ((cl == 0x00 && ch == 0x00) || (cl == 0x3c && ch == 0xc3))) { |
| 779 | state->type[0] = TYPE_IDEDISK; |
| 780 | } |
| 781 | } |
| 782 | |
| 783 | ide_device_select(dev, 1); |
| 784 | ide_delay_400ns(dev); |
| 785 | |
| 786 | sc = ide_read_reg8(dev, IDE_REG_SECTOR_COUNT); |
| 787 | sn = ide_read_reg8(dev, IDE_REG_SECTOR_NUM); |
| 788 | if (sc == 0x01 && sn == 0x01) { |
| 789 | state->type[1] = TYPE_UNKNOWN; |
| 790 | |
| 791 | st = ide_read_reg8(dev, IDE_REG_STATUS); |
| 792 | cl = ide_read_reg8(dev, IDE_REG_CYLINDER_LOW); |
| 793 | ch = ide_read_reg8(dev, IDE_REG_CYLINDER_HIGH); |
| 794 | |
| 795 | // PATAPI or SATAPI respectively |
| 796 | if ((cl == 0x14 && ch == 0xeb) || (cl == 0x69 && ch == 0x96)) { |
| 797 | state->type[1] = TYPE_IDECDROM; |
| 798 | } else if (st != 0 && ((cl == 0x00 && ch == 0x00) || (cl == 0x3c && ch == 0xc3))) { |
| 799 | state->type[1] = TYPE_IDEDISK; |
| 800 | } |
| 801 | } |
| 802 | |
| 803 | LTRACEF("Detected drive 0: %s\n", ide_type_str[state->type[0]]); |
| 804 | LTRACEF("Detected drive 1: %s\n", ide_type_str[state->type[1]]); |
| 805 | |
| 806 | switch (state->type[0]) { |
| 807 | case TYPE_IDEDISK: |
| 808 | ide_detect_ata(dev, 0); |
| 809 | break; |
| 810 | |
| 811 | default: |
| 812 | break; |
| 813 | } |
| 814 | |
| 815 | switch (state->type[1]) { |
| 816 | case TYPE_IDEDISK: |
| 817 | ide_detect_ata(dev, 1); |
| 818 | break; |
| 819 | |
| 820 | default: |
| 821 | break; |
| 822 | } |
| 823 | } |
| 824 | |
| 825 | static int ide_wait_for_completion(struct device *dev) |
| 826 | { |
| 827 | struct ide_driver_state *state = dev->state; |
| 828 | status_t err; |
| 829 | |
| 830 | err = event_wait_timeout(&state->completion, 20000); |
| 831 | if (err) |
| 832 | return IDE_TIMEOUT; |
| 833 | |
| 834 | return IDE_NOERROR; |
| 835 | } |
| 836 | |
| 837 | static status_t ide_detect_ata(struct device *dev, int index) |
| 838 | { |
| 839 | struct ide_driver_state *state = dev->state; |
| 840 | status_t res = NO_ERROR; |
| 841 | uint8_t *info = NULL; |
| 842 | int err; |
| 843 | |
| 844 | ide_device_select(dev, index); |
| 845 | ide_delay_400ns(dev); |
| 846 | |
| 847 | err = ide_poll_status(dev, 0, IDE_CTRL_BSY | IDE_DRV_DRQ); |
| 848 | if (err) { |
| 849 | LTRACEF("Error while detecting drive %d: %s\n", index, ide_error_str[err]); |
| 850 | res = ERR_TIMED_OUT; |
| 851 | goto error; |
| 852 | } |
| 853 | |
| 854 | ide_device_select(dev, index); |
| 855 | ide_delay_400ns(dev); |
| 856 | |
| 857 | err = ide_poll_status(dev, 0, IDE_CTRL_BSY | IDE_DRV_DRQ); |
| 858 | if (err) { |
| 859 | LTRACEF("Error while detecting drive %d: %s\n", index, ide_error_str[err]); |
| 860 | res = ERR_TIMED_OUT; |
| 861 | goto error; |
| 862 | } |
| 863 | |
| 864 | // try to wait for the selected drive to be ready, but don't quit if not |
| 865 | // since CD-ROMs don't seem to respond to this when they're masters |
| 866 | ide_poll_status(dev, IDE_DRV_RDY, 0); |
| 867 | |
| 868 | // send the "identify device" command |
| 869 | ide_write_reg8(dev, IDE_REG_COMMAND, ATA_GETDEVINFO); |
| 870 | ide_delay_400ns(dev); |
| 871 | |
| 872 | err = ide_wait_for_completion(dev); |
| 873 | if (err) { |
| 874 | LTRACEF("Error while waiting for command: %s\n", ide_error_str[err]); |
| 875 | res = ERR_TIMED_OUT; |
| 876 | goto error; |
| 877 | } |
| 878 | |
| 879 | info = malloc(512); |
| 880 | if (!info) { |
| 881 | res = ERR_NO_MEMORY; |
| 882 | goto error; |
| 883 | } |
| 884 | |
| 885 | LTRACEF("Found ATA hard disk on channel %d!\n", index); |
| 886 | |
| 887 | ide_read_reg16_array(dev, IDE_REG_DATA, info, 256); |
| 888 | |
| 889 | state->drive[index].sectors = *((uint32_t *) (info + 120)); |
| 890 | state->drive[index].sector_size = 512; |
| 891 | |
| 892 | LTRACEF("Disk supports %u sectors for a total of %u bytes\n", state->drive[index].sectors, |
| 893 | state->drive[index].sectors * 512); |
| 894 | |
| 895 | error: |
| 896 | free(info); |
| 897 | return res; |
| 898 | } |
| 899 | |
| 900 | static void ide_lba_setup(struct device *dev, uint32_t addr, int drive) |
| 901 | { |
| 902 | ide_write_reg8(dev, IDE_REG_DRIVE_HEAD, 0xe0 | ((drive & 0x00000001) << 4) | ((addr >> 24) & 0xf)); |
| 903 | ide_write_reg8(dev, IDE_REG_CYLINDER_LOW, (addr >> 8) & 0xff); |
| 904 | ide_write_reg8(dev, IDE_REG_CYLINDER_HIGH, (addr >> 16) & 0xff); |
| 905 | ide_write_reg8(dev, IDE_REG_SECTOR_NUM, addr & 0xff); |
| 906 | ide_write_reg8(dev, IDE_REG_PRECOMP, 0xff); |
| 907 | } |
| 908 | |