blob: 40f08e3bbd941f4c3400280ffa35ce1729147e41 [file] [log] [blame]
rjw1f884582022-01-06 17:20:42 +08001/*
2 * Copyright (c) 2013 Corey Tabaka
3 *
4 * Permission is hereby granted, free of charge, to any person obtaining
5 * a copy of this software and associated documentation files
6 * (the "Software"), to deal in the Software without restriction,
7 * including without limitation the rights to use, copy, modify, merge,
8 * publish, distribute, sublicense, and/or sell copies of the Software,
9 * and to permit persons to whom the Software is furnished to do so,
10 * subject to the following conditions:
11 *
12 * The above copyright notice and this permission notice shall be
13 * included in all copies or substantial portions of the Software.
14 *
15 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
16 * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
17 * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.
18 * IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY
19 * CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT,
20 * TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE
21 * SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
22 */
23#ifndef __PLATFORM_PC_PCNET_H
24#define __PLATFORM_PC_PCNET_H
25
26#include <compiler.h>
27#include <stdint.h>
28
29#define REG_APROM 0x00
30#define REG_RDP 0x10
31#define REG_RAP 0x14
32#define REG_RESET 0x18
33#define REG_BDP 0x1c
34
35#define CSR0_INIT 0x0001
36#define CSR0_STRT 0x0002
37#define CSR0_STOP 0x0004
38#define CSR0_TDMD 0x0008
39#define CSR0_TXON 0x0010
40#define CSR0_RXON 0x0020
41#define CSR0_IENA 0x0040
42#define CSR0_INTR 0x0080
43#define CSR0_IDON 0x0100
44#define CSR0_TINT 0x0200
45#define CSR0_RINT 0x0400
46#define CSR0_MERR 0x0800
47#define CSR0_MISS 0x1000
48#define CSR0_CERR 0x2000
49#define CSR0_BABL 0x4000
50#define CSR0_ERR 0x8000
51
52#define CSR4_DMAPLUS 0x4000
53
54#define DESC_SIZE (4*sizeof(uint32_t))
55
56struct init_block_32 {
57 uint16_t mode;
58
59 uint16_t reserved_0 : 4;
60 uint16_t rlen : 4;
61 uint16_t reserved_1 : 4;
62 uint16_t tlen : 4;
63
64 uint8_t padr[6];
65
66 uint16_t reserved_2;
67
68 uint64_t ladr;
69 uint32_t rdra;
70 uint32_t tdra;
71} __PACKED;
72
73struct td_style3 {
74 uint32_t trc : 4;
75 uint32_t reserved_1 : 8;
76 uint32_t tdr : 14;
77 uint32_t rtry : 1;
78 uint32_t lcar : 1;
79 uint32_t lcol : 1;
80 uint32_t exdef : 1;
81 uint32_t uflo : 1;
82 uint32_t buff : 1;
83
84 uint32_t bcnt : 12;
85 uint32_t ones : 4;
86 uint32_t reserved_0 : 7;
87 uint32_t bpe : 1;
88 uint32_t enp : 1;
89 uint32_t stp : 1;
90 uint32_t def : 1;
91 uint32_t one : 1;
92 uint32_t more_ltinit : 1;
93 uint32_t add_no_fcs : 1;
94 uint32_t err : 1;
95 uint32_t own : 1;
96
97 uint32_t tbadr;
98
99 uint32_t reserved_2;
100} __PACKED;
101
102struct rd_style3 {
103 uint16_t mcnt : 12;
104 uint16_t zeros : 4;
105
106 uint8_t rpc;
107 uint8_t rcc;
108
109 uint32_t bcnt : 12;
110 uint32_t ones : 4;
111 uint32_t reserved_0 : 4;
112 uint32_t bam : 1;
113 uint32_t lafm : 1;
114 uint32_t pam : 1;
115 uint32_t bpe : 1;
116 uint32_t enp : 1;
117 uint32_t stp : 1;
118 uint32_t buff : 1;
119 uint32_t crc : 1;
120 uint32_t oflo : 1;
121 uint32_t fram : 1;
122 uint32_t err : 1;
123 uint32_t own : 1;
124
125 uint32_t rbadr;
126
127 uint32_t reserved_1;
128} __PACKED;
129
130#endif
131