rjw | 1f88458 | 2022-01-06 17:20:42 +0800 | [diff] [blame^] | 1 | /* |
| 2 | * Copyright (c) 2012 Ian McKellar |
| 3 | * |
| 4 | * Permission is hereby granted, free of charge, to any person obtaining |
| 5 | * a copy of this software and associated documentation files |
| 6 | * (the "Software"), to deal in the Software without restriction, |
| 7 | * including without limitation the rights to use, copy, modify, merge, |
| 8 | * publish, distribute, sublicense, and/or sell copies of the Software, |
| 9 | * and to permit persons to whom the Software is furnished to do so, |
| 10 | * subject to the following conditions: |
| 11 | * |
| 12 | * The above copyright notice and this permission notice shall be |
| 13 | * included in all copies or substantial portions of the Software. |
| 14 | * |
| 15 | * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, |
| 16 | * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF |
| 17 | * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. |
| 18 | * IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY |
| 19 | * CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, |
| 20 | * TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE |
| 21 | * SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE. |
| 22 | */ |
| 23 | #include <stdarg.h> |
| 24 | #include <reg.h> |
| 25 | #include <debug.h> |
| 26 | #include <stdio.h> |
| 27 | #include <lib/cbuf.h> |
| 28 | #include <kernel/thread.h> |
| 29 | #include <platform/debug.h> |
| 30 | #include <arch/ops.h> |
| 31 | #include <target/debugconfig.h> |
| 32 | #include <arch/arm/cm.h> |
| 33 | |
| 34 | #include "ti_driverlib.h" |
| 35 | |
| 36 | #include "inc/hw_memmap.h" |
| 37 | #include "inc/hw_types.h" |
| 38 | |
| 39 | #define DEBUG_UART UART0_BASE |
| 40 | |
| 41 | static cbuf_t debug_rx_buf; |
| 42 | |
| 43 | void stellaris_uart0_irq(void) |
| 44 | { |
| 45 | arm_cm_irq_entry(); |
| 46 | |
| 47 | // |
| 48 | // Get the interrrupt status. |
| 49 | // |
| 50 | unsigned long ulStatus = UARTIntStatus(DEBUG_UART, true); |
| 51 | |
| 52 | // |
| 53 | // Clear the asserted interrupts. |
| 54 | // |
| 55 | UARTIntClear(DEBUG_UART, ulStatus); |
| 56 | |
| 57 | // |
| 58 | // Loop while there are characters in the receive FIFO. |
| 59 | // |
| 60 | bool resched = false; |
| 61 | while (UARTCharsAvail(DEBUG_UART)) { |
| 62 | // |
| 63 | // Read the next character from the UART and write it back to the UART. |
| 64 | // |
| 65 | unsigned char c = UARTCharGetNonBlocking(DEBUG_UART); |
| 66 | cbuf_write_char(&debug_rx_buf, c, false); |
| 67 | |
| 68 | resched = true; |
| 69 | } |
| 70 | |
| 71 | arm_cm_irq_exit(resched); |
| 72 | } |
| 73 | |
| 74 | void stellaris_debug_early_init(void) |
| 75 | { |
| 76 | SysCtlPeripheralEnable(SYSCTL_PERIPH_UART0); |
| 77 | |
| 78 | /* we only support UART0 right now */ |
| 79 | STATIC_ASSERT(DEBUG_UART == UART0_BASE); |
| 80 | |
| 81 | if (DEBUG_UART == UART0_BASE) { |
| 82 | /* Set GPIO A0 and A1 as UART pins. */ |
| 83 | GPIOPinConfigure(GPIO_PA0_U0RX); |
| 84 | GPIOPinConfigure(GPIO_PA1_U0TX); |
| 85 | GPIOPinTypeUART(GPIO_PORTA_AHB_BASE, GPIO_PIN_0 | GPIO_PIN_1); |
| 86 | } |
| 87 | |
| 88 | UARTConfigSetExpClk(DEBUG_UART, SysCtlClockGet(), 115200, UART_CONFIG_WLEN_8|UART_CONFIG_STOP_ONE|UART_CONFIG_PAR_NONE); |
| 89 | |
| 90 | UARTEnable(DEBUG_UART); |
| 91 | } |
| 92 | |
| 93 | void stellaris_debug_init(void) |
| 94 | { |
| 95 | cbuf_initialize(&debug_rx_buf, 16); |
| 96 | |
| 97 | /* Enable the UART interrupt. */ |
| 98 | UARTIntEnable(DEBUG_UART, UART_INT_RX | UART_INT_RT); |
| 99 | |
| 100 | NVIC_EnableIRQ(INT_UART0 - 16); |
| 101 | |
| 102 | } |
| 103 | |
| 104 | void platform_dputc(char c) |
| 105 | { |
| 106 | if (c == '\n') { |
| 107 | platform_dputc('\r'); |
| 108 | } |
| 109 | |
| 110 | UARTCharPut(DEBUG_UART, c); |
| 111 | } |
| 112 | |
| 113 | int platform_dgetc(char *c, bool wait) |
| 114 | { |
| 115 | return cbuf_read_char(&debug_rx_buf, c, wait); |
| 116 | } |
| 117 | |