blob: 345a01f37242240654cafd117af62b053e0514c2 [file] [log] [blame]
rjw1f884582022-01-06 17:20:42 +08001LOCAL_DIR := $(GET_LOCAL_DIR)
2
3MODULE := $(LOCAL_DIR)
4
5# ROMBASE, MEMBASE, and MEMSIZE are required for the linker script
6ROMBASE ?= 0x00200000
7MEMBASE ?= 0x20010000
8# default memsize, specific STM32_CHIP may override this
9# and target/project may have already overridden
10MEMSIZE ?= 0x40000
11
12ARCH := arm
13ARM_CPU := cortex-m7
14
15ifeq ($(STM32_CHIP),stm32f746)
16GLOBAL_DEFINES += STM32F746xx
17# XXX workaround for uppercasing in GLOBAL_DEFINES
18GLOBAL_COMPILEFLAGS += -DSTM32F746xx
19FOUND_CHIP := true
20endif
21
22ifeq ($(STM32_CHIP),stm32f756)
23GLOBAL_DEFINES += STM32F746xx
24# XXX workaround for uppercasing in GLOBAL_DEFINES
25GLOBAL_COMPILEFLAGS += -DSTM32F746xx
26FOUND_CHIP := true
27endif
28
29ifeq ($(FOUND_CHIP),)
30$(error unknown STM32F7xx chip $(STM32_CHIP))
31endif
32
33LK_HEAP_IMPLEMENTATION ?= miniheap
34
35GLOBAL_DEFINES += \
36 PLATFORM_SUPPORTS_PANIC_SHELL=1 \
37 NOVM_MAX_ARENAS=2
38
39MODULE_SRCS += \
40 $(LOCAL_DIR)/debug.c \
41 $(LOCAL_DIR)/eth.c \
42 $(LOCAL_DIR)/flash.c \
43 $(LOCAL_DIR)/gpio.c \
44 $(LOCAL_DIR)/init.c \
45 $(LOCAL_DIR)/power.c \
46 $(LOCAL_DIR)/timer.c \
47 $(LOCAL_DIR)/uart.c \
48 $(LOCAL_DIR)/usbc.c \
49 $(LOCAL_DIR)/vectab.c \
50 $(LOCAL_DIR)/sdram.c \
51 $(LOCAL_DIR)/qspi.c
52
53# use a two segment memory layout, where all of the read-only sections
54# of the binary reside in rom, and the read/write are in memory. The
55# ROMBASE, MEMBASE, and MEMSIZE make variables are required to be set
56# for the linker script to be generated properly.
57#
58LINKER_SCRIPT += \
59 $(BUILDDIR)/system-twosegment.ld
60
61MODULE_DEPS += \
62 arch/arm/arm-m/systick \
63 dev/gpio \
64 dev/usb \
65 lib/bio \
66 lib/cbuf
67
68include $(LOCAL_DIR)/STM32F7xx_HAL_Driver/rules.mk $(LOCAL_DIR)/CMSIS/rules.mk
69
70include make/module.mk