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192.168.1.100 / T103 / 1f884588077ad3476b9c91cbb0ee9ee0332bbb68 / . / src / bsp / lk / target / aud8516m3v5-emmc-32b-avs-test / custom_emi.c
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rjw1f884582022-01-06 17:20:42 +0800[diff] [blame^]1/*****************************************************************************
2* Copyright Statement:
3* --------------------
4* This software is protected by Copyright and the information contained
5* herein is confidential. The software may not be copied and the information
6* contained herein may not be used or disclosed except with the written
7* permission of MediaTek Inc. (C) 2008
8*
9* BY OPENING THIS FILE, BUYER HEREBY UNEQUIVOCALLY ACKNOWLEDGES AND AGREES
10* THAT THE SOFTWARE/FIRMWARE AND ITS DOCUMENTATIONS ("MEDIATEK SOFTWARE")
11* RECEIVED FROM MEDIATEK AND/OR ITS REPRESENTATIVES ARE PROVIDED TO BUYER ON
12* AN "AS-IS" BASIS ONLY. MEDIATEK EXPRESSLY DISCLAIMS ANY AND ALL WARRANTIES,
13* EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE IMPLIED WARRANTIES OF
14* MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE OR NONINFRINGEMENT.
15* NEITHER DOES MEDIATEK PROVIDE ANY WARRANTY WHATSOEVER WITH RESPECT TO THE
16* SOFTWARE OF ANY THIRD PARTY WHICH MAY BE USED BY, INCORPORATED IN, OR
17* SUPPLIED WITH THE MEDIATEK SOFTWARE, AND BUYER AGREES TO LOOK ONLY TO SUCH
18* THIRD PARTY FOR ANY WARRANTY CLAIM RELATING THERETO. MEDIATEK SHALL ALSO
19* NOT BE RESPONSIBLE FOR ANY MEDIATEK SOFTWARE RELEASES MADE TO BUYER'S
20* SPECIFICATION OR TO CONFORM TO A PARTICULAR STANDARD OR OPEN FORUM.
21*
22* BUYER'S SOLE AND EXCLUSIVE REMEDY AND MEDIATEK'S ENTIRE AND CUMULATIVE
23* LIABILITY WITH RESPECT TO THE MEDIATEK SOFTWARE RELEASED HEREUNDER WILL BE,
24* AT MEDIATEK'S OPTION, TO REVISE OR REPLACE THE MEDIATEK SOFTWARE AT ISSUE,
25* OR REFUND ANY SOFTWARE LICENSE FEES OR SERVICE CHARGE PAID BY BUYER TO
26* MEDIATEK FOR SUCH MEDIATEK SOFTWARE AT ISSUE.
27*
28* THE TRANSACTION CONTEMPLATED HEREUNDER SHALL BE CONSTRUED IN ACCORDANCE
29* WITH THE LAWS OF THE STATE OF CALIFORNIA, USA, EXCLUDING ITS CONFLICT OF
30* LAWS PRINCIPLES. ANY DISPUTES, CONTROVERSIES OR CLAIMS ARISING THEREOF AND
31* RELATED THERETO SHALL BE SETTLED BY ARBITRATION IN SAN FRANCISCO, CA, UNDER
32* THE RULES OF THE INTERNATIONAL CHAMBER OF COMMERCE (ICC).
33*
34*****************************************************************************/
35/*****************************************************************************
36 *
37 * Filename:
38 * ---------
39 * custom_emi.c
40 *
41 * Project:
42 * --------
43 * Android
44 *
45 * Description:
46 * ------------
47 * This Module defines the EMI (external memory interface) related setting.
48 *
49 * Author:
50 * -------
51 * EMI auto generator V0.01
52 *
53 * Memory Device database last modified on 2015/6/26
54 *
55 *============================================================================
56 * HISTORY
57 * Below this line, this part is controlled by PVCS VM. DO NOT MODIFY!!
58 *------------------------------------------------------------------------------
59 * $Revision$
60 * $Modtime$
61 * $Log$
62 *
63 *------------------------------------------------------------------------------
64 * WARNING!!! WARNING!!! WARNING!!! WARNING!!! WARNING!!! WARNING!!!
65 * This file is generated by EMI Auto-gen Tool.
66 * Please do not modify the content directly!
67 * It could be overwritten!
68 *============================================================================
69 * Upper this line, this part is controlled by PVCS VM. DO NOT MODIFY!!
70 *============================================================================
71 ****************************************************************************/
72
73#include <platform/emi.h>
74
75#define NUM_EMI_RECORD (1)
76int num_of_emi_records = NUM_EMI_RECORD;
77
78EMI_SETTINGS emi_settings[NUM_EMI_RECORD] = {
79#if defined (COMMON_DDR3_16BIT)
80 {
81 0x1, /* sub_version */
82 0x0004, /* TYPE */
83 0, /* EMMC ID/FW ID checking length */
84 0, /* FW length */
85 {0x0,0x0,0x0,0x0,0x0,0x0,0x0,0x0,0x0,0x0,0x0,0x0,0x0,0x0,0x0,0x0}, /* NAND_EMMC_ID */
86 {0x0,0x0,0x0,0x0,0x0,0x0,0x0,0x0}, /* FW_ID */
87 0x00002010, /* EMI_CONA_VAL */
88 0x00000003, /* EMI_CONH_VAL */
89 { {
90 0x09090640, /* U 00 */
91 0x19491401, /* U 01 */
92 0x0B090201, /* U 02 */
93 0x550C0306, /* U 03 */
94 0x23566560, /* U 04 */
95 0x00000908, /* U 05 */
96 0x14140000, /* U 06 */
97 0x00000000 /* U 07 */
98 }
99 },
100 {0x20000000,0,0,0}, /* DRAM RANK SIZE */
101 0x04210000, /* EMI_CONF_VAL */
102 0x00000000, /* CHN0_EMI_CONA_VAL */
103 0x00000000, /* CHN1_EMI_CONA_VAL */
104 0x0, /* dram_cbt_mode */
105 {0,0,0,0,0,0}, /* reserved 6 */
106 0x40000000, /* PCDDR3_MODE_REG5 */
107 0, /* PIN_MUX_TYPE for tablet */
108 } ,
109#else
110 {
111 0x1, /* sub_version */
112 0x0003, /* TYPE */
113 0, /* EMMC ID/FW ID checking length */
114 0, /* FW length */
115 {0x0,0x0,0x0,0x0,0x0,0x0,0x0,0x0,0x0,0x0,0x0,0x0,0x0,0x0,0x0,0x0}, /* NAND_EMMC_ID */
116 {0x0,0x0,0x0,0x0,0x0,0x0,0x0,0x0}, /* FW_ID */
117 0x0002a052, /* EMI_CONA_VAL */
118 0x00000003, /* EMI_CONH_VAL */
119 {
120 {
121 0x09090640, /* U 00 */
122 0x19491401, /* U 01 */
123 0x0B090201, /* U 02 */
124 0x550C0306, /* U 03 */
125 0x23566560, /* U 04 */
126 0x00000908, /* U 05 */
127 0x14140000, /* U 06 */
128 0x00000000 /* U 07 */
129 }
130 },
131 {0x40000000,0x40000000,0,0}, /* DRAM RANK SIZE */
132 0x04210000, /* EMI_CONF_VAL */
133 0x00000000, /* CHN0_EMI_CONA_VAL */
134 0x00000000, /* CHN1_EMI_CONA_VAL */
135 0x0, /* dram_cbt_mode */
136 {0,0,0,0,0,0}, /* reserved 6 */
137 0x00000006, /* LPDDR3_MODE_REG5 */
138 2, /* PIN_MUX_TYPE for tablet */
139 } ,
140#endif
141};
142
143EMI_SETTINGS default_emi_setting = {
144 0x1, /* sub_version */
145 0x0004, /* TYPE */
146 0, /* EMMC ID/FW ID checking length */
147 0, /* FW length */
148 {0x0,0x0,0x0,0x0,0x0,0x0,0x0,0x0,0x0,0x0,0x0,0x0,0x0,0x0,0x0,0x0}, /* NAND_EMMC_ID */
149 {0x0,0x0,0x0,0x0,0x0,0x0,0x0,0x0}, /* FW_ID */
150 0x00002010, /* EMI_CONA_VAL */
151 0x00000003, /* EMI_CONH_VAL */
152 { {
153 0x09090640, /* U 00 */
154 0x19491401, /* U 01 */
155 0x0B090201, /* U 02 */
156 0x550C0306, /* U 03 */
157 0x23566560, /* U 04 */
158 0x00000908, /* U 05 */
159 0x14140000, /* U 06 */
160 0x00000000
161 }
162 }, /* U 07 */
163 {0x20000000,0,0,0}, /* DRAM RANK SIZE */
164 0x04210000, /* EMI_CONF_VAL */
165 0x00000000, /* CHN0_EMI_CONA_VAL */
166 0x00000000, /* CHN1_EMI_CONA_VAL */
167 0x0, /* dram_cbt_mode */
168 {0,0,0,0,0,0}, /* reserved 6 */
169 0x40000000, /* PCDDR3_MODE_REG5 */
170 0, /* PIN_MUX_TYPE for tablet */
171};
172