blob: 562845d89a28012d6383b4a1bf157a6a47c8aebc [file] [log] [blame]
rjw1f884582022-01-06 17:20:42 +08001/*****************************************************************************
2* Copyright Statement:
3* --------------------
4* This software is protected by Copyright and the information contained
5* herein is confidential. The software may not be copied and the information
6* contained herein may not be used or disclosed except with the written
7* permission of MediaTek Inc. (C) 2008
8*
9* BY OPENING THIS FILE, BUYER HEREBY UNEQUIVOCALLY ACKNOWLEDGES AND AGREES
10* THAT THE SOFTWARE/FIRMWARE AND ITS DOCUMENTATIONS ("MEDIATEK SOFTWARE")
11* RECEIVED FROM MEDIATEK AND/OR ITS REPRESENTATIVES ARE PROVIDED TO BUYER ON
12* AN "AS-IS" BASIS ONLY. MEDIATEK EXPRESSLY DISCLAIMS ANY AND ALL WARRANTIES,
13* EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE IMPLIED WARRANTIES OF
14* MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE OR NONINFRINGEMENT.
15* NEITHER DOES MEDIATEK PROVIDE ANY WARRANTY WHATSOEVER WITH RESPECT TO THE
16* SOFTWARE OF ANY THIRD PARTY WHICH MAY BE USED BY, INCORPORATED IN, OR
17* SUPPLIED WITH THE MEDIATEK SOFTWARE, AND BUYER AGREES TO LOOK ONLY TO SUCH
18* THIRD PARTY FOR ANY WARRANTY CLAIM RELATING THERETO. MEDIATEK SHALL ALSO
19* NOT BE RESPONSIBLE FOR ANY MEDIATEK SOFTWARE RELEASES MADE TO BUYER'S
20* SPECIFICATION OR TO CONFORM TO A PARTICULAR STANDARD OR OPEN FORUM.
21*
22* BUYER'S SOLE AND EXCLUSIVE REMEDY AND MEDIATEK'S ENTIRE AND CUMULATIVE
23* LIABILITY WITH RESPECT TO THE MEDIATEK SOFTWARE RELEASED HEREUNDER WILL BE,
24* AT MEDIATEK'S OPTION, TO REVISE OR REPLACE THE MEDIATEK SOFTWARE AT ISSUE,
25* OR REFUND ANY SOFTWARE LICENSE FEES OR SERVICE CHARGE PAID BY BUYER TO
26* MEDIATEK FOR SUCH MEDIATEK SOFTWARE AT ISSUE.
27*
28* THE TRANSACTION CONTEMPLATED HEREUNDER SHALL BE CONSTRUED IN ACCORDANCE
29* WITH THE LAWS OF THE STATE OF CALIFORNIA, USA, EXCLUDING ITS CONFLICT OF
30* LAWS PRINCIPLES. ANY DISPUTES, CONTROVERSIES OR CLAIMS ARISING THEREOF AND
31* RELATED THERETO SHALL BE SETTLED BY ARBITRATION IN SAN FRANCISCO, CA, UNDER
32* THE RULES OF THE INTERNATIONAL CHAMBER OF COMMERCE (ICC).
33*
34*****************************************************************************/
35/*****************************************************************************
36 *
37 * Filename:
38 * ---------
39 * custom_emi.c
40 *
41 * Project:
42 * --------
43 * Android
44 *
45 * Description:
46 * ------------
47 * This Module defines the EMI (external memory interface) related setting.
48 *
49 * Author:
50 * -------
51 * EMI auto generator V0.01
52 *
53 * Memory Device database last modified on 2015/6/26
54 *
55 *============================================================================
56 * HISTORY
57 * Below this line, this part is controlled by PVCS VM. DO NOT MODIFY!!
58 *------------------------------------------------------------------------------
59 * $Revision$
60 * $Modtime$
61 * $Log$
62 *
63 *------------------------------------------------------------------------------
64 * WARNING!!! WARNING!!! WARNING!!! WARNING!!! WARNING!!! WARNING!!!
65 * This file is generated by EMI Auto-gen Tool.
66 * Please do not modify the content directly!
67 * It could be overwritten!
68 *============================================================================
69 * Upper this line, this part is controlled by PVCS VM. DO NOT MODIFY!!
70 *============================================================================
71 ****************************************************************************/
72
73#include <platform/emi.h>
74
75#define NUM_EMI_RECORD (1)
76
77int num_of_emi_records = NUM_EMI_RECORD ;
78
79EMI_SETTINGS emi_settings[] = {
80 //COMMON_DDR3_1GB
81 {
82 0x0, /* sub_version */
83 0x0004, /* TYPE */
84 0, /* EMMC ID/FW ID checking length */
85 0, /* FW length */
86 {0x0,0x0,0x0,0x0,0x0,0x0,0x0,0x0,0x0,0x0,0x0,0x0,0x0,0x0,0x0,0x0}, /* NAND_EMMC_ID */
87 {0x0,0x0,0x0,0x0,0x0,0x0,0x0,0x0}, /* FW_ID */
88 0x00003122, /* EMI_CONA_VAL */
89 0xAA00AA00, /* DRAMC_DRVCTL0_VAL */
90 0xAA00AA00, /* DRAMC_DRVCTL1_VAL */
91 0x448B47B7, /* DRAMC_ACTIM_VAL */
92 0x01000000, /* DRAMC_GDDR3CTL1_VAL */
93 0xF07486A3, /* DRAMC_CONF1_VAL */
94 0xB18E22C1, /* DRAMC_DDR2CTL_VAL */
95 0xBF8D0401, /* DRAMC_TEST2_3_VAL */
96 0x03046960, /* DRAMC_CONF2_VAL */
97 0xD5642842, /* DRAMC_PD_CTRL_VAL */
98 0x00008888, /* DRAMC_PADCTL3_VAL */
99 0x88888888, /* DRAMC_DQODLY_VAL */
100 0x00000000, /* DRAMC_ADDR_OUTPUT_DLY */
101 0x00000000, /* DRAMC_CLK_OUTPUT_DLY */
102 0x00000660, /* DRAMC_ACTIM1_VAL*/
103 0x07800000, /* DRAMC_MISCTL0_VAL*/
104 0x040000D1, /* DRAMC_ACTIM05T_VAL*/
105 {0x40000000,0,0,0}, /* DRAM RANK SIZE */
106 {0x00000004,0,0,0,0,0,0,0,0,0}, /* reserved 10 */
107 { {
108 0x00001D71, /* PCDDR3_MODE_REG0 */
109 0x00002000, /* PCDDR3_MODE_REG1 */
110 0x00004018, /* PCDDR3_MODE_REG2 */
111 0x00006000, /* PCDDR3_MODE_REG3 */
112 0x00000024, /* PCDDR3_MODE_REG4 */
113 0x00000000
114 }
115 }, /* PCDDR3_MODE_REG5 */
116 },
117};