blob: 887676540c9bd84473f1d8c1c577e58a69db3a41 [file] [log] [blame]
rjw1f884582022-01-06 17:20:42 +08001/*
2 * Copyright (c) 2017 MediaTek Inc.
3 *
4 * Permission is hereby granted, free of charge, to any person obtaining
5 * a copy of this software and associated documentation files
6 * (the "Software"), to deal in the Software without restriction,
7 * including without limitation the rights to use, copy, modify, merge,
8 * publish, distribute, sublicense, and/or sell copies of the Software,
9 * and to permit persons to whom the Software is furnished to do so,
10 * subject to the following conditions:
11 *
12 * The above copyright notice and this permission notice shall be
13 * included in all copies or substantial portions of the Software.
14 *
15 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
16 * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
17 * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.
18 * IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY
19 * CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT,
20 * TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE
21 * SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
22*/
23#include <debug.h>
24#include <platform/mt_reg_base.h>
25#include <reg.h>
26
27#define GPIO127_DIR_SET (GPIO_BASE + 0x074)
28#define GPIO127_DOUT_SET (GPIO_BASE + 0x374)
29#define GPIO127_DOUT_RST (GPIO_BASE + 0x378)
30
31void enable_vefuse(void)
32{
33 /* set to output control and output register is 1 */
34 writel((1U << 15), GPIO127_DIR_SET);
35 writel((1U << 15), GPIO127_DOUT_SET);
36 spin(10000);
37}
38
39void disable_vefuse(void)
40{
41 /* set to output control and output register is 0 */
42 writel((1U << 15), GPIO127_DIR_SET);
43 writel((1U << 15), GPIO127_DOUT_RST);
44 spin(10000);
45}