blob: 8c34e85c94409baaff5c6261980fdc96e6cc84ac [file] [log] [blame]
rjw1f884582022-01-06 17:20:42 +08001/*
2 * Copyright (c) 2015 Travis Geiselbrecht
3 *
4 * Permission is hereby granted, free of charge, to any person obtaining
5 * a copy of this software and associated documentation files
6 * (the "Software"), to deal in the Software without restriction,
7 * including without limitation the rights to use, copy, modify, merge,
8 * publish, distribute, sublicense, and/or sell copies of the Software,
9 * and to permit persons to whom the Software is furnished to do so,
10 * subject to the following conditions:
11 *
12 * The above copyright notice and this permission notice shall be
13 * included in all copies or substantial portions of the Software.
14 *
15 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
16 * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
17 * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.
18 * IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY
19 * CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT,
20 * TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE
21 * SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
22 */
23#include <err.h>
24#include <stdlib.h>
25#include <debug.h>
26#include <trace.h>
27#include <target.h>
28#include <compiler.h>
29#include <lib/gfx.h>
30#include <dev/gpio.h>
31#include <platform/stm32.h>
32#include <platform/sdram.h>
33#include <platform/gpio.h>
34#include <platform/eth.h>
35#include <platform/qspi.h>
36#include <platform/n25q512a.h>
37#include <target/debugconfig.h>
38#include <target/gpioconfig.h>
39#include <reg.h>
40
41#if WITH_LIB_MINIP
42#include <lib/minip.h>
43#endif
44
45extern uint8_t BSP_LCD_Init(void);
46extern uint8_t BSP_SRAM_Init(void);
47
48const sdram_config_t target_sdram_config = {
49 .bus_width = SDRAM_BUS_WIDTH_32,
50 .cas_latency = SDRAM_CAS_LATENCY_3,
51 .col_bits_num = SDRAM_COLUMN_BITS_8
52};
53
54void target_early_init(void)
55{
56#if DEBUG_UART == 1
57 /* configure usart 1 pins */
58 gpio_config(GPIO_USART1_TX, GPIO_STM32_AF | GPIO_STM32_AFn(GPIO_AF7_USART1) | GPIO_PULLUP);
59 gpio_config(GPIO_USART1_RX, GPIO_STM32_AF | GPIO_STM32_AFn(GPIO_AF7_USART1) | GPIO_PULLUP);
60#else
61#error need to configure gpio pins for debug uart
62#endif
63
64 /* now that the uart gpios are configured, enable the debug uart */
65 stm32_debug_early_init();
66
67 /* initialize external sram */
68 BSP_SRAM_Init();
69
70 /* initialize the lcd panel */
71 BSP_LCD_Init();
72}
73
74void target_init(void)
75{
76 TRACE_ENTRY;
77 stm32_debug_init();
78
79 qspi_flash_init(N25Q512A_FLASH_SIZE);
80
81#if WITH_LIB_MINIP
82 uint8_t mac_addr[6];
83 gen_random_mac_address(mac_addr);
84 eth_init(mac_addr, PHY_DP83848);
85
86 /* start minip */
87 minip_set_macaddr(mac_addr);
88
89 uint32_t ip_addr = IPV4(192, 168, 0, 99);
90 uint32_t ip_mask = IPV4(255, 255, 255, 0);
91 uint32_t ip_gateway = IPV4_NONE;
92
93 minip_init(stm32_eth_send_minip_pkt, NULL, ip_addr, ip_mask, ip_gateway);
94#endif
95
96 TRACE_EXIT;
97}
98
99#if 0
100void target_set_debug_led(unsigned int led, bool on)
101{
102 switch (led) {
103 case 0:
104 gpio_set(GPIO_LED0, on);
105 break;
106 case 1:
107 gpio_set(GPIO_LED1, on);
108 break;
109 case 2:
110 gpio_set(GPIO_LED2, on);
111 break;
112 case 3:
113 gpio_set(GPIO_LED3, on);
114 break;
115 }
116}
117#endif
118
119/**
120 * @brief Initializes the ETH MSP.
121 * @param heth: ETH handle
122 * @retval None
123 */
124/* called back from the HAL_ETH_Init routine */
125void HAL_ETH_MspInit(ETH_HandleTypeDef *heth)
126{
127 GPIO_InitTypeDef GPIO_InitStructure;
128
129 /* Enable GPIOs clocks */
130 __HAL_RCC_GPIOA_CLK_ENABLE();
131 __HAL_RCC_GPIOB_CLK_ENABLE();
132 __HAL_RCC_GPIOC_CLK_ENABLE();
133 __HAL_RCC_GPIOE_CLK_ENABLE();
134 __HAL_RCC_GPIOF_CLK_ENABLE();
135 __HAL_RCC_GPIOG_CLK_ENABLE();
136 __HAL_RCC_GPIOH_CLK_ENABLE();
137 __HAL_RCC_GPIOI_CLK_ENABLE();
138
139 /* Ethernet pins configuration ************************************************/
140 /*
141 ETH_MDIO -------------------------> PA2
142 ETH_MDC --------------------------> PC1
143 ETH_PPS_OUT ----------------------> PB5
144 ETH_MII_RXD2 ---------------------> PH6
145 ETH_MII_RXD3 ---------------------> PH7
146 ETH_MII_TX_CLK -------------------> PC3
147 ETH_MII_TXD2 ---------------------> PC2
148 ETH_MII_TXD3 ---------------------> PE2
149 ETH_MII_RX_CLK -------------------> PA1
150 ETH_MII_RX_DV --------------------> PA7
151 ETH_MII_RXD0 ---------------------> PC4
152 ETH_MII_RXD1 ---------------------> PC5
153 ETH_MII_TX_EN --------------------> PG11
154 ETH_MII_TXD0 ---------------------> PG13
155 ETH_MII_TXD1 ---------------------> PG14
156 ETH_MII_RX_ER --------------------> PI10 (not configured)
157 ETH_MII_CRS ----------------------> PA0 (not configured)
158 ETH_MII_COL ----------------------> PH3 (not configured)
159 */
160
161 /* Configure PA1, PA2 and PA7 */
162 GPIO_InitStructure.Speed = GPIO_SPEED_HIGH;
163 GPIO_InitStructure.Mode = GPIO_MODE_AF_PP;
164 GPIO_InitStructure.Pull = GPIO_NOPULL;
165 GPIO_InitStructure.Alternate = GPIO_AF11_ETH;
166 GPIO_InitStructure.Pin = GPIO_PIN_1 | GPIO_PIN_2 | GPIO_PIN_7;
167 HAL_GPIO_Init(GPIOA, &GPIO_InitStructure);
168
169 /* Note : ETH_MDIO is connected to PA2 which is shared with other signals like SAI2_SCKB.
170 By default on STM32756G-EVAL board, PA2 is connected to SAI2_SCKB, so to connect PA2 to ETH_MDIO :
171 - unsolder bridge SB24 (SAI2_CKB)
172 - solder bridge SB5 (ETH_MDIO) */
173
174 /* Configure PB5 */
175 GPIO_InitStructure.Pin = GPIO_PIN_5;
176 HAL_GPIO_Init(GPIOB, &GPIO_InitStructure);
177
178 /* Configure PE2 */
179 GPIO_InitStructure.Pin = GPIO_PIN_2;
180 HAL_GPIO_Init(GPIOE, &GPIO_InitStructure);
181
182 /* Configure PC1, PC2, PC3, PC4 and PC5 */
183 GPIO_InitStructure.Pin = GPIO_PIN_1 | GPIO_PIN_2 | GPIO_PIN_3 | GPIO_PIN_4 | GPIO_PIN_5;
184 HAL_GPIO_Init(GPIOC, &GPIO_InitStructure);
185
186 /* Note : ETH_MDC is connected to PC1 which is shared with other signals like SAI1_SDA.
187 By default on STM32756G-EVAL board, PC1 is connected to SAI1_SDA, so to connect PC1 to ETH_MDC :
188 - unsolder bridge SB22 (SAI1_SDA)
189 - solder bridge SB33 (ETH_MDC) */
190
191 /* Configure PG11, PG14 and PG13 */
192 GPIO_InitStructure.Pin = GPIO_PIN_11 | GPIO_PIN_13 | GPIO_PIN_14;
193 HAL_GPIO_Init(GPIOG, &GPIO_InitStructure);
194
195 /* Configure PH6, PH7 */
196 GPIO_InitStructure.Pin = GPIO_PIN_6 | GPIO_PIN_7;
197 HAL_GPIO_Init(GPIOH, &GPIO_InitStructure);
198
199 /* Configure PA0
200 GPIO_InitStructure.Pin = GPIO_PIN_0;
201 HAL_GPIO_Init(GPIOA, &GPIO_InitStructure);
202
203 Note: Ethernet Full duplex mode works properly in the default setting
204 (which MII_CRS is not connected to PA0 of STM32F756NGH6) because PA0 is shared
205 with MC_ENA.
206 If Half duplex mode is needed, uncomment PA0 configuration code source (above
207 the note) and close the SB36 solder bridge of the STM32756G-EVAL board .
208 */
209
210 /* Configure PH3
211 GPIO_InitStructure.Pin = GPIO_PIN_3;
212 HAL_GPIO_Init(GPIOH, &GPIO_InitStructure);
213
214 Note: Ethernet Full duplex mode works properly in the default setting
215 (which MII_COL is not connected to PH3 of STM32F756NGH6) because PH3 is shared
216 with SDRAM chip select SDNE0.
217 If Half duplex mode is needed, uncomment PH3 configuration code source (above
218 the note) and close SB47 solder bridge of the STM32756G-EVAL board.
219 */
220
221 /* Configure PI10
222 GPIO_InitStructure.Pin = GPIO_PIN_10;
223 HAL_GPIO_Init(GPIOI, &GPIO_InitStructure);
224
225 Note: Ethernet works properly in the default setting (which RX_ER is not
226 connected to PI10 of STM32F756NGH6) because PI10 is shared with data signal
227 of SDRAM.
228 If RX_ER signal is needed, uncomment PI10 configuration code source (above
229 the note) then remove R248 and solder SB9 of the STM32756G-EVAL board.
230 */
231}
232
233/**
234 * @brief Initializes SDRAM GPIO.
235 * @retval None
236 */
237/* called back from BSP_SDRAM_Init */
238void stm_sdram_GPIO_init(void)
239{
240 GPIO_InitTypeDef gpio_init_structure;
241
242 /* Enable GPIOs clock */
243 __HAL_RCC_GPIOD_CLK_ENABLE();
244 __HAL_RCC_GPIOE_CLK_ENABLE();
245 __HAL_RCC_GPIOF_CLK_ENABLE();
246 __HAL_RCC_GPIOG_CLK_ENABLE();
247 __HAL_RCC_GPIOH_CLK_ENABLE();
248 __HAL_RCC_GPIOI_CLK_ENABLE();
249
250 /* Common GPIO configuration */
251 gpio_init_structure.Mode = GPIO_MODE_AF_PP;
252 gpio_init_structure.Pull = GPIO_PULLUP;
253 gpio_init_structure.Speed = GPIO_SPEED_FAST;
254 gpio_init_structure.Alternate = GPIO_AF12_FMC;
255
256 /* GPIOD configuration */
257 gpio_init_structure.Pin = GPIO_PIN_0 | GPIO_PIN_1 | GPIO_PIN_8| GPIO_PIN_9 | GPIO_PIN_10 |\
258 GPIO_PIN_14 | GPIO_PIN_15;
259 HAL_GPIO_Init(GPIOD, &gpio_init_structure);
260
261 /* GPIOE configuration */
262 gpio_init_structure.Pin = GPIO_PIN_0 | GPIO_PIN_1 | GPIO_PIN_7| GPIO_PIN_8 | GPIO_PIN_9 |\
263 GPIO_PIN_10 | GPIO_PIN_11 | GPIO_PIN_12 | GPIO_PIN_13 | GPIO_PIN_14 |\
264 GPIO_PIN_15;
265 HAL_GPIO_Init(GPIOE, &gpio_init_structure);
266
267 /* GPIOF configuration */
268 gpio_init_structure.Pin = GPIO_PIN_0 | GPIO_PIN_1 | GPIO_PIN_2| GPIO_PIN_3 | GPIO_PIN_4 |\
269 GPIO_PIN_5 | GPIO_PIN_11 | GPIO_PIN_12 | GPIO_PIN_13 | GPIO_PIN_14 |\
270 GPIO_PIN_15;
271 HAL_GPIO_Init(GPIOF, &gpio_init_structure);
272
273 /* GPIOG configuration */
274 gpio_init_structure.Pin = GPIO_PIN_0 | GPIO_PIN_1 | GPIO_PIN_4| GPIO_PIN_5 | GPIO_PIN_8 |\
275 GPIO_PIN_15;
276 HAL_GPIO_Init(GPIOG, &gpio_init_structure);
277
278 /* GPIOH configuration */
279 gpio_init_structure.Pin = GPIO_PIN_2 | GPIO_PIN_3 | GPIO_PIN_5 | GPIO_PIN_8 | GPIO_PIN_9 |\
280 GPIO_PIN_10 | GPIO_PIN_11 | GPIO_PIN_12 | GPIO_PIN_13 | GPIO_PIN_14 |\
281 GPIO_PIN_15;
282 HAL_GPIO_Init(GPIOH, &gpio_init_structure);
283
284 /* GPIOI configuration */
285 gpio_init_structure.Pin = GPIO_PIN_0 | GPIO_PIN_1 | GPIO_PIN_2 | GPIO_PIN_3 | GPIO_PIN_4 |\
286 GPIO_PIN_5 | GPIO_PIN_6 | GPIO_PIN_7 | GPIO_PIN_9 | GPIO_PIN_10;
287 HAL_GPIO_Init(GPIOI, &gpio_init_structure);
288}
289
290void HAL_QSPI_MspInit(QSPI_HandleTypeDef *hqspi)
291{
292 GPIO_InitTypeDef GPIO_InitStruct;
293
294 /*##-1- Enable peripherals and GPIO Clocks #################################*/
295 /* Enable GPIO clocks */
296 __HAL_RCC_GPIOB_CLK_ENABLE();
297 __HAL_RCC_GPIOF_CLK_ENABLE();
298
299 /*##-2- Configure peripheral GPIO ##########################################*/
300 /* QSPI CS GPIO pin configuration */
301 GPIO_InitStruct.Pin = GPIO_PIN_6;
302 GPIO_InitStruct.Mode = GPIO_MODE_AF_PP;
303 GPIO_InitStruct.Pull = GPIO_PULLUP;
304 GPIO_InitStruct.Speed = GPIO_SPEED_HIGH;
305 GPIO_InitStruct.Alternate = GPIO_AF10_QUADSPI;
306 HAL_GPIO_Init(GPIOB, &GPIO_InitStruct);
307
308 /* QSPI CLK GPIO pin configuration */
309 GPIO_InitStruct.Pin = GPIO_PIN_2;
310 GPIO_InitStruct.Pull = GPIO_NOPULL;
311 GPIO_InitStruct.Alternate = GPIO_AF9_QUADSPI;
312 HAL_GPIO_Init(GPIOB, &GPIO_InitStruct);
313
314 /* QSPI D0 GPIO pin configuration */
315 GPIO_InitStruct.Pin = GPIO_PIN_8;
316 GPIO_InitStruct.Alternate = GPIO_AF10_QUADSPI;
317 HAL_GPIO_Init(GPIOF, &GPIO_InitStruct);
318
319 /* QSPI D1 GPIO pin configuration */
320 GPIO_InitStruct.Pin = GPIO_PIN_9;
321 GPIO_InitStruct.Alternate = GPIO_AF10_QUADSPI;
322 HAL_GPIO_Init(GPIOF, &GPIO_InitStruct);
323
324 /* QSPI D2 GPIO pin configuration */
325 GPIO_InitStruct.Pin = GPIO_PIN_7;
326 GPIO_InitStruct.Alternate = GPIO_AF9_QUADSPI;
327 HAL_GPIO_Init(GPIOF, &GPIO_InitStruct);
328
329 /* QSPI D3 GPIO pin configuration */
330 GPIO_InitStruct.Pin = GPIO_PIN_6;
331 GPIO_InitStruct.Alternate = GPIO_AF9_QUADSPI;
332 HAL_GPIO_Init(GPIOF, &GPIO_InitStruct);
333}
334