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192.168.1.100 / T103 / 1f884588077ad3476b9c91cbb0ee9ee0332bbb68 / . / src / devtools / met-driver / 4.14 / common / mtk_emi_bm.h
blob: 43295bed8d1086edc90fd20caec8f990de32a37c [file] [log] [blame]
rjw1f884582022-01-06 17:20:42 +0800[diff] [blame^]1/*
2 * Copyright (C) 2018 MediaTek Inc.
3 *
4 * This program is free software: you can redistribute it and/or modify
5 * it under the terms of the GNU General Public License version 2 as
6 * published by the Free Software Foundation.
7 *
8 * This program is distributed in the hope that it will be useful,
9 * but WITHOUT ANY WARRANTY; without even the implied warranty of
10 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
11 * GNU General Public License for more details.
12 */
13
14#ifndef __MT_MET_EMI_BM_H__
15#define __MT_MET_EMI_BM_H__
16
17
18#define ADDR_EMI ((unsigned long) BaseAddrEMI)
19
20/*========================================================*/
21/*EMI configuration by project*/
22/*Change config start*/
23/*========================================================*/
24#define _GP_1_Default (_M0 | _M1)
25#define _GP_2_Default (_M2 | _M5)
26#define _GP_3_Default (_M6 | _M7)
27
28
29/*========================================================*/
30/*Change config end*/
31/*========================================================*/
32
33
34#define _M0 (0x01)
35#define _M1 (0x02)
36#define _M2 (0x04)
37#define _M3 (0x08)
38#define _M4 (0x10)
39#define _M5 (0x20)
40#define _M6 (0x40)
41#define _M7 (0x80)
42#define _ALL (0xFF)
43
44enum BM_RW_Type {
45 BM_BOTH_READ_WRITE,
46 BM_READ_ONLY,
47 BM_WRITE_ONLY
48};
49
50enum {
51 BM_TRANS_TYPE_1BEAT = 0x0,
52 BM_TRANS_TYPE_2BEAT,
53 BM_TRANS_TYPE_3BEAT,
54 BM_TRANS_TYPE_4BEAT,
55 BM_TRANS_TYPE_5BEAT,
56 BM_TRANS_TYPE_6BEAT,
57 BM_TRANS_TYPE_7BEAT,
58 BM_TRANS_TYPE_8BEAT,
59 BM_TRANS_TYPE_9BEAT,
60 BM_TRANS_TYPE_10BEAT,
61 BM_TRANS_TYPE_11BEAT,
62 BM_TRANS_TYPE_12BEAT,
63 BM_TRANS_TYPE_13BEAT,
64 BM_TRANS_TYPE_14BEAT,
65 BM_TRANS_TYPE_15BEAT,
66 BM_TRANS_TYPE_16BEAT,
67 BM_TRANS_TYPE_1Byte = 0 << 4,
68 BM_TRANS_TYPE_2Byte = 1 << 4,
69 BM_TRANS_TYPE_4Byte = 2 << 4,
70 BM_TRANS_TYPE_8Byte = 3 << 4,
71 BM_TRANS_TYPE_16Byte = 4 << 4,
72 BM_TRANS_TYPE_32Byte = 5 << 4,
73 BM_TRANS_TYPE_BURST_WRAP = 0 << 7,
74 BM_TRANS_TYPE_BURST_INCR = 1 << 7
75};
76
77enum {
78 BM_TRANS_RW_DEFAULT = 0x0,
79 BM_TRANS_RW_READONLY,
80 BM_TRANS_RW_WRITEONLY,
81 BM_TRANS_RW_RWBOTH
82};
83
84
85#define EMI_BMID_MASK (0xFFFF)
86#define BM_COUNTER_MAX (21)
87
88#define BM_REQ_OK (0)
89#define BM_ERR_WRONG_REQ (-1)
90#define BM_ERR_OVERRUN (-2)
91
92#define BM_TTYPE1_16_ENABLE (0)
93#define BM_TTYPE1_16_DISABLE (-1)
94#define BM_TTYPE17_21_ENABLE (0)
95#define BM_TTYPE17_21_DISABLE (-1)
96
97#if defined(CONFIG_MTK_TINYSYS_SSPM_SUPPORT) && defined(ONDIEMET_SUPPORT)
98enum BM_EMI_IPI_Type {
99 SET_BASE_EMI = 0x0,
100 SET_EBM_CONFIGS1 = 0x7,
101 SET_EBM_CONFIGS2 = 0x8,
102 SET_REGISTER_CB = 0x9,
103};
104#endif
105
106#define EMI_OFF 0x0000
107#define EMI_BMEN (0x400-EMI_OFF)
108#define EMI_MSEL (0x440-EMI_OFF)
109#define EMI_MSEL2 (0x468-EMI_OFF)
110#define EMI_MSEL3 (0x470-EMI_OFF)
111#define EMI_MSEL4 (0x478-EMI_OFF)
112#define EMI_MSEL5 (0x480-EMI_OFF)
113#define EMI_MSEL6 (0x488-EMI_OFF)
114#define EMI_MSEL7 (0x490-EMI_OFF)
115#define EMI_MSEL8 (0x498-EMI_OFF)
116#define EMI_MSEL9 (0x4A0-EMI_OFF)
117#define EMI_MSEL10 (0x4A8-EMI_OFF)
118
119#define EMI_BMID0 (0x4B0-EMI_OFF)
120#define EMI_BMID1 (0x4B4-EMI_OFF)
121#define EMI_BMID2 (0x4B8-EMI_OFF)
122#define EMI_BMID3 (0x4BC-EMI_OFF)
123#define EMI_BMID4 (0x4C0-EMI_OFF)
124#define EMI_BMID5 (0x4C4-EMI_OFF)
125#define EMI_BMID6 (0x4C8-EMI_OFF)
126#define EMI_BMID7 (0x4CC-EMI_OFF)
127#define EMI_BMID8 (0x4D0-EMI_OFF)
128#define EMI_BMID9 (0x4D4-EMI_OFF)
129#define EMI_BMID10 (0x4D8-EMI_OFF)
130
131#define EMI_BMEN1 (0x4E0-EMI_OFF)
132#define EMI_BMEN2 (0x4E8-EMI_OFF)
133#define EMI_BMRW0 (0x4F8-EMI_OFF)
134#define EMI_BMRW1 (0x4FC-EMI_OFF)
135
136
137extern int MET_BM_Init(void);
138extern void MET_BM_DeInit(void);
139extern void MET_BM_SaveCfg(void);
140extern void MET_BM_RestoreCfg(void);
141extern int MET_BM_SetMonitorCounter(const unsigned int counter_num,
142 const unsigned int master, const unsigned int trans_type);
143extern int MET_BM_SetTtypeCounterRW(unsigned int bmrw0_val, unsigned int bmrw1_val);
144extern int MET_BM_Set_WsctTsct_id_sel(unsigned int counter_num, unsigned int enable);
145extern int MET_BM_SetbusID_En(const unsigned int counter_num,
146 const unsigned int enable);
147extern int MET_BM_SetbusID(const unsigned int counter_num,
148 const unsigned int id);
149extern int MET_BM_SetUltraHighFilter(const unsigned int counter_num, const unsigned int enable);
150extern int MET_BM_SetLatencyCounter(unsigned int enable);
151#endif /* !__MT_MET_EMI_BM_H__ */